CA1005529A - Level sensitive logic system - Google Patents

Level sensitive logic system

Info

Publication number
CA1005529A
CA1005529A CA180,787A CA180787A CA1005529A CA 1005529 A CA1005529 A CA 1005529A CA 180787 A CA180787 A CA 180787A CA 1005529 A CA1005529 A CA 1005529A
Authority
CA
Canada
Prior art keywords
logic system
level sensitive
sensitive logic
level
sensitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA180,787A
Other versions
CA180787S (en
Inventor
Edward B. Eichelberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1005529A publication Critical patent/CA1005529A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541—Scan latches or cell details
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318552—Clock circuits details
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms
CA180,787A 1972-10-16 1973-09-11 Level sensitive logic system Expired CA1005529A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29754372A 1972-10-16 1972-10-16

Publications (1)

Publication Number Publication Date
CA1005529A true CA1005529A (en) 1977-02-15

Family

ID=23146762

Family Applications (1)

Application Number Title Priority Date Filing Date
CA180,787A Expired CA1005529A (en) 1972-10-16 1973-09-11 Level sensitive logic system

Country Status (11)

Country Link
US (1) US3783254A (en)
JP (1) JPS5228614B2 (en)
BR (1) BR7308087D0 (en)
CA (1) CA1005529A (en)
CH (1) CH568620A5 (en)
DE (1) DE2349377C2 (en)
ES (1) ES419582A1 (en)
FR (1) FR2203232B1 (en)
GB (1) GB1448382A (en)
IT (1) IT998504B (en)
SE (1) SE384931B (en)

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Also Published As

Publication number Publication date
GB1448382A (en) 1976-09-08
US3783254A (en) 1974-01-01
FR2203232A1 (en) 1974-05-10
ES419582A1 (en) 1976-04-16
AU6051173A (en) 1975-03-20
JPS4974857A (en) 1974-07-19
SE384931B (en) 1976-05-24
IT998504B (en) 1976-02-20
DE2349377A1 (en) 1974-05-02
DE2349377C2 (en) 1982-10-28
JPS5228614B2 (en) 1977-07-27
BR7308087D0 (en) 1974-08-15
FR2203232B1 (en) 1976-05-14
CH568620A5 (en) 1975-10-31

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