CA1064132A - Lubricator pressure cycle alarm - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE

An adjustable timing circuit for monitoring intervals between operating periods of a cyclic fluid liquid dis-pensing apparatus is disclosed. The cyclic fluid dispensing apparatus is designed to dispense an excess amount of fluid into a fluid system at periodic intervals. If the fluid system and fluid dispensing apparatus are operating properly, the pressure in the fluid system increases to a predeter-mined level shortly after the initiation of a fluid dispens-ing operation. The adjustable timing circuit monitors this condition and generates an alarm signal if the predetermined level of fluid pressure is not reached within a preset time period which is slightly greater than the periodic interval during which the dispensing apparatus is designed to oper-ate.

Description

BACKGROUND OF THE INVENTION
In lubricating systems it is typical to provide - a cyclically operable lubricant pumping apparatus which is periodically operated to build lubricant pressure to a suitable level. The lubricant ùnder pressure is then metered to provide a measured flow of the lubricant to the equipment being so lubricated.
Since the metering of the flow of lubricant is adjusted to pro~ide lubricating fluid sufficient for a substantial operating interval, the pump is typically operated to supply lubricant at intervals separated by substantially long time periods which are usually of the order of hours. However, it is very important to be assured that the pump is in fact operating properly since failure in providing adequate lubricant flow may result in severe damage to the equipment being so lubricated, necessitating the use of circuitry which is capable of developing time delays which are of the order of a few hours.
Various systems have been devised to ascertain whether automatically operating cyclic liquid dispensing apparatus is operating properly or is malfunctioning. A
conventional sensing device for determining whether there has been a malfunction comprises a pressure sensing device for sensing system pressure after each periodic pulse of liquid pressure. Such devices are coupled with a timing device for generating a time interval that is slightly longer than the time that elapses between pump operations, so that if the presence of a predetermined quantity of lubricant at the correct pressure is not sensed within a predetermined time period, an indication is given that a malfunction has occurred. The pressure sensin~-device is associated with an automatic reset timer. The pressure ~`

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sensing device resets the timing device by activating a reset device in the timing device. An indicator device is connected with the pressure sensing device to indicate when the pressure sensing device has responded to an underpressure due to a malfunction in the system. Such prior art systems are expensive since they re~uire a pressure sensing device, a complex and expensive timer and a com~lex and expensive recycling means.
, ' i;n effort to obtain similar operations through a less expensive apparatus led to the development of the hydraulic pressure cycle indicator described in U.S. Patent

3,583,528. One disadvantage of this system resides in the fact that large time variations occur due to changes in lubricant viscosity with ambient temperature thereby significantly altering the bleed-off interval.
. BRIEF DESCRIPTION OF T~E INVENTION :~
The present invention is characterized by providing ' a novel inexpensive time delay circuit capable of providing extremely long time delay periods before time-out, which periods are typically of the order of hours, so as to provide an indication in the form, for example, of a warning light, which advises personnel of the fact that the pump is or is not operating properly and/or that the periodic flow of lubricant has or has not been terminated for a prolonged and abnormal period of time since its last interval of activation. Of course, alternate warning systems can be used or the alarm can be directly coupled to the electrical contents of the apparatus being lubricated to init,iate shutdown due to the interruption of full lubrication, etc. The system is further distinguished by being immune to cl~anges in lubricant viscosity.

In the present invention, a pressure switch means is activated simultaneously with the flow of lubricant at a predetermined pressure and under control of a pump to set a bistable flip-flop which serves as a control circuit. The setting of the flip-flop activates an oscillator having an adjustable time base whose time constant is controlled by its R.C. timing elements. Each pulse developed by the oscillator is applied to an electronic incremental counter means to advance the count thereof. Logical gating means develops a predetermined output level indicating that the counter means has reached a predetermined tand adjustable) count, and said gating means causes the control flip-flop to be reset. A
comparator compares the voltage level at the output of the gating means against a preset threshold and activates an electronic switch when the threshold level is reached to activate an alarm. A second time delay provided by a second timing circuit assures that retriggering of timing means occurs after resetting of the control flip-flop in the event ~ that the pressure switc]l is closed just before termination 20 of the delay period to prevent erroneous activation of the ~
alarm means. The employment of an oscillator having an ~-adjustable time base in conjunction with the adjustable counter means prevents transients in the supply line powering the circuit from significantly altering the desired time delay period.
BRIEF DESCRIPTION OF THE DRA~TINGS AND OBJECTS
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It is therefore one primary object of the present invention to provide a novel monitoring circuit including adjustable time delay means for developing a warning indication whenever the time between intervals of lubricant flow are abnormally long.

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The above as well as other objects of the present invention will become apparent from a consideration of the ensuing description and drawing.
The sole Figure is a schematic diagram showing one preferred embodiment of the present invention.
DETAILED DESCRIPTION OF THE INVENTION AND FIGURES
. _ The Figure shows a schematic diagram of monitoring méans; l0 embodying the principles of the present inven-tion and which is comprised of a cyclic lubricating system shown in simplified fashion at "load" 31. Such systems are described in U.S. Patents 3,091,306; 3,072,300; 2,856,024;
2,784,808, among others. A typical one of these systems com-prises a continuously operating cam driven motor (not shown herein for purposes of simplicity). Although the invention is described as being utilized in conjunction with a lubricating system, it should be understood that this description is merely exemplary and that the invention may be employed in any hydraulic system whether motor or non-motor driven and is especially advantageous foruse in hydraulic systems which experience fluctuating pressures.
The lubricant is periodically dispensed into a distribution conduit for supplying the apparatus being lubri-cated at periodic intervals. One suitable mechanism for pro-viding the periodic replenishing of lubricant is shown, for example, in Figure 1 of U.S. Patent 3,947,836.
Pressure switch 11 is one constituent of the monitoring means 10 which, in turn, is comprised of an A.C.
source 12 coupling an A.C. signal across varistor 13.

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The power source, in the preferred embodiment is preferably a 115 volt A.C. supply, either 50 or 60 llz. Varistor 13 is coupled across the primary winding of transformer Tl to protect the circuit from overvoltage spikes which may occur in the supply line. The secondary winding o transformer Tl preferably supplies 24 volts A.C. to a Zener regulated D.C. po~er supply which is comprised of diode CRl, capacitor Cl, resistor Rl and Zener diode CR2 which serves to regul~te the voltage across positive D.C. bus 14 -~ lO and ground bus 15.
A programmable counter/timer circuit 17 is con-nected between the power and ground busesl4 and 15 to power the circuits contained therein.
The programmable timer/counter circuitry 17 is basically comprised of a bistable control flip-flop 18 having trigger and reset inputs 18a and l~b respectively and having outputs 18c and 18d respectively coupled to time base oscillator 19 and binary counter 20. The binary state of the output 18c serves to selectively disable or activate time base oscillator 19. The binary state of output 18d serves to clear binary counter 20 when in a first state and, when in the opposite binary state enables the binary counter 20 to be incremented.
Time base oscillator 19 may, or example, be any suitable type of oscillator for generating incrementing out-- put pulses at a rate determined by an RC timing circuit com-prised of resistor R5 and capacitor C5 connected between po~Yer and ground buses f4 and lS respectively. As one exemplary embodiment, the time base oscillator 19 may comprise a unijunction transistor which is triggered to conduct when the voltage across C5 achieves a predetermined threshold level, so as to apply negative going pulses developed at the - L~
output 19a of oscillator 19 and which are applied to the trig~er input o~ counter 20. Each time the unijunction transistor conducts, capacitor C5 is discharged until the level at the input to the unijunction transistor drops below the threshold level, at which time capacitor C5 will again charge with the time constant being the product of R5 and C5. R5 may be an adjustable resistor.
Binary counter 20 is a multistage electronic counter. In the example shown, counter 20 is pr~vided with eight stages capable of accumulating a maximum o 255 pulses (i.e. 28 -1). Outputs 20a-1 through 20a-8 are selecti~ely coupled to common lead 21 in any desired combination. Lead 21, in turn, is coupled between one terminal of resistor R2 and one terminal of resistor R3. The opposite terminal of R2 is coupled to power bus 14, while the opposite terminal of R3 is coupled through capacitor C2 to ground bus 15 and ; through lead 22 to the reset input 18b of control flip-flop 18. The connection of all or a selected number of the outputs 20a-1 through 20a-8 constitute a "wired-OR" logical gating circuit whose output is coupled to reset input terminal 18b for resetting bistable control flip-flop 18 only when the output of the "wired-OR" gate is high. Assuming that bistable control flip-flop 18 has been reset, binary counter 20 is reset through output lead 18d causing all outputs 20a-1 through 20a-8 of binary counter 20 to be in the high state. When a trigger input is applied to terminal 18a (in a manner to be more fully de-scribed) control flip-flop 18 is set to enable time base oscillator 19 to be free-running and to remove the clear signal from binary counter 20. This causes ~11 outputs 20a-1 through 30 20a-8 to go low (i.e. to go to ground level). ~ -Time base oscillator 19 applies negative going pulses to input 20b of counter 20 wherein the voltage levels of all of the outputs 20a-1 througll 20a-8 are alternated ~ 3~,;
between ~round and high states at a frequency l/(2MR5C5) where N represents the respective output stage. The output connections 20a-1 through 20a-8 which are selectively coupled to common lead 21 all go to ground upon application of a trigger pulse to control flip-flop 18 and remain in the low state for a time duration equaling the sum of the times each output connected to common lead 21 remains low.
For example, output 20a-1 remains low for T seconds wherein T - R5C5. Outp,ut 20a-2 remains low for a time interval 10 '~'' 2T; output 20a-3 remains low for a time equal to 4T; output 20a-4 remains low for a time interval 8T; ...and output 20a-8 remains low for a time interval equal to 128T. All of the outputs then return to a high state after the termination of the aforementioned time intervals. The voltage at - - terminal A however will not go high until all of the outputs 20a-1 through 20a-8 which are coupled to lead 21 i , are simultaneously high, at which time a high level is applied to reset input 18b through resistor R3 causing the output at terminal A to remain high. Por example, if all ;
leads 20a-1 through 20a-8 are couple,d to lead 21, the output level at terminal 18 will go high after a time interval 255T. '' Diode CR3 is polarized so as to prevent the positive voltage applied to input 18b from being coupled to trigger input 18a so as to prevent erroneous triggering of control flip-flop 18.
Capacitor C2 protects the circuit from being erroneously reset by noise or other transients.
In the event that a transient occurs during a timing interval (2N-l)T at most only one output pulse developed by the time base oscillator will be affected causing an insignificant alternation in the overall time ' interval.

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Pressure switch 11 is comprised of a pair of . ., stationary contacts lla and a movable contact llb which bridges contacts lla at the periodic intervals during which the lubricant is dispensed and reaches a threshold pressure level. A contact closure which occurs when point A is at ground and before the expiration o the time delay set by R5 and C5 causes the programmable timer/counter 17 to be reset and retriggered. Resistor R6 and capacitor C4 provide a time delay to allow control flip-flop 18b to be reset before being retriggered wherein contact closure of contact llb substantially instantaneously applies a reset pulse to input 18b while applying a trigger pulse to input 18a after a time delay T2 where T2 = R6-C4. The output of circuit 17 appearing at termina~ A goes high breifly during this time delay until circuit 17 is re-triggered. Resistor R7 connected betwecn one stationary contact lla and power bus 14 serves to protect the power supply in the event that the connections to circuit 17 are accidentally grounded.
Output A is further coupled;through resistor R~
and capacitor C6 to ground bus lS.- Tlle common terminal 23 therebetween is coupled to one input 24a of comparator 24. The remaining input 24b is coupled to the common terminal 25 between resistors R9 and R10 forming a voltage divider circuit which is coupled between power and ground buses 14 and 15, respectively. The voltage appearing at ~
terminal 25 serves as a threshold level controlling the operation of comparator 24. Output terminal 24c of comparator 24 is coupled through resistor ~12 to the trigger input 26a of triac 26. Resistor R12 serves to limit gate current .... . . .
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'- , ' ' --, to gate electrode 26a. Comparator 24 is connected between power and ground buses 14 and 15 through conductors 27 and 28 respectively. Output 24d is also connected to power bus 14 by conductor 29. The current applied -to input 24e by resistor Rll, whose opposite terminal is connected to power bus 14, controls *he gain of comparator circuit 24 which is such that sufficient gain is provided for comparator 24 so that output 24c is at ground level if the voltage at input 24b is greater ]o than the voltage in input 24a and such that output 24c is essentially at the positive supply voltage if the voltage applied at input 24a is greater than the voltage applied to input 24b.
The voltage at input 24a is essentially the same as *he voltage at point A. ~lowever, resistor R8 and capacitor C6 provide a time delay between any change in voltage level at point A and a corresponding change at input 24a. The time delay provided by R8 and CÇ
prevents the voltage level at input 24a from changing during the time interval required to retrigger control flip-flop 18 by closure of pressure activated switch 11.
Triac 26 is shown as being coupled across a load 31 and the A.C. supply source 12.
Let it be assumed that power is initially supplied to the circuit and that the pressure actuated switch 11 is open. The output o programmable timer/counter 17 (terminal A) will be high and will be higher than the threshold level at input terminal 24b of comparator 24 causing output 24c to go high resulting in the con-duction of triac 26. A closed circuit is thus providedto load 31 which may, for example, consist of an audible and/or visual alarm. I~ pressure switch 11 is momcntarily 10 .

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closed, control flip-flop 18 will be immediately reset and, after a time delay controlled by R6 and C~, control flip-flop 18 will be set causing binary counter 20 to be cleared so that all of its outputs will be low and hence the voltage level at terminal A will go low causing the voltage level at input 24a of comparator 24 to be less than the voltage at input 24b. This causes output 24c of comparator 24 to go low thereby turning of triac 26 and hence decoupling load 31 from A.C. source 12. Re-triggering of control flip-flop 18 further drives oscillator 19 into its free-running state.
As was described hereinabove, the voltage level at terminal A will remain low until all of the outputs 20a-1 through 20a-8 coupled to conductor 21 go high after a time interval which is a function of the number of outputs 20a-1 through 2~a-8 coupled to lead ! 21 and which is further a function of the time constant o oscillator 19 which is determined by R5 and C5.
In the event that pressure actuated switch 11 remains 20~ open when the output at terminal A goes high, comparator 24 will activate triac 26 and couple power source 12 to load 31 to provide an alarm indication.
If pressure actuated switch 11 is momentarily closed at any time before the expiration of the present time delay, bistable control flip-flop 18 will first be reset and then retriggered to initiate a new time delay. During the brief delay necessary between reset and retriggering, the voltage at terminal A will go to its high state. However, resistors ~6, R8, R9 and R10 - 30 and capacitors C4 and C6 are all selected to insure that circuit 17 will be retriggered before the voltage at . . ~ , .

input 24a of comparator 24 exceeds the voltage at input 24b so as to prevent erroneous turn-on of triac 26.
j The time delay which is a function of both the number of outputs of counter 20 which are coupled to con-ductor 21 and the time base of oscillator 19 (which is controlled by the values R5 and C5) is capable of providing programmable time delays from microseconds up to time intervals as much as five days. The particular time delay selected is correlated with the lubricant dispensing intervals. For example, let it be assumed that the motor operated cam serves to cause lubricant to be dispensed at two hour intervals. The programmable timer/counter is - adjusted by selection of the values R5 and C5 and by selection of the number of outputs 20a-1 through 20a-8 connected to lead 21 so as to provide a time delay interval which is at least slightly longer than the two hour interval at which lubricant is dispensed. For example, the time delay may be two hours and 15 minutes. Thus, if for any reason the lubricant being dispensed is insufficient to activate the pressure actuated switch 11 which might, for example, be coupled in the lubricant distribution conduit, the programmable timer/counter 17 will "time out" to create an alarm condition. Assuming normal operation of the lubricant dispensing mechanism, pressure actuated switch 11 will momentarily close at two hour intervals and in any case before "time out" of the programmable timer/counter 17 causing it to be reset and then retriggered thereby re-initiating a new t~ming interval. As was set forth herein-above, momentary closure of pressure actuated switch 11 substantially instantaneously resets bistable control flip-flop 18 (through diode CR3) causing all of the outputs of 20a of counter 20 to go high and further causes time base oscillator 19 to be disabled. After a predetermined time delay (controlled by C4 and R6) bistable control flip-flop 19 is retriggered to cause turn-on of time base oscillator l9 causing counter 20 to have all of its outputs 20a to be reset to the low level. Even tho~gh terminal A will momentarily go high during the aforementioned reset operation~ common terminal 23 is prevented from 10 going high by the delay circuit comprised of R8 and C6 to prevent input 24a of comparator 24 from going to a voltage level higher than input terminal 24b during the brief time delay between reset and retriggering of bistable control flip-flop 18. Thus erroneous turn-on of triac 26 is prevented during the reset and retriggering operations.
The above description has been set forth for a normally "off" output, i.e. or an output in which load 31 is normally deenergized until programmable timer/counter 17 "times out", at which time load 31 is energized if the time delay of circuitry 17 expires without a reset. The circuitry may be altered to provide a normally "on"
output in which load 31 is normally energized unless the time delay expires without a reset, which alteration is -accomplished by coupling termi~nal 23 to comparator input ~4b and by coupling terminal 25 to comparator input 24a.
In this alternative arrangement, load 31 ;s normally energized until programmable timer/counter circuit 17 "times-out", at which time triac 26 is triggered to the off state to deenergize load 31. This latter arrangement may be utilized, for example, to turn "off" a normally "on"
lamp or to control the motors or other equipment being 13.

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lubricated to be turned off to prevent any dama~e or overheating as a result of the failure to dispense the lubricant at the preset intervals.
Although there has been described a preferred embodiment of this novel invention, many variations and modifications will nol~ be apparent to those skilled in the art. Therefore, this invention is to be limited, not by the specific disclosure herein, but only by the appending claims.

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Claims (4)

WHAT IS CLAIMED IS:
1. Adjustable timing apparatus for monitoring intervals between operations occurring in a cyclical periodic fashion to provide an alarm condition when the time period between successive operations is abnormally long comprising;
oscillator means for generating timing pulses at spaced intervals T;
N stage counter means coupled to said oscillator means for accumulating said timing pulses;
bistable control means for disabling said oscillator means and resetting said counter means when in a first state and for enabling said oscillator means to increment said counter means when in a second state;
said apparatus being characterized by comprising first switch means being activated upon the occurrence of one of said operations to drive said control means to said second state;
a power source and first reference means coupled to said power source for establishing a first predetermined threshold voltage;
logical gating means;
first comparator means coupled to said gating means and said first reference means for generating an output signal when the voltage across said output of said gating means exceeds said first predetermined threshold;
1. Claim 1 continued -alarm means and electrical switch means coupled to said output of said first comparator means for activating said alarm means when said comparator means generates an output signal;
   the outputs of selected stages of said counter means being coupled to said gating means to adjust the time interval TT between driving of said control means to said second state and said comparator means generating an output wherein T ? TT ? (2N-1)T.
2. 2. The apparatus of claim 1 wherein said control means is characterized by including reset and trigger inputs, the output of said gate means being coupled to said control means reset input for driving said control means to said first state when said gating means output goes high and thereby prevent said oscillator means from generating subsequent timing pulses and thereby halt the counting operation of said counting means.
3. 3. The apparatus of claim 2 further characterized by comprising means coupled between said first switch means and said bistable control means reset input for instantaneously driving said control means to said first state and delay means coupled between said first switch means and said trigger input for driving said control means to said second state upon the actuation of said first switch means and subsequent to the resetting of said bistable control means.
4. 4. The apparatus of claim 3 being further characterized by comprising delay means coupled between said logical gating means and said comparator means for delaying the application of a change in the output state of said gating means to said comparator means to prevent said electrical switch means from being erroneously triggered to the conductive state.