CA1079792A - Multiple array printer - Google Patents
Multiple array printerInfo
- Publication number
- CA1079792A CA1079792A CA280,278A CA280278A CA1079792A CA 1079792 A CA1079792 A CA 1079792A CA 280278 A CA280278 A CA 280278A CA 1079792 A CA1079792 A CA 1079792A
- Authority
- CA
- Canada
- Prior art keywords
- media
- support
- arrays
- marking means
- drum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000003491 array Methods 0.000 claims abstract description 51
- 230000007246 mechanism Effects 0.000 claims description 6
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- 230000015654 memory Effects 0.000 description 52
- 238000010586 diagram Methods 0.000 description 10
- 230000006870 function Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000005055 memory storage Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
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- 101100305983 Mus musculus Rom1 gene Proteins 0.000 description 1
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- 230000033458 reproduction Effects 0.000 description 1
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- XLNZEKHULJKQBA-UHFFFAOYSA-N terbufos Chemical compound CCOP(=S)(OCC)SCSC(C)(C)C XLNZEKHULJKQBA-UHFFFAOYSA-N 0.000 description 1
- 238000012800 visualization Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/485—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by the process of building-up characters or image elements applicable to two or more kinds of printing or marking processes
- B41J2/505—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by the process of building-up characters or image elements applicable to two or more kinds of printing or marking processes from an assembly of identical printing elements
- B41J2/5056—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by the process of building-up characters or image elements applicable to two or more kinds of printing or marking processes from an assembly of identical printing elements using dot arrays providing selective dot disposition modes, e.g. different dot densities for high speed and high-quality printing, array line selections for multi-pass printing, or dot shifts for character inclination
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
- G06K15/02—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
- G06K15/10—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by matrix printers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa
- H04N1/19—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays
- H04N1/191—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays the array comprising a one-dimensional array, or a combination of one-dimensional arrays, or a substantially one-dimensional array, e.g. an array of staggered elements
- H04N1/1911—Simultaneously or substantially simultaneously scanning picture elements on more than one main scanning line, e.g. scanning in swaths
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa
- H04N1/19—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays
- H04N1/191—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays the array comprising a one-dimensional array, or a combination of one-dimensional arrays, or a substantially one-dimensional array, e.g. an array of staggered elements
- H04N1/1911—Simultaneously or substantially simultaneously scanning picture elements on more than one main scanning line, e.g. scanning in swaths
- H04N1/1916—Simultaneously or substantially simultaneously scanning picture elements on more than one main scanning line, e.g. scanning in swaths using an array of elements displaced from one another in the main scan direction, e.g. a diagonally arranged array
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa
- H04N1/19—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays
- H04N1/195—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays the array comprising a two-dimensional array or a combination of two-dimensional arrays
- H04N1/19505—Scanning picture elements spaced apart from one another in at least one direction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa
- H04N1/19—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays
- H04N1/195—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays the array comprising a two-dimensional array or a combination of two-dimensional arrays
- H04N1/19505—Scanning picture elements spaced apart from one another in at least one direction
- H04N1/1951—Scanning picture elements spaced apart from one another in at least one direction in one direction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa
- H04N1/19—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays
- H04N1/195—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays the array comprising a two-dimensional array or a combination of two-dimensional arrays
- H04N1/19505—Scanning picture elements spaced apart from one another in at least one direction
- H04N1/19521—Arrangements for moving the elements of the array relative to the scanned image or vice versa
- H04N1/19526—Optical means
- H04N1/19552—Rotation of optical elements
Abstract
MULTIPLE ARRAY PRINTER
ABSTRACT
An ink jet copier is provided with a document scanner which scans a document to be copied one line at a time producing non-coded binary data. The binary data is inserted in storage in a predetermined arrangement. Stored data is removed from selected predetermined locations in accordance with an algorithm and applied to a plurality of ink jet nozzles arranged in multiple linear arrays about the circumference of a rotating paper drum. The data signals selectively applied to the ink jet printers control the deposition of ink on the paper supported on the rotating drum to cause the reproduction of the original scanned image on a predetermined interlaced basis.
ABSTRACT
An ink jet copier is provided with a document scanner which scans a document to be copied one line at a time producing non-coded binary data. The binary data is inserted in storage in a predetermined arrangement. Stored data is removed from selected predetermined locations in accordance with an algorithm and applied to a plurality of ink jet nozzles arranged in multiple linear arrays about the circumference of a rotating paper drum. The data signals selectively applied to the ink jet printers control the deposition of ink on the paper supported on the rotating drum to cause the reproduction of the original scanned image on a predetermined interlaced basis.
Description
l o~
1~
16 BACKGROUND OF THE_INVENTION
17 Field of the Invention , . ,~
18 The invention relates,to copiers in general and ' more speciflcally to multiple nozzle ink jet copiers,in ~ ~, N
which a plurality.of ink jet. nozzles are arranged in~,,a;,.` .'~
plurality of l,inear arrays around the periphery of a,',rotating medium support drum and the scanned information from~,a. ~
23 - document is.prearranged in memory and.later, transferred to . -.
the llnear arrays.of nozzles at appropriate predetermined times to reproduce a copy of the soanned docu~ent on a medium supported on the drum.
.
.
.
,' .~
:
f ' ' '' ' ' ' ' ' ,, ,,, ', __ : ' ' .
.. ~.:
.: .
- . -., -, .
.~:
. .
~,.' '.:-:, :.,.~ , .. " .,: " ~ , - ' ; " . .. ' :;;.-;
10~97~32 1 Description of the Prior ~rt Ink jet copiers in general generate digital information defining an image and applying the digital information either directly to an ink jet printer or printers or indirectly applying the same via a memory storage device which may or may not include rearrangement of the digital information. In those instances where multiple ink jet nozzles are employed, they may be arranged in a linear array parallel to the axis of a drum which supports the paper or other medium on which the image is to be formed. As the drum is rotated, the ink jet array is transported axially and the digital information is used to selectively control the ink jets to thus reproduce the image on the medium supported on the drum.
In those instances where multiple nozzle arrays are utilized, the images formed by each nozzle may follow interlaced spiral patterns on the medium. A perfect inter-lacing pattern is necessary to assure complete coverage and prevent double or multiple coverage of some areas on the medium. Several methods will provide such an interlace pattern of spirals.
The nozzle array~ may be fabricated such that the center to center spacing of the nozzles is made equal to the desired center to center spacing of the ink drops on the medium. This method provides automatic interlace, however, the required nozzle spacing is impractical if high printing resolution is required. Fabrication problems appear to render this solution unacceptable since the spacing, for any so976035 2 i~79792 1 reasonable degree of resolution, is inadequate to accommodate the structural elements required to implement the required function.
Larger nozzle spacing in the array may be attained by angling the array with respect to the drum axis since the angling provides a closer axial drop spacing at the same time that it permits a larger nozzle spacing; however, this solution introduces a new problem. When the nozzle array is at an angle to the drum axis, the drops from the different nozzles in the array have different flight times due to the different distances to the drum surface. This produces varying degrees of drop misplacement depending on the number of nozzles and their spacing in the array. ~he problem of different flight times can be avoided by arranging the nozzles on a curved support plate which follows the drum contour so that all of the nozzles are equidistant from the drum surface. This solution is far from ideal since it requires a structure which is difficult to manufacture and align.
The nozzles and arrays may be staggered to provide additional space. However, this solution leads to addi-tional problems in the areas of, driver uni~ormity, deflec-tion when two or more rows are used, and guttering problems.
A more desirable solution would permit complete free-dom on the center to center spacing of the nozzles which would allow a center to center nozzle spacing larger -~
1 than the center -to center spacing of the drops on the paper in the axial direction with negligible sacrifice of either printing speed or resolution. Such a solution would ease the fabrication of the nozzles and permit a much wider choice of existing nozzle technologies, such as glass drawn nozzle arrays or etched amorphous material arrays, all of which require substantial spacing. In addition, freedom of spacing minimizes problems in charge electrode packaging, guttering deflection systems and other problems related to electrical crosstalk are more readily solved.
Summary of the Invention The invention contemplates a multiple nozzle ink jet copier in which digital inEormation signals representative o an image to be reproduced are received from a line scanner or the like. The signals are stored one line at a time in one of two temporary memories on an alternating basis under control of clocking signals supplied by a clock generator. The signals stored in the temporary memories are, under control of an address generator, stored in pre-determined locations in a main memory. The address signalsused for selecting the information signals to be stored and the locations in main memory for storing the selected signals are generated from the clock signals and are representative of line, nozzle and main memory word locations expressed as modular displacements from a reference. The information signals stored in the main memory are accessed under control of address signals generated by an output address generator means under control of the clock and a drum sync signal provided by the paper support drum system. The drum sync sos7603s ~LO79791~
1 signal occurs NT times per drum revolution where NT is equal to the total number of nozzles in the nozzle arrays. The information signals read from the memory are stored in selected registers for controlling the associated ink jet nozzles. The nozzles are arranged in a plurality of linear arrays about the periphery of the paper support drum and provide an interlaced image on the paper when the drum is rotated and the nozzle arrays are simultaneously transported in an axial direction. The nozzles in the arrays are spaced k resolution elements apart and the array advanced NT reso~
lution elements in the axial direction in each drum revolu-tion.
Brief Description of the Drawings Figure 1 is a block diagram of a complete ink jet copier constructed according to the invention.
Figure 2 is a schematic diagram of the nozzle array and drum illustrated in Figure l; `~
Figure 3 is a perspective view of the drum shown in Figure l;
Figure 4 is a schematic diagram illustrating the segments and lines printed and identifies the various nozzles and arrays which print the various segments;
Figure 5 is a schematic diagram of the clock shown in Figure 1 and includes graphical representations of the outputs from the clock;
Figure 6 is a detailed block diagram of the Source Organizer illustrated in Figure l;
Figure 7 is a detailed block diagram of the Signal Value Generator shown in Figure 1; ~ ~`
. , - . . . .
~079792 1 Figure 8 is a block diagram of -the array registers and switch shown in Figure l;
Figure 9 is a block diagram of the Address Generator illustrated in Figure l; and Figure 10 is a graphical representation of timing relationships utilized in the circuits illustrated.
Description of the Preferred Embodiments Figure 1 is a block diagram of an ink jet copier and includes a document scanner 11 arranged to scan a document which is to be copied. The document scanner 11 may take any form, preerably the document scanner should be arranged to scan serial horizontal lines in succession down the length o~ the doument and provide a serial data stream indicative o the image content of the document on a line by line basis. Document scanner 11 is controlled by a line synchro-nizing clock signal generator 12. The line synchronizing signals cause the document scanner to scan one line at a time upon the occurrence of each of the line synchronizing signals. The data clocking signals provide the bit infor-mation. Typically, document scanner 11 will provide 40lines in 257 mils of document length and the data clock will provide 1400 information bits in each of the scanned lines.
The values set forth above are typical for an ink jet copier if constructed in accordance with the invention described in the specification. Obviously, these values may be varied over a wide range depending upon the resolution required in the copy.
The non-coded video data from the document scanner 11 is applied to the data input of a source organizer 14. The source organizer 14 performs several functions which 979z 1 will be described below. The details of source organizer 14 are illustrated in Figure 6 and the detailed description of how source organizer 14 performs its function will be described in connection with the description of Figure 6.
Source organizer 14 is provided internally with two memory areas. The successive lines of data from scanner 11 are stored in these two memor~ locations according to a predetermined scheme. The data on the first line, for example, is stored in the first storage location. After this data has been received, the data from the second line is stored in the second storage location. While the second llne is being stored in the second location, the data previously stored in the first location is selectively inserted into the main memory 15. The source organizer 1~
utilizes four control signals provided by clock generator 12 and three additional signals provided by a signal value generator circuit 16. In addition to the data clock and line sync signals applied to document scanner 11, source organizer 14 receives a cycle clock signal and an array clock signal A from the clock generator circuit 12. The three signals received from the input signal value generator circuit 16 are a line value labeled L, a nozzle value labeled N, and a word value labeled W. The signal value generator 16 receives the line sync and data clock signals from clock generator 12 and a preset value signal stored in a register 17. Input signal value generator 16 is illus- -~
trated in detail in E'igure 7, and a description of the operation of this circuit will be given in conjunction with the description of Figure 7. The contents of register 17 represent misalignment of the paper or media 24 with respect ... . .
~7~792 1 to a mounting drum or media support 22 on which and with respect to which the image is generated. I~ no misalignment is present, the value stored in register 17 is zero.
The data stored in source organizer 14 is presented to the main memory 15 based on the input signals from clock generator 12 and signal value generator 16. The actual storage locations selected are determined by an address generator 18 which responds to the L, N and W signals ~rom signal value generator 16 by generating the addresses within which the data presented by source organizer 14 will be located. Address generator 18 provides an output which is inserted in an address register l9 which actually controls the locations within main memory 15 where the data from source organizer l~ is inserted. Address generator 18 is shown in greater detail in Figure lO and will be described in conjunction with the description of Figure lO.
The image data stored in main memory 15 is applied one word at a time via a switch 20 under control of the nozzle value N from signal value generator 16, to the arrays 21A through E. The stored signals control the nozzles associated with each of the five arrays, thus controlling the deposition of ink on the media mounted on the drum 22.
The arrays are driven by an array drive 23 in an axial direction along the drum periphery. Thus, each nozzle describes a spiral about the drum selectively modulating the ink deposited by the nozzles as the nozzle array is driven axially and the drum is driven in a rotary direction which causes the image to appear on the media 24 mounted on the drum 22. The arrays 2lA through 2lE are shown in greater detail in Figure 2A and Figure 2B and will be described in :.
~ g~Z
1 conjunction with the descriptions of these figures.
A read/write control signal from clock 12 is applied to main memory 15; and as each memory address is generated by address generator 18, as described above, a read cycle is executed causing the contents of the memory location to be applied to the arrays as described above.
The read cycle is followed by a write cycle in which the new image information is stored in the address indicated by address generator 18. This information will be supplied to the nozzle arrays the next time this address in main memory 15 is accessed. A drum sync signal is applied to clock generator 12 and causes the line sync signal issued there-from to be synchronized to the drum sync signal, thus the daka Erom document scanner 11 cannot ~all behind or get ahead of the printing which occurred on the media 24. This prevents underruns and overruns of data in memory 15, thus reducing the required amount of storage. The details of output signal value generator 25 are illustrated in Figure 8 and will be described in conjunction with the description of that figure. Switch 20 and the data registers associated with arrays 21A through E are shown in greater detail in Figure 8 and will be described in conjunction with the description of that figure.
Figures 2 and 2A illustrate the drum, the array mountings and the array drive. The drum 22 is supported for rotation by structures not shown. Adjacent to the periphery of the drum is an array drive motor 28 which drives a lead screw 29. The array support 30 is mounted on the lead screw 29 and travels in an axial driection along the drum surface on the screw 29. Forty ink jet nozzles 31 illustrated . .
~07~79;2 1 schematically are supported on the array support 30. They are arranged in five linear groups of eight each. The details of the ink jet nozzles and the associated ink jet printer mechanisms have been intentionally deleted since conventional ink jet nozzles and ink jet printers may be utilized with this invention because the placement of the nozzles on the nozzle support 30 is substantially unrestric-ted. The specific nozzle arrangement described above is exemplary only. A large number of nozzle arrangements may be selected when the rules set forth below are followed.
According to the invention the center to center spacing of the nozzles in each of the arrays is virtually without restraint since adjacent nozzles are not required to cover adjacent segments of the circumer2nce of the drum. Each of the circumferential lines around the drum is divided into equal length segments and the number of segments selected equals the total number of nozzles and the lines are spaced one resolution element apart. This criteria permits the spacing of the nozzles to be larger than the center to center spacing of the drops or the lines on the paper with a negligible sacrifice of either printing speed or resolution.
In addition, it permits fabrication of nozzles using a much simpler process since spacing constraints may be eliminated.
This consideration broadens the number of useful ink jet nozzle technologies available. For example, glass-drawn nozzle arrays or etched amorphous materials may be utilized since these are currently limited to larger spacings. In addition, the charge electrode packaging guttering deflec-tion system and problems related to electrical cross talk become much easier to solve. The techniques described may be sos76n3s 10 : ' 1079~9Z
1 utilized in either single or multiple array copiers. Memory requirements, such as are present in the main memory 15, are minimized by using multiple arrays of nozzles positioned around the circumference of the drum as illustrated ln Figure 1, provided these are properly interlaced. This is due to the fact that the memory storage required is directly related to the axial length subtended by the arrays.
In considering the placement of nozzles in an array, two cases must be looked at, the single array and plural arrays spaced around the drum periphery.
In a single array comprising N nozzles spaced K
resolution elements apart, the criteria for interlace is as follows where N and K are both integers.
1) 'rhe nozzle array must advance in the axial direction N resolution elements per single revolution of the print drum.
1~
16 BACKGROUND OF THE_INVENTION
17 Field of the Invention , . ,~
18 The invention relates,to copiers in general and ' more speciflcally to multiple nozzle ink jet copiers,in ~ ~, N
which a plurality.of ink jet. nozzles are arranged in~,,a;,.` .'~
plurality of l,inear arrays around the periphery of a,',rotating medium support drum and the scanned information from~,a. ~
23 - document is.prearranged in memory and.later, transferred to . -.
the llnear arrays.of nozzles at appropriate predetermined times to reproduce a copy of the soanned docu~ent on a medium supported on the drum.
.
.
.
,' .~
:
f ' ' '' ' ' ' ' ' ,, ,,, ', __ : ' ' .
.. ~.:
.: .
- . -., -, .
.~:
. .
~,.' '.:-:, :.,.~ , .. " .,: " ~ , - ' ; " . .. ' :;;.-;
10~97~32 1 Description of the Prior ~rt Ink jet copiers in general generate digital information defining an image and applying the digital information either directly to an ink jet printer or printers or indirectly applying the same via a memory storage device which may or may not include rearrangement of the digital information. In those instances where multiple ink jet nozzles are employed, they may be arranged in a linear array parallel to the axis of a drum which supports the paper or other medium on which the image is to be formed. As the drum is rotated, the ink jet array is transported axially and the digital information is used to selectively control the ink jets to thus reproduce the image on the medium supported on the drum.
In those instances where multiple nozzle arrays are utilized, the images formed by each nozzle may follow interlaced spiral patterns on the medium. A perfect inter-lacing pattern is necessary to assure complete coverage and prevent double or multiple coverage of some areas on the medium. Several methods will provide such an interlace pattern of spirals.
The nozzle array~ may be fabricated such that the center to center spacing of the nozzles is made equal to the desired center to center spacing of the ink drops on the medium. This method provides automatic interlace, however, the required nozzle spacing is impractical if high printing resolution is required. Fabrication problems appear to render this solution unacceptable since the spacing, for any so976035 2 i~79792 1 reasonable degree of resolution, is inadequate to accommodate the structural elements required to implement the required function.
Larger nozzle spacing in the array may be attained by angling the array with respect to the drum axis since the angling provides a closer axial drop spacing at the same time that it permits a larger nozzle spacing; however, this solution introduces a new problem. When the nozzle array is at an angle to the drum axis, the drops from the different nozzles in the array have different flight times due to the different distances to the drum surface. This produces varying degrees of drop misplacement depending on the number of nozzles and their spacing in the array. ~he problem of different flight times can be avoided by arranging the nozzles on a curved support plate which follows the drum contour so that all of the nozzles are equidistant from the drum surface. This solution is far from ideal since it requires a structure which is difficult to manufacture and align.
The nozzles and arrays may be staggered to provide additional space. However, this solution leads to addi-tional problems in the areas of, driver uni~ormity, deflec-tion when two or more rows are used, and guttering problems.
A more desirable solution would permit complete free-dom on the center to center spacing of the nozzles which would allow a center to center nozzle spacing larger -~
1 than the center -to center spacing of the drops on the paper in the axial direction with negligible sacrifice of either printing speed or resolution. Such a solution would ease the fabrication of the nozzles and permit a much wider choice of existing nozzle technologies, such as glass drawn nozzle arrays or etched amorphous material arrays, all of which require substantial spacing. In addition, freedom of spacing minimizes problems in charge electrode packaging, guttering deflection systems and other problems related to electrical crosstalk are more readily solved.
Summary of the Invention The invention contemplates a multiple nozzle ink jet copier in which digital inEormation signals representative o an image to be reproduced are received from a line scanner or the like. The signals are stored one line at a time in one of two temporary memories on an alternating basis under control of clocking signals supplied by a clock generator. The signals stored in the temporary memories are, under control of an address generator, stored in pre-determined locations in a main memory. The address signalsused for selecting the information signals to be stored and the locations in main memory for storing the selected signals are generated from the clock signals and are representative of line, nozzle and main memory word locations expressed as modular displacements from a reference. The information signals stored in the main memory are accessed under control of address signals generated by an output address generator means under control of the clock and a drum sync signal provided by the paper support drum system. The drum sync sos7603s ~LO79791~
1 signal occurs NT times per drum revolution where NT is equal to the total number of nozzles in the nozzle arrays. The information signals read from the memory are stored in selected registers for controlling the associated ink jet nozzles. The nozzles are arranged in a plurality of linear arrays about the periphery of the paper support drum and provide an interlaced image on the paper when the drum is rotated and the nozzle arrays are simultaneously transported in an axial direction. The nozzles in the arrays are spaced k resolution elements apart and the array advanced NT reso~
lution elements in the axial direction in each drum revolu-tion.
Brief Description of the Drawings Figure 1 is a block diagram of a complete ink jet copier constructed according to the invention.
Figure 2 is a schematic diagram of the nozzle array and drum illustrated in Figure l; `~
Figure 3 is a perspective view of the drum shown in Figure l;
Figure 4 is a schematic diagram illustrating the segments and lines printed and identifies the various nozzles and arrays which print the various segments;
Figure 5 is a schematic diagram of the clock shown in Figure 1 and includes graphical representations of the outputs from the clock;
Figure 6 is a detailed block diagram of the Source Organizer illustrated in Figure l;
Figure 7 is a detailed block diagram of the Signal Value Generator shown in Figure 1; ~ ~`
. , - . . . .
~079792 1 Figure 8 is a block diagram of -the array registers and switch shown in Figure l;
Figure 9 is a block diagram of the Address Generator illustrated in Figure l; and Figure 10 is a graphical representation of timing relationships utilized in the circuits illustrated.
Description of the Preferred Embodiments Figure 1 is a block diagram of an ink jet copier and includes a document scanner 11 arranged to scan a document which is to be copied. The document scanner 11 may take any form, preerably the document scanner should be arranged to scan serial horizontal lines in succession down the length o~ the doument and provide a serial data stream indicative o the image content of the document on a line by line basis. Document scanner 11 is controlled by a line synchro-nizing clock signal generator 12. The line synchronizing signals cause the document scanner to scan one line at a time upon the occurrence of each of the line synchronizing signals. The data clocking signals provide the bit infor-mation. Typically, document scanner 11 will provide 40lines in 257 mils of document length and the data clock will provide 1400 information bits in each of the scanned lines.
The values set forth above are typical for an ink jet copier if constructed in accordance with the invention described in the specification. Obviously, these values may be varied over a wide range depending upon the resolution required in the copy.
The non-coded video data from the document scanner 11 is applied to the data input of a source organizer 14. The source organizer 14 performs several functions which 979z 1 will be described below. The details of source organizer 14 are illustrated in Figure 6 and the detailed description of how source organizer 14 performs its function will be described in connection with the description of Figure 6.
Source organizer 14 is provided internally with two memory areas. The successive lines of data from scanner 11 are stored in these two memor~ locations according to a predetermined scheme. The data on the first line, for example, is stored in the first storage location. After this data has been received, the data from the second line is stored in the second storage location. While the second llne is being stored in the second location, the data previously stored in the first location is selectively inserted into the main memory 15. The source organizer 1~
utilizes four control signals provided by clock generator 12 and three additional signals provided by a signal value generator circuit 16. In addition to the data clock and line sync signals applied to document scanner 11, source organizer 14 receives a cycle clock signal and an array clock signal A from the clock generator circuit 12. The three signals received from the input signal value generator circuit 16 are a line value labeled L, a nozzle value labeled N, and a word value labeled W. The signal value generator 16 receives the line sync and data clock signals from clock generator 12 and a preset value signal stored in a register 17. Input signal value generator 16 is illus- -~
trated in detail in E'igure 7, and a description of the operation of this circuit will be given in conjunction with the description of Figure 7. The contents of register 17 represent misalignment of the paper or media 24 with respect ... . .
~7~792 1 to a mounting drum or media support 22 on which and with respect to which the image is generated. I~ no misalignment is present, the value stored in register 17 is zero.
The data stored in source organizer 14 is presented to the main memory 15 based on the input signals from clock generator 12 and signal value generator 16. The actual storage locations selected are determined by an address generator 18 which responds to the L, N and W signals ~rom signal value generator 16 by generating the addresses within which the data presented by source organizer 14 will be located. Address generator 18 provides an output which is inserted in an address register l9 which actually controls the locations within main memory 15 where the data from source organizer l~ is inserted. Address generator 18 is shown in greater detail in Figure lO and will be described in conjunction with the description of Figure lO.
The image data stored in main memory 15 is applied one word at a time via a switch 20 under control of the nozzle value N from signal value generator 16, to the arrays 21A through E. The stored signals control the nozzles associated with each of the five arrays, thus controlling the deposition of ink on the media mounted on the drum 22.
The arrays are driven by an array drive 23 in an axial direction along the drum periphery. Thus, each nozzle describes a spiral about the drum selectively modulating the ink deposited by the nozzles as the nozzle array is driven axially and the drum is driven in a rotary direction which causes the image to appear on the media 24 mounted on the drum 22. The arrays 2lA through 2lE are shown in greater detail in Figure 2A and Figure 2B and will be described in :.
~ g~Z
1 conjunction with the descriptions of these figures.
A read/write control signal from clock 12 is applied to main memory 15; and as each memory address is generated by address generator 18, as described above, a read cycle is executed causing the contents of the memory location to be applied to the arrays as described above.
The read cycle is followed by a write cycle in which the new image information is stored in the address indicated by address generator 18. This information will be supplied to the nozzle arrays the next time this address in main memory 15 is accessed. A drum sync signal is applied to clock generator 12 and causes the line sync signal issued there-from to be synchronized to the drum sync signal, thus the daka Erom document scanner 11 cannot ~all behind or get ahead of the printing which occurred on the media 24. This prevents underruns and overruns of data in memory 15, thus reducing the required amount of storage. The details of output signal value generator 25 are illustrated in Figure 8 and will be described in conjunction with the description of that figure. Switch 20 and the data registers associated with arrays 21A through E are shown in greater detail in Figure 8 and will be described in conjunction with the description of that figure.
Figures 2 and 2A illustrate the drum, the array mountings and the array drive. The drum 22 is supported for rotation by structures not shown. Adjacent to the periphery of the drum is an array drive motor 28 which drives a lead screw 29. The array support 30 is mounted on the lead screw 29 and travels in an axial driection along the drum surface on the screw 29. Forty ink jet nozzles 31 illustrated . .
~07~79;2 1 schematically are supported on the array support 30. They are arranged in five linear groups of eight each. The details of the ink jet nozzles and the associated ink jet printer mechanisms have been intentionally deleted since conventional ink jet nozzles and ink jet printers may be utilized with this invention because the placement of the nozzles on the nozzle support 30 is substantially unrestric-ted. The specific nozzle arrangement described above is exemplary only. A large number of nozzle arrangements may be selected when the rules set forth below are followed.
According to the invention the center to center spacing of the nozzles in each of the arrays is virtually without restraint since adjacent nozzles are not required to cover adjacent segments of the circumer2nce of the drum. Each of the circumferential lines around the drum is divided into equal length segments and the number of segments selected equals the total number of nozzles and the lines are spaced one resolution element apart. This criteria permits the spacing of the nozzles to be larger than the center to center spacing of the drops or the lines on the paper with a negligible sacrifice of either printing speed or resolution.
In addition, it permits fabrication of nozzles using a much simpler process since spacing constraints may be eliminated.
This consideration broadens the number of useful ink jet nozzle technologies available. For example, glass-drawn nozzle arrays or etched amorphous materials may be utilized since these are currently limited to larger spacings. In addition, the charge electrode packaging guttering deflec-tion system and problems related to electrical cross talk become much easier to solve. The techniques described may be sos76n3s 10 : ' 1079~9Z
1 utilized in either single or multiple array copiers. Memory requirements, such as are present in the main memory 15, are minimized by using multiple arrays of nozzles positioned around the circumference of the drum as illustrated ln Figure 1, provided these are properly interlaced. This is due to the fact that the memory storage required is directly related to the axial length subtended by the arrays.
In considering the placement of nozzles in an array, two cases must be looked at, the single array and plural arrays spaced around the drum periphery.
In a single array comprising N nozzles spaced K
resolution elements apart, the criteria for interlace is as follows where N and K are both integers.
1) 'rhe nozzle array must advance in the axial direction N resolution elements per single revolution of the print drum.
2) For K factorable into prime factors such that K = AxBx .... x M, N must be an integer which has no prime factors in common with K, i.e., the fraction K/N must be irreducible.
In accordance with the above, the first nozzle prints, for example, segment 1 for a given scan line, the second nozzle segment 1 + K, the third 1 + 2K, etc. in order for all segments to be printed with no overprinting of any segment, the first segment must not be reached again in the above sequence until 1 + NK. Examples of K and N combina-tions which will interlace are given below.
1) K=2, N includes the set of all odd integers.
2) K=3, N includes the set of all integers which are not multiples of 3.
.... .
31 (~7~7~gZ
In accordance with the above, the first nozzle prints, for example, segment 1 for a given scan line, the second nozzle segment 1 + K, the third 1 + 2K, etc. in order for all segments to be printed with no overprinting of any segment, the first segment must not be reached again in the above sequence until 1 + NK. Examples of K and N combina-tions which will interlace are given below.
1) K=2, N includes the set of all odd integers.
2) K=3, N includes the set of all integers which are not multiples of 3.
.... .
31 (~7~7~gZ
3 ) k~4, N include~ the ~et o~ all odd integars .
2 ~) }~5, N include~ the set o~ all illtegers which 3 are n~t multiples o~ ~0
2 ~) }~5, N include~ the set o~ all illtegers which 3 are n~t multiples o~ ~0
4 5 ) k~30 ~2x3x5] , N includes the s et oî all odd integers which are not multiples of 3 or 50 II the fraction 6 k/N iA reducible, the no~zle array will not interlacqi and 7 double printing or mi~ed areas will re~ult.
The eecond case considered and illustrated in 9 Figure 1 and Figure 2 is that of multiple arrays of plul^al noz~le3~ A multiplicity of M idantical nozzle array~ having 11 a total oî NT ~ n~z~les are shown in ~igure 2. The nozzles ,." , I ~, ~
12 are spaced K resolution element~ apart in the array~ M, the 13 number ef arrays, N, the number of nozzles per array, and k~
14 the multiple o~ the resolution element~ are all in~eger~.
The criteria for interlace is as follows.
16 1) The nozzlo tra}lsport must ad~ance in the a~cial 17 direction NT resolution elemeIlts per revolution ~ere NT is 1~ the total number of nozzles.
19 ~ 2) The fraction T~/M di~ided by TN must be irreduc-ible. The numerator and denominator must ha~e no comm~n 21 prime factors. T i3 the ~malle~t int~ger between 1 and M, 22 such that Tk/M is al~o an integer ~it follow3 that M~T i~
23 also an integer). The value o~ T required to ~at~fy the 24 above ~xpres~ion3 indicates the neces~ity of pairi~g o~
nozzle arrays~ I~ T oquals 1, there iB no constraint o~ the 26 array~ as to pairings. If T equal~ 2, the arrays must be 27 even in number and pa~red i~ two group~ di~pIaced fro~ ~ach 2B other by 1~04 If T equal~ 3, the number of arrays mu~ be 29 a multiple of three and arranged ~n three grpups spaced 120 :~-ap~rt. In a multiple array where T equal~ 2, the pairs of ~o~g~
l array groups must be spaced 180 apart; however, the spacings within each group will be dictated by other requirements, namely, where on the drum the array segments are to begin.
This will be treated in greater detail when the specific embodiment disclosed is described.
An array arrangement may be selected according to the steps set forth below.
l) The desired value for k is chosen to provide the desired resolution according to the expression l/resolution = nozzle spacing/k.
2) Select the number of arrays desired M.
3) Solve the fraction set forth above to determine the value of T and the allowable number of nozzles N. Find the minimum T satisfying Tk/M equals an iteger and determine that the equation set forth above is irreducible. ;~
4) For a minimum print buffer or main memory requirement all arrays should be aligned in the axial direc~
tion to a common circumferential line as illustrated in Figure 2. The arrays need not necessarily be axially aligned to a common circumferential line. In this case the axial alignment can be traded for spacing between arrays.
However, if they are not aligned, interlacing will neverthe-less occur but increased main memory will be required in all instances where information is being scanned and printed at the same time. The angular spacing for axially aligned arrays may be any multiple of 360/NT which is not a multiple of 360 x K/NT from any other array where 360/NT corres-ponds to one segment.
In the illustrated embodiment, five arrays, 21A
through 21E, are used. Each of these arrays include eight nozzles 31. The nozzles in the arrays are spaced five so976035 13 7~2 1 resolution elements apart, thus the values given above are M
= 5, R = 5, N = 8, NT = 40. When these values are substitu-ted in the equation given above, T has a value of 1, thus the arrays are not paired and may be angularly spaced according to the description above. An angular spacing between arrays of 9 and of all the possible orientations was selected since it permits an easier visualization of operation. A selection of 54 is also an excellent choice since it pro~ides adequate space between arrays for the ink jet nozzles hardware yet has adequate space opposite the arrays for installing paper handling equipment to permit paper to be automatically or manually added to the drum and removed.
Figure 3 illustrates the drum 22 with the paper 24 mounted on it and the drum sync generator 27. The drum sync generator includes the disc 32 having 40 scribed transparent lines therein arranged around the periphery of the disc.
The disc 32 is attached to the drum 22 and rotates therewith between a light source 33 and a detector 34. When the light ~rom source 33 is detected by the detector 34, the drum sync signal is provided by detector 34. This signal is applied to the clock generator circuit 12 illustrated in Figure 1.
Figure 4 illustrates 40 scan lines as reproduced on the drum. Each of the 40 scan lines includes 40 segments. The ~`
drawing in Figure 4 is grossly distorted in order to present the information in a manner which is clearly understood.
The 40 scan lines typically occupy 257 mils on the drum or paper mounted thereon. The drawing contains a series of numbers. The first digit of each of the double digit numbers represents the array number. The second digit oE
the double digit numbers represents the nozzle number 1 within the array which produced the image in that particular segment. Each of the double digit numbers is coextensive with one of the segments. Thus, in the first scan line the first segment is produced by the first nozzle of the first array and the number is ll. The second segment of the first line is produced by the first nozzle of the second array.
The third segment is produced by the first nozzle of the third array, the fourth segment by the first nozzle of the fourth array, and the fifth segment by the first nozzle oE
the fifth array. The second nozzle of the first array reproduces the sixth segment on the first scan line. The sequence continues throughout the scan line. The eighth nozzle of the ith array reproduces the irst segment of the second scan line and all o the othex nozzles in arrays are displaced one segment to the right. Subsequent lines are produced in the same manner with the segments produced by the nozzles precessing to the right and moving back to the left when the 40th segment was done on the preceding line. The entire pattern illustrated occupies a single revolution of the drum. On a subsequent revolution of the drum another 40 scan lines are produced. The 40 lines illustrated in Figure 4 are, as previously stated, distorted and only occupy approximately 257 mils of space in the vertical direction on the paper on which the image is being produced. The width, however, is substantially as illustra-ted in Figure 4. A complete page, of course, will require many reproductions one after the other of the 40 lines illustrated in Figure 4.
sog76035 15 ..
~079~2 1 Figure 5 is primarily intended to illustrate the outputs from clock generator 12 shown in Figure 1. The clock includes a master oscillator 35 and the necessary coun-ting and logic circuits 36 for producing the four outputs illustrated in response to the drum sync signal supplied by the drum sync generator 27 of Figure 1. The details of clock 12 are not illustrated here because con-ventional circuits may be utilized for providing the clock signals illustrated in Figure 5. These, typically, will include counting circuits, logic circuits, differentiators and in~egrators for operating on the pulses from the master oscillator 35 to provide the outputs illustrated in Figure 5.
~ he drum sync signal from drum sync generator 27 is provided once per one-fourtieth revolution of the drum 22.
This signal causes the issuance of the line sync signal from clock 12, thus the line sync signals are produced substan-tially coextensively with the drum sync signal. 1400 data clock signals are produced between each line sync signal to thus provide the 1400 bits per scan line previously referred to. In addition, the period between line sync signals in-cludes 56 cycle clocks. ~he cycle clock signals may or need not necessarily be symmetric. If the two processing times for the source organizer 14 are symmetric, then the signal may be symmetric. However, if the reading operation requires more time than the writing operation, this may be accommo-dated by making the cycle clock signal asymmetric within each of the 56 cycles. The array clock signal includes five pulses -~9'792 1 during the positive cycle of each of the cycle clock cycles yielding 280 pulses between successive line sync signals.
The source organizer 14 of Figure 1 is illustrated in greater detail in Figure 6. The data signals from the scanner 11 are applied to a shift register 37 and shifted in under control of the data clock signal from clock 12. Shift register 37 stores five bits and is provided with five parallel outputs which are applied via a gate circuit 38 and a switching circuit 39 to one or the other of two input data registers 40 and 41 associated with random access memory cells 42 and 43 respectively. The data signals are shifted into shift register 37 under control of the data clock signals from clock 12. In addition, -the data clock signals are applied to a l-S counter 44. At the count of Eive, counter 44 provides a signal which enables gate 38 and resets counter 44. When gate 38 is enabled, the contents of shift register 37 are applied in parallel to switch 39.
Depending on the state of the control signal, the contents of shift register 37 are applied to either input data register 40 or input data register 41. The control signal applied to switch 39 is generated by a trigger circuit 45 which is toggled by the line sync signal from the clock 12.
Thus, the control output from trigger 45 changes state with each line sync signal. During one line period the contents of shift register 37 are applied successively each five bit period to input data register 40 whereas during the next line period the contents are applied serially five bits in parallel to input data register 41.
so976035 17 ~, . . .
~0797~Z
1 the contents of input data reyisters 40 or 41 are stored in memories 42 and 43 respectively at locations defined by the contents of address registers 46 and 47 respectively.
The actual address inserted in either register 46 or 47 de-pending upon the state of trigger 45 is generated by a counter 48 which responds to the output of counter 44. Coun-ter 48 counts from 1 to 280 since 280 is the maximum number of addresses required in memories 42 and 43. This quantity will accommodate 1400 bits in a single scan line since 280 addressable positions each containing five bits equals the 1400 bits per line stored. The output of counter 48 is applied via a switch 49 to either register 46 or 47 depend-ing upon the state of the control signal ~rom trigger 45.
When the control signal occupies one state the contents oE
counter 48 will be inserted in register 46 and when the con-trol signal occupies the opposite state the contents will be inserted in register 47. Registers 46 and 47 and 40 and 41 operate in synchronism under control of the control signal from trigger 45 to cause the contents of the scanned line to be inserted alternately in memories 42 and 43. A decoding circuit 50 responsive to the output of counter 48 decodes the count of 280 and resets counter 48 so that it is pre-pared to process the next scanned line. This completes the description of Figure 6 insofar as receiving data from the scanner and inserting the received data into the memories 42 and 43 on an alternating line basis. The remainder of the description which follows will be concerned with removing the contents from memories 42 and 43 and inserting those contents in the appropriate places in main memory 15.
The contents of memories 42 and 43 are made available in output data registers 51 and 52 respectively. Memories 42 and 43, depending upon the particular type ~7g79Z
1 selected, may be controlled by the output of trigger circuit 45 as to which will be in a read and which w:ill be in a write cycle since these cycles are opposite at any given time for the two memories, i.e., when the data from the line scanner is being stored in memory 42, the contents of memory 43 which represent the data from the previous scan line will be read out into output register 52 and inserted as will be described below in main memory 15. Output registers 51 and 52 are connected by a switch 53 and five gates 54-1 through 54-5 to a data input register 55 associated with main memory 15. The operation and function of gates 54-1 through 54-5 will be described below.
The A clock signal from clock 12 is applied to a counter 56 which counts 1 through 5 and is reset. The outputs illustrated of counter 56 provide an indication of the count. These are labeled A and will be used elsewhere in this circuit and described later on. These outputs are also applied to a decoder circuit 57 which decodes the actual count A-l through A-5 and resets the counter 56 following the occurrence of the A-5 count. The outputs of decoder 57, A-l through A-5, are applied to the gates 54-1 through 54-5, respectively, thus the first five bits from memory 42 or memory 43 are applied via gate 54-1 to the first five positions of the input register 55. The second group of five bits are applied via gate 54-2 to the second five bit positions in input data register 55, etc. until the last group of five bits are inserted in the last five positions of input register 55. Referring back to Figure 5, it should be noted that the A clock or array clock contains five pulses in one-half of the cycle clock period. This is ~7979;~
1 necessary since five ~ddresses in memories 42 or 43 must be processed during one clock cycle period because the word length in main memory 15 is 25 bits and that in memories ~2 and 43 is five bits. Thus, the contents of five addresses in memories 42 or 43 are assembled in the input data register 55 during each cycle clock for later insertion into memory 15. These are assembled under control of the counter 56 and decoder 57.
An address generator 58 receives the output from counter 56, the L, N, and W outputs from signal value gener-ator 16 and computes the address as indicated in the expres-sion in the drawing. The computed address is applied via a switch 59 under control O:e the control output from trigger 45 to either register 46 or 47 depending upon the state o trigger ~5. It should be noted that the address from counter 48 and the address from generator 58 will be applied to different registers 46 and 47 because the control sign~ls from trigger 45 are of opposite states and are applied to switches 49 and 59 respectively. Thus, data will be written into one memory while it is being removed from the other memory and the roles will reverse with each successive line sync signal. The implementation of address generator 58 should be obvious to those skilled in this art. Typically, this address generator will be constructed from conventional solid state circuits to specifically provide the output indicated from the inputs provided. A general purpose com-puter could be used. However, the speed required and the limited function required would militate in most instances against such a choice.
Figure 7 is a detailed diagram of the signal ~ 7~379~2 ;
1 value generator 16 illustrated in Figure 1. The data clock signals are applied to an A counter 60 which is provided with five counting stages having paired OutplltS Al, A2, A4, A8 and A16. The outputs ~1, A2, A4, A8 and 1~16 are applied via an AND gate 61 to the reset input of counter 60. Thus, counter 60 resets a~ter counting 25 data clock pulses. This corresponds to the number of bits in a word in main memory 15. The output of AND gate 61 is connected to a B counter 62 which has three stages to provide word count W which ranges from 1 through 7 or, stated differently, 0 through 6.
The outputs Bl, B2 and B4 of B counter 62 are connected to an AND gate 63 which has its output connecked to the reset input counter 62. The output of AND gate 63 i5 also con-nected to an E counter 64 which has Eour stages, the outputs of which are labeled El, E2, E4 and E8. These constitute the nozzle value N, the outputs El, E2, E4 and E8 are con-nected to an AND gate 6 5 which has its output connected to the reset input of counter 64 which counts to 8, and resets, thus providing an output indicative of the eight nozzle values.
The present value stored in register 17 of Figure 1 is applied to preset an F counter 66. The line sync signals from the clock 12 of Figure 1 are applied to the step input of counter 66 whlch has six stages and provides the line count L. The Fl, F2, F4, F8, F16 and F32 outputs of counter 66 are applied via an AND gate 67 to the reset input of counter 66. Thus, counter 66 counts ~rom 1 through 40 to indicate which of the 40 scan lines are being processed.
Obviously, many more than 40 lines are processed. However, I`
they are treated as groups of 40 by the circuits describecl above.
~C~7979;~
1 Figure 8 illustrates some of the details of the arrays 21A through 21E and the relationship of switch 20 thereto.
Switch 20 is connected to the output register associated with main memory 15 and received 25 bits in parallel there-from. In addition, it receives the N signa:L from signal value generator 16. Each of the arrays 21 includes 8 nozzles N0 through N7. Associated with each of the nozzles is a register 77. There are in total 40 such registers.
The 8 registers 77 associated with the firs-t array are con-nected in parallel to the first five bit positions from the output register of main memory 15 via switch 20. They are selectively connected under control of the N signal from signal value generator 16. The 8 registers 77 associated with array 2 are connected to the 6th through 10th ~it posi-tions of the output register of memory 15 via switch 20 under control of the N signal from value generator 16. In a similar manner the 8 registers associated with each of the third, fourth and fifth arrays are connected to the next succeeding groups of five bits from the output register of main memory 15 via switch 20 under control of the N si~nal from signal value generator 16. Registers 77 are loaded in parallel via switch 20 and the data contained therein is shifted out in serial fashion under control of the data clock signal to the connected nozzles as indicated in the drawing.
Figure 9 illustrates in greater detail adaress gener-ator 18. The physical details of multiple output address ~ -~
generator 18 are not shown since they may be construc-ted from standard components to perform the functions outlined in algebraic form within the box.
~7~1179Z
1 Three intermediate comput~tions are illustrated in 2 the box. In the first interllediate computation the line 3 value L is divided by k to provide a whole number I and a 4 fraction F.
The whole number ~ converted to Mod N yields 6 a value I'. The value I' and the fractional part F :Erom ;
7 above yield a value I'.F which is multiplied by k to yield a value A'. The value A' indicates the starting address for ~1 each nozzle group. This value is, however, an intermediate value which is multiplied by a constant P (=7=number of 11 words/se~ment) summed with the word value W and a value ~N :~ .
1~ to y.ield the actual address where data is retrieved or 1~ placed depending on which portion o the cycle clock i~s 1~ actj.ve (read or write).
lS The values R, Mod N and ~N are computed in advance 16 and stored in the multiple output address generator 18 for 17 each nozzle. The table below is predicated on a value of 18 k=5 and ~ indicates the number of storage locations in lg memory 15 allocated for a nozzle.
20 Nozzle ~ Mod ~1 ~ x 7 hN
1 5 1 35 0 "
2 .10 2 70 35 ~3 4 20 4 140 210 :~
The eecond case considered and illustrated in 9 Figure 1 and Figure 2 is that of multiple arrays of plul^al noz~le3~ A multiplicity of M idantical nozzle array~ having 11 a total oî NT ~ n~z~les are shown in ~igure 2. The nozzles ,." , I ~, ~
12 are spaced K resolution element~ apart in the array~ M, the 13 number ef arrays, N, the number of nozzles per array, and k~
14 the multiple o~ the resolution element~ are all in~eger~.
The criteria for interlace is as follows.
16 1) The nozzlo tra}lsport must ad~ance in the a~cial 17 direction NT resolution elemeIlts per revolution ~ere NT is 1~ the total number of nozzles.
19 ~ 2) The fraction T~/M di~ided by TN must be irreduc-ible. The numerator and denominator must ha~e no comm~n 21 prime factors. T i3 the ~malle~t int~ger between 1 and M, 22 such that Tk/M is al~o an integer ~it follow3 that M~T i~
23 also an integer). The value o~ T required to ~at~fy the 24 above ~xpres~ion3 indicates the neces~ity of pairi~g o~
nozzle arrays~ I~ T oquals 1, there iB no constraint o~ the 26 array~ as to pairings. If T equal~ 2, the arrays must be 27 even in number and pa~red i~ two group~ di~pIaced fro~ ~ach 2B other by 1~04 If T equal~ 3, the number of arrays mu~ be 29 a multiple of three and arranged ~n three grpups spaced 120 :~-ap~rt. In a multiple array where T equal~ 2, the pairs of ~o~g~
l array groups must be spaced 180 apart; however, the spacings within each group will be dictated by other requirements, namely, where on the drum the array segments are to begin.
This will be treated in greater detail when the specific embodiment disclosed is described.
An array arrangement may be selected according to the steps set forth below.
l) The desired value for k is chosen to provide the desired resolution according to the expression l/resolution = nozzle spacing/k.
2) Select the number of arrays desired M.
3) Solve the fraction set forth above to determine the value of T and the allowable number of nozzles N. Find the minimum T satisfying Tk/M equals an iteger and determine that the equation set forth above is irreducible. ;~
4) For a minimum print buffer or main memory requirement all arrays should be aligned in the axial direc~
tion to a common circumferential line as illustrated in Figure 2. The arrays need not necessarily be axially aligned to a common circumferential line. In this case the axial alignment can be traded for spacing between arrays.
However, if they are not aligned, interlacing will neverthe-less occur but increased main memory will be required in all instances where information is being scanned and printed at the same time. The angular spacing for axially aligned arrays may be any multiple of 360/NT which is not a multiple of 360 x K/NT from any other array where 360/NT corres-ponds to one segment.
In the illustrated embodiment, five arrays, 21A
through 21E, are used. Each of these arrays include eight nozzles 31. The nozzles in the arrays are spaced five so976035 13 7~2 1 resolution elements apart, thus the values given above are M
= 5, R = 5, N = 8, NT = 40. When these values are substitu-ted in the equation given above, T has a value of 1, thus the arrays are not paired and may be angularly spaced according to the description above. An angular spacing between arrays of 9 and of all the possible orientations was selected since it permits an easier visualization of operation. A selection of 54 is also an excellent choice since it pro~ides adequate space between arrays for the ink jet nozzles hardware yet has adequate space opposite the arrays for installing paper handling equipment to permit paper to be automatically or manually added to the drum and removed.
Figure 3 illustrates the drum 22 with the paper 24 mounted on it and the drum sync generator 27. The drum sync generator includes the disc 32 having 40 scribed transparent lines therein arranged around the periphery of the disc.
The disc 32 is attached to the drum 22 and rotates therewith between a light source 33 and a detector 34. When the light ~rom source 33 is detected by the detector 34, the drum sync signal is provided by detector 34. This signal is applied to the clock generator circuit 12 illustrated in Figure 1.
Figure 4 illustrates 40 scan lines as reproduced on the drum. Each of the 40 scan lines includes 40 segments. The ~`
drawing in Figure 4 is grossly distorted in order to present the information in a manner which is clearly understood.
The 40 scan lines typically occupy 257 mils on the drum or paper mounted thereon. The drawing contains a series of numbers. The first digit of each of the double digit numbers represents the array number. The second digit oE
the double digit numbers represents the nozzle number 1 within the array which produced the image in that particular segment. Each of the double digit numbers is coextensive with one of the segments. Thus, in the first scan line the first segment is produced by the first nozzle of the first array and the number is ll. The second segment of the first line is produced by the first nozzle of the second array.
The third segment is produced by the first nozzle of the third array, the fourth segment by the first nozzle of the fourth array, and the fifth segment by the first nozzle oE
the fifth array. The second nozzle of the first array reproduces the sixth segment on the first scan line. The sequence continues throughout the scan line. The eighth nozzle of the ith array reproduces the irst segment of the second scan line and all o the othex nozzles in arrays are displaced one segment to the right. Subsequent lines are produced in the same manner with the segments produced by the nozzles precessing to the right and moving back to the left when the 40th segment was done on the preceding line. The entire pattern illustrated occupies a single revolution of the drum. On a subsequent revolution of the drum another 40 scan lines are produced. The 40 lines illustrated in Figure 4 are, as previously stated, distorted and only occupy approximately 257 mils of space in the vertical direction on the paper on which the image is being produced. The width, however, is substantially as illustra-ted in Figure 4. A complete page, of course, will require many reproductions one after the other of the 40 lines illustrated in Figure 4.
sog76035 15 ..
~079~2 1 Figure 5 is primarily intended to illustrate the outputs from clock generator 12 shown in Figure 1. The clock includes a master oscillator 35 and the necessary coun-ting and logic circuits 36 for producing the four outputs illustrated in response to the drum sync signal supplied by the drum sync generator 27 of Figure 1. The details of clock 12 are not illustrated here because con-ventional circuits may be utilized for providing the clock signals illustrated in Figure 5. These, typically, will include counting circuits, logic circuits, differentiators and in~egrators for operating on the pulses from the master oscillator 35 to provide the outputs illustrated in Figure 5.
~ he drum sync signal from drum sync generator 27 is provided once per one-fourtieth revolution of the drum 22.
This signal causes the issuance of the line sync signal from clock 12, thus the line sync signals are produced substan-tially coextensively with the drum sync signal. 1400 data clock signals are produced between each line sync signal to thus provide the 1400 bits per scan line previously referred to. In addition, the period between line sync signals in-cludes 56 cycle clocks. ~he cycle clock signals may or need not necessarily be symmetric. If the two processing times for the source organizer 14 are symmetric, then the signal may be symmetric. However, if the reading operation requires more time than the writing operation, this may be accommo-dated by making the cycle clock signal asymmetric within each of the 56 cycles. The array clock signal includes five pulses -~9'792 1 during the positive cycle of each of the cycle clock cycles yielding 280 pulses between successive line sync signals.
The source organizer 14 of Figure 1 is illustrated in greater detail in Figure 6. The data signals from the scanner 11 are applied to a shift register 37 and shifted in under control of the data clock signal from clock 12. Shift register 37 stores five bits and is provided with five parallel outputs which are applied via a gate circuit 38 and a switching circuit 39 to one or the other of two input data registers 40 and 41 associated with random access memory cells 42 and 43 respectively. The data signals are shifted into shift register 37 under control of the data clock signals from clock 12. In addition, -the data clock signals are applied to a l-S counter 44. At the count of Eive, counter 44 provides a signal which enables gate 38 and resets counter 44. When gate 38 is enabled, the contents of shift register 37 are applied in parallel to switch 39.
Depending on the state of the control signal, the contents of shift register 37 are applied to either input data register 40 or input data register 41. The control signal applied to switch 39 is generated by a trigger circuit 45 which is toggled by the line sync signal from the clock 12.
Thus, the control output from trigger 45 changes state with each line sync signal. During one line period the contents of shift register 37 are applied successively each five bit period to input data register 40 whereas during the next line period the contents are applied serially five bits in parallel to input data register 41.
so976035 17 ~, . . .
~0797~Z
1 the contents of input data reyisters 40 or 41 are stored in memories 42 and 43 respectively at locations defined by the contents of address registers 46 and 47 respectively.
The actual address inserted in either register 46 or 47 de-pending upon the state of trigger 45 is generated by a counter 48 which responds to the output of counter 44. Coun-ter 48 counts from 1 to 280 since 280 is the maximum number of addresses required in memories 42 and 43. This quantity will accommodate 1400 bits in a single scan line since 280 addressable positions each containing five bits equals the 1400 bits per line stored. The output of counter 48 is applied via a switch 49 to either register 46 or 47 depend-ing upon the state of the control signal ~rom trigger 45.
When the control signal occupies one state the contents oE
counter 48 will be inserted in register 46 and when the con-trol signal occupies the opposite state the contents will be inserted in register 47. Registers 46 and 47 and 40 and 41 operate in synchronism under control of the control signal from trigger 45 to cause the contents of the scanned line to be inserted alternately in memories 42 and 43. A decoding circuit 50 responsive to the output of counter 48 decodes the count of 280 and resets counter 48 so that it is pre-pared to process the next scanned line. This completes the description of Figure 6 insofar as receiving data from the scanner and inserting the received data into the memories 42 and 43 on an alternating line basis. The remainder of the description which follows will be concerned with removing the contents from memories 42 and 43 and inserting those contents in the appropriate places in main memory 15.
The contents of memories 42 and 43 are made available in output data registers 51 and 52 respectively. Memories 42 and 43, depending upon the particular type ~7g79Z
1 selected, may be controlled by the output of trigger circuit 45 as to which will be in a read and which w:ill be in a write cycle since these cycles are opposite at any given time for the two memories, i.e., when the data from the line scanner is being stored in memory 42, the contents of memory 43 which represent the data from the previous scan line will be read out into output register 52 and inserted as will be described below in main memory 15. Output registers 51 and 52 are connected by a switch 53 and five gates 54-1 through 54-5 to a data input register 55 associated with main memory 15. The operation and function of gates 54-1 through 54-5 will be described below.
The A clock signal from clock 12 is applied to a counter 56 which counts 1 through 5 and is reset. The outputs illustrated of counter 56 provide an indication of the count. These are labeled A and will be used elsewhere in this circuit and described later on. These outputs are also applied to a decoder circuit 57 which decodes the actual count A-l through A-5 and resets the counter 56 following the occurrence of the A-5 count. The outputs of decoder 57, A-l through A-5, are applied to the gates 54-1 through 54-5, respectively, thus the first five bits from memory 42 or memory 43 are applied via gate 54-1 to the first five positions of the input register 55. The second group of five bits are applied via gate 54-2 to the second five bit positions in input data register 55, etc. until the last group of five bits are inserted in the last five positions of input register 55. Referring back to Figure 5, it should be noted that the A clock or array clock contains five pulses in one-half of the cycle clock period. This is ~7979;~
1 necessary since five ~ddresses in memories 42 or 43 must be processed during one clock cycle period because the word length in main memory 15 is 25 bits and that in memories ~2 and 43 is five bits. Thus, the contents of five addresses in memories 42 or 43 are assembled in the input data register 55 during each cycle clock for later insertion into memory 15. These are assembled under control of the counter 56 and decoder 57.
An address generator 58 receives the output from counter 56, the L, N, and W outputs from signal value gener-ator 16 and computes the address as indicated in the expres-sion in the drawing. The computed address is applied via a switch 59 under control O:e the control output from trigger 45 to either register 46 or 47 depending upon the state o trigger ~5. It should be noted that the address from counter 48 and the address from generator 58 will be applied to different registers 46 and 47 because the control sign~ls from trigger 45 are of opposite states and are applied to switches 49 and 59 respectively. Thus, data will be written into one memory while it is being removed from the other memory and the roles will reverse with each successive line sync signal. The implementation of address generator 58 should be obvious to those skilled in this art. Typically, this address generator will be constructed from conventional solid state circuits to specifically provide the output indicated from the inputs provided. A general purpose com-puter could be used. However, the speed required and the limited function required would militate in most instances against such a choice.
Figure 7 is a detailed diagram of the signal ~ 7~379~2 ;
1 value generator 16 illustrated in Figure 1. The data clock signals are applied to an A counter 60 which is provided with five counting stages having paired OutplltS Al, A2, A4, A8 and A16. The outputs ~1, A2, A4, A8 and 1~16 are applied via an AND gate 61 to the reset input of counter 60. Thus, counter 60 resets a~ter counting 25 data clock pulses. This corresponds to the number of bits in a word in main memory 15. The output of AND gate 61 is connected to a B counter 62 which has three stages to provide word count W which ranges from 1 through 7 or, stated differently, 0 through 6.
The outputs Bl, B2 and B4 of B counter 62 are connected to an AND gate 63 which has its output connecked to the reset input counter 62. The output of AND gate 63 i5 also con-nected to an E counter 64 which has Eour stages, the outputs of which are labeled El, E2, E4 and E8. These constitute the nozzle value N, the outputs El, E2, E4 and E8 are con-nected to an AND gate 6 5 which has its output connected to the reset input of counter 64 which counts to 8, and resets, thus providing an output indicative of the eight nozzle values.
The present value stored in register 17 of Figure 1 is applied to preset an F counter 66. The line sync signals from the clock 12 of Figure 1 are applied to the step input of counter 66 whlch has six stages and provides the line count L. The Fl, F2, F4, F8, F16 and F32 outputs of counter 66 are applied via an AND gate 67 to the reset input of counter 66. Thus, counter 66 counts ~rom 1 through 40 to indicate which of the 40 scan lines are being processed.
Obviously, many more than 40 lines are processed. However, I`
they are treated as groups of 40 by the circuits describecl above.
~C~7979;~
1 Figure 8 illustrates some of the details of the arrays 21A through 21E and the relationship of switch 20 thereto.
Switch 20 is connected to the output register associated with main memory 15 and received 25 bits in parallel there-from. In addition, it receives the N signa:L from signal value generator 16. Each of the arrays 21 includes 8 nozzles N0 through N7. Associated with each of the nozzles is a register 77. There are in total 40 such registers.
The 8 registers 77 associated with the firs-t array are con-nected in parallel to the first five bit positions from the output register of main memory 15 via switch 20. They are selectively connected under control of the N signal from signal value generator 16. The 8 registers 77 associated with array 2 are connected to the 6th through 10th ~it posi-tions of the output register of memory 15 via switch 20 under control of the N signal from value generator 16. In a similar manner the 8 registers associated with each of the third, fourth and fifth arrays are connected to the next succeeding groups of five bits from the output register of main memory 15 via switch 20 under control of the N si~nal from signal value generator 16. Registers 77 are loaded in parallel via switch 20 and the data contained therein is shifted out in serial fashion under control of the data clock signal to the connected nozzles as indicated in the drawing.
Figure 9 illustrates in greater detail adaress gener-ator 18. The physical details of multiple output address ~ -~
generator 18 are not shown since they may be construc-ted from standard components to perform the functions outlined in algebraic form within the box.
~7~1179Z
1 Three intermediate comput~tions are illustrated in 2 the box. In the first interllediate computation the line 3 value L is divided by k to provide a whole number I and a 4 fraction F.
The whole number ~ converted to Mod N yields 6 a value I'. The value I' and the fractional part F :Erom ;
7 above yield a value I'.F which is multiplied by k to yield a value A'. The value A' indicates the starting address for ~1 each nozzle group. This value is, however, an intermediate value which is multiplied by a constant P (=7=number of 11 words/se~ment) summed with the word value W and a value ~N :~ .
1~ to y.ield the actual address where data is retrieved or 1~ placed depending on which portion o the cycle clock i~s 1~ actj.ve (read or write).
lS The values R, Mod N and ~N are computed in advance 16 and stored in the multiple output address generator 18 for 17 each nozzle. The table below is predicated on a value of 18 k=5 and ~ indicates the number of storage locations in lg memory 15 allocated for a nozzle.
20 Nozzle ~ Mod ~1 ~ x 7 hN
1 5 1 35 0 "
2 .10 2 70 35 ~3 4 20 4 140 210 :~
- 5 175 350 ` ;~ ~ `
~07gl7g;Z~
1 The remaining values described above are provided 2 ~ by the circuits previously described. The values of Mod N
3 and ~N may be ætored in a read only memory at addresses 4 correspondng to nozzle number values which are prov'ided by ', the previously described circuits. While a programmed
~07gl7g;Z~
1 The remaining values described above are provided 2 ~ by the circuits previously described. The values of Mod N
3 and ~N may be ætored in a read only memory at addresses 4 correspondng to nozzle number values which are prov'ided by ', the previously described circuits. While a programmed
6 general purposed computational device may be'used~for ,,
7 multiple address generator 18, a more desirable choice would
8 be hard wired logical circuits for performing the described g function since the speed of computation required would be ' more easily and economically achieved.
11 The graphs and table in Figure 10 illustrate the 12 various timing relationships and the sequence of events in 1'3 the circuits described above. Graph A illustrates several 14 cycles of the llne and drum sync signal~. Graph~ B and C
illu~trate read/write sequences for random accesa memories 16 (RA~I) 42 and 43. Graph D illustrates a single line syna !~
17 ' - period and graph E illustrates the fifty-six cycle clock 18 periods occurring the~ein. The table immediately below 19 graph E illustrates graphically the occurrence of various values during the different cycles of the cycle'clock '21 séquence. The indicated sequences are repeated. The word ' 22 number goes from 0-6 and repeats. It ends on 6 at the 56th ;
23 cycle of the cyal~ clock~ The nozzle number stays at 0 for ,,, 24 seven cycles and increments to 1 where it stays for seven cycles. Thereafter it increments to 3 and increments every 26 seven cycles. The line number increments at line sync and 27 remains at that value till the next line sync. Graph F
28 æhows a single cycl,e o the cycle clock and graph G shows 29 , the data clock during that cycle.
' ~07~'792 1 While the invention has be~n paxticularly shown 2 ~ and described with reference to a preferred embo~iment 3 thereof, it will be understood by those skilled in the art 4 that various changes in form and details may be made therein without departing from the spirit and scope o~ the invention.
l ' !
~ ' , , .
.
.
"
:
, ,
11 The graphs and table in Figure 10 illustrate the 12 various timing relationships and the sequence of events in 1'3 the circuits described above. Graph A illustrates several 14 cycles of the llne and drum sync signal~. Graph~ B and C
illu~trate read/write sequences for random accesa memories 16 (RA~I) 42 and 43. Graph D illustrates a single line syna !~
17 ' - period and graph E illustrates the fifty-six cycle clock 18 periods occurring the~ein. The table immediately below 19 graph E illustrates graphically the occurrence of various values during the different cycles of the cycle'clock '21 séquence. The indicated sequences are repeated. The word ' 22 number goes from 0-6 and repeats. It ends on 6 at the 56th ;
23 cycle of the cyal~ clock~ The nozzle number stays at 0 for ,,, 24 seven cycles and increments to 1 where it stays for seven cycles. Thereafter it increments to 3 and increments every 26 seven cycles. The line number increments at line sync and 27 remains at that value till the next line sync. Graph F
28 æhows a single cycl,e o the cycle clock and graph G shows 29 , the data clock during that cycle.
' ~07~'792 1 While the invention has be~n paxticularly shown 2 ~ and described with reference to a preferred embo~iment 3 thereof, it will be understood by those skilled in the art 4 that various changes in form and details may be made therein without departing from the spirit and scope o~ the invention.
l ' !
~ ' , , .
.
.
"
:
, ,
Claims (8)
- CLAIM 1
- 2. An interlaced multiple element printer mechanism as set forth in claim 1 in which for all values of t greater than one the marking means arrays (M) are divided into groups equal in number to the integer value of t and said groups are equispaced along that dimension of the media support surface orthogonal to the lines of marking means, and for a value of t equal to one the arrays are arranged in a single group which may be located as set forth above.
- 3. An interlaced multiple element printer as set forth in claim 2 in which said marking means are ink jet printer nozzles and selectively deposit ink on the media when operated.
- 4. An interlaced multiple element printer as set forth in claim 3 in which said member for supporting the media is a cylinder, the exterior cylindrical surface of which is adapted to support a media and is arranged for rotation about its axis to provide relative movement in one direction with respect to the said support and said support is mounted adjacent the exterior cylindrical surfaces and arranged to move in the axial direction of the cylinder to provide relative movement with respect to said cylindrical media support in the said orthogonal direction.
- 5. An interlaced multiple element printer as set forth in claim 4 in which said ink jet nozzle support moves in the axial direction NT resolution elements during each complete rotation of the cylinder.
CLAIMS 2, 3, 4 & 5 6. An interlaced multiple element printer mechanism suitable for use in a copier or the like comprising:
a substantially cylindrical member suitable for supporting a media and arranged for rotation about its cylindrical axis;
a support mounted adjacent the cylindrical surface of the member and arranged for relative axial movement there-with, whereby said support and cylindrical member move with respect to each other in two substantially orthogonal directions;
a plurality of selectively operable marking means (NT) arranged in at least two substantially parallel linear arrays (M) of (N) marking means each and arranged parallel to the cylindrical axis on the said support for selectively marking a media with indicia when operated, said selectively operable marking means being spaced from each other by a distance equal to (k) resolution elements where a resolution element is equal to the distance between successive marks formed on the media in the axial direction when all of the marking elements are operable and in which the fraction is irreducible for integer values of t and k; and means for simultaneously rotating the cylindrical member and advancing the support means in the axial direction NT resolution elements in each complete rotation of the cylinder. - CLAIM 6
- 7. An interlaced multiple element printer mechanism as set forth in claim 6 in which for all values of t greater than one the marking means arrays (M) are divided into groups equal in number to the integer value of t and said groups are equispaced about the cylindrical member, and for values of t equal to one the arrays are arranged in a single group which may be located as set forth above.
- 8. An interlaced multiple element printer mechanism as set forth in claim 7 in which said marking means are ink jet printer nozzles and selectively deposit ink on the media when operated.
CLAIMS 7 & 8
1. An interlaced multiple element printer mechanism suitable for use in a copier or the like comprising:
a member for supporting a media suitable for receiving indicia on at least one surface thereof;
a support mounted adjacent said at least one surface of said media support member and arranged for relative movement in two substantially orthogonal directions with respect to said media support member;
a plurality of selectively operable marking means (NT) mounted on the said support and arranged in at least two substantially parallel linear arrays (M) of (N) marking means each and arranged parallel to one of the directions of relative movement between the media support member and the adjacent support, said selectively operable marking means being spaced from each other by a distance equal to (k) resolution elements where a resolution element is equal to the distance between successive marks formed on the media in a direction parallel to the lines of marking means when all of the marking elements are operable and in which the fraction is irreducible for integer values of t and k; and means for simultaneously causing relative movement in the said two substantially orthogonal directions so that the marking means advance with respect to the media support in a direction parallel to the lines of marking means NT
resolution elements while the line of nozzles move across the media in the said other direction in its entirety one time.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/700,424 US4063254A (en) | 1976-06-28 | 1976-06-28 | Multiple array printer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1079792A true CA1079792A (en) | 1980-06-17 |
Family
ID=24813447
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA280,278A Expired CA1079792A (en) | 1976-06-28 | 1977-06-10 | Multiple array printer |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4063254A (en) |
| JP (1) | JPS532040A (en) |
| CA (1) | CA1079792A (en) |
| ES (1) | ES460103A1 (en) |
| GB (1) | GB1566828A (en) |
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| US4131898A (en) * | 1977-09-15 | 1978-12-26 | The Mead Corporation | Interlacing recorder |
| US4146901A (en) * | 1977-11-25 | 1979-03-27 | International Business Machines Corporation | Apparatus for recording information on a recording surface |
| JPS5840507B2 (en) * | 1977-12-29 | 1983-09-06 | 株式会社リコー | Inkjet recording device |
| US4232324A (en) * | 1978-06-05 | 1980-11-04 | International Business Machines Corporation | Apparatus for arranging scanning heads for interlacing |
| US4207579A (en) * | 1979-01-08 | 1980-06-10 | The Mead Corporation | Reciprocating paper handling apparatus for use in an ink jet copier |
| DE3051215C2 (en) * | 1979-04-02 | 1997-11-06 | Canon Kk | Droplet generating method for ink jet recording appts. |
| US4520373A (en) * | 1979-04-02 | 1985-05-28 | Canon Kabushiki Kaisha | Droplet generating method and apparatus therefor |
| DE3051250C2 (en) * | 1979-04-02 | 1996-04-18 | Canon Kk | Ink jet recording head |
| US4463359A (en) * | 1979-04-02 | 1984-07-31 | Canon Kabushiki Kaisha | Droplet generating method and apparatus thereof |
| US4321627A (en) * | 1979-09-20 | 1982-03-23 | International Business Machines Corporation | Optical scanner for ink jet printer |
| US4395720A (en) * | 1981-09-29 | 1983-07-26 | Xerox Corporation | Configurational reduction of pulse ejector crosstalk |
| US4401991A (en) * | 1981-10-08 | 1983-08-30 | International Business Machines Corporation | Variable resolution, single array, interlace ink jet printer |
| JPS6211651A (en) * | 1985-07-10 | 1987-01-20 | Tokyo Electric Co Ltd | Printing method in dot printer |
| JPS62157648A (en) * | 1985-12-28 | 1987-07-13 | Citizen Watch Co Ltd | Connection structure for anode terminal of crt |
| DE3730844A1 (en) * | 1987-09-14 | 1989-03-23 | Siemens Ag | MATRIX WRITER |
| GB8810241D0 (en) * | 1988-04-29 | 1988-06-02 | Am Int | Drop-on-demand printhead |
| US4916530A (en) * | 1988-09-02 | 1990-04-10 | Itek Graphix Corp. | High resolution halftone dot generator system including LED array |
| JP2817224B2 (en) * | 1989-07-13 | 1998-10-30 | 松下電器産業株式会社 | Color printer |
| US5003323A (en) * | 1989-09-14 | 1991-03-26 | Seiko Instruments Inc. | Thermal line printer with an array of heating elements linearly arranged along the longitudinal inside edge portions of a plurality of longitudinally staggered head segments |
| EP0422925B1 (en) * | 1989-10-10 | 1996-09-11 | Tektronix Inc. | Method and apparatus for interlaced printing |
| JP3103590B2 (en) * | 1990-02-26 | 2000-10-30 | キヤノン株式会社 | Ink jet recording apparatus and recording method in the apparatus |
| JP2704339B2 (en) * | 1991-02-01 | 1998-01-26 | テクトロニクス・インコーポレイテッド | Interlaced printing method |
| JP3606403B2 (en) * | 1995-04-27 | 2005-01-05 | セイコーエプソン株式会社 | Printing apparatus and printing method |
| US5724086A (en) * | 1995-05-12 | 1998-03-03 | Eastman Kodak Company | Printhead having data channels with revisable addresses for interleaving scan lines |
| US5808655A (en) * | 1995-05-12 | 1998-09-15 | Eastman Kodak Company | Interleaving thermal printing with discontiguous dye-transfer tracks on an individual multiple-source printhead pass |
| JP3329167B2 (en) * | 1995-12-20 | 2002-09-30 | セイコーエプソン株式会社 | Printing equipment |
| JP3498571B2 (en) | 1997-04-08 | 2004-02-16 | セイコーエプソン株式会社 | Dot recording method and dot recording apparatus, and recording medium recording program for the same |
| US6170932B1 (en) | 1997-05-20 | 2001-01-09 | Seiko Epson Corporation | Printing system, method of printing, and recording medium to realize the method |
| JP3491535B2 (en) | 1997-09-04 | 2004-01-26 | セイコーエプソン株式会社 | Dot recording method and dot recording apparatus, and recording medium therefor |
| JP3440804B2 (en) | 1998-01-23 | 2003-08-25 | セイコーエプソン株式会社 | Printing apparatus, printing method, and recording medium |
| US6155668A (en) * | 1998-02-13 | 2000-12-05 | Seiko Epson Corporation | Printer, method of printing, and computer program product to actualize the printer |
| US6158841A (en) * | 1998-02-17 | 2000-12-12 | Seiko Epson Corporation | Dot recording with plural nozzle groups |
| US6089696A (en) * | 1998-11-09 | 2000-07-18 | Eastman Kodak Company | Ink jet printer capable of increasing spatial resolution of a plurality of marks to be printed thereby and method of assembling the printer |
| US6336706B1 (en) | 1998-12-24 | 2002-01-08 | Seiko Epson Corporation | Color printing using a vertical nozzle array head |
| US6267467B1 (en) | 1998-12-24 | 2001-07-31 | Seiko Epson Corporation | Color printing using a vertical nozzle array head |
| JP3800839B2 (en) | 1998-12-24 | 2006-07-26 | セイコーエプソン株式会社 | DOT RECORDING METHOD AND DEVICE FOR PREVENTING ADJACEMENT OF RECORDING OBJECT POSITION AND RECORDING MEDIUM RECORDING PROGRAM FOR THE SAME |
| US6416162B1 (en) | 1998-12-24 | 2002-07-09 | Seiko Epson Corporation | Color printing using a vertical nozzle array head |
| JP3353828B2 (en) | 1999-08-06 | 2002-12-03 | 富士ゼロックス株式会社 | Recording device and recording method |
| JP3840846B2 (en) | 1999-08-13 | 2006-11-01 | セイコーエプソン株式会社 | Printing using a vertical head |
| US6238037B1 (en) | 2000-02-07 | 2001-05-29 | Lexmark International, Inc. | Method of multi-dot interlace printing |
| JP4277164B2 (en) | 2000-07-24 | 2009-06-10 | セイコーエプソン株式会社 | Recording method and recording apparatus |
| JP4277165B2 (en) | 2000-07-27 | 2009-06-10 | セイコーエプソン株式会社 | Recording device |
| US6547356B2 (en) | 2001-02-09 | 2003-04-15 | Lexmark International, Inc. | Latching serial data in an ink jet print head |
| GB2376920A (en) * | 2001-06-27 | 2002-12-31 | Inca Digital Printers Ltd | Inkjet printing on a three-dimensional object including relative movement of a printhead and the object during printing about a rotational axis |
| US7090331B2 (en) * | 2003-05-15 | 2006-08-15 | Seiko Epson Corporation | Printing method, printing apparatus, and computer-readable storage medium |
| US20060018698A1 (en) * | 2004-07-26 | 2006-01-26 | Multi-Color Corporation | System including apparatus and associated method for object decoration |
| US7918530B2 (en) | 2006-02-03 | 2011-04-05 | Rr Donnelley | Apparatus and method for cleaning an inkjet printhead |
| US20090021542A1 (en) * | 2007-06-29 | 2009-01-22 | Kanfoush Dan E | System and method for fluid transmission and temperature regulation in an inkjet printing system |
| US8888208B2 (en) | 2012-04-27 | 2014-11-18 | R.R. Donnelley & Sons Company | System and method for removing air from an inkjet cartridge and an ink supply line |
| CN108778753B (en) | 2016-03-04 | 2020-04-21 | R.R.当纳利父子公司 | Printhead maintenance station and method of operating the same |
| US10124597B2 (en) | 2016-05-09 | 2018-11-13 | R.R. Donnelley & Sons Company | System and method for supplying ink to an inkjet printhead |
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|---|---|---|---|---|
| US3564120A (en) * | 1968-10-18 | 1971-02-16 | Mead Corp | Image construction system with arcuately scanning drop generators |
| US3588906A (en) * | 1968-10-18 | 1971-06-28 | Mead Corp | Image construction system with clocked information input |
| US3797022A (en) * | 1972-07-25 | 1974-03-12 | Mead Corp | Apparatus and method for reproduction of character matrices ink jet printer using read only memory |
| DE2246797C3 (en) * | 1972-09-23 | 1980-10-09 | Agfa-Gevaert Ag, 5090 Leverkusen | Continuous recording of images by means of a liquid jet |
| SE378212B (en) * | 1973-07-02 | 1975-08-25 | Hertz Carl H | |
| JPS5234328B2 (en) * | 1973-07-04 | 1977-09-02 | ||
| US3911818A (en) * | 1973-09-04 | 1975-10-14 | Moore Business Forms Inc | Computer controlled ink jet printing |
| US3975740A (en) * | 1973-10-02 | 1976-08-17 | Siemens Aktiengesellschaft | Liquid jet recorder |
-
1976
- 1976-06-28 US US05/700,424 patent/US4063254A/en not_active Expired - Lifetime
-
1977
- 1977-05-16 GB GB20498/77A patent/GB1566828A/en not_active Expired
- 1977-06-10 CA CA280,278A patent/CA1079792A/en not_active Expired
- 1977-06-16 JP JP7059677A patent/JPS532040A/en active Granted
- 1977-06-25 ES ES460103A patent/ES460103A1/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| US4063254A (en) | 1977-12-13 |
| JPS532040A (en) | 1978-01-10 |
| JPS5626877B2 (en) | 1981-06-22 |
| GB1566828A (en) | 1980-05-08 |
| ES460103A1 (en) | 1978-12-16 |
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