CA1107871A - Display compressed image refresh system - Google Patents

Display compressed image refresh system

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Publication number
CA1107871A
CA1107871A CA300,203A CA300203A CA1107871A CA 1107871 A CA1107871 A CA 1107871A CA 300203 A CA300203 A CA 300203A CA 1107871 A CA1107871 A CA 1107871A
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CA
Canada
Prior art keywords
image
refresh
data
display
coded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA300,203A
Other languages
French (fr)
Inventor
Donald J. Chesarek
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International Business Machines Corp
Original Assignee
International Business Machines Corp
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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/42Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of patterns using a display memory without fixed position correspondence between the display memory contents and the display position on the screen

Abstract

DISPLAY COMPRESSED IMAGE REFRESH SYSTEM
ABSTRACT OF THE DISCLOSURE
Scanned image data is compressed and stored in a central processing unit. An image for display is recalled, decompressed, and then recompressed for refresh storage for a CRT display device. The refresh compressed image is recalled when necessary for display and refresh, and directed through a plurality of parallel operated decom-pressors and refresh buffers to drive the display unit. An unfilled compressed refresh image store is filled with zeros to complete the display with an all white scan. In an overflow situation, a partition boundary is generated to identify that more data follows. To display the subsequent image, upon request, the overflow increment value which repeats a few scan lines is transmitted and a visual overlap image with subsequent data is compressed for refresh store and display and refreshed as required.

Description

lY BACKGROUND OF THE I~IVENTION
19 The invention relates generally to a display image processing system and more particularly to a refresh system 21 that stores compressed information of the image.
22 Field of the Inve~tion 23 In a display device such as a cathode ray tube type, it 24 is nec-essary to continually refresh or retransmit-the data to the display since the retention of the displayed image by 26 the display device is insufficient for a complete scanning 27 by a human operator.-The refresh device continually retrans-28 mits the same image until a new image is required.
29 The refresh of a display device can be accomplished in either of two ways. First, the refresh information can be _ _ . . ..
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l obtained from an uncompressed representation of the informa-
2 tion to be displayed or the refresh information can be
3 obtained from a compressed representation. Refresh informa-
4 tion from the compressed representation can result in a much
5 less expensive display subsystem by reducing the amount of
6 memory storage required to store the refresh information for
7 a single image. The use of a compressed representation
8 reduces the refresh memory store capacity from one half to g one twentieth of the capacity of that required in a display lO that refreshes from the uncompressed representation of the ll image. A major cost item in a CRT image dispLay is the cost 12 of the refresh buffer. A display system based on storage 13 of a compressed representation may offer a significant cost L4 advantage over a display which refreshes from an uncompressed 15 representation of the image.
16 In order to implement a raster display designed to t 17 present image data which accomplishes refresh from a cc~-18 pressed representation of the image, both of the fol~owing l9 problems must be overcome. First, a means must be provided 20 which permits the display operator to examine the contents 21 of an image whose compressed representation will not fit in 22 the display refresh storage. This is known as the partition 23 problem. Second, the instantaneous peak decompressor da1:a 24 rate problem must be solved. A means must be provided to 25 permit the use of multiple decompressors in order to reduce 26 the instantaneous data rate required by a single decompressor 27 Existing Alphanumeric (A/~) and vectorgraphic CRT
28 displays generally refresh from a compressed representation 29 of the information to be displayed. Alphanumeric displays 30 do not have the partition or data rate problems because the .

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3L~ 71 1 decompression ratio is constant and always significantly greater than seven to one. Vector graphic display systems limit the amount of information which can be presented through the use of sophisticated system software and thus avoid the partition problem. Because of the serial nature of the compressed representation used in vector graphic displays, beam directed presentation formats are used as opposed to raster presentation formats. Where a raster format is used at the CRT, a scan conversion process must be employed. The compressed refresh image display of the present invention can be applied to a vector graphics display after the scan conversion process, with significant cost savings as con-trasted with an uncompressed refresh display of scan converted data.
It is, therefore, a prime objective of the present invention to provide improved apparatus for display image refreshing from a compressed representation.
DESCRIPTION OF THE PRIOR ART
A refresh system for storing and refresh driving a display system including a storage for compressed refresh data is disclosed in U.S. Patent No. 4,074,254, issued on February 14, 1978, entitled "An XY Addressable and Updatable Compressed Video Refresh Buffer for Digital TV Display" and assigned to the assignee of the present invention. That refresh system discloses a scheme for compressing the data information of the image for storage in the refresh store together with a means for mapping and controlling the retrieval of the stored information. There is no showing of a means to control an overflow situation.
U.S. Patents 3,444,319 to Artyt et al and 3,480,943 to SA9-76-031 _3_ ~7~7~ h 1 Marber also discloses schemes for compressing data for 2 driving a scanning display device. Neither patent discloses 3 a complete refresh system nor a situation where the pattern 4 is too large to place into the scanning display device at _ 5 one time.
6 Therefore, another object of the present invention is 7 to provide a refresh system that can control the overflow 8 and pa~titioning problems using compressed reEresh schemes
9 of the prior art.
Yet another object of the present invention is to pro-11 vide a refresh compression system that uses an improved 12 partitioning scheme for the image display and uses multiple 13 decompression systems for an orderly raster scan.
4 SUM~RY OF THE INV~NTION
A reproduction system according to the present invcn tiOIl 16 includes a scanner and a compression processor for compressing 17 the scanned image data output for storage in a central ~ro-18 cessing unit memory store. The image data is selectiYely 19 retrieved by the display device. The selec-ted image clata is decompressed and recompressed for storage in a refresh image 21 store in the display system. An indicator is stored in an 22 increment directory store for each compressed string length 23 stored in the refresh image store and for a store over~low 24 conditi-on. The compressed refresh image is retrieved from f' ' 25 the image refresh store as needed for initial display and 26 cycled for refreshing the display. The compressed refresh i, 27 image is transferred to a refresh controller ull~er control 28 of a synch generator that keeps track of the clisplay scan~ lg - 29 line and the necessary image data for that scan line. The compressed refresh image is sequence decompressed in a ,............... . .
~ S~976~31 -4-.~
~' 78~1 1 plurality of decompressors and stored in associated raster 2 buffers for eventual serialization to the display device.
3 An overflow indicator in the increment directory store is 4 provided to alert the operator that via a system request, more image data can be obtained to complete the image. The _.
6 image and the new data with appropriate indicators is 7 retrieved and recompressed for storage and display.
8 The present invention raster display device is designed 9 to present image data and comprises a conversion means for compressing binary coded data representative of a visual 11 image to be displayed and a refresh storage device for stor-12 ing the compressed binary coded data. Image refresh pro-13 cessing control means are included for dividing the image 14 data into a plurality of non-overlapping image segments.
The image processing control means comprises gating means 16 for sequentially activating the conversion means to compress 17 individual segments of the image data. Increment direc~ory 18 storage means are included for storing the control of 19 information representative of the storage address for each of the independent segments of the image as slored in the 21 refresh storage means. A plurality of decompressor means --22 and a plurality of refresh buffers decompress the compressed 23 data and store scan lines for use by the raster display ; device~ Image refresh control means sequentially gate ; 25 under control of the increment directory storage means data.~ .
26 segments of the image to one of the pl urality of decompressor 27 means. The decompressed image is then directed to an 28 associated refresh buffer. The refresh buffer stores scan 29 lines of the image for reproduction by the raster display ~ 30 device.
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~ SA976031 -5-,............... .
':

~7871 1 The present invention is concerned principally with a 2 refresh system for a raster display device. Standard 3 refresh systems include a refresh memory store for storing 4 compressed coded image data, image processing control means _ 5 for dividing the image data into a plurality of non-over-6 lapping image segments, and logic control means for accomplish-7 ing the function. The present invention furtller provides an 8 incrementally accessible directory store that stores control 9 information representative of the storage addresses and content information for each coded image information segment 11 together with cyclic image refresh control means for incre-12 mentally retrieving the control information and responsive 13 thereto for generating address locations for cyclically and 14 sequentially retrieving the coded image information for conversion and display on the raster display. Further with 16 the present invention, the conversion of the coded image 17 information is performed by a plurality of refresh systems 18 including a plurality of sets of decompression processors 19 and refresh buffer stores.
It is, therefore, an object of the present invention to 21 provide enhanced refresh apparatus for a raster display 22 device-23 Another object of the present invention is to reclllce 24 the memory store size requirements in a refresh apparatus 25 for a raster display device by the use of an incrementally 26 addressed storage means for storing control information of 27 the image data.
28 Another object is to provide a reproduction system with 29 an enhanced method and apparatus for controlling the image 30 display and refresh for a raster display device.

S~9i6031 -6-i7~7~

1 Yet another obiect is to provide a refresh control 2 system for a raster display device that solves the partition 3 problem and the decompressor data rate problem of prior art 4 compressed refresh systems by the use of an incrementally addressed storage means and a plurality of decompression 6 systems-7 Still another object is to provide refresh control 8 means for a raster display device that can be used with 9 compression apparatus which process the image as a linear striny or which process the image in a two dimensional area 11 scheme.
12 The display refresh control system of the present 13 invention provides a means for indicating the starting and L4 trailing edges of a partition of an image and a means to control the starting raster scan line for the presentation 16 of an image partltion, together with partitioning means for ;.
17 facilitating the use of displays with differing amounts of 18 refresh memory store.
19 Yet another object is to provide refresh apparatus for a raster display device that operates multipl~ decompressols 21 in parallel while handling image partitioning with display 22 control logic together with an ability to operate with line 23 and area oriented decompressor schemes.
24 These and other objects of the present invention will become apparent to those skilled in the art as the description 26 proceeds.
27 B~IEF DESC~IPTION OF T~IE DRAWING
28 The various novel features of this invention along with 29 the foregoing and other objects as well as the invention itself both to its organization and method of operation, may SA9i6031 -7-~7871 1 be more fully understood from the following description of 2 illustrated embodiments when read in conjunction with the 3 aeeompanying drawings wherein:
4 Fig. 1 is a bloek diagram of the refresh apparatus for use with the raster display device according to the present 6 invention;
7 Fig. 2 is a bloek diagram of apparatus for use as the 8 refresh eontroller of Fiy. l;

-9 Fig. 3 is a representation of the contents of the10 inerement direetory store of Fig. 2 for an image with three 11 partitioned displays;
12 Fig. 4 is a block diagram of apparatus for use as the 13 refresh regulator of Fig. 2;
14 Fig. 5 is a logic diagram of a typical eircuit for use lS as the inerement eontroller of Fig. 2; and 16 Fig. 6 is a representation of the data in the Contr,oller 17 Interfaee for a fourteen segment image e~ample.

18 Fig. 7 is a logie diagram of a typical circuit for use 19 as the IDS interpretation eontroller of Fig 4.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

21 In Fig. 1, a eomplete seanner/display system is shown 22 with a refresh eontroller 10 aecording to the present 23 invention. The seanning portion of this system incluc1es a 24 seanner 12, a eompression proeessor 14, and a central processing unit 16 with a memory store 18. The scanner 12-26 seans an image, pic,ture element by picture element to obtain 27 binary data information representative of each picture 28 element. The binary data information is dire~tted to the 29 eompression processor 14. The compression processor 14 compresses the data information received from the scanner 12 S~9i6031 -8-1 to a binary data format that represents the image in a 2 reasonable number of bits for storage by the central pro-3 cessing unit 16 into its memory store 18.
4 When the stored image data information is ready for _ 5 reproduction on a display device 20, control signals are 6 directed to the central processing unit 16 to retrieve the 7 compressed image information. In the preferred embodiment, 8 the display device 20 is preferably a cathode ray tube (CRT) 9 device. To display the compressed image information on the
- 10 CRT, the data information is directed to a decompression
11 processor 22 of a graphics generator 24 where the data
12 information is reconverted to its original picture element
13 format. --L4 The output of the decompression processor 22, the - 15 picture element data information, is directed to the reEresh 16 controller 10 which recompresses, stores, decompresses and ~ ' 17 converts the image data into a visual image on the CRT
18 device 20.
" 19 Display information consisting of Alpha Numeric A~N
20 text and line drawings (graphics) can be merged with the 21 image data information in the graphics generator. The 22 ability to merge A/N and vector graphic information with 23 image information at the display,provides the ability to 24 "annotate" or "mark up" a scanned image with text or line ,25 drawing information.
26 The data image information from t}le central processing 27 unit 16 can be directed to an A/N memory store 26 an~ a 28 graphic~,memory store 28 of the graphics gener~tor 24. The 29 data information placed into the A/N memory store 26 is directed to an A/N generator 30. The output of the A/~

SA976031 ' -9-1 generator 30 is directed to the display 20.
2 The data information placed in the graphic memory store 3 28 is directed to a vector generator 32. The vector generator 4 32 output is directed to the display device 20. ~.S. Patent _ 5 3,973,245 to Karl Belser entitled "Method and Apparatus for 6 Point Plotting of Graphical Data from a Coded Source into a 7 Buffer and for Rearranging that Data for Supply to a Raster 8 Responsive Device", and assigned to the assignee of the 9 present invention, discloses a computer controlled gra.phics display apparatus which is representative of the function 11 provided by the graphic memory store 28 and the vector 12 generator 32.
13 In general, the refresh controller 10 comprises a
14 refresh compression processor 3~, an image re:Eresh store 36, : 15 and a refresh regulator 38. The refresh controller 1.0 takes 16 the individual binary information of the pictur.e elements 17 from the decompression processor 22 and compresses this 18 information according to the best scheme for refresh com- ~
19 pression. This compressed data from the refresh compression processor 34 is stored in the image refresh store 36. The 21 compressed refresh data information is retrieved from tlle 22 image refresh store 36 by the refresh regulator 38 as 23 required to continually refresh the data image displayed on 24 the CRT display device 20. Each dot of each scan line of the CRT device must be continually repeated in order to keep 26 the image visible on the CRT screen.
27 There are numerous compression algoritllms which can be .
2B used within the refresh controller 10, oE ~ig. ]. The key 29 requirements are ease of implementation and control of maximum data expansion for rare input image bit combinatiolls ~787~

1 with compression performance as a secondary factor. The 2 null suppression technique by S. S. Ruth and P. J. Kreutzer, 3 discussed in Datamation, September 1972 at pages 62-66 is a 4 good example of a usable algorithm. There are several suitable algorithms described by T. S. Huang in the Inter-6 national Conference on Communications, Vol. I, Section 7 pp.
7 7-11.
8 The algorithm used in the Compression Processor 14 and 9 in the Decompression Processor 22 of Fig. 1 should be 10 selected to maximize compression. Algorithms which maximize -11 compression generally have large data expansion factors (4 12 or more to 1) for rare input image bit combinations.
13 The refresh controller 10 controls the amount of data 14 retrieved from the central processing unit 16 for display according to the amount of data information that can be 16 placed onto the screen of the device. This inEormation is 17 compressed by the refresh compression processor 34 and 18 placed into the image refresh store 36. The refresh controller 19 10 recalls the stored information and controls the decom~ress ion of the data in turn through the refresh regulator. The 21 refresh controller 10 retains an indication of the amount oE
22 information that is being displayed in the event that the 23 data information to be displayed exceeds the size of the 24 image-data store 36 and the amount of information that can be displayed at one time. When the amount of data information 26 overflows the display capacity, the refrest~ controller 10 27 recalls, under operator control, the ne~;t t~lock of data from 28 the central processing unit 16 for decompression by the 29 decompression processor 22 for compression by the refresh compression processor 34 and for storage in the imag~ da~a ~i7871 1 store 36 to display the next bloc~ of data information 2 through the refresh regulator 38. A block diagram for 3 the refresh controller 10 is shown in Fig. 2.
4 Referring to Fig. 2, the refresh controller includes the refresh compression processor 34 directing data to the -6 image refresh store 36 via an IRS bus 40. The compressed 7 data stored in the image refresh store 36 is directed by the IRS bus 40 to the refresh regulator 38 which includes two 9 refresh decompressio~ processors 44 and 46, two raster buffers 48 and 50, and a refresh logic çontrol 52. ~ore 11 than two decompression processors and two raster buffers can 12 be used to reduce instantaneous peak decompression data 13 rates. The refresh regulator 38 generates the image data L4 signal which provides the image to be displayed on the CRT
device. The refresh regulator 38 is controlled by all incre-16 ment controller 54 which includes a length increment generator 17 56 and a control register 58. A logic diagram of a typical 18 logic eircuit that could be used for the increment: controller 19 54 is shown in Fig. 5 and will be discussed later.
The control register 58 accepts the control signals 21 from the central processing unit 16 and also generates the 22 control signals from the refresh controller 10 to the central 23 processing unit 16 when more data or a new image is to be 24 displayed. The increment controller 54 controls the refresh regulator 38 by a REFRESH ENABLE signal directed to the 26 refresh logic control 52. The length increment generator 56 27 via an IDS bus 60 stores an indication of the data information 28 stored in the image refresh store 36 in an increment directory 29 store 62. The increment directory store 62 stores a set of control indicators which is representative o~ the image ctata sA9i6031 -12-i9 ~7871 l being displayed. The increment directory store 62 contains 2 information required by the refresh regulator 38, in order 3 to locate the starting address in the image refresh store 36 4 of variable string lengths which contain the compressed representation of each image increment. There is one entry 6 in the increment directory store 62 for each image increment 7 on the CRT display surface. For example, if a simple 8 linear compression scheme were used, then there would be one _.
9 entry per raster scan line on the display device. In a linear compression scheme, one image increment represents ll one scan line. If a two-dimensional compression scheme were . , ~ . .
12 used, then there would be one entry in the increment directory 13 store 62 for every two dimensional area image increment on 14 the CRT display surface. The image refresh store 36 holds the compressed representation of the image actually being 16 presented on the CRT display. The refresh compression 17 processor 34 processes the entire image as a collection of 18 non-overlapping image increments each of which is compressed l9 separately.
The refresh regulator 38 and in particular, the refresh 21 logic control 52, provides the means for interpreting the 22 contents of the increment directory store 62 ln order to 23 control the refresh data access to the image refresh store 24 36 and-to control the generation of the starting and trailing 25 edge indication of a partition image. To provide a better 26 description of the refresh controller lO of Fig. 2, the 27 process of retrieving an image from the memory store of a 28 central processing unit and its eventual display will be 29 discussed.
A particular compressed image is requested from the .

1 memory store 18 by sending a location address to the central 2 processing unit 16. The compressed da~ta from the memory 3 store 18 is directed to the decompression processor 22 (see 4 Fig. 1). The image data from the decompression processor 22 is directed to the refresh compression processor 34 (see 6 Fig. 2). A description of loading an uncompressed image 7 whose compressed representatlon will fit into the image 8 refresh store 36 will be provided first. Thell a description 9 of loading an image which is too large for the image refresh store will be provided.
11 The central processor starts by loading the control 12 register 56 with a set value such as all zeroes to indicate 13 that a new image is being processed. The uncompressed imac)e 14 data serial bit stream is compressed by the refresh compres-sion processor 34 which implements the display refresl~
16 system compression scheme. The data output of the refresh 17 compression processor 34 is assembled into words for storage 18 in the image refresh store 36. When the compressed representa-19 tion of the first image increment has been stored in the image refresh store 36, the length of the compressed representa-21 tion of the first image increment is placed into the first 22 entry in the increment directory store G2. The ne~t image 23 increment is comprèssed and stored in the image refresll 24 store 36 with subsequent storage of the compressed representa-tion in the next entry in the increment directory store 62:
26 This process continues until all image increments have been 27 processed. At the completion of the input process, the image 28 refresh store 36 will contain the compressed representation 29 for each image increment on the display and the increment directory store 62 will contain the length information SA9i6031 -14-~i787~. `

1 required to locate the start oE the compressed representation 2 of each image increme~t.
3 An absolute addressing scheme for the image refresh 4 store 36 could be developed rather than the relative length based addressing used in the preferred embodiment. The 6 absolute addressing scheme would require more address bits 7 in each entry of the increment directory store 62 and a 8 slightly more complex control means for handling yartition .
9 information. In this preferred embodiment, the image refresh store address of the start of the compressed repre-11 sentation of an image increment i can be easily computed 12 from the first i-l entries in the increment directory store 13 62.
14 When the number of image increments sent from the central processing unit to be displayed is less than the 16 maximum number to fill the CRT screen, the unused entries in 17 the increment directory store 62 are filled with the value 18 0. An increment directory store entry value of 0 when 19 detected during the refresh process means that there are not information bits in the image increment and thereEore the 21 refresh regulator 38 will emit an all "white" image incre-22 ment.
23 The next process assumes that the compressed repre-24 sentation of the image as compressed by the refresh compl-es-sion processor 34 will not fit into the image refresh store 26 36.
27 First, the manner in which the partitlon boundaries are 28 generated will be described. The refresh regula~or 38 29 generates a partition boundary pattern when the entry in the increment directory store 62 is equal to a special value, SA9i6031 -15-7~7l ~

l called partition mark. The partition mark could have the 2 value the nth power minus 1, where n is equal to the number 3 of bits per entry. If the indicator in the increment directory 4 store 62 is not 0 (the special indicator for emitting an all white pattern) or the partition mark value, the associated 6 image increment is generated from the compressed represen~ation 7 stored in the image refresh store 36 directly. Such direct 8 reproduction can take place through the refresh regulator.
9 The partition boundary pattern is used to provide the operator with a visual indication of the image boundary when a partial 11 image is being displayed and is generated when a partition 12 mark value is the controlling value in the increment direc~ory 13 store.
L4 In the most simple case, the boundary pattern could be an all black image increment. In the general case, the 16 partition boundary pattern would be stored as a fi~ed pattern 17 in a "read only storage" extension to the image refresh 18 store. This would allow the use of complex bounclary indicator 19 patterns without incurring the cost of speciaL purpose pattern generator logic. Loading of the image prQceeds as 21 in the previous example. ~hen the image refresh store 22 overflow condition is reached, the image increment number 23 causing the overflo~ condition is placed into the contl^ol 24 register 58 by the length increment generator 56. The value indicator associated with the partition boundary patte~ is 26 stored in the increment directory stor~3 62 in the next 27 several positions and the value 0 is stored in each remain -28 ing position of the increment directory store~ The contents 29 of the control register 58, the overflow increment value denoted j, is transmitted back to the central processinc~

SA9i6031 -16-3 ~$787 ~ ~

1 unit as part of the ending status. When all data has been 2 stored in the IRS, the length increment generator starts 3 the refresh process by sensiny the refresh enable signal.
4 Fig. 3 summarizes the contents of the increment directory _ 5 store 62 for an image which requires 3 partition showings on ~6 a display device having 1000 scan lines. A linear compressor 7 is used, that is, each image increment is equal to one full 8 scan line. ~nder contents, the L(x) representation is the 9 length in bytes of the compressed representation of scan line i as stored in the image refresh store. The partition 11 mark value is equal to 255 in the example showr~ in ~ig. 3.
12 Thus, the partition boundary will be displayed for each line 13 having the indication 255. Partition 1 conta:ins image lilles L4 1 through 385 with a partition mark displayed in 386, and an all white image for the remainder. Partition 2 starts all 16 white; has a partition mark in line 376, then shows image 17 lines 377 through 892 and a partition mark in line 893 18 followed by an all white image representation through 1 ine 19 1000. Partition 3 starts with an all white imaqe, has a 20 partition mark in 883 and then shows an image at lines 884 21 through 1000.
22 To display the subsequent partition of the example 23 image, the central processing unit preloads a startincJ image 24 increment value into the control register 58. Normally, 25 this value will be some number of image increments earlier 26 in the image than where the overflow occ~lrred, i-10 for the 27 example shown in Fig. 3. For partition 1, j is equal to 386 28 and for partition 2, j is equal to 893. The earlier image 29 increments provides a visual overlap of the previous ima~e 30 partition with the current partition. The central processin~

S~9i6031 -17-1 unit retransmits the entire image Eor refresh preprocessing.
2 The image is decompressed by the decompression processor 22, 3 compressed again by the refresh compression processor 34 and 4 directed to the image refresh store 36. When the control _ 5 register 58 contains a value other than 0, the increment 6 controller 54 controls the loading of -the image refresh 7 store and the increment directory store 62. The value 0 is 8 placed in each entry of the increment directory store 62 by 9 the increment controller 54 until the IDS entry i being processed by the refresh compression processor 34 is equal 11 to that specified in the control register 58. ~ value that 12 generates the partition boundary pattern is pLaced in entry 13 i in the IDS. The compressed representation Eor subsequent 14 image increment (i+l, i+2, etc.,) is directed to the ima~e refresh store starting with the first address of the image 16 refresh store. The development of the compressed representation 17 proceeds as before for the remainder of the image to he 18 displaced.
19 After the compressed representation of the ima~Je has been stored in the image refresh store 36 and the refresh 21 control data has been stored in the increment director~
22 store 62, the refresh regulator 38 takes control to initiate 23 the display of the image and the refresh process. ~ block 24 diagram of the refresh regulator 38 is shown in ~ig. 4. The refresh regulator 38 provides the means for controllin~ the 26 starting and stopping of each refresh decompression processor 27 and for generating the address used by each decompression 28 processor to access the image ref~-esh store. Tlle refresh 29 regulator interprets the contents of each entry in the increment directory store to insure that the app~opriate 1 data is produced by each refresh decompression processor.
2 The refresh regulator also provides the timing synchroniza~
3 tion between the synch generation by the synch generator and 4 the raster buffers currently generating the data stream for the CRT display device. The refresh regulator incrementally 6 retrieves control information from the increment directory 7 store 62 and is responsive thereto to generate address 8 locations for cyclically and sequentially retrieving the 9 coded image information from the image refresh store 36 for conversion by the refresh decompression processors 44 and 46 11 and display on the raster display device.
12 Referring to Fig. 4, the refresh regulator 38 includes 13 an IRS address generator 70 for generating the addresse~s to 14 retrieve the data from the image refresh store and a data multiple~or 72 for receiving the data from the imacJe refresh 16 store via the IRS bus 40. The data multiple~or 72 directs 17 the compressed image data to either refresh decompression 18 processor ~1 or ~2. An IDS interpretation controller 74 19 takes the information from the increment directory store 62 and controls the operation of the refresh regulator. The 21 image data from the refresh decompression processors is 22 directed to an RB input data multiple~or 76 and then to an 23 input switch 78 which switches the image data flow to either 24 the raster buffer #1 or to raster buffer ~2, depending on which buffer is available for input data. An RB address 26 generator 80 generates the raster bufler address when 27 activated by the RB available signal generated by an output 28 address generator 82~ The output address generator 82, when 29 activated by the synch generator 64, activates an output switch 84 to retrieve the image data from either of the ~i7~371 1 raster buffers 48 or 50, depending on the last one filled 2 with image data. The raster buffers through the output 3 switch 84 directs the data signals -to a serialization 4 controller 86 which serializes the data for transmission to the CRT display device.
6 The increment controller 54 (Fig. 2) activates the 7 REFRES~ ENABLE signal line to initiate the refresh process.
8 When the IDS interpretation controller 74 detects the fact 9 that the REF~ES~ ENABLE signal line has been activated, it enters the initialization state in preparation for starting 11 the refresh cycle. The refresh cycle will continue as long 12 as the REFRESH ENABLE line is active. Tlle output address 13 generator 82 translates display scan line numbers recei~ed 14 from the synch generator 6~ into raster buffer addresses.
In addition, the output address generator 82 controls the 16 transfer of the uncompressed image data from each raster 17 buffer.
18 Activation of the REFRESH ENABLE line is detected by 19 the RB address generator 80 via the IDS interpretation controller 74. The RB address generator 80 provi~es the 21 raster buffer addresses for each refresh decompression 22 processor image data word output. There is a fi~ed one-to-23 one mapping from any data position on the display surface to 24 a raster buffer and to an address within that raster bufEer.
The address mapping is cyclic cver the display surface. The 26 address generation cycle for each refresh decompression 27 processor is reset at initialization time. At initialization 28 the IDS interpretation controller 74 generates the fetch 29 address signal and interprets the first entry in the incre-ment directory store. The address data required to decom-7~371.

1 press the first segment is transferred from the IDS interpre-2 tation controller 74 to the-IDS address generator 70 over 3 the image refresh store interface, IRS bus 40. The data as 4 addressed is retrieved from the image refresh store, directed onto the IRS bus 40 and into the data multiple~or 72 for 6 direction to the refresh decompression processor 44.
7 After starting the refresh decompression of segment 1, 8 the IDS interpretation controller 74 fetches the second 9 entry from the increment directory store, interprets it and transfers the address data required to decompress the second 11 segment to the IRS address generator 70.- The IRS address .12 generator 70 will generate the address to fetch the data 13 from the image refresh store for direction through th2 data 14 multiplexor 72 to the refresh decompression p.rocessor q6.
:l5 When a refresh decompression processor signals that it 16 has completed generation of an image increment and a raster 17 buffer is available, the IDS interpretation controller 74 18 processes the appropriate entry from the increment directory 19 store 62 and restarts the appropriate decompressioll processor 20 as defined above. When a raster buffer is not a~ailable, 21 refresh decompression processing is held pencl.ing activation 22 of the appropriate raster buffer available line. The 23 refresh decompression processors operate independently of 24 each other but under control of the RB address generator 80 25 and the IDS interpretation controller 7~.
26 The IRS address generator 70 and the data multiplexor 27 72 interface the refresh decompression processors to the IRS
28 bus 40 and the image refresh store 36. The IRS aclclress 29 generator provides the incremental address generation needed 30 to retrieve compressed data from the image refresh store on SA976031 . -21-~ 7871 2 1 an "as needed" basis by each refresh decompression processor.
2 The address information provided by the increment directory 3 store 62 via the IDS interpretation controller 74 provides 4 the starting addresses of the compressed representation of __ 5 image increments in the image refresh store and the length 6 of the compressed representation of the segment. The IRS
7 address generator 70 develops the intermediate image refresh 8 store word addresses.
9 The two raster buffers 48 and 50 operate in ping-pong 10 mode. Each raster buffer has sufficient capacity to hold 11 some small number of image increments, usually one increment 12 per refresh decompression processor. The refresh decompression 13 processors develop the uncompressed representation of ir,~age 14 increments as the image data in one raster buffer and then releases that raster buffer for use in refreshing part of 16 the CRT surface. When the content of a raster buffer has 17 been used for refresh purposes, that raster buffer is marked 18 available for back filling with new image increment data.
19 The IDS interpretation controller 74 will initiate decom-pression of image increments as soon as a raster buffer is 21 available. The capacity of the raster buffers must be 22 sufficient to hold one image increment for each refresh 23 decompression processor.
24 It may be desirable to transmit compressed image data across the system interface between the central processing.
26 unit and the refresh controller. ~or this system a system 27 decompression processor is placed in the display input data 28 path between the central processing unit and the display 29 compression processor. ~lost schemes that are designed to ma.Yimize compression do not provide an advalltage in their 7~37:1 .

1 use in a compressed refresh display due to the e~cessive 2 peak data rates that they can require even though they yield 3 a better average compression ratio.
4 The refresh apparatus for a raster display device according to the present invention includes a compression 6 means, refresh compression processor 34, for converting 7 noncoded raster information to a coded compressed repre-8 sentation. The coded compressed representation is stored in 9 a master memory store, the image refresh store 36, in con-tinuous string lengths. A directory store, the increment 11 directory store 63 stores a memory map of an indication of 12 the beginning of individual scan lines and an indicatlon of 13 an overflow condition wherein the master memory store is 14 full. A decompression means, the decompression processors 44 and 46, includes means, the IRS address generator 70, Eor 16 extracting the stored coded compression representation from 17 the master memory store and means, the IDS interpretation 18 controller 74, for extracting scan line length information 19 from the directory store. Refresh buffers, raster buffers 48 and 50, are included for storing the scan line information 21 and include associated means for directing each scan line 22 into the raster display device. Means, the increment 23 controller 54, are included for sensing the overflow coll~lition-24 of the~master memory store and for requesting noncoded raster information, via the IRS address generator 70, to 2G identify and retrieve the initial active scan line for 27 displaying on the display device in response to the overflow 28 condition sensing means.
29 Stated differently, the present invention raster con-version means includes the compression means for converting ~7871 1 the noncoded raster information to a coded compressed repre-2 sentation for storage in the master memory store according 3 to continuous string lengths. The directory store stores an 4 indication of the beginning of the individual continuous string lengths. A generator means-, the length increment 6 generator 58, places the coded compressed representation 7 into the master memory store and indicates to the directory 8 store the beginning of the individual continuous string 9 lengths. Sensing means, the increment controller 54, senses the overflow condition of the master memory s-tore by com-11 paring the address generator to the last physical address 12 stored in the memory store. Communicating means, the 13 control register 56, responsive to the sensing means idellti~y L4 and retrieve the initial active scan line for display by the display means. Indicating means in the sensiny n~eans 16 indicate the completion of the master memory store loading.
17 The indicating means generates a REFRESII ENABLE signal to 18 activate the display device to refresh the displayed scan 19 line in a cyclic manner.
In Fig. 5, a logic circuit that could ke usecl as the 21 increment controller 54 of Fig. 2 is shown. The logic 22 design shown should not be taken as limiting the present 23 invention since the circuitry is conventional and represents 24 standard design familiar to a person skilled in the logic and image processing arts.
26 Referring to Fig. 5, data is transmitted seriallY into 27 the refresh compression processor 34 where it is converted 28 into a more compressed representation. Tlle compr~ssion 29 processor 34 indicates the fact that an input image increment has been processed by a pulse on the end oE increment signal SA9i6031 -24 ~i7~371 1 line 90. The processor 34 indicates that one word of 2 compressed data has been loaded into an assembly shift 3 register 98 by a pulse signal on the word line 92. ~
4 All counters and control logic are reset at the start _ 5 of the image load process. A counter 94 supplies the memory 6 address sequence required to load the image refresh store 36 7 and an address counter 96 supplies the memory address required 8 to load'the increment directory store 62 via IDS bus 60.
9 The data to be stored into the image refresh store is developed in the assembly shift register 98. The data to be 11 stored into the increment directory store is developed in a 12 data counter 100. The end of increment signal line 90 from 13 the refresh compression processor 34 indicates that one 14 image increment has been compressed, and its data, now stored in the data counter 100, should be stored in the 16 increment directory store 62. A pulse appears on the word 17 line 92 from the refresh compression processor 34 each time 18 the assembly shift register 98 has been filled.
19 The end of increment pulse on signal line 90 will cause the value held i~n data- counter 100 to be stored in the 21 increment directory store via the IDS bus 60 at the locat'ion 22 specified by the address counter 96. The trailing edge oF
23 the end of incremen't pulse will cause the data counte~~ l nn 24 to reset and the address counter 96 to increment by 1. ~ile the value of the address counter 96 is greater than the 26 value of a starting increment register 102 of the control 27 register 58 and is less than the value in an ending increment 28 register 104 of the control register 58, the value held in 29 the data counter 100 will be zero. The sampling is done in a ,set of comparators 106 and 108. The comparator 106 7~7~

1 compares the value of the ending register 10q with the value 2 in the address counter 96. If the values are equal, then a 3 signal is directed on the equal signal line 110 to an OR
4 - gate 112 to preset the data counter 100. Likewise if the _ 5 value of the address counter 96 is equal to the starting 6 register 102 value, then the comparator 108 will direct a 7 signal on its equal signal line 113 to the OR gate 112 to 8 preset the data counter 100. The comparator 106 generates a 9 signal on signal line 115 to an AND gate 114 when the values of the address counter 96 is less than the value in the 11 ending register 104. The comparator 108 generates a signal 12 on signal line 117 to the AND gate 114 when the value in the 13 address counter 96 is greater than the value in the starting 14 register 102. Thus, the word signal is transrnitted through the AND-gate 114 whenever the address counter 96 is bctween -16 the starting and ending values as determined by the control 17 register 58.
18 When the value in the address counter 96 equals either 19 the starting increment value in the starting registerl02 or the ending increment value in the ending register 104, 21 either comparator 108 or 106, respectively, will preset the 22 value in the data counter 100 to the partition boundary 23 pattern value via the OR-gate 112. When the value in the 24 address- counter 96 is between the starting and ending increment values, as determined by the values in the control 26 register 58, the value in counter 94 and data counter 100 27 will increment by 1 for each word to be storecl -in the image 28 refresh store for that image increment. When~the end of 29 increment pulse occurs from the refresh compression processor 34, the value in the data counter 100 will be equal to the ~7871 1 number of words in the image refresh store 36 used to store 2 the compressed representation of that increment.
3 Compressed data which was assembled for storaye in the 4 image refresh store is only stored when the value of the - 5 counter 96 is between the starting and ending increment 6 values. This condition is established by the output of 7 comparators 106 znd 108. An IRS data store cycle is taken 8 for each occurrence of the word pulse under control of the 9 address counter 96 value. AND gate 114 inhibits the word pulse from causing a data storage cycle based on the compar-11 ator outputs. The trailing edge of the IRS store pulse 12 increments the IRS memory address counter 94.
13 When the memory address value held in counter 94 is ~4 greater than the IRS memory size, a comparator 116 is activated causing the image increment value stored in the 16 address counter 96 to replace the value in the ending 17 register 104 of the control register 58.
18 The output of the comparator is directed to a single 19 shot multivibrator 118 to obtain a single pulse output to indicate the overflow condition. This output is directed to 21 a series of AND-gates represented in the figure as a single - 22 AND-gate 120. The second leg of the AND-gate 120 is connected 23 to the output value of the address counter 96. The OUtp~lt of 24 the AND-gate 120 loads the value in the address counter 96 into the ending register 104.
26 This change of value in the ending register 104 of the 27 control register will cause the preset value to be placed in 28 data counter 100 for the subsequent IDS store cycle and will 29 also inhibit further storage in the image refresh store.
The detail functioning of the IDS interpretation ~7871 ~

1 controller 74 is best introduced with an example; Fig. 6 2 shows all of the pertinent address and length data for an 3 example of a partial image on a display with fourteen image 4 segments. In this example, both the all white image segment _ 5 and the partitian mark segment will be generated from a 6 read-only storage extention to the image refresh store 36.
7 We will assume that the store Locations 0-16383 will be used 8 to store variable compressed data, that Locations 16384-9 16386 will contain the compressed representation of an all white segment having a length of three, and that locations 11 16387-16415 will contain the compressed representation of 12 the partition mark segment having a length of thirty one.
13 The IDS interpretation controller 74 will transfer a starting L4 address and word count to the IRS address generator 70 for each image segment to be processed by refresh decompression 16 processors 44 and 46.
17 Fig. 6 illustrates the data which is contained within 18 the increment directory store 62 and the corresponding 19 information which is transferred to the IRS address generator 20 70. In this example segments 1-5 contain an all white 21 image; segment 6 contains a partition mark ima3e; segments 7 22 through 11 contain actual image information to be displayed;
23 segment 12 contains the partition mark imagei and sec~ ellts 24 13 and-14 contain the all white image. The memory address 25 used to fetch the starting byte of compressed data is show~
26 in the column labeled memory address. The compressed data 27 is used to generate each individual image segmellt. Recall 28 that the all white image is stored startincJ at memory address 29 16384 and that the partition mark image is stored starting 30 at Location 16387. Also recall that the compressed image SA976031 -2~-~7871 l segment information was stored in consecutive locations in 2 the image refresh store 36 during the loading process des-3 cribed earlier. Segment 7 is stored starting at location 0, 4 segment 8 begins at location 35, segment 9 begins at location 56, etc. The length of each segment is also passed to the 6 IRS address genera-tor 70 so that it can control the number 7 of words to be physically transferred for the generation of 8 each segment by each refresh decompression processor. The 9 location and the length of the all white image segment and partition mark image segment are data constants that are to ll be transferred to the IRS address generator when either of 12 these segments are to be displayed on the screen.
13 Fig. 6 illustrates the input and output data relationsllii~s L4 which must be implemented within the IDS interpretation controller 74 for this example. Fig. 7 illustrates a 16 suggested embodiment of the logic circuitry for the IDS
17 interpretation controller 74. Data is processed sequentially 18 by segments which means that the address used to reference 19 information within the Increment Direc~ory Store 62 can be obtained from a simple segment counter 200. I)~a received 21 from the IDS bus 60 is stored in an IDS buffer register 201 '22 via an AND-gate 202 at time Tl.
23 Sequential timing control of the data transfer ~)rocesses 24 whLch-take place internally within the IDS interpretation controller 74 are suppIied by a timing generator 203.
26 Timing generator 203 provides three sequential time pulses.
27 Pulse Tl is a read strobe pulse used to obtain data from the 28 increment directory store. Pulse T2 trans~ers data from tlle 29 output of the IDS buffer register 201 through the logic to an IRS interface register 204. Pulse T3 activates an IRS

37~7~

1 transfer enable signal line 205, steps the SeCJment counter 2 200, and causes an add cycle to take place using the output 3 of an accumulator register 206 and the IDS buffer register 4 201 to generate a new address constant in the accumulator _ 5 register 206.
6 The output signals from the IDS buffer reglster 201 is 7 directed to comparators 207 and 208 which are used to 8 identify the i.ncrement directory store data values. These 9 data values signal the occurrence of an all white image segment or the occurrence of a partition mark segment. If 11 the data from the IDS bus 60 indicates that a white seyment 12 should be generated, the EQUAL 0 signal line 209 output of 13 comparator 207 will be active and the address constan~ ld L4 in a white register 210 will be gated through an AND-~ate
15 . 211 at time T2, through an OR-gate 212, and into the IRS
16 interface register 204. If the data from the increment
17 directory store called for the presentation of the partition
18 mark image, the IDS buffer register would contai.n a 255
19 signal representation and the EQUAL 255 signal output 1 ine 213 of the comparator 208 would be active and the address 21 constant indicated mark from register 214 would be gated 22 through an AND-gate 215 at time T2, and into the IRS interface 23 register 204 via the OR-gate 212. If the data received from 24 the IDS bus 60 is neither 0 nor 255, then the data received Z5 from the IDS bus 60 is length information associated with à
26 compressed image segment. In that case, the data from the 27 increment directory store 62 is directed to the IDS bus 60, 28 through.AND-gate 202 at time Tl into IDS ~uffer register 29 201, and via a cable 225 to an AND-gate 216 and the OR-gate 30 212 to the IRS interface register 204 at time T2 in para~lel ~78,7~

1 with the content of the accumulator register 206.
2 The operation of refresh begins with activation of the 3 refresh enable signal from the length increment generator 56 4 and a signal from the synch generator 64 which indicate that - 5 the refresh cycle is to commence. These two signals are 6 combined in an AND-gate 217 and the resulting signal is used 7 to initiate one three pulse cycle of the timing generator 8 203. After data for the first segment to be generated has 9 been transferred to the IRS address generator through the IRS interface register 204, an interface request pulse will 11 be received from the IRS address generator which indicates 12 that the next segment is ready to be generated and that the 13 IDS interpretation controller should begin a new three ~)ulse 14 timing cycle. This process will continue transferring data from the IDS bus to the IRS address generator each tilile an 16 interface request signal is received from the IRS generator.
17 The accumulator register 206 is cleared on each pulse 18 from the synch generator and the EQUAL 255 signa] via an OR-19 gate 218. At time T3, the contents of the accumulator register is changed according to the old contents of the 21 accumulator register and the contents of the IDS buffer 22 register 201. Both signals are directed to an adder 219 and 23 the added signals are gated into the accumulator register 24 206 at time T3 via the AND-gate 220. The new address constant in the accumulator register 206 is transferred in 26 parallel with the IDS buffer register 201 at time T2 via ~27 AND-gate 216, provided the comparators 207 and 208 are not - 28 equal to zero or not equal to 255 as represellted by si~nal 29 lines 221 and 222, respectively.
The principles of the present invention have now been ~i7~7~
1 made clear in an illustrative embodiment. There will be 2 immediately obvious to those skilled in the art many modi-3 ficatlons of structure, arrangement, proportions, the 4 elements, materials and components used in the practice of , the invention. For instance, the block diagrams shown in the 6 figures and the circuits usable for the blocks are merely ~, .
7 representative of the functions necessary ln the performance 8 of the present invention. The appended claims are, therefore, 9 intended to cover and embrace any such modification within the limits only of the true spirit and scope of the invention.
. 11 , , :~ 12 14 . :~
~ :~
~ 16 :~: 17 ;~ 18 ~'~ 19 . . ..

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24 _ - - '~'.:

27 : :

. : ' ' .,. ~ . :

Claims (19)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A raster display device refresh system comprising:
a refresh memory store having coded image information segments representing a visual image and stored in addressable locations;
converter means for converting said coded image informa-tion into non-overlapping non-coded raster information for visual display on a raster display, said converter means including a plurality of decompressor means for decompressing said coded image information segments into non-coded raster information and a plurality of refresh buffer means, one associated with each decompressor means for intermediate storage of said non-coded raster information for use by the raster display;
means for generating control information representative of the storage addresses and content information for each of said coded image information segments;
an increment directory storage means for storing said control information at incrementally addressable locations;
and cyclic image refresh control means for incrementally retrieving control information from said increment directory store and responsive thereto for generating address locations for cyclically and sequentially retrieving said coded image information from said refresh memory store for conversion by said converter means and display on said raster display.
2. A raster display device refresh system as defined in claim 1 further including:
means responsive to said increment directory storage means for generating an overflow indicator signal indicative of an overflow image too large for a single display said over-flow indicator signal controlling said refresh memory store to limit the coded image information segments stored therein.
3. A raster display device refresh system as defined in claim 2 further including:
means for partitioning the coded image information seg-ments in response to said overflow indicator signal; and means for generating a partition boundary representation in said increment directory storage means to define the par-titioned visual image data for display on the raster display.
4. A raster display device refresh system as defined in claim 3 including:
means for retrieving the remaining coded image infor-mation for storage in said refresh memory store; and means for activating said means for generating a parti-tion boundary to identify the retrieved remaining coded image information as part of an overflow image for display on the raster display.
5. A raster display device refresh system comprising:
compression means for compressing coded image data representative of a visual image to be displayed into com-pressed image segments;
a refresh image store for storing said compressed image segments of visual image data at addressable storage locations;
means for generating control information representative of the storage address for each of said compressed data segments of said image stored in said refresh storage means;
an increment directory storage means for storing said control information at incrementally addressable locations;
a plurality of decompressor means for decompressing said compressed image segments;
a plurality of refresh buffer means, one associated with each decompressor means; and cyclic image refresh control means including means for incrementally retrieving control information from said incre-ment directory storage means said cyclic image refresh control means cyclically and sequentially gating, under control of said retrieved control information, compressed image segments from said refresh storage means to one of said decompressor means and then gating decompressed image segments to one of said refresh buffer means each of said plurality of decom-pressor means and refresh buffer means gated in turn for refresh of the image produced by a display device at a data rate to adapt the decompression data rate to the data rate requirement of said display device.
6. A raster display device refresh system as defined in claim 5 wherein said increment directory storage means includes an overflow indicator that generates a signal indica-tive of an overflow image too large for a single display and further including;
means for generating a partition boundary signal in response to said overflow signal for display on said display device; and means for retrieving further coded data of the visual image, said partition boundary generating means generating a partition boundary to identify said further coded data.
7. A raster display device refresh system including con-version means for compressing coded image data representative of a visual image to be displayed, a refresh storage means for storing said compressed coded image data, image processing control means for dividing said image data into a plurality of non-overlapping image segments, said image processing control means including logic means for sequentially activat-ing said conversion means to compress individual data segments of said coded data and to place the data representing the compressed data segment in said refresh storage means at addressable storage locations; wherein the improvement comprises:
means for generating control information representative of the storage address for each of said compressed data segments of said image stored in said refresh storage means;
an increment directory storage means for storing said control information at incrementally addressable locations;
a refresh regulator means for decompressing said compress-ed data segments of said image into non-overlapping image segments for use by the raster display, said refresh regulator means including a plurality of decompressor means for decom-pressing said compressed data segments of said image into non-overlapping image segments for use by the raster display and a plurality of refresh buffer means, one associated with each decompressor means for storage of said image segments interme-diate said associate decompressor means and said raster display;
and cyclic image refresh control means including means for incrementally retrieving control information from said incre-ment directory storage means, said cyclic image refresh control means cyclically and sequentially gating, under control of said retrieved control information, compressed data segments of said image from said refresh storage means to one of said decompressor means and then gating said decompressed image segments to one of said refresh buffer means for refresh of the image produced by a raster display at a data rate to adapt the decompression data rate to the data rate requirement of said raster display.
8. A raster display device refresh system as defined in claim 7 further including:
overflow indicator means for generating an overflow signal indicative of coded image data too large for a single display, said overflow indicator signal controlling the accessing of coded image data for compression by said conver-sion means;
means for generating a partition boundary signal in response to said overflow signal for display on the raster display device; and retrieving means for retrieving further coded image data of the visual image, said means for generating a partition boundary being activated by said retrieving means for generat-ing a partition boundary to identify said further coded image data.
9. A raster display device refresh system including:
a refresh memory store having coded image information segments representative of a visual image and stored in addressable locations;
converter means for converting said coded image informa-tion into non-overlapping non-coded raster information for visual display on a raster display; and cyclic image refresh control means for generating address locations for cyclically and sequentially retrieving said coded image information from said refresh memory store for conversion by said converter means and display on said raster display;
wherein the improvement comprises:
means for generating control information representative of the storage addresses and content information for each of said coded image information segments;
an increment directory storage means for storing said control information at incrementally addressable locations;
means responsive to said increment directory storage means for generating an overflow indicator signal indicative of an overflow image too large for a single display, said overflow indicator signal controlling said refresh memory store to limit the coded image information segments stored therein;
means for partitioning the coded image information seg-ments in response to said overflow indicator signal; and means for generating a partition boundary representation in said increment directory storage means to define the parti-tioned visual image data for display on the raster display;
said cyclic image refresh control means including means for incrementally retrieving control information from said increment directory store and responsive thereto for generat-ing said address locations for said refresh memory store.
10. A raster display device refresh system as defined in claim 9 wherein said converter means includes:
a plurality of decompressor means for decompressing said coded image information segments into non-coded raster informa-tion; and, a plurality of refresh buffer means, one associated with each decompressor means for intermediate storage of said non-coded raster information for use by the raster display.
11. A raster display device refresh system as defined in claim 9 including:
means for retrieving the remaining coded image informa-tion for storage in said refresh memory store; and means for activating said means for generating a parti-tion boundary to identify the retrieved remaining coded image information as part of an overflow image for display on the raster display.
12. In a raster display device, the combination comprising:
a processor including a memory store for storing visual image data;

compression means for compressing the visual image data retrieved from said processor memory store under control of the raster display device, into a plurality of individual compressed non-overlapping image segments;
a refresh image store for storing said image segments at addressable storage locations;
means for generating control information representative of the storage address for each of said compressed image segments of said image stored in said refresh storage means;
an increment directory storage means for storing said control information at incrementally addressable locations;
a plurality of decompressor means for decompressing said image segments into visual signals for use by the raster display;
a plurality of refresh buffer means, one associated with each decompressor means for intermediate storage of said visual signals; and cyclic image refresh control means including means for incrementally retrieving control information from said incre-ment directory storage means, and responsive thereto for generating address locations for cyclically and sequentially gating compressed data segments of said image from said refresh storage means to one of said decompressor means and then to one of said refresh buffer means for refresh of the image produced by said raster display at a data rate to adapt the decompression data rate to the data rate requirement of said raster display.
13. In a raster display device as defined in claim 12 further including:
means for generating an overflow indicator signal indica-tive of an overflow image too large for a single display, said overflow indicator signal controlling said processor to limit the visual image data retrieved and directed to said com-pression means.
14. In a raster display device as defined in claim 13 including:
means for partitioning the visual image data from said processor in response to said overflow indicator signal; and means for generating a partition boundary representation in said increment directory storage means to define the parti-tioned visual image data for display on the raster display.
15. In a raster display device as defined in claim 14 including:
means for retrieving the remaining visual image data from said processor memory store for compression by said compression means and storage by said refresh image store; and means for activating said means for generating a partition boundary to identify the retrieved remaining visual image data as part of an overflow image for display on the raster display.
16. A raster display device designed to present image data comprising:
conversion means for compressing binary coded data representative of a visual image to be displayed;
refresh storage means for storing said compressed binary coded data;
image processing control means for dividing said image data into a plurality of non-overlapping image segments; said image processing control means comprising gating means for sequentially activating said conversion means to compress individual segments of said image data and to place the data representing the compressed segment in said refresh storage means;
increment directory storage means for storing control information representative of the storage address for each of said independent segments of said image in said refresh storage means;
a plurality of decompressor means for decompressing said compressed binary coded data;
a plurality of refresh buffer means; and image refresh control means for sequentially gating, under control of said increment directory storage means, compressed segments of said image from said refresh storage means to one of said decompressor means and to one of said refresh buffer means for refresh of the image produced by said display device.
17. A raster display device refresh system comprising:
a refresh memory store having coded image information segments representing a visual image and stored in addressable locations;
converter means for converting said coded image informa-tion into non-overlapping non-coded raster information for visual display on a raster display;
means for generating control information representative of the storage addresses and content information for each of said coded image information segments;
an increment directory storage means for storing said control information at incrementally addressable locations;
cyclic image refresh control means for incrementally retrieving control information from said increment directory store and responsive thereto for generating address locations for cyclically and sequentially retrieving said coded image information from said refresh memory store for conversion by said converter means and display on said raster display;
means responsive to said increment directory storage means for generating an overflow indicator signal indicative of an overflow image too large for a single display, said overflow indicator signal controlling said refresh memory store to limit the coded image information segments stored therein;
means for partitioning the coded image information segments in response to said overflow indicator signal; and means for generating a partition boundary representation in said increment directory storage means to define the parti-tioned visual image data for display on the raster display.
18. A raster display device refresh system as defined in claim 17 wherein said converter means includes:
a plurality of decompressor means for decompressing said coded image information segments into non-coded raster infor-mation; and a plurality of refresh buffer means, one associated with each decompressor means for intermediate storage of said non-coded raster information for use by the raster display.
19. A raster display device refresh system as defined in claim 17 including:
means for retrieving the remaining coded image informa-tion for storage in said refresh memory store; and means for activating said means for generating a parti-tion boundary to identify the retrieved remaining coded image information as part of an overflow image for display on the raster display.
CA300,203A 1977-06-29 1978-03-31 Display compressed image refresh system Expired CA1107871A (en)

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US4125873A (en) 1978-11-14
FR2396363A1 (en) 1979-01-26

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