CA1118697A

CA1118697A - Paragraph indent

Info

Publication number: CA1118697A
Application number: CA000323301A
Authority: CA
Inventors: William R. Mccray; Carl F. Johnson; Douglas E. Clancy; Danny M. Neal
Original assignee: International Business Machines Corp
Current assignee: International Business Machines Corp
Priority date: 1978-05-22
Filing date: 1979-03-13
Publication date: 1982-02-23
Also published as: BR7903163A; CH647197A5; SE7904411L; BE875751A; FR2426572A1; DE2920494C2; IT7922784A0; FR2426572B1; NL7903851A; US4265554A; IT1166834B; AU520478B2; AU4592779A; GB2021827A; DE2920494A1; ES480753A1; JPS5729276B2; SE439899B; GB2021827B; JPS54152513A

Abstract

PARAGRAPH INDENT

Abstract of the Invention Described herein is a feature and the electronics and logic necessary to implement a paragraph indent feature on an electronic typewriter which is improved and more advantageous than previous routines which accomplished similar results. Paragraph Indent is beneficial to the operator in that it automatically positions the printing carrier at an indented level for setting off typed material so that the left edge of the indented material does not extend to the normal left margin. The typewriter under electronic control stores in memory, upon an appropriate command, a temporary left margin to which the carrier will return when the typewriter is operating under the paragraph indent mode. The operator may enter the Paragraph Indent mode from the keyboard by keying an alternate or code together with a tabulation or tab code. This causes the electronics to control the typewriter so as to move the print point to the next tab stop and thereafter until countercommanded will return the carrier to that indented line position on all subsequent carrier returns.

Description

1~186~7 PARAGR~PH INDENT

Background of the Invention Typewriters with electronic controls exist and have existed where the combination of commands within a logical control effect a positioning of the print point of the carrier at an indented level upon a carrier return. This is accomplished on prior art devices by placing into the controls a command which then causes a required and automatically initiated tabulation command upon each carrier return being completed. The effect of this is that the carrler returns to the left margin and then tabs outward from the left margin to the indented level. This routine is implemented by storing into memory a requirement that upon the initiation of each carrier return the carrier return automatically causes the subsequent initiation of one or more required tab operations prior to the carrler coming to rest at the indented level for printing.

It is an object of this invention to directly, by the most direct path of movement, position the print carrier at an indented level upon the entering of a carrier return command while operating in a Paragraph Indent mode.

It is another object of this invention to eliminate the need for the carrier to return to the left most margin and tabulate out there-from to effect paragraph indentation.

It is still another object of this invention to minimize the amourt of time necessary to carrier return to an indented level.

~F

~18697 1 It is still a further obJect of this invention to eliminate distraction to the operator by minimizing the number of machine operations to accomplish Paragraph Indent.

De iption of the Drawings FIG. 1 is a block diagram of the electronics and logic controls for an electronic typewriter that is capable of controlling the typewriter in such a manner as to implement the described invention.

FIG. 2 is a drawing of the drives and printing member together with their associated controls for effecting movement of the print carriage and printing.

FIGS. 3 through 7, (of which Fig. 7 is shown on the ~ame page as Fig.
4), are logical flow charts illustrating an embodiment of the invention.

Fig. 8 is a diagram of the register arrangement which will accommodate the code and data from appendixes A through D.

Summary of the Invention In order to cause paragraph indentation in an efficient and expedient manner, it is desirable to cause the carrier to return only as far as necessary to be aligned with the indented position. Upon the commanding of the typewriter to enter a paragraph indent mode of operation,-the paragraph indent logic determines the next tab stop to the right and uses that as a destination to which the carrier must move and at the time designates that value as determined from the tab stop storage as the temporary left margin. Upon subsequent carrier returns the value of the selected tab stop location is then used in lieu of the normal left margin location and the carrier is reverse escaped in a carrier return mode to that location. This causes a shortened carrier return and eliminates the need for required 1~ 8~7 tabulatlon operations after each carrler return. The ~aragraph Indent logic then continues to control the carrier returns to the indented level until the logic receives a clear command in the form of a coded or alternate function carrler return. When this occurs the temporary left margin is removed from the logic and the controls are then free to carrier return to the normal left margin.

Detailed Description o-f an Embodiment of the Invention Referring to Flgure 1, lt ls assumed that the typewrlter is typing and that the operator desires to set tabs. The setting of the tabs ls accomplished by the depression of the code or alternate function key 48 in conjunction with an alphanumerlc key from the keyboard 14 and these combined signals result in a tab set command. ~pon the depresslon of these two keys, the coded function decode logic 38 decodes the keyboard signals and transmits them to the escapement logic 22. The escapement logic 22 determlnes that the command is no~
an escapement function and transfers control to the tab set logic 46.
The tab set logic through the escapement logic 22 accesses the escape-ment register 24 to determine the location of the carrier 13 and priat polnt at the tlme that the tab set signal is entered. The value of the escapement reglster 24 at that time ls then inserted, ln proper sequence with other stored values, into the tab storage registers 4G.
The tabulation value or tab set value is inserted such that the tab stop may be accessed upon the subsequent tabulation command in proper order progressing from left to right along the page.

Wlth tabs stored into the tab storage 40, it ls then possible to use these values ln the paragraph indent routines and functions.

Assuming now that the operator has set all desired tabs following the sequence of commands, the operator is then free to begin typing.
At some point in a document, the operator may desire to indent subseque1t material to a level to the right of the left margin. This is 11186~7 accomplished by the depression of the code or alternate function button 48 together with the tab or paragraph indent set button. This combined signal from the keyboard 12 is passed thro~gh the coded function decode 44 to effect decoding of these keyboard signals and the transmission of the output to the escapement logic 22. The escapement loglc 22 recognizes this signal as a paragraph indent command and then performs two operations. First, the logic causes a normal tabulation typewriter function to the next right most tab stop position under the control of the Paragraph Indent logic 42.
Secondly, it surrenders partial control to the Paragraph Indent logic 42 to cause the escapement logic 22 to retrieve the tab stop value stored in the tab storage 40 previously and to place that value into a temporary left margin register within the Paragraph Indent logic 4>
to act as a temporary left margin value.

The tabulation accomplished by the entering of the Paragraph Indent command may be repeated to a second or third level if further indentation is desired. Upon the additional entry of such codes the above sequence of decoding and the transmission of commands is repeated with the next tab storage position being retrieved and stored into the temporary left margin register.

Upon the initiation of a carrier return 36, the function decode logic 38 transmits the decoded signals to the escapement logic 22 and causes the reverse movement of the carrier 13, in any one of a number of conventional techniques to the left margin. The left margin position is determined by either a value stored in a left margin register in the escapement logic 22 or within the temporary left margin regi3ter is the paragraph indent logic 42. The carrier is reverse escaped to that point and stopped.

The clearance of the Paragraph Indent mode may be accomplished by the depression of the alternate or code function key 48 together with the carrier return or Paragraph Indent clear key. The combined 111~36~7 signal is decoded and passed to the escapement logic 22 whlch recognizes it as a clearance command and removes the value in the temporary left margin register in the Paragraph Indent logic 42. The escapement logic 22 then accesses the value stored in the permanent left margin register and places it into the temporary left margin register. Thus on subsequent carrier returns, the value accessed under escapement logic con~rol 22 from the temporary left margin register, which is accessed on all carrier returns, will represent that of the original left margin set by the operator until such time as it is changed through a Paragraph Indent command.

The driving of the carrier 13 of typewriter 10 to accomplish carrier return and tabulation is performed under the control of the escapement logic 22 and escapement counter 26 which control magnet drivers 30.

lS Integrator 28 receives signals from the photo emitter sensor 17 created by emitter wheel 21 and rotation of leadscrew 19, and provides feedback to escapement counter 26.

The controls necessary to control the typewriter which have been explained above in block diagram form are preferably embodied in operational sequences of the electronic logic and devices which may be represented by the flow charts in Figures 3 through 6. To more fully understand the operational sequences and logic controls which are part of the block diagram illustrated in Figure 1, reference is made to Figures 3 through 7. Referring to Figure 3, the main flow of the logic contained in the Paragraph Indent logic 42 is represented in the flow diagram. Upon the receipt of a signal after the starting of the ty~e-writer 10, the routine will accept a signal and the decision is mad~
as to whether the signal is a keyboard input 50. If the decision re.sul~s in a negative answer the logic will branch back to the initial start position and will await an additional signal, thereby, always being ready for a keyboard input. In the event that the signal received 111~3697 is a keyboard input then the signal i5 tested to determine whether it is a Paragraph Inden~ signal 52. If the signal is a Paragraph I~dent signal 52 then the logic branches to a Paragr~ph Indent routine to be described below. If the signal is not a Paragraph Indent signal 32, but rather some other signal, then the signal is tested to determine if it an indent clear signal 54. If the signal represents an indent clear command the indent clear routine is then entered;
the indent clear routine will be described below.

If the slgnal received is not a Paragraph Indent signal 52 and is not an indent clear signal 54, then the signal is tested to determin~
whether it is a tab set signal 56. If the signal is a tab set signa~
56 then the tab set routine is entered. If the signal is not a Para--graph Indent 52, not a indent clear signal 54, and not a tab set signal 56 then the logic is tested to see if the signal is a left margin set 58. If the signal is a left margin set the logic will branch to the left margin set routlne which will be described below.
If the signal is not any of the above discussed signals then the signal will flow to other decision blocks which are not relevant to the Paragraph Indent routine.

Referring to Figure 7, the left margin set routine, upon the alternate keyboard entry a left margin is set by the escapement logic 22 by storing the present carrier position 24 into the temporary and permanent left margin register 72.

Referring to Figure 4, the tab set routine, entered upon the detection of a tab set command 56, stores the present carrier positior.
into the tab storage register 66.

Upon the completion of the storage of this value into the tab storage register, the routine branches back to the start position to await further commands.
LEg-78-007 36~7 If the signal detected was that of a Paragraph Indent command 52 then the Paragraph Indent routine illustrated in Figure 5 is entered.
The next tab stop to the rlght of the carrier position at which the Paragraph Indent routine is entered, is determined from the tab storage 60. Upon the determination of that value, that tab stop value is then stored in the temporary left margin register to become the new temporary left margin 62.

~fter the storage of this value in the temporary left margin register 62, the escapement logic 22 is commanded to cause tabulation of the carrier to the tab stop location 64 determined in the first s;:ep of this routine.

Upon the completion of the tabulation operation 64, the logic branches back to the start position to await a further signal or command from the keyboard 12 or other signal generating devices of the typewriter lO.

When the typewriter does a normal carrier return thereafter, the value stored in the temporary left margin register will act as the left margin in so far as the logic is concerned and therefore, the carrier will return to that point and stop in preparation for continued typing.

In order to exit from the Paragraph Indent routine and allow the normal carrier return to the original left margin, upon the completion of typing the indented text, the Paragraph Indent clear routine (FIG~
6) is entered as a result of the paragraph indent clear signal. Upon the entering of this routine, the value representing the permanent left margin, which is stored in the permanent left margin register as a result of setting up the original margins, is placed into the temporary left margin register 68. The Paragraph Indent clear signal is a coded or alternate function carrier return. Upon the completio of the removal of the indented margin value from the temporary left `` 1~186~7 margin register and the replacement of that the value with the permanent left margin valve, the carrier is caused to return 70. The new value in the temporary left margin register, corresponding to the original left margin, will determine the position of the carrier at the end of the carrier return. ~pon the completion of the carrier return, the logic then branches back to start for receipt and detectio of the next signal to be received.

The embodiment which this invention may take may be one of several alternative forms. One form described above in conjunction with the block diagrams and flow charts illustrates one embodiment. An alternative embodiment may be an electronic processor control which may operate in conjunction with a permanently configured read only storage in which a series of instruction and codes may be stored.
This electronic apparatus would correspond to the apparatus as described in conjunction with Figures 1 through 7.

In such case, an alternative to the flow diagrams illustrated in Figures 3 through 7, is that codes or commands may be stored in the read only store to cause the electronics to process the information from the keyboard and to control the printer in a predetermined sequenc;
of steps. The commands and codes stored in the read only store may take the form of those attached in Appendix A and Appendix B. Appendi;- A
is a listing of definitions which identify and are associated with particular registers or particular bits within a byte and equates those register designations and/or bit designations with mnemonics.

Appendix B is the complete listing of a set of instructions which serve to control the processor and may be programed or coded as desired~
in order to control the electronic processor. Particular embodiments of the code or instructions may be modified as desired by one skilled in the art to accomplish the particular functions of the invention.
Additionally it should be recognized that a programable processor may embody a program which may be written conforming to the requiremelts of that particular processor for accomplishing the same result.

111~697 Referring to Appendix B, Column 1 is the address, in hexidecimal code, where that particular instruction is stored in the location designated by the corresponding information in Column 2. Column 3 is the mnemonics identifying the start point of particular sub-routines.
Column 4 is the mnemonics for the instruction which the processor then executes. Column 5 contains mnemonics which then, through definitions and equality statements in Appendix A assigns numerical values for registers or bits as appropriate for the instructions contained in Column 4. Column 6 contains explanatory comments.

Appendix C includes a listing of the instructions, the mnemonics representing these instructions and two columns designated respectiv~ly first byte and second byte having also bit positions indicated numerically.

With reference to those bytes illustrated in the two byte columns, these represent how that particular instruction would appear in the read only store memory. The ones and zeros in those bytes are dedica~ed values which remain unchanged for that particular instruction while the B contained in the instruction code indicates the bits to be tested and the A's are representative of the address to which the instruction series will branch upon the meeting of particular condition~
set forth, depending upon whether the bits B are represented by a one or zero. Referring to other instructions, the letter D represents a fixed value in memory and is determined by the individual implementing the particular device.

The R's are representative of the numerical designation for one of thirty-two separate registers which are available for storage of data and which are available to the processor.

Appendix D includes an instruction summary which lists the mnemonic, the name of the instruction represented by the mnemonics and a brief description of the function performed by the processor as a result of executing that particular instruction.

6~7 As an ald to understanding the description of the instructions contained in Appendix D, reference should be made to Figure 7 which is illustrative of the data flow between different registers, memorles and accumulators, in the processor of Figure 1.

While the invention has been particularly shown and described with reference to preferred embodiment(s) thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention.

lli~6~7 APPENDIX A

MLCNT EQUALS 4 MEMORY LINE COUNT, ADDRESS LINE MEMORY

PM EQUALS 6 PRINTER MAGNET REGISTER, REPRESENTS OUTPUT
TO PRINTER

WKl EQUALS 9 WORKING REGISTER
ESCTABL EQUALS lOO TABLE THAT CONTAINS ESCAPE~NT VALUES OF
CHARACTERS

CHARACTERS
ERTAPE EQUAI.S 3 ERASE TAPE LIFT MAGNET

Bl EQUALS O FIRST BAIL FROM KEYBOARD

1~186~7 t~ W ~ ~ ,_ ,_ W o Ul O Ul O U~

ooooooooooooooooooooooooooooooooo o ooooooooooooooooooooooooooooooooo O ~ ~ t~ N ~ Y 1~ O O O O O O O O O O
--~ W ~ 1 ~ Vl ~ W 1--0 h~ W O W ~ W 1~ W ~ ~ 1~ o 3~ a) !v ~ C~\ O W ~ O ~ O co o ts~ ~ W 3~ 0 ~I O 00 ~ ~ O W
OD ~D Er~ Er~ I~ ~g o 1~ O a~ ~I O ~ O ~ a~ o--1 ~ O O W o ~ o ~ ul o ~ ~P
O O

W W W
~3 1 ~ ~ W~ ~ ~ ~ 4 ~W ~ W ~ ~ ~ ~ 4 cW~ 4 ~W 4 ~ ~ ~W 4 O ~ tl 0 ~3 X H X ~:1 X 7~ 0 0 U~ U~
~3 ~3 W CO ~ H W
Z
H
W

O H
~3~ t~ H W U~
H OW 1~1 æ ~3 ~3 W ~ ~ ~ Z W
U~ H
O!il W H
W ~ 3 H
H ~;d O C
Z H W ~3 h~
O O
U~ ~ ~
H ~ W
OC O
Z W

C~
W

1118f~97 t~ W W ~ ~ ~ 1--trJ n o (n o n o Ul _l ooooooooooooooooooooooooooooooooooo O ooooooooooooooooooooooooooooooooOOo O ~n Ul n ~n ~n ~ ~ ~ ~ ,P ~ ~ ~ ~ ~ ~ ~ ~ W w W W w W W W W W W W W
~n ~ ~ O ~ W C) ~ W ~ n W 1~ 0 ~ t'~ W ~ n ~ ~ o h 00 ~ ~ ~ O y 00 0 D CO O O--I O ~ ~ ~ 3'1 W ~ O ~ CO ~ O ~ OD ~ ~ ~ O D CO t~
O O W ~ h3 ~ ~ o - l o o o ~ o ~ O co o - ~ o ~ ~ cn o o o 1~ ~ H
~ ~n O h~ W X
W ~ O o O ~n ~D~ ~

W t~ (D
W H
z W ~3 1~ ~ ~3 1- P ~ ~ 4 W Z W ~ ~ ~3 W ~ P ~ ~ ~ Cl W ~

5~ ~ t~ ~ ~ ~ ~ tl o ~ ~; o o ~ 5, O ZZ 1~ ~ ~ 1~ P ~ p Z 1~ 1~ W I--W ~ ~ ~n ~ w ~ ~ Z O ~ tO
7~ H ~3 g C t Z
~ W
H !a~
'7; ~ V U~ ~3 U~ H ~ z O
~3 H 13 Z
~
~3 H O C~ ~3 Z ~ 0 '' U~ H

W Z`

11~8~97 W W ~ ~ ,-- ,--o ~n o ~n o u ~, CO
ooooooooooooooooooooooooooooooooooo o ooooooooooooooooooooooooooooooooooo o ~J ~ ~ ~ o ~ ~ ~ ~ ~ D O CO O CO ~ ~ O ~ OD O ~ ~ O ~ CO O ~
h~ O ~ O O t~ a~ ~ ~ CO ~ tl~ CS~ 1 0 1~ W h~ ~ cn h3 ~ ~I h~ ['3 ~I H
O ~ 1--0 4 W ~ 4 ~ W W ~ ~ 1 4 W
t~ W ~ ~ ~ W C~

n ~ ~ X ~ ~ ~ U~ W ~ ~ ~ ~ X
w 5~ æ w u~ H H 7 ~: ~ o ~ ~ o Z æ

O ~0~

-3 ~3 æ u~ ~
3 w N
O
H
~C Z H C H
H H W t ~3 H H W t'3 U~
m ~ o Z ~ ~ H
W
~Y H
~ U~

o w w c t1 W W ~ ~ 1--1--~n o ~ o ~ o Vl ~D
~, CO
ooooooooooooooooooooooooo~ooooooooo o ooooooooooooooooooooooooooooooooooo h ~ D ~, ~ ~ ~ w ~ 1--~ w ~ n ~ ~ ~ ~ w ~ t~ ~ w ~--o ~ oo o ~ o ~ o o co ~ o ~ o ~ co n ~
t~ ~ ~ o o W ~ ~ ~ ~o ~ o--J n ~ o w 1--~ o O ~ ~ l O o ~ o ~ o 00 H
~ ~ O O O ~I ~D O 00 ~ O ~ X
~ ~1 0 0 0 t~ o o n O O

n n n 1~ I W ~ 3 ~ ~ W W ~ ~ ~ W ~ I W ~
W ~ ~ ~ ~ t' :~ ~ cn u~ ~ ~ ~ W ~ ~ W

n n x t~ o ~ w ~ x ~ x ~ ~ w n n 7~ æ t~ w æ a~ æ
o æ æ ~ Y ~ ~ æ ~ ~ I~ Ow ~ ~3 n G~ ~3 7~ ~ o l_ tl ~
~, W C
C :~ W
o ~

H O Z
Z ~I H
U~ H ~ U~
~n W ~C
~W
Z t G~ n w w ~3 ~ ~3 H O æ
cn ~
Z C~ H
n ~ æ
w w w n 11186g7 tl ~ w ~ ~
W ~n o ~n o ~ o Ul ~D

co o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o ooooo oooooooooooooooooooooooooooooo ~
o ~ n~n~nnnnnnnnwwwwwww~wwwwwww w ~ow~w~ nw~w~o w ~n~o~ o~ O~O~O~O~O~O~
o ~ h~ O Ul O O W a~ ~ ~ co h3 W ~ 3 0 W ~ H
~ n~o ~ wo x ~ 00 ~ O C~ ~I O
w n n n n n ~

W ~ tl W ~ ~ '7; ~n u~

~w~ nnx~ ~w~ ,nx~
5~ ~ W 5`~ W U~ H H 5 W ~3 Z ~ Ul ~ O ~~ ~3 Z S~ n 1~ ~ O Z Z ~ ~ I~ I~
` cn ~ H H
no no~

~ ~ o ~ 5 ~W W W
w n ZO
H ~ n X Z H C H
H H W t~ Z
C1 t~ ~3 H H W W U~

~ ~ n o Z Z ~ H ~) n n ~ ~
W W ~ ~ H
Z U~
n W
~ n o W

c z -` 1118697 tl N N 1-- I--Ul O Ul O Ul ~D
~0 O ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ W t'3 ~ W ~ W ~ ~ ~ ~ C~
_1 ~Y 0 ~1 ~ Ul l~ N 1-- 0 t~3 Cl O W ~ 1 ~ l~ N O t~ W ~
~ N O O CO N O Dl CO N Ul ~n D N ~ ~ O D' 00 N IP ~ O ~ C1 (~ O (') W N O _I W _J O ~ 1-- ~¦ O O W ~I h3 ~1 O O W O h:l H
O l~ O ~I ~ O t~1 ~ O X
O t~ o t~:l W O a~ N O

O
tli t'i N a~
~3 cn P W U~ W U~ W ~ t~ W ~ n ~ W
1 W ~ 4 W ~ W

cn ~3 ~3 ~
tl w u~
H W

~7 36~37 APl'l:N~IX C

FIRST BYTE SECOND BYTE
INSTRUCTIONN_ MONIC 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 BRANCH BR O O A A A A A A A A A A A A A A

STORE REGISTER STR O O O R R R R R

.

INCREMENT Al 1 O 1 O 1 1 1 O
DECREMENT Sl 1 O 1 O 1 1 1 1 ~8 1118~7 t~'PENDIX D

Instruction Summary ~nemonicN~me Descrlption -TJE B,A Test Bit - Jump Equal Test bit B in the accumulato-:
and when on, branch to A.
TJN B,A Test Bit - Jump Unequal Test bit B in the accumulator - and when oEf branch to A.
CJE R,A Compare - Jump Equal Compare byte R in B register with accumulator and when equal branch to A.
CJL R,A Compare - Jump Low Compare accumulator to byte R in B register and when accumulator is less ~han R
branch to A.
BR A Branch Branch to A.
J A Jump Jump to A.
LDL D Load Direct Low Load low half of the accumulator from the instruction. Zero high half.
LDH D Load Direct Load the accumulator from the instruction.
LR R Load Register Load accumulator from direct memory. Place direct memory address in storage address Register.
LBR R Load B Reglster Load the B Register from direct memory.
LN A Load Indirect Load the accumulator from indirect memory. (Address given by B Register and 4 bits of the instruction.) 369~7 Alll'l.NI)LX 1~ (collt'(l~

Mncmonic Nnllle Descriptlon STR R Store Register Store the ~ccumulator in direct memory. Place direct memory address.
STN Store Indirect Store the accumulator in indirect memory (Address in Register.) SBS B Set Bit and Store Set bit B in direct memory (address in Storage Address Register) to 1.
RBS B Reset Bit and Set blt B in direct memory (address in Store Storage Address Register) to O.
Al Increment Add one to the accumulator.
Sl Decrement Subtract one from the accumulator.
NOP No Operation Go to next instruction.
ER Emitter Reset Reset Emitter latch.

2~

Claims

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A paragraph indentation control for a typewriter, said typewriter and control comprising a print point defining means movable with respect to a writing line, return means for returning said print point defining means to a line beginning position, line beginning defining means for defining the line beginning, comprising:
a keyboard line beginning control key for creating a line beginning command;
control means including line beginning storage means for storing an indication of said line beginning position;
a temporary line beginning storage means for storing a line beginning position and accessable by said control means;
means for indicating the position of said print point defining means;
comparator means for determining the difference between said line beginning indication and said print point position indication and escapement register means for receiving said difference and controlling said return means in response to operation of said keyboard line beginning control, and means for temporarily replacing the contents of said temporary line beginning storage means with a indication differing from that previously stored therein, in response to a control signal from said line beginning control key whereby said print point defining means is escaped directly to a print line position corresponding to the value stored in said temporary line beginning storage means in response to the operator of said return means.

2. The paragraph indentation control of claim 1 wherein said temporary line beginning storage means is accessable by said control means to store said indication of said line beginning position, in response keyboard control signal to negate the effect of the indication previously stored in said temporary line beginning storage means.

3. The paragraph indentation control of claim 1 wherein said control means further comprises tabulation means comprising a tab stop storage means for storing preselected tab position indications;
means for moving said print point defining means to the next preselected tab stop position and wherein said control means is responsive to said line beginning control key to intitiate the movement of said print point defining means by operation of said tabulation means and is further responsive to said control operation to store the indication corresponding to said tab stop position in said temporary line beginning storage means.