CA1157159A

CA1157159A - Self organizing general pattern class separator and identifier

Info

Publication number: CA1157159A
Application number: CA000370098A
Authority: CA
Inventors: Leon N. Cooper; Douglas L. Reilly; Charles Elbaum
Original assignee: Nestor Associates Inc
Current assignee: Nestor Associates Inc
Priority date: 1980-03-27
Filing date: 1981-02-04
Publication date: 1983-11-15
Also published as: US4326259A; JPS6355106B2; EP0037164A2; EP0037164A3; DE3175363D1; JPS56152086A; ES8202967A1; MX151653A; ES500677A0; EP0037164B1

Abstract

ABSTRACT

A system is provided for the separation into and the identification of classes of events wherein each of the events is represented by a signal vector comprising the signals s, sz...,sj...,sN. The system comprises a plurality of assemblies, each of the assemblies in-cluding a matrix of junction elements for respectively receiving as inputs the different respective signals of a vector. The junction elements provide a transfer of information Aijs,; i.e., the product of the transfer function of the element and the signal input applied thereto. The information transferred by the junction elements is summed in each assembly. In the training mode of operation information summed in each assembly is applied to a scalar multiplier and the resulting information is in turn applied to a threshold stage which is actuated to produce an output if the input applied thereto attains a prescribed value. Con-currently, the summed outputs of the junction elements are fed back to these elements to modify their transfer functions. The outputs of the threshold stages are finally processed for identification of the classes of events. In the training mode of operation the occurence of ambiguous and undesired identifications cause feedback to the pertinent scalar multipliers to decrease their multiplication factors. Such decreases are made until no further ambiguous and undesired identifications occur. At the completion of the training for a particular group of related classes of events, the values of the transfer functions of the junction elements as well as the multipliers have attained final desired values. Then, in the trained mode of operation for the separation and identification of the group of classes for which the system has been trained, the feedback to the junction elements, and the scalar multipliers with their feedback arrangements are not employed or are removed.

Description

il~71~9 .. ..

This invention relates to adaptive information processing systems. More particularly it relates to self-organizing input-output devices which function to separate and identify classes of information that are not necessarily linearly separable.

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~ ~ ~7 ~3 9 BACXGROUND OF THE INVENTION

Linear input-output devices which are operative to separate and identify classes of information divide the pattern space into two or more regions by constructing lines, planes or hyperplanes. Combina-tions of such devices in series and/or parallel, if properly adjusted, can separate classes in a piece-wise linear fashion. However, in the absence of a general learning procedure, the proper adjust-ments for separating various classes must be developedfor each case.

Accordingly, it is an important object of this invention to provide an information processing system which can self-organize itself so as to separate and identify an arbitrary number of classes in a space of arbitrary dimensionality.

It is another object to provide a self-organizing informa-tion processing system which is capable of separating and identifying classes which are not linearly separable and which is not dependent upon the extent of clustering of classes.

It is a further object to provide a self-organizing information processing system as set forth in the preceding objects wherein it is not required to write software programs for each situation.

~73 ~9 SUMMARY OF' THE INVENq`ION

Generally speaking and in accordance with the invention, there is provided a system for the separation into and the identification of classes of events wherein each of the events is represented by a signal vector comprising g , sl, s2...,sj...,sN. The system comprises a plurality of input terminals adapted to receive these signal vectors and a plurality of assemblies connected thereto. The assemblies each comprise a plurality of junction elements, each of these elements being connected to an input terminal and providing a transfer of information in dependence upon a signal sj appearing at the input j and upon the transfer function Aij of the element. A summing device is included in each assembly for summing the information transferred by the junction elements.

In the training mode of the system operation according to the invention, the output of the summing device is fed back as an input to the junction elements to vary the transfer function of these elementg.

A salient component of the invention is the provision of means for modifying the output of the summing means when the syst~m is operated in the training mode. In particular, the output of,~he.s~mming means is modified such as by multiplication by a chosen scalar factor, the factor being adapted to be ~ariable in accordance with 3~ observed events in the training mo~e of operation. The output produced by the modifying means is tested in a threshold determining 8tage to ascertain whether such output attains a prescribed value, the threshold stage being actuated to produce a~ output when the prescribed value is attained, The attaining of an output from a 71~9 1 threshold stage indicates the recognition by the system of an event.

~he identification portion of the system essentially comprises means responsive to the outputs of the various threshold stages for producing outputs which represent groups of events representing distinct classes. This last-named means includes a plurality of class output means, each of the class output means being selectable 1~ to produce an output indicating the occurrence of events falling wit~in a single class. Associated with each class output means are means operative to selectively activate a class output means. Means are provided, responsive to the concurrent activation of a selective activating means and an output from a threshold stage, for causing the production of outputs from an activated class output means.

~eans are provided, respectively associ~ted with each class output means and acti~ated in response to the production of an output from a selected class output means, for enabling the switching into activation of the last-named class output means without the need for operation of its associated activating means. With this arrangement a class output means which has been activated but is currently deactivated can still produce outputs.

As has been mentioned, the summing device output modifyin~
means is a salient element of the inventi~n. To thi~
ond there are included in the ~ystem for u~e in the training mode of operation, means respon~ive to the occurrence of outputs which are not des~red as PUtpUtS
from the currently activated cla~s output means,fcr selectively feed-ing back such undesired outputs to those modiying means ~571~9 whose associated threshold means had produced the un-desired outputs to change the value of the modifying factor in the last-named modifying means.

Suitably the modifying means is a scalar multiplier and the above described feedback lowers the value of its multiplication factor. Such lowering may be of the analog type or the multiplication factor may be decremented by a selected value at each occurrence of feedback thereto.

As has been mentioned, feedback is also provided in the training mode of operation from the output of each summing device to the inputs of the junction elements.
The transfer function of a junction element, in an illustrative embodiment, may be Aijsj wherein s; is the signal applied at its input. The feedback modifies the value of this transfer function.

To summarize the above, in the training mode of operation the system is trained to separate and identify classes of events and to have its values modified to the point where errors of separation and identification are substantially eliminated, such elimination being effected by the feedback arrangements for modifying the values of the transfer functions of the junction elements and the values of the multiplication factors of the modifying means.

Once the system has been trained to recognize a particular group of related classes of events, it can now be employed in the "trained" mode of operation. In this mode, the feedback is removed between the outputs of the summing devices and the inputs of their associated junction elements so that the transfer functions are no longer modified.

~`
.hl ' ~ ' g 1 The modifying means in each assembly is also eliminated or rendered inoperative and the prescribed threshold value of its associated threshold stage is ~djusted so that the threshold is exceeded by the same output value S of the respective summing device. Thus, in the '`trained" mode of operation for the recognition and separation of a particular group of related classes of events, the pertinent circuit parameters have attained fixed values corresponding to the final values attained during training. Further in this trained mode ~f operatior., no use is made of the feedback arrangements from the class output means to the modifying means and all of the class output means can be activated concurrently.

.. . . .

~71~9 In the drawings, Fig. 1 is a oonceptual depiction of a pattern class separator constructed according to the principles of the invention;

~ig. 2 is a conceptual depiction of the comblnation of a pattern class separator and a pattern class identifier according to the invention;
Fig. 3 shows the inputs, outputs and internal connections of the pattern class identifier of Fig, 2;

~ig. 4 is a conceptual depiction of the pattern class separator according to the invention in combination with a Nestor Module as disclosed in U.S. Patent 3,950,733;

Fig. 5 depicts the inputs, outputs and internal structures of the pattern class separator shown in

2~ Figs. 1, 2 and 4;

Fig. 6 shows the inputs, outputs and arrangement of internal structures in an assembly, as shown in ~ig. 5, when the pattern class separator is operated in the trained mode of operation;

Fig. 7 shows the inputs, ~u~puts and arrange~ent of internal ~tructures, as shown in Fig. 5, when the pattern class separator is operated in the tr~ining mode of operation, and ~ig. 8 is a diagram of an illustrative em~odiment of the combination of the pattern c-lass separator and pattern class identifier, as shown in Fig. 2, when ~uch combination is operated in the ~raining mo~e of operation.

~7~;~9 DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring now to Fig. 1, the block 10, legended "pattern class separator", comprises a plurality of input terminals for receiving N input ~ignals, ~1 s2...,s~ N and a plurality of output ter~inals ~or providing M output responses Pl P2~ Pi ~PM
This device function6 to separate incoming patterns into their respective cla~ses This is accomplished by creating a number of ~prototypes" in the manner explained below.

Accordin~ to the invention the pattern class separator may be operated in a "training mode" in which prototypes lS are formed and modified, and in a "trained mode" in which no training modifications are made to the system.

In the operation of this pattern class ~eparator there can be considered a situation in which there are K
2~ external classes to be ~eparated and, of course, there-after identified. For example, the K classes may con-6titute the ten Arabic numberals 0 - 9 and the twenty six upper and lower case letters A - Z of the Roman alphabet wherein each number or letter constitut~s a separate class However, a~ is readily appreciated, there can ~e many ~raphic depictions of a particular letter or number which dif~er greatly from each other graphically although their common identity is readil~ pexcei~ed by human intelligence. Hence, even a simple graphic structure such as the Arabic numeral "7" can be written in many ways and yet be correctly recognizable by a human reader.

~71~9 The pattern class separator of Fig. 1 receives as inputs the representatives of the various different classes. These representatives, before being fed to the pattern class separator are first coded into signals sl, s2..., sj...sN by means of an initial coding scheme which is designed to preserve information but to remove obvious irrelevant features.
In this latter connection, clearly, the better the coding, the easier the class separation but, in accordance with the invention, a rough coding is operative.

After these representatives of the K external classes have been coded in the signal space S, they constitute N-dimensional normalized (unit) vectors in an N-dimen-sional hyperspace where they form clusters with arbitrary non-linear boundaries. Effectively, with pattern class separator 10, there is achieved the identification of these boundaries whereby the classes are separated without explicit knowledge as to where they are located. This results in the production of outputs Pl~ P2--- Pi... PM- The number of clusters on the N-dimensional space and the number M of outputs will normally be greater than K since each class may in-clude a plurality of such clusters, and each cluster mightrequire more than one output.

In Fig. 2, the outputs Pl~ P2---Pj---PM
applied to the block 12, legended "pattern class identifier". The outputs of pattern class identifier rl r2...,rQ...,rK indicate discrete class identifications.
Thus, for example, in the separation and identification of the ten classes constituting the Arabic numerals 0-9, output rl, for example, could be members of the class constituting all the representatives of the Arabic numeral "0".

7~g 1 The respective outputs Pl~ P2---Pi 'PM
class separator indicate the presence of prototypes, Thus, considering again the example using the Arabic numerals 0 - 9, and assuming that the arrangement as S shown in Fig. 2 has presented to it many representatives respectively for each numeral, i.e., each class, then there may be provided as a result of the operation of pattern class separator lQ, a number of prototypes for each numeral. (This number can never exceed the number of representatives presented, but i5 generally very much smaller.) In Fig. ~, wherein there are shown the functional components of pattern class identifier 12, it is seen that: prototype Pl is applied to a multiple OR circuit 14; prototype P2 is applied to multiple OR circuit 16;
prototype Pi is applied to multiple OR circuit 18 and - prototype PM is applied to multiple OR circuit 20. The outputs of circuits 18, 14, 20 and 16 are rl, r2, r~ and rK, respectively. Each one of the r outputs thus identifies one of the classes by includinq all the representatives or prototypes belonging to a s~le class such as an Arabic n~al where the numerals 0 - 9 form ten classes.
.

During the training mode of the pattern class separator, when a pattern comes in in the form of a normalized vector and is not recognized, i.e. is not dec~red "like" ~ "nearly likeU
a prototype previously stored, lt ish~de into a new protot ~ .
In so doing, the vector representing the pattern (initially of umt length) is "stretched" by multiplication with a positive fact~r ~
(~,1 ) and thus is given a l~lgth greater than unity. The infcr-mation is contained in the magnitude of the prototype.

A three d~ænsional ~ce may be considered as a useful ~7~9 1 example. In this case the incoming patterns are represented by three dimensional vectors of unit length emerging from a common origin, which is also the center of a sphere of unit radius. Each pattern is identified by a point on the sphere, the end point of the radius - vector representing the pattern. Each prototype is also a vector along a radius of the same sphere, but whose length is larger than unity so that a prototype vector extends above the surface of the 1~ sphere. Such prototypes may also be represented by circles on the surface of the sphere. The circles are centered on the points of emergence of the proto-type vectors on the sphere; the diameters of the circles are proportional to the magnitudes of the vectors. When a prototype is initially committed, it is given a maximum leng~h through multiplication of the incoming pattern of unit le~ by the positive factor ~.

When all the incoming patterns which fall inside the circle of a given prototype belong to this prototype's class, there is no need for further modification.
If an incoming pattern of a different class falls inside this circle, the length of the prototype vector is decreased and the diameter of its circle is correspond-ingly reduced until the inc~ming pattern no longerfalls inside the circle. This incoming pattern may then become a new prototype with its own circle of influence. Initially this circle ~ill be of maximum 9i2e (given by ~~ and eventually it may be reduced by other incoming patterns of different classes.

This process is carried on until the entire popul~tion of patterns u~ed for training has been presented to the syatem (usually several times). The result can be thou~ht of in term~ of tihe geometric analogy of a sphere of unit radius covered with circles of various diameters, each representing the influence region of a prototype. In higher dimensional spaces an analogous situation develops.

Each class of patterns is thus represented by one or more prototypes. ~he separation into various classes occurs naturally and is independent of the shape of the boundaries between classes. In particular, there is no requirement that the classes be separable by linear elements (i.e. straight lines, planes, hyper-planes) as the shape of the boundary is arbitrary.

After the formation of a suitable "library" (store) of prototypes, all incoming patterns which belong to the classes represented in the library are identified by being matched with a prototype. This procedure can be carried out without further modification of the system, in the so-called "trained mode". The procedure for attempting to recognize an incoming pattern consists of forming the inner (scalar) product between this pattern and all prototypes (which, in principle, is done in parallel). If the inner product equals or exceeds a predetermined value (threshold) the incoming pattern is identified with the class of the corresponding prototype.
During the training mode or learning phase, "recognition"
is followed by checking the class of the pattern (known).
If the identification is correct, no further action is taken. If the identification is not correct, the magnitude of the prototype is decreased, as described previously. If identification is not made at all a new prototype is added, as discussed below.

The threshold for recognition (minimum value of the inner product) is linked to the value of ~, which determines the maximum length of a prototype. In three ~:~S71~9 1 dLmensions, for example, ~ determines the maximum diameter of the prototype circle of influence, or equivalently the largest angle of the cone centered on the prototype and thus the incoming patterns furthest removed from the prototype, which can still be identified with this prototype.

Re~erring ncw to Fig. 5there iY shown therein the structure constituting pattern class separator 1~; in particular, block~ 22, 24, 26 and 2a which represent assembly 1, assembly 2, assembly i and assembly M, respectively. The vector sl, s2...s~ N~ which is the signal codin~ of a single pattern,/ is shown as commonly applied to all of the assemblies. As shown ~n this figur~, the outputs of assemblies 1,2...,i...,M
produce outputs Pl,P2 Pi..PM~ respectively.

Reference is now made to Fig. 7 wherein there is shown a suitable embodiment of 3n assembly i of Fiy. 5 that is employed according to the invention in its training mode of operation. In this figure, the signals of the input vector sl, s2...,sj...,sM are sho~n applied to a matrix of weighting stages ~ Ai2....,Aij....,AiM.
The first subscript o an A sta~e is the same a~ its ~5 assembly descriptor. The second subscript is the designator of the particular A stage within a given assembly. The members of the A matrix are junction element~, each element effe~in~ a transfer o~ informa-tion from it~ input terminal ; in dependence upon the

3~ signal Sj~ a~d upPn a "transfer function" Aij of that stage. For example, the transfer function may be a simple multiplication by a stored weighting factor.
The matxix of transfer functions-e.g. the weighting factors - ~ay be modified in accordance with a particul~r algorithm.

3 157~9 1 In U.S. Patents No. 3,950,733 and 4,044,243, both to Leon ~. Cooper and Charles Flbaum and assigned to ~estor Associates, there are disclosed suitable embodiments of an A matrix as employed in an assembly i of Fig. 5 as shown in Fig. 7. In these patents there are also disclosed suitable embodiments of a given stage of the A matrix and termed a mnemonder. The theory of operation of the A matrix is fully explained in these patents.
The outputs of the ~ matrix are applied to a block 30 or summer i which effects the addition of these outputs and produces an intermediate output P'i on line 31. Lhe summer may be an operational amplifier connected as a summing circuit in an analog embodiment or a digital adder if the signals are presented in digital form.

As explained in the above-referred-to patents, the combination of the inputs s, of the A matrix and of a summer is suitably termed a "nouveron" network. A portion of such nouveron is shown in Fig. 12 of the above mentioned U.S. Patent No.
3,950,733.

Referring back to Fig. 7 of the instant application, it is seen thereby that the output P'i of summer i is fed back to the components of the ~ matrix through a controllable element 35. Element 35 may be suitably of the operational amplifier type and has an inhibit input to which is applied the output of stage 34, i.e., ~Pi, as is further explained hereinbelow whereby the transfer functions are modified. Element 35 may also be a gate, such as an AND gate followed by an inverter~
Such operation is disclosed in the aforementioned patents.
Suffice it to say that the transfer functions are modified ~S7~9 1 in accordance with the algorithm:
Aij(t) = Aij(t-l) + ~Aij(t) where ~Aij(t) has the form:
~ Aij(t) = np'isj and, where n is a learning parameter.

The-output P'i Of summer i on line 31 is applied to a stage 32 legend ~i which may suitably be a scalar multiplication unit. In the ~ unit the output of the summer is multiplied by a chosen factor. The result of such multiplication is applied to a following stage 34 legended ~Pi.

The ~pi stage functions as a threshold device. In other words if the output of the ~ sta~e equals or exceeds a chosen level, the # ~ stage is actuated. In this connection, a ~ stage may suitably be a circuit element, such as a Schmitt trigger in an analog embodiment; or a corresponding digital element, which produces an output if the input applied thereto attains the aforementioned level.
As will be further explained hereinbelow, in the further description of the operation of the combination of the ~
and ~ stages, the ~ stage is utilized, according to the inven-tion, when the system is in the training mode.
As has been mentioned, the output of stage ~pi is applied as an inhibit input to element 35. Element 35 is cons-tructed to pass the signal P'i from its input to its output when there is no occurrence of a Pi output resulting from the actuation of threshold stage ~pi This structure is provided to prevent the modification of the transfer functions of the A matrix when a ~pi stage is actuated, after the formation of a prototype has been completed.

Reference is now made to Fig. 8 which depicts an illustrative embodiment of a system constructed according to the principles of the invention. In this system, there is shown at the left side of Fig. 8 assembly l...,assemhly i...,assembly M, each assembly having the structure of assembly 26 as disclosed in Fig. 7. Thus, the assembly in the top row of Fig. 8 comprises the A matrix A~ Alj.-.AlMl 1~571;~9 summer, ~1' lambda stage ~1' and threshold stage ~Pl-Correspondingly, the assembly in the middle row com-prises like stages designated with the subscript i and the assembly in the bottom row comprises like stages designated with the subscript M.

In Fig. 8 it is seen that the signal vector sl....
sj...,sN is applied to all of the assemblies. The signals constituting the vector characterize an event.
This can be an optical event such as the sight of a pattern, an auditory event such as the hearing of the tone, etc. The only requirement for the event is that it be translatable into a plurality of input signals which retain sufficient detail about the event to permit separation and identification. The signals constituting the vector are generated by a translator which performs some form of analysis of the event and produces signalsin response to this analysis. For example, ~as described in the above referenced patent No. 3,950,733) the translator may divide a visual scene into raster elements, perform a Fourier analysis of auditory information, etc. Such trans-lators are well known in the art and no detailed description thereof is deemed necessary.
The applied signal vector is accordingly processed in each assem~ly as set forth in connection with the description of the structure and operation of the assembly of Fig. 7.
Let it be assumed that it is desired to utilize the system shown in ~ig. 8 for the recognition of the ten Arabic numerals 0 to 9. For convenience of explanation, let it be further assumed that for the purpose of training the system to recognize these numerals, there are available many different graphic forms of each numeral, each -18- ~7~)9 of these forms being recognizable to human intelligence as the particular numeral. Thus, it can be stated that it is desired to train the system to separate and identify ten classes, each class being constituted by the many different forms of a single numeral.

Let it be further assumed that, in the training mode of operation, the first signal vector applied to the assemklies of the system results from a translation of a numeral fo~m "0". As ~entioned previously, at this initial point of operation the (initial) values of the elements Aij of the A matrix æ e random and the prokability is small of producing an output Pi of the summers, after being multiplied by ~imin (the minimNm value of the scalar multiplier to which all ~'s are set initially, that is prior to any training operations) and exceeding the threshold ~Pi. m e process of proto-type commitment consists of presenting the in m ming pattern repeatedly in order to madify the matrix elements Aij aco~rding to the Nestor modification of ~Aij = nP'iSj for each presentation. Eventually, o,ne of the units of the P~bank (including inputs 1 to N, the mcdified elements of A and a summer) will produce an output sufficient to ex oe ed the threshold ~pi. m is unit will thus become com~itted to the class of the incoming pattern ("0" in this case) and will represent a prototype for "0". Upon completion of this prototype commitment the feedback line 33 (Fig. 7) is disconnected from the output P'i by means of the element 35 with an inhibit input, and the m~ltiplier ~ is set to its n~KLmum value ~.
When this first signal vector is applied and processed as described in connection with the description of operation of the assembly of Fig. 7, it is poss;hle that more than one of the P summers will prcduce a sufficiently high output to activate their associated threshold (~) stages; only one of these need be chosen for the ncdification mentioned above.

In the training ~de of operation, it is necessary to select a particular output stage R for the identification of a given class.
Such selectiancan be made by a human operabor or it can be suitably effected to be automatic. Thus, in the example where it is ~pcired to first separate and identify the "0", the zero class, let it be assumed that the sta~e R bearing the designated numeral 36 is selected for output. To this end a control line 38 is activated. If it is assumed that the output of the multiplier stage 40, i.e., ~1' has been of a level sufficient to actuate the threshold stage 42, i.e.
~pl~to prcdu oe autput Pl~ a three-input AND circuit 44 which is enabled by the appearance of signals on any two of its three inputs has applied thereto: (1) activated oontrol line 38 and (2~ the Pl output from threshold stage ~pl Consequently, circuit 44 prcdu oe s an output which is passed to the Rl stage 36 to produce an output rl, stage 36 suitably being a multiple OR circuit. Ihe output of circuit 44 also sets a flip-flop 46, the permanently set output of flip-flop 46 being fed back as an input to AND circuit 44.

For simplicity there is described hereinbelow a sequen oe in which each class is presented and learned separately. In actual operation this is neither necessary or desirable. The system functions best if representatives of the various classes are intermlngled in their presentation.

m e training operation suitably oontinues by oonsecutively feeding signal vectors designating the members of the various classes, in this example, the class being the numeral "0". During this operation, the transfer functions of the A matri oe s of the assemklies will be modified until there will be same csemblies for each me~ber of the class whose ~ stage output will be sufficient to trigger the associated H stage bD thereby effect the output from the stage ~ .

After this class has been separated, oont~ol line 38 is deactivated, as p rmanent oonnections have been established between each of the units of the P-~ank oammitted bo the cl~cs under oansideration and the corresponding R-unit.

~ ~ ~71~g Let is be assumed that there are now fed to the system the n~bers of the class of the numeral "6" and that output stage 48, i.e., RQ
is selected for the separation of this class. To this end, control line 50 is activated. On feeding to the system the signal vectors, sufficient assemblies not previously committed will be caused to provide outputs at their respective ~ stages to trigger their associated 4 stages and thereby reoognize all of the members con-stituting the class of numeral "6". If the assembly in the middle row in Fig. 8 is one of these assemblies, then as a result of the mLltiplication performed ~Y ~i~ threshold stage ~pi is actuated.

m e Pi output and the signal on line 50 consequently enable an AND
circuit 52, this AND circuit being of the same type as the AND circuit 44. On receipt of an input, a flip-flop 54 is set and its output is fed back as an input to the AND circuit 52. The output of the AND
circuit 52 is also supplied to the output stage 48, i.e., RQ, the output appearing there as output rQ.

It is possible that a signal vector representing a ~Ember of the class "6" may also produ oe an output from a stage previously committed to another class, for example, from ~1' i.e. stage 40, sufficient to activate the threshold stage 42, i.e. stage ~pl previously committed to a prototype for a æ ro. In this situation, the Pl output frcm 4pl~ and the set output from flip-flop 46 will enable the AND circuit 44 whereby a signal will appear at the output rl of output stage 36, i.e. Rl, which in this example is dedicated to identifying members of the "0" class. This is clearly an undesired occurrence since it introdu~c an ambiguity into the class separation and identification.

When there is an undesired rl output, as described, a voltage is applied to input terminal 56 which is thus actuated and consequently enables an AND circuit 58. m e output of AND circuit 58 and the Pl output f ~pl stage are each appliP~ to an AND circuit 60 which is thus enabled. The output of the AND circuit 60 is then applied to the stage ~1 The function of this application bD stage ~1 is to decrease the value of the nLltiplication factor of stage ~1 by a prescribed amDunt whereby its output becames decreased in value. At this point, another presentation is made to the system of the signal vecb~r of the ~7~ ~9 1 m~ of c~ass "6" which cau ~ the undesired outPut rl, with the terminal 56 and the ANP circuit 58 deactivated.
If an output rl again appears, the training proces~ is repeated,i.e. enabling the AND circuit 58 80 that the value of the multiplication factor of ~1 is further decreased. Thij procedure is continued until an output rl no longer appears. It is to be under~tood that for convenience of explanation, the example has been used where only the value of ~l-is decreased to avoid an ambiguous class separation and identification.
Actually, however, the A stages of any assemblies whose associated flip-flops had ~een set during the proces~ing of other classes have the values of their multiplication factors decreased in those cases where their associated ~
stages have been actuated incorrectly by the incoming pattern.
At the completion of the processing of the class "6"
and with no undesired outputs rl occuring during such processing, a next class is processed. Let it be assumed that this next class comprises representatives of the numeral "9". To this end, control line 50 is deactivated a~ acontrol line 62 is activated. Let it be assumed that the assembly in the bottom row of Fig. 8 is one of those where an output is produced from its threshold stage ~pM upon application of a signal vector representing a member of class "9" to the system. In this situation, an AND circuit 63,which is of the same type as AND"circuits 44 and 52; is enabled by the application thereto of the PM and line 62 signals. Consequently, a signal is passed through ~ mul-i~le OR stage 64toaPPear ~s output rK. Concurrently, a flip-fl~p 66 is set, the set output of this flip-flop 66 being applied as an input to AND circuit 63.

3~ It will pe appreciated that, at this juncture in the ~7:1~9 training of the system, those assemblies which normally would have their threshold stages actuated by a member of class "0" have their associated flip-flops set such that there is one input present at their associated 3-input AN~ circuits. These same conditions a~ply in the case of those assemblies whose ~ stages would be actuated by a member of the class "6". Now, in the training of the system to recognize members of the class "9", the operator may therefore also obtain undesired rl and ri outputs. In the case of the undesired rl outputs, the operator activates terminal 56 which brings about the series of events that reduces the value of the multiplication factors of the ~ stages associated with those assemblies trained to recognize members of class "0". Where there are undesired rQ outputs, the operator activates a terminal 68 thus enabling an AND
circuit 70. The Pi output and the output of AND circuit 70 enable an AND circuit 72. The output of AND circuit 72 is fed back to the stage ~i to cause its multiplication factor to be decreased in value, such operation being repeated where necessary. In this manner, at the completion of the training of the system to recognize class "9", with control line 62 active, no further rl and rQ
outputs appear, and the receipt of signal vectors representing members of class "9" appear as rK outputs.
At this stage of the training, therefore, those assemblies which identify members of the classes "0" and "6"
have had, if necessary, the multiplication factors of their ~ stages decreased to the points where no ambiguous recognitions occur.

In the foregoing manner, presentation is made of all of the remaining classes to the system which it is being trained to separate and identify. In this example, it is the numeral classes "1", "2", "3", "4", "5", "7", "8".

~7~L~9 As described above, as the processing of each class is effected, all undesired r outputs of the classes whose processing has been completed are noted and the values of the multiplication factors of the pertinent ~ stages in response to their occurrence are decreased.

When the processing of all the classes - i.e., the training of the systems - is completed, the values of the A matrices and the multiplication factors of the stages will be at levels such that there will be sub-stantially no conflict of separation and identification between separate classes. In this latter connection, considering the example where the classes comprise the ten numerals "0" to "9" and assuming that there are ten members to each class, clearly there are required at least 100 assemblies for proper and complete operation. Actually, there may be required more than 100 assemblies since, during the training period in some cases, the multiplication factors of some ~ stages may be reduced to a non-usable level. In the same manner, some of the values of the A matrices may also be modified to such a level. However, with large scale integration, sufficient assemblies and their associated logic and circuit elements (a row of Fig. 8) are readily and cheaply provided.

At the completion of the training of the system to separate and identify the classes of a related group of classes, the system can also be used to separate and identify these classes in the trained mode of operation.
When the system is to be utilized in the training mode for another group of related classes, all of the flip-flops are first reset and the control lines are reactivated one by one, in the ~anner described above, during the operation.

~7~g In considering the inventive system as described insofar as it relates to the "training mode" of operation, it is convenient to regard it as a three-level system comprising an input or signal bank S(sl...,sN), a first threshold bank P(pl...pM), and a second threshold or response bank, R(r,...rk~. The input bank, S, accepts the initial coded signal. The first threshold bank, P, stores prototypes, while the response bank, R, produces the appropriate responses that identify the separate K
classes.

Thus, referring to Fig. 8, the output of the ith summer of the P bank, Pli, is given by the expression N

i ~ 1 ij j [1]

Ihe scalar multiplication unit ~i multiplies P'i by the value of the multiplication factor in this unit. The value of ~. varies between a maximum, ~ , and unity 1 < ~i < ~- The output of the ith unit of the P bank after thresholding (theoutput of assembly i) is then Pi ~iP i) [2]
where the threshold function is defined by ~ (x) = 1 x >1 = 0 x <1 With regard to the R bank, as shown in Fig. 8, during the training mode of operation the connections between the P bank and the R-bank are established by the switch-ing to the set states of the flip-flops such as 46, 54 and 66. To generalize the operation of the system, the R bank can be considered as including M
summers and M X K "B" elements. In this generalized conception, the output of the kth summer of the ~ bank is gi~en in general by the expression:

~1~7~9 M

r'k = ~ BkQ PQ [3]
while the output of the kth response unit (a stage such as output stages 36, 48 and 64 in Fig. 8) is rk = ~(r'k) ~4]

The embodiment including the flip-flops shown in Fig. 8 is a specific example of one of the various simplifications of the R-bank. This embodiment illustrates the simplification wherein there are employed "On-Off n elements for the Bk~
term of equation [3]. These elements establish a connection between the outputs of the P-bank and the R-bank when pro-totypes of classes of events such as pattern classes are being generated.

It is possible to use as an alternative modification form ~ the following:

In the initial configuration the value of the A and B matrices can be set equal to zero; thus there is no response in the P
or the R bank to any incoming pattern. The first incoming pattern, sl(l), (say one in class l) produces no response in the P bank and therefore no response in the appropriate unit in the R bank, rl. As a consequence the first unit in the P
bank is committed to this pattern. The process of committ-ment can be formally represented by adding to the value of the A matrix ~A , pl x si(l) where pl is a unit vector in the P bank Pl = ~ij ' setting the value of ~1 to its maximum ~ and setting to unity the element between ~1 and rl, Bli.
3~
In considering generally the operation of the system in the "training" mode, i.e. the learning and self-organization mode, the initial values of the elements Aij of the A matrix are random ., .

.
, , and, most likely, sufficiently small to provide a mcdest prcbability of producing an output Pi f the summers in the P bank and after beinq multiplied by ~i~ exceeding the threshold ~pi. The process of prototype oommitment according to the invention consists of presenting the first inooming event - i.e. pattern si(l) - repeatedly in order to modify, for each presentation, the values of the matrix elements Ai~ acoording to the Nestor modification alg~rithm, (as explained in the afore~entioned U.S. Patent No. 3,950,733):
ij ~P i 5; ~5]
Eventually, one of the units (assemblies) of the P-bank including inputs 1 to N, the elements A and a summer will produce an output sufficient to attain or exceed the threshold value ~pi miS input will thus be Qme committed to the pattern and its output will represent 1~ a prDt~type Pi. When the training and commitment procedure is completed, the element B (a fliE-flop) and associated 3-input AMD gate in the emboc1ment shown in Fig. 8) belonging to the selected final output unit R (one of output stages 36, 48, and 64, for example) is closed; i.e., set. Ihus, a connection is established between a unit (assembly) of the P-bank oontaining the prototype and the final output unit R, which will nDw respond to incoming patterns that belong tD the class represented by this prDtotype.

If precisely the same pattern, si(l) is entered again immediately after the prototype commitm~nt, the response of the Pl unit of the P~bank wculd be Pl = 9(~si(1) si(~ [6~

Since a connection now exists ~through a B ele~ent such as the flip-flop 46 and associated AND gate 44 shown in Fig. 8) tD an appropriate output stage R, a response ri is obtained. Thus, the eYent or patbern would be correctly identified as belQnging to the class i. If a second pattern of class i appe æ s, i.e. si(2), and si(2) si(l)> 1~O ~7]

1~7~39 this pattern will be correctly identified by the assembly which pro-du oe d prototype pl, thereby producing a positive resp~nse ri in the appropriate R bank output stage. No further change is made in the values within the assemkly.

If an event - i.e. a pattern of class i - for example si(3) appears such that si(l) . si(3) < 1 [8]
this will provide no response in the Pl unit and no response ri and thus will not be identified.

If a pattern of a new class, si(l) is entered but does not pr~du oe a response in any of the i units already oommitted to prototypes, a new prototype will be generated.
In the case as illustrated by expression [8], the pattern is again presente~ repeatedly until another unit of the P-bank will produce an output sufficient to exceed its threshold ~ and a new prototype is formed. Another output stage R is then selected to identify the pat-terns represented ky this prototype. A connection bewteen the P-unit just ccmmitted to this pr,ototype and the last-mentione~ R unit is established by closing the appropriate element B (setting the appropriate flip-flop in the embcXI~ocnt shown in Fig. 8).

This process of aperation is c~ntinued until a sufficient number of prototypes are stored, one such prototype per unit (assembly) of the P~bank. However, not all M units (assemblies) of the P~bank need be oommitted.

If, hcwever, the event - i.e. pattern si _ did produ oe a response in, for example, pl(if, for example sl(l) si(l)> ~ and there~ore in output ri, resulting in a misidentification during the lP~ring (training) phase, then the value of ~1 is reduced until no response bo this inccming pattern is produced in Pl in accordance with:
~1 c(sl (1) s~(l)) 1 [9~

11~7i~9 Once a number of prototypes are committed in the P bank, a subsequent incoming pattern may cause one or more of the following, thereby resulting in the indicated modification. The following may occur:
(1) the new pattern may fall within the region of influence of a prototype of its class and be recognized. In this situation, no modification is required.

(2) The pattern may fall outside the region of influence of any previous prototype of its class.
In this case, a new P threshold unit is then com-mitted. The magnitude of the scalar multiplier - i.e.
~ stage - of this unit (assembly) is set to its maximum ~ after committing a pattern. In addition the link between that P unit and the appropriate response unit R is activated (set equal to one).
This may occur if no prototypes of the class of the incoming pattern were committed previously or if the incoming pattern falls outside of the region of influence of previously committed prototypes of the appropriate class. If an unknown pattern is not identified by any of the existing prototypes, then it is automatically accepted into the system's P
bank as a new prototype unit and assigned the maximum initial scalar multiplier ~alue ~. Scalar multipliers of existing prototypes are not enlarged in an effort to include the unknown since, for many of these units, even slightly larger regions of influence have previously resulted in incorrect identification.

(3) The incoming pattern may fall within the region of influence of one or more prototypes belonging to another class. In this case the regions of influence of these prototypes must be ~ "~

~1~71~9 reduced (this is done by reducing the values of the appropriate scalar factors ~) until the incoming pattern no longer produces an output from these threshold units in excess of the threshold for recognition. It is to be understood that the phrase "falls in the region of influence" means that the incoming pattern produces a response in the corresponding P unit in excess of the threshold for recognition. Thus if an input excites a prototype, p, not of the same class, past its actuating threshold, then the magnitude of the multiplier ~associated with the prototype is diminished until the unit no longer is actuated.
The same effect could, of course, be accomplished by increasing the corresponding threshold, ~.

A particular training set of inputs, consisting of large numbers of events, i.e. patterns in each of K classes (the number of patterns is not necessarily the same for each of the K classes) is preferably presented at least twice. This is because the prototypes committed toward the end of the first presentation may not be tested ("challenged") by enough inputs to reduce their magnitudes to values compatible with the nature (characteristics) of all the inputs.

The overall operation of the system can now be visualized as follows. An entering pattern that is not identified or not correctly identified becomes a prototype, thereby being stored in the A matrix and firing a particular unit in the P bank and the correct response unit for the class in the R bank. Each prototype in the P bank has a certain hypersphere of influence determined by the value of stored in its scalar multiplication unit. The value of is reduced every time the prototype responds incorrectly il~7~.g to a signal of the wrong class. It is thus incorrect identifications that shrink the radius of influence of the hypersphere centered at a given prototype.

Many prototypes may be required to map out a difficult boundry or regions of the same class separated by regions of another class. The number of prototypes required is of course dependent on the efficiency of the original code in producing well-separated clusters. However even badly separated regions will eventually be separated and identified by the system.

Although, in the present description, prototypes may sometimes be redundant, it will be evident to those skilled in the art that a variety of modifications may be employed, such as averaging those prototypes which lie within each other's spheres of influence, by which the number of prototypes can be reduced to approach the optimum number or the minimum necessary for satisfactory operation. It is possible to introduce techniques such as inhibition between prototypes of similar classes, excitation between prototypes of different classes and repulsion or attraction between prototypes of different and similar classes. All of these techniques can aid in making the boundaries between classes and reducing the number of necessary prototypes. The system described herein illustrates the basic principles involved in the simplest manner.

Once the system according to the in~ention has learned to function adequately to a desired performance standard, the learning or training mode is terminated (no further modification) and the system is then operated in the trained mode to separate and identify classes. Thus, with the completion of the training mode of operation wherein the system has been trained to separate patterns into classes and to identify these classes, the system can be employed in the trained mode. To this ~7i~9 end, the assemblies may take on the structural arrangement shown in Fig. 6.

In comparing the assembly structures of Fig .6 and Fig. 7, it is seen that, in Fig. 6, the output of the summer stage 30 is no longer fed back through element 35 as an input to the junction elements of the A matrix since, in this mode of operation, the final values of the trans-fer functions of the A matrix have been arrived at through the operation of the system in the training mode.
Also in Fig. 6 and different from Fig. 7, there has been eliminated the ~ stage since it is no longer necessary to modify the value of the output of the summer.

Correspondingly, in the "trained" mode of operation the only structures in Fig. 8 which are required are the output stages (OR circuit 1) such as stages 36, 48 and 64 and direct connections between the outputs Pj---Pi-..PM, and these respective output stages. The feedback arranged to ~ stages, such as AND circuits 58 and 60, are of course eliminated or not used. Flip-flops such as 46, 54 and 66 and associated AND gates 44, 52 and 63 are also unnecessary in the trained mode of operation since there is no need to look for undesired outputs, i.e. errors in class identification.

Fig. 4 shows the structure of a pattern class separator 10 connected to a Nestor adaptive module 74 such as shown in Fig. 3 of the above referred to U.S. Patent No. 3,950,733. In this figure, the assemblies of the pattern class separator 10 have the form shown in Fig. 6, i.e. the structural arrangement employed in the trained mode of operation. The output of the assemblies, viz, PlP2---Pi---,PM, are applied as inputs to the Nestor adaptive module. In other words the PlP2---Pi---~PM

~7~;~9 l outputs of pattern class separator lO correspond to the sl~ s2...sj..., sN inputs to the Nestor module as shown in ~ig . 3 of the above mentioned patent. E~or a detailed description and explanation of the qperation of the Nestor adaptive module, reference is made to this patent.

In considering the operation of the information processing system as described hereinabove, it is to be realized that great fle~ibility is afforded. Thus, for example, once the system is trained to recognize a group of related classes such as the Arabic numerals 0 - 9 or the letters of the Roman alphabet A-Z, the final values of the junction elements of the A matrices a~d the multiplying factors of the A stages can be stored. Then when it is desired to use the system in the "trained"
mode for a group of classes for which it has been previously trained, no retraininq i8 required, it only ~einq necessary to plug in the pertinent stored values of the elements of the A matrices and the ~ stages.

Also, it is within the skill of the art to steer the siqnal vectors to particular assemblies to predetermine which assemblies will have ts recognize the members of a chosen class. To this end, initial values of the elements of ~he A matrices can be pre-chosen to control the course of the training.
.. . . .
There has thus been shown and described a pattern æeparation and identification system which fulfills all the objects and advantages sought there~ore. Many ; changes, mo ifications, variations and other uses and applications of the subject in~ention will, however, become apparent to those skille~ in the art after con~ide~-- ~ 35 ing thi~ specification and the a~companying drawings which disclose preferr~d embodiments thereof. For example, while the system nas been described as comprising a separate ~ multiplication stage and a ~ ~threshold) stage with ~ fixed threshold value, it would clearly be possible to combine these two stages into a threshold stage having a modifiable threshold value. Also, systems such as those described above can work in parallel and/or in series to accomplish the stated ends in the most efficient manner. All such changes, modifications, variation~ and other uses and applications which do not depart from the spirit and scope of the invention are deemed to be covered by the invention which is limited only by the claims which follow.

~ ,. :............. . .

~. ~

Claims

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. An information processing system for separating classes of non-linearly as well as linearly separable patterns, each of said patterns being represented by a plurality N of input signals s1, s2,...sj...sN, said system comprising, in combination:
(a) a plurality N of input terminals, each terminal (j) adapted to receive one of the N input signals (sj);

(b) a plurality M of summing means, each summing means (i) having N inputs and an output and being operative to provide a signal (p'i) at its output representing the sum of the signal representations applied to its inputs;

(c) a plurality N x M of junction elements, each junction element (ij) coupling one of said input terminals (j) with one summing means (i) and providing a transfer of information from the respective input terminal j to the respective summing means i in dependence upon the signal (sj) appearing at the input terminal and upon the element transfer function Aij;

(d) a plurality M of threshold means, each threshold means (i) coupled to the output of one of said summing means (i) and adapted to produce an output (Pi) whenever the output signal (p'i) produced by the respective summing means exceeds a given threshold value (.THETA.pi), whereby the output P represented by the respective output signals p1, p2...pi...pM
of said threshold means provide a separation of the patterns represented by said input signals s1, s2,...sj..,sN into classes.

2. A system as defined in claim 1, further comprising a plurality M of means, each connected between one of said summing means and one of said threshold means, for modifying the respective output signal p'i of said summing means with a respective chosen factor;
whereby said threshold means receives the modified output of said signal modifying means.

3. A system as defined in claim 2, wherein each of said signal modifying means is a scalar multiplying means for multiplying said output signal p'i by a respective scalar factor .lambda.i.

4. A system as defined in claim 3, further comprising means for selectively adjusting said scalar factor .lambda.i, when in a training mode, in dependence upon whether an incoming pattern is correctly or incorrectly identified by production of the output pi of the associated threshold means.

5. A system as defined in claim 4, wherein said scalar factor adjusting means comprises means for reducing the scalar factor .lambda.i when an incoming pattern is incorrectly identified with a prototype by the threshold means with which that particular factor .lambda.i is associated.

6. A system as defined in claim 5, wherein said scalar factor reducing means decrements said scalar factor by a prescribed amount each time an incoming pattern is incorrectly identified.

7. A system as defined in claim 1, further comprising means for selectively adjusting the threshold value .THETA.pi of each threshold means, when in a training mode, in dependence upon whether an incoming pattern is correctly or incorrectly identified by production of the output pi of that threshold means.

8. A system as defined in claim 7, wherein said threshold value adjusting means comprises means for increasing the threshold value .THETA.pi when an incoming pattern is incorrectly identified with a prototype by the threshold means with which that particular threshold value .THETA.pi is associated.

9. A system as defined in any one of claims 3-5, further comprising means for setting each scalar factor .lambda.i to a maximum value .lambda.°i, thereby associate committed prototypes with the scalar factors at their maximum values.

10. A system as defined in either one of claims 7 and 8, further comprising means for setting each threshold value .THETA.pi to a minimum value .THETA.°pi, thereby to commence training with minimum threshold values.

11. A system as defined in claim 1, wherein the output of a junction element equals the product of its transfer function Aij and the signal sj applied thereto.

12. A system as defined in claim 1, further comprising means for modifying the transfer function Aij of at least one of said junction elements, when in a training mode, in dependence upon the incoming signal sj applied thereto and the output signal p'i of the summing means i with which said junction element is associated.

13. A system as defined in claim 12, wherein said transfer function modifying means is operative to modify all of said transfer functions.

14. A system as defined in claim 12, wherein said transfer function modifying means modifies the transfer function Aij in accordance with the formula:
Aij(t) = .gamma.Aij(t-l) + nsjp'i, where Aij(t) is the new transfer function, Aij(t-l) is the previous transfer function prior to this modification, .gamma. is a decay constant in the range 0 ? .gamma. ? 1, and n is an adjustable learning paramater.

15. A system as defined in claim 12, wherein said transfer function modifying means comprises means for feeding back the output p'i of each summing means to the junction elements associated with that summing means.

16. A system as defined in claim 1, wherein said threshold means is a trigger circuit which is actuated in response to an input thereto of at least said given threshold value.

17. A system as defined in claim 16, further comprising class identifying means responsive to the output signals p1, p2,...pi...pM of said threshold means for producing an output R, represented by respective output signals r1, r2...r?...rk, indicative of the particular class of each particular pattern presented to the system.

18. A system as defined in claim 17, wherein said class identifying means comprises a plurality K
of OR circuits, there being at least one OR circuit for each class to be identified, each OR circuit being connected to receive those output signals pi associated with a particular class so as to produce an output signal r? indicative of said class upon receipt of one or more said output signals pi.

19. A system as defined in claim 17, wherein said class identifying means comprises:
(a) a plurality of class output means, each of said last-named means being selected to produce outputs indicating events of a single class;

(b) means respectively associated with each of said class output means for selectively activating each of said class output means; and (c) means responsive to the concurrent activation of a selective activating means and outputs to be produced from the activated class output means.

20. A system as defined in claim 19, wherein each of said class output means is an OR circuit.

21. A system as defined in claim 19 wherein said class identifying means further includes:
(d) means respectively associated with said class output means and actuated in response to the production of an output from said selected class output means for enabling the switching into activation of said class output means without the operation of its associated activating means, whereby said last named class output means can thereafter produce an output in the absence of activation of its associated activating means;

(e) means responsive to the occurrence of outputs from said threshold means not intended as outputs from a currently activated class output means, and outputable from a class output means switchable into activation because of the prior actuation of the enabling means for producing an output from said class output means: and (f) means responsive to said output from said class output means for selectively feeding back said output to those modifying means whose associated threshold means had produced said not intended outputs to change the value of the modifying factor in those modifying means.

22. A system as defined in claim 21, wherein each of said class output means is an OR circuit.

23. A system as defined in claim 21, wherein said means for causing the outputs from an activated class output means includes a three-input AND circuit while enabled by the concurrent appearance of signals at two of its inputs, the selective activating means being applied to first of its inputs, the output of a threshold means being applied to a second of its inputs, the output of said AND circuit being applied as an input to a said class output means.

24. A system as defined in claim 23, wherein said switching enabling means includes a bistable circuit which is switched to its set state upon the enabling i.e. the production of an output from said AND circuit, the set output of said circuit being applied to the third of the inputs of said AND
circuit.

25. A system as defined in claim 1, further comprising a Nestor adaptive module connected to receive the output signals p1, p2,...pi...pM of said threshold means for producing an output R represented by respective output signals ri, r2...r?...rk.

26. A system as defined in any one of claims 8, 11 and 14, further comprising means for modifying the transfer function element Aij of at least one of said junction elements, when in the training mode, in dependence upon the incoming signal sj applied thereto and a unit vector of the prototype bank pi, where the jth component of pi, p?, is p? = 0 for j ? i = 1 for j = i whereby .delta.Aij = P?sj.

27. A system as defined in claim 12, further comprising an output bank R, including:
(e) a plurality M of second input terminals, each such terminal (?) adapted to receive one of the M output signals (pi);

(f) a plurality K of summing means, each summing means (k) having M inputs and an output and being operative to provide a signal (r'k) at its output representing the sum of the signal representations applied to its inputs; and (g) a plurality M X K of junction elements, each junction element (k?) coupling one of said second input terminals (?) with one summing means (k) and providing a transfer of information from the respec-tive second input terminal ? to the respective sum-ming means k in dependence upon the signal (pi) appearing at the input terminal and upon the element transfer function Bk?.

28. A system as defined in claim 27, further comprising means for modifying the transfer function Bk? of at least one of the junction elements of the output bank R, when in a training mode, in dependence upon the incoming signal pi applied thereto and the output signal rk of the summing means k with which said junction element is associated.

29. A system as defined in claim 8 or 11, further comprising means for modifying the transfer function Aij of at least one of said junction elements, when in a training mode, in dependence upon the incoming signal sj applied thereto and the output signal p'i of the summing means i with which said junction element is associated.

30. A system as defined in claim 2, 3 or 4, wherein said threshold means is a trigger circuit which is actuated in response to an input thereto of at least said given threshold value.

31. A system as defined in claim 5, 6 or 7, wherein said threshold means is a trigger circuit which is actuated in response to an input thereto of at least said given threshold value.

32. A system as defined in claim 1, further comprising means for modifying the transfer function element Aij of at least one of said junction elements, when in the training mode, in dependence upon the incoming signal sj applied thereto and a unit vector of the prototype bank pi, where the jth component of pi, p?, is p? = 0 for j ? i = 1 for j = i whereby .delta.Aij = P?sj.

33. A system as defined in claim 13, wherein said trans-fer function modifying means modified the transfer function Aij in accordance with the formula:

Aij(t) = .gamma.Aij(t-l) + nsjp'i, where Aijtt) is the new transfer function, Aij(t-l) is the previous transfer function prior to this modification, .gamma. is a decay constant in the range 0 ? .gamma. ? 1, and n is an adjustable learning parameter.

34. A system as defined in claim 33, further comprising means for modifying the transfer function element Aij of at least one of said junction elements, when in the training mode, in dependence upon the incoming signal sj applied thereto and a unit vector of the prototype blank pi, where the jth component of pi, p?, is p? = 0 for j ? i = 1 for j = i whereby .delta.Aij = p?sj.