CA1185454A - Silicon-glass-silicon capacitive pressure transducer - Google Patents
Silicon-glass-silicon capacitive pressure transducerInfo
- Publication number
- CA1185454A CA1185454A CA000413169A CA413169A CA1185454A CA 1185454 A CA1185454 A CA 1185454A CA 000413169 A CA000413169 A CA 000413169A CA 413169 A CA413169 A CA 413169A CA 1185454 A CA1185454 A CA 1185454A
- Authority
- CA
- Canada
- Prior art keywords
- silicon
- glass
- pedestal
- piece
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010703 silicon Substances 0.000 title claims abstract description 79
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 79
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 74
- 239000011521 glass Substances 0.000 claims abstract description 37
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims abstract description 28
- 239000003990 capacitor Substances 0.000 claims abstract description 16
- 238000000151 deposition Methods 0.000 claims description 5
- 230000004044 response Effects 0.000 claims description 4
- 208000036366 Sensation of pressure Diseases 0.000 claims description 2
- 238000005304 joining Methods 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 abstract description 42
- 239000005388 borosilicate glass Substances 0.000 abstract description 18
- 230000003071 parasitic effect Effects 0.000 abstract description 9
- 238000000926 separation method Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 13
- 238000005530 etching Methods 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 235000010210 aluminium Nutrition 0.000 description 6
- 230000008021 deposition Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- LFVLUOAHQIVABZ-UHFFFAOYSA-N Iodofenphos Chemical compound COP(=S)(OC)OC1=CC(Cl)=C(I)C=C1Cl LFVLUOAHQIVABZ-UHFFFAOYSA-N 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000002775 capsule Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000136 polysorbate Polymers 0.000 description 1
- 239000005297 pyrex Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L9/00—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
- G01L9/0041—Transmitting or indicating the displacement of flexible diaphragms
- G01L9/0072—Transmitting or indicating the displacement of flexible diaphragms using variations in capacitance
- G01L9/0073—Transmitting or indicating the displacement of flexible diaphragms using variations in capacitance using a semiconductive diaphragm
Abstract
Silicon-Glass-Silicon Capacitive Pressure Transducer Abstract A silicon capacitive pressure transducer 34 comprising two wafers of silicon 14, 32 separated by borosilicate glass 18, 21, one of the wafers 14 having a borosilicate glass pedestal 26 thereon which is metallized 30 to provide one plate of a capacitor, the other plate of which is the surface of one of the silicon wafers 32. The distance between the upper surface of the glass pedestal and the lower surface of the silicon wafer is de-fined by a portion 18 of the borosilicate glass, the portion 21 of borosilicate glass being the same height as that of the glass pedestal 26. An embodiment of a transducer 34b employs a silicon pedestal 26b, wherein the glass portion 21b only provides separation of the silicon wafers 14b, 32b with lower parasitic capacitance.
Description
Description Silicon-Glass-Silicon Capacitive Pressure Transducer Technical Field This invention relates to capacitive pressure transducers of the type in which a pair of silicon pieces are joined together with borosilicate glass by a field-assisted bonding process, to form an evacuated capsule with opposing conductive surfaces fonming the plates of a pressure-variable capaci~
tance, electrical eonnection to which is made through the bulk of the silicon.
Background Art Pressure transducers are known to take a vari~ty of forms. OnP form relies on the pressure-induced deflection of a thin diaphragm. In the case of a capaciti~e pressure transducer, the diaphragm deflection causes a variat~on in the distance between a pair of surfaces which form the - 20 platss of a variable capacitor. In U.S. Patent No. 3,634,7~7, there is disclosed a capacitor formed of two w~fers of silicon insulated from each other by glass and joined together by a low temperature glass or by brazing thin metal films deposited on the glass. The device disclosed in said patent requires the processing of two wafers of silicon to provide only a single transducer, and the me~hod of joining the two wafers of silicon is cumbersome. In order to process waers to provide a large number of pressure tr~nsducers from a single pair of processed wafers, a suitable
tance, electrical eonnection to which is made through the bulk of the silicon.
Background Art Pressure transducers are known to take a vari~ty of forms. OnP form relies on the pressure-induced deflection of a thin diaphragm. In the case of a capaciti~e pressure transducer, the diaphragm deflection causes a variat~on in the distance between a pair of surfaces which form the - 20 platss of a variable capacitor. In U.S. Patent No. 3,634,7~7, there is disclosed a capacitor formed of two w~fers of silicon insulated from each other by glass and joined together by a low temperature glass or by brazing thin metal films deposited on the glass. The device disclosed in said patent requires the processing of two wafers of silicon to provide only a single transducer, and the me~hod of joining the two wafers of silicon is cumbersome. In order to process waers to provide a large number of pressure tr~nsducers from a single pair of processed wafers, a suitable
2 -~ining technique must be utilized. One such is the use of field-assisted bonding in which a layer of borosilicate glass between the two pieces of silicon permits bonding of the silicon with the 5 borosilicate glass at about 50QC in a vacuum, the silicon pieces being totally attracted to one another by a DC electric field established by on the order of 100 or 200 volts impressed b~tween them, described in NASA Tech Brief B74-10~63, January 1975, entitled "Low-Temperature F~lectro-static Silicon-To-Silicon Seals Using Sput~ered Borosilicate Glass`'. The device in the afore-mentioned patent also suffers from a very low ratio of variable capacitance to parasitic fixed capa-citance inasmuch as the periphery of the devicehas conductive surfaces closer to each other tha~
the surfaces of the deflectable portion of the device.
I~ order to im~rove the variable to fixed capacitance ratio, and particularly to mitigate the parasitic fixed ca~acitance (that part which is ~ot varied as a fur,ction of diaphragm flexure in response to pressure changes), it is necessary to provide topographical shaping, such as moats, pedestals or pistons, to cause the relatively movable capacitive plate portions to be close to each other in contrast with the fixed por~ions of the conductive body of ~he device. Additionally, in the even~ that very small devices are made (such as by large scale integrated circuit processing of wafers to form a plurality of devices per wafer pair), the small surface area of the opposed capa-citive plates requires close spacing in order to have an adequate capacitance for dPsired sensi~ivi~y to pressure.
In mass production of silicon capacitive pres-sure transducers utilizing known microcircuit and thin film technology, particularly where small devices are desired and capacitor plate surface spacing becomes very small, it is necessary that the pro-cesses be selected and performed in such a fashion ~s to control dimensions very accurately. If, for instance, a pedes~al or piston is too tall, short circui~ing can result in a bad device; if a pedestal or piston is too short, then an inadequate capacity or variable capacitance as a function of pressure may result.
Disclosure of Invention Objects of the invention include provision of improved dimensional control in the processing of wafers or making miniature silicon capacitive pressure transducers, and reduction of parasitic fixed capacitance in miniature silicon ca~acitor pressure transducers.
According to the present invention, silicon capacitive pressure transducers, in which the - silicon provides conductivity to opposing capa-citor plates, the distance and therefore the capacitance between which is variable as a result of de1ection in response to external pressure changes, the parasitic, fixed capacitance of the nonvariable portion of the device is significantly reduced by spacing conductive portions ther~of with borosilicate glass.
In accordance with the present invention, control over the dimensions of topygraphy of one ox more wafers being processed to provide silicon capacitive pressure sensor is achieved by utilizing the depth of sputtered borosilicate glass as the principal dimension defining step, in contrast with the etching of silicon or other material to a time-controlled depth~
In accordance with the invention, there is pro-vided a silicon, capacitive pressure transducer including a first piece of conductive silicon havin~
disposed thereon a pedestal, the pedestal having a conductive surface~ A second piece of conductive silicon also has a conductive surface thereon. A
wall of glass joins the first piece of silicon with the second piece of silicon and provides a chamber between the pieces and the wall. m e conductive sur-face on the pedestal is spaced a short distance from the conductive surface of the second piece of silicon, forming the plates of a capacitor. The distance and therefore the capacitance of the capacitor varies in response to changes in fluidic pressure external to the transducer. The length of the wall between the pieces of silicon is at least four times greater than the distance between the capacitor plates.
In more detail, and in accordance with the inven-tion, 'Lhe two pieces of silicon, upon which are dis-posed closely spaced opposing surfaces of a capacitor, the spacing of which varies with external pressure, are separated about the peripheral fixed capacitive poxtion by borosilicate glass. In accordance further with the present invention, the borosilicate glass is deposited and etched in process steps resulting in principal dimensional control between the two pieces of silicon so as to provide relatively accurate dimensional con-trol in contrast with etching of silicon or other materials~
4~ ~
- 4a -The invention may be practiced in silicon pressure transducers of a wide variety of types with or without metallization of borosilicate glass or silicon to form capacitive plates, to provide low parasitic capacitance and acceptably accurate dimensional con-trol in the processing thereof.
The invention may be practiced utilizing micro-circuit and thin film technology which is well within the skill of the art, in the light of the teachings which follow hereinafter.
The foregoiny and other object, features and advantages of the present invention will become more apparent in the light of the following detailed des-cription of examplary embodiments thereof, as illus-trated in the accompanying drawings.
5~
Brief Description of Drawings Figs. 1-9 are simplified side elevation, sec-tional views of one or more silicon wafers being processed to form exemplary silicon capacitive pressure transducers in accordance with the invention, and Figs. 10 and 11 are simplified side elevation views of alternati~e embodiments o~ silicon pressure transducers employing the present invention.
Best Mode for Carrying Out the Invention Referring now to Fig. 1, a wafer 14 of doped silicon has a layer 16 of borosilicate glass depo-sited thereon. The silicon may be either N or P
type having at least 1015 impurity per cc so as to achieve something under 1 ohm centimeter con- 5 15 ductivity. The borosilicate glass 16 may, for instance, be Corning 7070 ~ Glass, or other boro-silicate glass such as Pyrex ~ . The glass 16 may be RF sputtered utilizing well known techni-ques so as to achieve a depth on the order of 2.5 microns. In Fig. 2, well ~nown photoresist and etch techniques are utilized to etch the glass layer 16 so as to provide a matrix 18 of glass defining a plurality of circular sites 20 of ex-posed surface of the silicon wafer 1~, at each of which a pressure transducer is to be formed as described hereinafter. As shown in Fig. 3, a next step is to deposit additional borosilicate glass in a layer 22 on the order of 6 microns thick. Then, as shown in Fig. 4, conventional photoresist and etch techniques are utilized to etch the layer 22 so as to result in a thickened matrix 18, 21 defining annular m~ats 24 and cir-cular pedestals 26 with centrally disposed aper-~ures 28 therein, the apertures 28 and moats 24 exposing the upper surface of the silicon wafer 14.
The deposition depth of the glass layer 16 and the glass layer 22 provide dimensional control to the thickness of the matrix 18, 21 (Fig. 4) and the circular pedestals 26, in accordance with one aspect of the invention, as described more fully hereinafter.
In Fig. 5, a layer o aluminum, on the order of 5,000 angstroms thick, is RF sputtered or eva-porated using electric beam or resistance methodo-logy, to provide a mask for further etching of the silicon and to provide a capacitor plate, as described hereinafter. In Fig. 6, utilizing well known photoresist and etch techniques, the alu-minum layer 30 is etched away at the bottom of each of the moats 24. Then, the silicon wafer 14 is plasma etched so as to deepen the moats in each of the si~es on the wafer to provide a circular moat 24a which extends into the silicon. Notice that the etching of silicon as illustrated in Fig. 7 does not chan~e the dimensional difference between the height of the circular pedestals 26 and the matrix 18, 21. Thus, the particular depth of the etch need concern only leaving sufficient material between the moat 24a and ~he lower sur-face of the silicon wafer 14 for the desired strut-tural strength, and/or the desired pressure respon-sive flexure characteristics, as described herein-after. As illustrated in Fig. 8, ordinary photoresist and etch techniques are utilized to remove only a portion of the aluminum mask which had been ~ r ~ ~ V ~
deposited in the step illustrated in Fig. 5, so as to provide a conductive surface on the top of the borosilicate glass circular pedestals 26.
In this step, the glass in the m~trix 18, 21 and the silicon at the base of the annular moats 24a provide etch stops so that there is no dimensional change as a consequence of removing the unwanted aluminum. Fig. 8 illustrates the com~letion of processing of one of two wafers so as to provide a plurality of sites at which the capacitive pressure tra~sducers can be formed. The next step is to overlay the processed wafer of Fig. 8 with a wafer 32 of conductive silicon, on the order of 250 microns thick, as illustrated in Fig. 9, and bond the wafers together. The field-assisted bonding may take place in a vacuum of about 10 6 Torr at approximately SOO~C, with a voltage, ~mpressed plus to minus from the wafer 32 to the wafer 1~, of on the order of 75 to 125 volts. This causes the silicon wafers to bP
attracted to each other as the ~lass 18a bonds to the wafer 32, thus ensuring a pressure tight seal at each of the sites of the processed wafer 14. Then, the wafer may be diced appropriately, as shown by the dash lines 36 in Fig. 9, such as by sawin~, to provide a plurality of individual pressure t ransducers 34.
Referring to Fig. 9, because the glass portion 21 around the periphery of the device is formed during the same deposition as the pedestal 26 (the deposition of glass layer 22 in Fig. 3), regardless of how thick the layer 2~ is made, the top of the pedestal 26 will be separated from the bottom uf s ' the wafer 32 by the ~hickness of the glass portion 18 which in turn is determined by the thickness of the layer 16 (Fig. 1~. Thus dimensional control, in providing a prescribed distance between the silicon pedestal 26 and the lower surface of the silicon wafer 32, is maintained simply by proper control of the deposition of layer 16. Of course, the plate-to-plate spacing will be less, as de-termined by the thickness of the metal layer 30.
On the other hand, the distance between the silicon wafer 14 and the silicon wafer 32 is independently controllable by the thick'ness of the layer 22 (Fig. 3) and therefore the glass portions 21 and the pedestal 26. The sputtering of glass can be controlled in the thickness to ~5% of desired thic~ness, even in high volume productio~. This contrasts with etching of silicon (e.g.~ such as to create the moat 24 and pedestal 26 from a thick wafer), for which the depth of etching ~other than when using a metallic etch stop) can only be con-trolled to +15% of the desired depth. This dimen-sional control is one aspect of t~.e present inven-tion. It should be noted however, that the amount of glass used (the thickness of the layer 22, in particular) cannot be increased indiscriminately, because the difference in the temperature coeffi-cient of expansion of borosilicate glass from that of conductive, sin~le crystal silicon, could re-sult in structural flaws occurring as a result of temperature changes in a device when in use.
But, for a minimum parasitic capacitance, the glass wall structure 18, 21 should be at least four times as great as the distance between the ~ ~ 5 plates (30, 32).
Another embodiment of the present invention is illustrated in Fig. 10. This is substantially the same as that illustrated in Fig. 9 with the exception of the fact that a moat 31a is formed in the upper wafer 32a rather than within the glass 21a in the lower wafer 14a. Obvious varia-tions in the procedures ~et for~h in Figs. 1-9 would be utilized to form the device o Fig. 10, the most notable difference being the etching back of the aluminum to form the metallic plate surface and contact 30a, a similar aluminum mask being utilized in the process to form the moat 31a in the wafer 32a. The embodiment of Fig. 10 lS may be advantageous where a piston 26a having high mobility is desired for extreme sensitivi~y.
In another embodiment employing one aspect of the invention as illustrated in Fig. 11, the glass material 21b is utilized to define the spacing between the wafer 14b and the wafer 32b, but the distance between the upper surface of a pedestal 26b and the lower surface of the wafer 32b is wholly dependent on the depth of etch of silicon in formulating that which becomes a moat 31b after the glass 21b is disposed and reverse etched thereon.
Thus, the embodiment of Fig. 11 does not have the accurate dimension control of the spacing of the capacitor plates, but does employ the aspect of the invention where the two wafers are separated signi-ficantly by the glass portion 21b, thereby to reducethe parasitic static capacitance around the periphery of the device.
~ ~ 5~5~'~
In the embodiments of Figs. 9 and 10, one of the plates of ~he ~apacitor ~s formed of the metal-lization 30, 30a, wherein in the embodiment of Fig, 11, both plates of the capacitor are formed by the surfaces of the silicon pieces 14b, 32b. In the embodiments of Figs. 10 and 11, a pedestal 26a, 26b i~ formed of silicon only, whereas in the embodi-ment of Fig. 9 the pedestaL 26 is formed at least in part of glass. In all three embodiments, how-ever, the silicon pieces are joined together andseparated by glass having a dimension between the two pieces (vertically in the figures herein) which is substantially larger than the distance between the two capacitor plates. In fact, it has been found that the glass wall structure which provides ~he sidewalls to the evacuated chamber formed between the two pieces of silicon should have a dimension between the pieces of silicon (vertical in the figures~ which is at least four times greater than the spacing of the capacitive plates. This provides a substantial reduction in the invariabl~, parasitic capacitance between the plates around the periphery J while the close spacing between the plates provides for an increase in the dynamic range (the variable capacitance portion of the total capacitance) as a function of pressure.
The invention may be practiced in a wide variety of configurations utilizing pistons which are either movable or relatively rigid, with double moats or single moats, and employing other features as well in a wide variety of shapes and sizes. How-ever> for best r~sults in the field-assisted bonding step, the glass should all be on one wafer so that ~s~
the seal formed during bonding is a silicon/glass seal. Similarly, although the invention has been shown and described with respect to exemplary embodiments thereof, it should be understood by those skilled in the art that the foregoing and various other changes~ omissions and additions m~y be made therein and thereto, without departing fr~m the spirit and the scope of the invention.
the surfaces of the deflectable portion of the device.
I~ order to im~rove the variable to fixed capacitance ratio, and particularly to mitigate the parasitic fixed ca~acitance (that part which is ~ot varied as a fur,ction of diaphragm flexure in response to pressure changes), it is necessary to provide topographical shaping, such as moats, pedestals or pistons, to cause the relatively movable capacitive plate portions to be close to each other in contrast with the fixed por~ions of the conductive body of ~he device. Additionally, in the even~ that very small devices are made (such as by large scale integrated circuit processing of wafers to form a plurality of devices per wafer pair), the small surface area of the opposed capa-citive plates requires close spacing in order to have an adequate capacitance for dPsired sensi~ivi~y to pressure.
In mass production of silicon capacitive pres-sure transducers utilizing known microcircuit and thin film technology, particularly where small devices are desired and capacitor plate surface spacing becomes very small, it is necessary that the pro-cesses be selected and performed in such a fashion ~s to control dimensions very accurately. If, for instance, a pedes~al or piston is too tall, short circui~ing can result in a bad device; if a pedestal or piston is too short, then an inadequate capacity or variable capacitance as a function of pressure may result.
Disclosure of Invention Objects of the invention include provision of improved dimensional control in the processing of wafers or making miniature silicon capacitive pressure transducers, and reduction of parasitic fixed capacitance in miniature silicon ca~acitor pressure transducers.
According to the present invention, silicon capacitive pressure transducers, in which the - silicon provides conductivity to opposing capa-citor plates, the distance and therefore the capacitance between which is variable as a result of de1ection in response to external pressure changes, the parasitic, fixed capacitance of the nonvariable portion of the device is significantly reduced by spacing conductive portions ther~of with borosilicate glass.
In accordance with the present invention, control over the dimensions of topygraphy of one ox more wafers being processed to provide silicon capacitive pressure sensor is achieved by utilizing the depth of sputtered borosilicate glass as the principal dimension defining step, in contrast with the etching of silicon or other material to a time-controlled depth~
In accordance with the invention, there is pro-vided a silicon, capacitive pressure transducer including a first piece of conductive silicon havin~
disposed thereon a pedestal, the pedestal having a conductive surface~ A second piece of conductive silicon also has a conductive surface thereon. A
wall of glass joins the first piece of silicon with the second piece of silicon and provides a chamber between the pieces and the wall. m e conductive sur-face on the pedestal is spaced a short distance from the conductive surface of the second piece of silicon, forming the plates of a capacitor. The distance and therefore the capacitance of the capacitor varies in response to changes in fluidic pressure external to the transducer. The length of the wall between the pieces of silicon is at least four times greater than the distance between the capacitor plates.
In more detail, and in accordance with the inven-tion, 'Lhe two pieces of silicon, upon which are dis-posed closely spaced opposing surfaces of a capacitor, the spacing of which varies with external pressure, are separated about the peripheral fixed capacitive poxtion by borosilicate glass. In accordance further with the present invention, the borosilicate glass is deposited and etched in process steps resulting in principal dimensional control between the two pieces of silicon so as to provide relatively accurate dimensional con-trol in contrast with etching of silicon or other materials~
4~ ~
- 4a -The invention may be practiced in silicon pressure transducers of a wide variety of types with or without metallization of borosilicate glass or silicon to form capacitive plates, to provide low parasitic capacitance and acceptably accurate dimensional con-trol in the processing thereof.
The invention may be practiced utilizing micro-circuit and thin film technology which is well within the skill of the art, in the light of the teachings which follow hereinafter.
The foregoiny and other object, features and advantages of the present invention will become more apparent in the light of the following detailed des-cription of examplary embodiments thereof, as illus-trated in the accompanying drawings.
5~
Brief Description of Drawings Figs. 1-9 are simplified side elevation, sec-tional views of one or more silicon wafers being processed to form exemplary silicon capacitive pressure transducers in accordance with the invention, and Figs. 10 and 11 are simplified side elevation views of alternati~e embodiments o~ silicon pressure transducers employing the present invention.
Best Mode for Carrying Out the Invention Referring now to Fig. 1, a wafer 14 of doped silicon has a layer 16 of borosilicate glass depo-sited thereon. The silicon may be either N or P
type having at least 1015 impurity per cc so as to achieve something under 1 ohm centimeter con- 5 15 ductivity. The borosilicate glass 16 may, for instance, be Corning 7070 ~ Glass, or other boro-silicate glass such as Pyrex ~ . The glass 16 may be RF sputtered utilizing well known techni-ques so as to achieve a depth on the order of 2.5 microns. In Fig. 2, well ~nown photoresist and etch techniques are utilized to etch the glass layer 16 so as to provide a matrix 18 of glass defining a plurality of circular sites 20 of ex-posed surface of the silicon wafer 1~, at each of which a pressure transducer is to be formed as described hereinafter. As shown in Fig. 3, a next step is to deposit additional borosilicate glass in a layer 22 on the order of 6 microns thick. Then, as shown in Fig. 4, conventional photoresist and etch techniques are utilized to etch the layer 22 so as to result in a thickened matrix 18, 21 defining annular m~ats 24 and cir-cular pedestals 26 with centrally disposed aper-~ures 28 therein, the apertures 28 and moats 24 exposing the upper surface of the silicon wafer 14.
The deposition depth of the glass layer 16 and the glass layer 22 provide dimensional control to the thickness of the matrix 18, 21 (Fig. 4) and the circular pedestals 26, in accordance with one aspect of the invention, as described more fully hereinafter.
In Fig. 5, a layer o aluminum, on the order of 5,000 angstroms thick, is RF sputtered or eva-porated using electric beam or resistance methodo-logy, to provide a mask for further etching of the silicon and to provide a capacitor plate, as described hereinafter. In Fig. 6, utilizing well known photoresist and etch techniques, the alu-minum layer 30 is etched away at the bottom of each of the moats 24. Then, the silicon wafer 14 is plasma etched so as to deepen the moats in each of the si~es on the wafer to provide a circular moat 24a which extends into the silicon. Notice that the etching of silicon as illustrated in Fig. 7 does not chan~e the dimensional difference between the height of the circular pedestals 26 and the matrix 18, 21. Thus, the particular depth of the etch need concern only leaving sufficient material between the moat 24a and ~he lower sur-face of the silicon wafer 14 for the desired strut-tural strength, and/or the desired pressure respon-sive flexure characteristics, as described herein-after. As illustrated in Fig. 8, ordinary photoresist and etch techniques are utilized to remove only a portion of the aluminum mask which had been ~ r ~ ~ V ~
deposited in the step illustrated in Fig. 5, so as to provide a conductive surface on the top of the borosilicate glass circular pedestals 26.
In this step, the glass in the m~trix 18, 21 and the silicon at the base of the annular moats 24a provide etch stops so that there is no dimensional change as a consequence of removing the unwanted aluminum. Fig. 8 illustrates the com~letion of processing of one of two wafers so as to provide a plurality of sites at which the capacitive pressure tra~sducers can be formed. The next step is to overlay the processed wafer of Fig. 8 with a wafer 32 of conductive silicon, on the order of 250 microns thick, as illustrated in Fig. 9, and bond the wafers together. The field-assisted bonding may take place in a vacuum of about 10 6 Torr at approximately SOO~C, with a voltage, ~mpressed plus to minus from the wafer 32 to the wafer 1~, of on the order of 75 to 125 volts. This causes the silicon wafers to bP
attracted to each other as the ~lass 18a bonds to the wafer 32, thus ensuring a pressure tight seal at each of the sites of the processed wafer 14. Then, the wafer may be diced appropriately, as shown by the dash lines 36 in Fig. 9, such as by sawin~, to provide a plurality of individual pressure t ransducers 34.
Referring to Fig. 9, because the glass portion 21 around the periphery of the device is formed during the same deposition as the pedestal 26 (the deposition of glass layer 22 in Fig. 3), regardless of how thick the layer 2~ is made, the top of the pedestal 26 will be separated from the bottom uf s ' the wafer 32 by the ~hickness of the glass portion 18 which in turn is determined by the thickness of the layer 16 (Fig. 1~. Thus dimensional control, in providing a prescribed distance between the silicon pedestal 26 and the lower surface of the silicon wafer 32, is maintained simply by proper control of the deposition of layer 16. Of course, the plate-to-plate spacing will be less, as de-termined by the thickness of the metal layer 30.
On the other hand, the distance between the silicon wafer 14 and the silicon wafer 32 is independently controllable by the thick'ness of the layer 22 (Fig. 3) and therefore the glass portions 21 and the pedestal 26. The sputtering of glass can be controlled in the thickness to ~5% of desired thic~ness, even in high volume productio~. This contrasts with etching of silicon (e.g.~ such as to create the moat 24 and pedestal 26 from a thick wafer), for which the depth of etching ~other than when using a metallic etch stop) can only be con-trolled to +15% of the desired depth. This dimen-sional control is one aspect of t~.e present inven-tion. It should be noted however, that the amount of glass used (the thickness of the layer 22, in particular) cannot be increased indiscriminately, because the difference in the temperature coeffi-cient of expansion of borosilicate glass from that of conductive, sin~le crystal silicon, could re-sult in structural flaws occurring as a result of temperature changes in a device when in use.
But, for a minimum parasitic capacitance, the glass wall structure 18, 21 should be at least four times as great as the distance between the ~ ~ 5 plates (30, 32).
Another embodiment of the present invention is illustrated in Fig. 10. This is substantially the same as that illustrated in Fig. 9 with the exception of the fact that a moat 31a is formed in the upper wafer 32a rather than within the glass 21a in the lower wafer 14a. Obvious varia-tions in the procedures ~et for~h in Figs. 1-9 would be utilized to form the device o Fig. 10, the most notable difference being the etching back of the aluminum to form the metallic plate surface and contact 30a, a similar aluminum mask being utilized in the process to form the moat 31a in the wafer 32a. The embodiment of Fig. 10 lS may be advantageous where a piston 26a having high mobility is desired for extreme sensitivi~y.
In another embodiment employing one aspect of the invention as illustrated in Fig. 11, the glass material 21b is utilized to define the spacing between the wafer 14b and the wafer 32b, but the distance between the upper surface of a pedestal 26b and the lower surface of the wafer 32b is wholly dependent on the depth of etch of silicon in formulating that which becomes a moat 31b after the glass 21b is disposed and reverse etched thereon.
Thus, the embodiment of Fig. 11 does not have the accurate dimension control of the spacing of the capacitor plates, but does employ the aspect of the invention where the two wafers are separated signi-ficantly by the glass portion 21b, thereby to reducethe parasitic static capacitance around the periphery of the device.
~ ~ 5~5~'~
In the embodiments of Figs. 9 and 10, one of the plates of ~he ~apacitor ~s formed of the metal-lization 30, 30a, wherein in the embodiment of Fig, 11, both plates of the capacitor are formed by the surfaces of the silicon pieces 14b, 32b. In the embodiments of Figs. 10 and 11, a pedestal 26a, 26b i~ formed of silicon only, whereas in the embodi-ment of Fig. 9 the pedestaL 26 is formed at least in part of glass. In all three embodiments, how-ever, the silicon pieces are joined together andseparated by glass having a dimension between the two pieces (vertically in the figures herein) which is substantially larger than the distance between the two capacitor plates. In fact, it has been found that the glass wall structure which provides ~he sidewalls to the evacuated chamber formed between the two pieces of silicon should have a dimension between the pieces of silicon (vertical in the figures~ which is at least four times greater than the spacing of the capacitive plates. This provides a substantial reduction in the invariabl~, parasitic capacitance between the plates around the periphery J while the close spacing between the plates provides for an increase in the dynamic range (the variable capacitance portion of the total capacitance) as a function of pressure.
The invention may be practiced in a wide variety of configurations utilizing pistons which are either movable or relatively rigid, with double moats or single moats, and employing other features as well in a wide variety of shapes and sizes. How-ever> for best r~sults in the field-assisted bonding step, the glass should all be on one wafer so that ~s~
the seal formed during bonding is a silicon/glass seal. Similarly, although the invention has been shown and described with respect to exemplary embodiments thereof, it should be understood by those skilled in the art that the foregoing and various other changes~ omissions and additions m~y be made therein and thereto, without departing fr~m the spirit and the scope of the invention.
Claims (4)
1. A silicon, capacitive pressure transducer com-prising:
a first piece of conductive silicon having disposed thereon a pedestal, said pedestal having a conductive surface;
a second piece of conductive silicon having a conductive surface thereon; and a wall of glass joining said first piece of silicon with said second piece of silicon and providing a chamber between said pieces and said wall, the conductive surface on said pedestal being spaced a short distance from the conductive surface of said second piece of silicon, forming the plates of a capacitor, said distance and therefore the capacitance of said capacitor varying in response to changes in fluidic pres-sure external to said transducer, the length of said walls between said pieces of silicon being at least four times greater than the distance between said capacitor plates.
a first piece of conductive silicon having disposed thereon a pedestal, said pedestal having a conductive surface;
a second piece of conductive silicon having a conductive surface thereon; and a wall of glass joining said first piece of silicon with said second piece of silicon and providing a chamber between said pieces and said wall, the conductive surface on said pedestal being spaced a short distance from the conductive surface of said second piece of silicon, forming the plates of a capacitor, said distance and therefore the capacitance of said capacitor varying in response to changes in fluidic pres-sure external to said transducer, the length of said walls between said pieces of silicon being at least four times greater than the distance between said capacitor plates.
2. A transducer according to claim 1 wherein said pedestal is formed by depositing glass on said first silicon piece and providing a conductive layer on the glass at the top surface of said pedestal, said conductive layer being connected through said glass pedestal for electrical connection with said first silicon piece.
3. A transducer according to claim 2 wherein said glass wall structure includes a first portion equal to the distance between the top of the glass pedes-tal and the opposing surface of said second piece of conductive silicon and a second portion equal in dimension to the height of said pedestal.
4. A transducer according to claim 1 wherein said pedestal is formed within said first silicon piece, the conductive surface on the top of said pedestal comprising the conductive surface of said first piece of conductive silicon; and wherein said glass wall structure has a dimension separating said two pieces of conductive silicon which is equal to the summation of the height of said pedestal and the distance between the surface of said pedestal and the conductive surface of said second piece of con-ductive silicon.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US310,598 | 1981-10-13 | ||
| US06/310,598 US4405970A (en) | 1981-10-13 | 1981-10-13 | Silicon-glass-silicon capacitive pressure transducer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1185454A true CA1185454A (en) | 1985-04-16 |
Family
ID=23203256
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000413169A Expired CA1185454A (en) | 1981-10-13 | 1982-10-08 | Silicon-glass-silicon capacitive pressure transducer |
Country Status (12)
| Country | Link |
|---|---|
| US (1) | US4405970A (en) |
| EP (1) | EP0090845B1 (en) |
| JP (1) | JPS58501697A (en) |
| AU (1) | AU560246B2 (en) |
| BR (1) | BR8207904A (en) |
| CA (1) | CA1185454A (en) |
| DE (1) | DE3276553D1 (en) |
| DK (1) | DK247283D0 (en) |
| GR (1) | GR76713B (en) |
| IE (1) | IE53532B1 (en) |
| IT (1) | IT1153238B (en) |
| WO (1) | WO1983001536A1 (en) |
Families Citing this family (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5855732A (en) * | 1981-09-30 | 1983-04-02 | Hitachi Ltd | Electrostatic capacity type pressure sensor |
| US4527428A (en) * | 1982-12-30 | 1985-07-09 | Hitachi, Ltd. | Semiconductor pressure transducer |
| US4513348A (en) * | 1984-01-13 | 1985-04-23 | United Technologies Corporation | Low parasitic capacitance pressure transducer and etch stop method |
| US4530029A (en) * | 1984-03-12 | 1985-07-16 | United Technologies Corporation | Capacitive pressure sensor with low parasitic capacitance |
| FI842307A (en) * | 1984-06-07 | 1985-12-08 | Vaisala Oy | FOERFARANDE FOER AOSTADKOMMANDE AV GENOMFOERING I EN MIKROMEKANISK KONSTRUKTION. |
| FI75426C (en) * | 1984-10-11 | 1988-06-09 | Vaisala Oy | ABSOLUTTRYCKGIVARE. |
| US4586109A (en) * | 1985-04-01 | 1986-04-29 | Bourns Instruments, Inc. | Batch-process silicon capacitive pressure sensor |
| US4743836A (en) * | 1985-12-06 | 1988-05-10 | United Technologies Corporation | Capacitive circuit for measuring a parameter having a linear output voltage |
| US4730496A (en) * | 1986-06-23 | 1988-03-15 | Rosemount Inc. | Capacitance pressure sensor |
| JP2570420B2 (en) * | 1988-06-23 | 1997-01-08 | 富士電機株式会社 | Capacitive pressure detector |
| US4951174A (en) * | 1988-12-30 | 1990-08-21 | United Technologies Corporation | Capacitive pressure sensor with third encircling plate |
| US5245504A (en) * | 1989-02-28 | 1993-09-14 | United Technologies Corporation | Methodology for manufacturing hinged diaphragms for semiconductor sensors |
| US4998179A (en) * | 1989-02-28 | 1991-03-05 | United Technologies Corporation | Capacitive semiconductive sensor with hinged diaphragm for planar movement |
| US5009690A (en) * | 1990-03-09 | 1991-04-23 | The United States Of America As Represented By The United States Department Of Energy | Method of bonding single crystal quartz by field-assisted bonding |
| US5155061A (en) * | 1991-06-03 | 1992-10-13 | Allied-Signal Inc. | Method for fabricating a silicon pressure sensor incorporating silicon-on-insulator structures |
| FR2701564B1 (en) * | 1993-02-12 | 1995-05-19 | Suisse Electronique Microtech | Capacitive type absolute pressure sensor and method of manufacturing a plurality of such sensors. |
| US5444901A (en) * | 1993-10-25 | 1995-08-29 | United Technologies Corporation | Method of manufacturing silicon pressure sensor having dual elements simultaneously mounted |
| US5440931A (en) * | 1993-10-25 | 1995-08-15 | United Technologies Corporation | Reference element for high accuracy silicon capacitive pressure sensor |
| US5375034A (en) * | 1993-12-02 | 1994-12-20 | United Technologies Corporation | Silicon capacitive pressure sensor having a glass dielectric deposited using ion milling |
| US5381299A (en) * | 1994-01-28 | 1995-01-10 | United Technologies Corporation | Capacitive pressure sensor having a substrate with a curved mesa |
| US5448444A (en) * | 1994-01-28 | 1995-09-05 | United Technologies Corporation | Capacitive pressure sensor having a reduced area dielectric spacer |
| US5578843A (en) * | 1994-10-06 | 1996-11-26 | Kavlico Corporation | Semiconductor sensor with a fusion bonded flexible structure |
| US5535626A (en) * | 1994-12-21 | 1996-07-16 | Breed Technologies, Inc. | Sensor having direct-mounted sensing element |
| US5600072A (en) * | 1995-06-23 | 1997-02-04 | Motorola, Inc. | Capacitive pressure sensor and method for making the same |
| US5966617A (en) * | 1996-09-20 | 1999-10-12 | Kavlico Corporation | Multiple local oxidation for surface micromachining |
| US6324914B1 (en) | 1997-03-20 | 2001-12-04 | Alliedsignal, Inc. | Pressure sensor support base with cavity |
| US6058780A (en) * | 1997-03-20 | 2000-05-09 | Alliedsignal Inc. | Capacitive pressure sensor housing having a ceramic base |
| US6678927B1 (en) * | 1997-11-24 | 2004-01-20 | Avx Corporation | Miniature surface mount capacitor and method of making same |
| US6387318B1 (en) | 1997-12-05 | 2002-05-14 | Alliedsignal, Inc. | Glass-ceramic pressure sensor support base and its fabrication |
| JP3771425B2 (en) | 2000-07-04 | 2006-04-26 | 株式会社山武 | Capacitive pressure sensor and manufacturing method thereof |
| AU2001265986A1 (en) * | 2000-07-26 | 2002-02-05 | Endress & Hauser Gmbh & Co.Kg. | Capacitive pressure sensor |
| US7028551B2 (en) * | 2004-06-18 | 2006-04-18 | Kavlico Corporation | Linearity semi-conductive pressure sensor |
| US7683444B2 (en) * | 2005-09-30 | 2010-03-23 | The United States Of America As Represented By The Secretary Of The Navy | Metamaterial structure has resonant and strip line elements comprising a photoconductive semiconductor material formed on substrate to induce negative permeability and negative permittivity in operating frequency range |
| US7345867B2 (en) | 2005-11-18 | 2008-03-18 | Alps Electric Co., Ltd | Capacitive pressure sensor and method of manufacturing the same |
| US9837935B2 (en) | 2013-10-29 | 2017-12-05 | Honeywell International Inc. | All-silicon electrode capacitive transducer on a glass substrate |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3634727A (en) * | 1968-12-03 | 1972-01-11 | Bendix Corp | Capacitance-type pressure transducer |
| US3965746A (en) * | 1974-11-04 | 1976-06-29 | Teledyne Industries, Inc. | Pressure transducer |
| US4168518A (en) * | 1977-05-10 | 1979-09-18 | Lee Shih Y | Capacitor transducer |
| US4168517A (en) * | 1977-11-10 | 1979-09-18 | Lee Shih Y | Capacitive pressure transducer |
| US4287553A (en) * | 1980-06-06 | 1981-09-01 | The Bendix Corporation | Capacitive pressure transducer |
-
1981
- 1981-10-13 US US06/310,598 patent/US4405970A/en not_active Expired - Lifetime
-
1982
- 1982-09-30 EP EP82903396A patent/EP0090845B1/en not_active Expired
- 1982-09-30 DE DE8282903396T patent/DE3276553D1/en not_active Expired
- 1982-09-30 JP JP57503363A patent/JPS58501697A/en active Pending
- 1982-09-30 WO PCT/US1982/001406 patent/WO1983001536A1/en active IP Right Grant
- 1982-09-30 BR BR8207904A patent/BR8207904A/en not_active IP Right Cessation
- 1982-10-08 CA CA000413169A patent/CA1185454A/en not_active Expired
- 1982-10-11 IE IE2453/82A patent/IE53532B1/en not_active IP Right Cessation
- 1982-10-11 GR GR69502A patent/GR76713B/el unknown
- 1982-10-13 IT IT23728/82A patent/IT1153238B/en active
-
1983
- 1983-02-17 AU AU11630/83A patent/AU560246B2/en not_active Ceased
- 1983-06-01 DK DK2472/83A patent/DK247283D0/en not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| IE53532B1 (en) | 1988-12-07 |
| EP0090845A4 (en) | 1984-11-22 |
| DE3276553D1 (en) | 1987-07-16 |
| IT8223728A0 (en) | 1982-10-13 |
| AU1163083A (en) | 1984-08-23 |
| IE822453L (en) | 1983-04-13 |
| EP0090845B1 (en) | 1987-06-10 |
| DK247283A (en) | 1983-06-01 |
| WO1983001536A1 (en) | 1983-04-28 |
| JPS58501697A (en) | 1983-10-06 |
| GR76713B (en) | 1984-08-29 |
| US4405970A (en) | 1983-09-20 |
| EP0090845A1 (en) | 1983-10-12 |
| BR8207904A (en) | 1983-09-13 |
| DK247283D0 (en) | 1983-06-01 |
| IT1153238B (en) | 1987-01-14 |
| AU560246B2 (en) | 1987-04-02 |
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