CA1189768A - Method of laser annealing of subsurface ion implanted regions - Google Patents
Method of laser annealing of subsurface ion implanted regionsInfo
- Publication number
- CA1189768A CA1189768A CA000404043A CA404043A CA1189768A CA 1189768 A CA1189768 A CA 1189768A CA 000404043 A CA000404043 A CA 000404043A CA 404043 A CA404043 A CA 404043A CA 1189768 A CA1189768 A CA 1189768A
- Authority
- CA
- Canada
- Prior art keywords
- annealing
- laser
- region
- implanted
- buried
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/092—Laser beam processing-diodes or transistor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/093—Laser beam treatment in general
Abstract
ABSTRACT
A METHOD OF LASER ANNEALING OF
SUBSURFACE ION IMPLANTED REGIONS
A method for annealing ion implanted regions buried in a semiconductor substrate without the undesirable effects of thermal diffusion which includes the radiation of the substrate by a continuous laser having an emission frequency longer than 600 nanometers which the buried ion implanted regions will absorb strongly but which will be substantially unabsorbed by the unimplanted regions.
Superior results can be obtained when the substrate is heated to approximately 300° dur-ing this laser annealing.
A METHOD OF LASER ANNEALING OF
SUBSURFACE ION IMPLANTED REGIONS
A method for annealing ion implanted regions buried in a semiconductor substrate without the undesirable effects of thermal diffusion which includes the radiation of the substrate by a continuous laser having an emission frequency longer than 600 nanometers which the buried ion implanted regions will absorb strongly but which will be substantially unabsorbed by the unimplanted regions.
Superior results can be obtained when the substrate is heated to approximately 300° dur-ing this laser annealing.
Description
7~
A METHO~ OF LASER ANNEALING OF
SUBSURFACE ION IMPI,ANTED REGIONS
DESCRIPTION
1) Technical Field The present invention relates to a method of annealing ion implanted regions buried in a semiconductor body by a radiation of the implantecl region with a continuous wave laser having an emisslon frequency which the ion implanted regivns will absorb strongly. The present invention may be particularly and advantageously used in the Eormation of vertical bipolar integrated circuits.
A METHO~ OF LASER ANNEALING OF
SUBSURFACE ION IMPI,ANTED REGIONS
DESCRIPTION
1) Technical Field The present invention relates to a method of annealing ion implanted regions buried in a semiconductor body by a radiation of the implantecl region with a continuous wave laser having an emisslon frequency which the ion implanted regivns will absorb strongly. The present invention may be particularly and advantageously used in the Eormation of vertical bipolar integrated circuits.
2) Description of the Prior Art Improved very high speed, high performance, integrated circuits, with low resistance collectors are now required by the electronic industry. To meet this need it has been necessary for the integrated circuit industry to utilize very precise ion implanted regions in non epitaxial semiconductor bodies.
Typical high speed, high performance devices are taught in U.S. Patent 4,111,720 to A.E. Michel et al, which is assigned to the same assignee as the present invention.
This patent describes the formation of non-epitaxial, verticall bipolar, integrated circuits involving ion implantation. In the formation of such circuits thermal annealing has been found to be undesirable for it causes substantial ~-9~81-001 diffusion of the implanted ions which prevents the fabrication of sub-micron, bipolar devices with very '~
precisely controlled sub-micron junctions. If precisely controlled junctions are not obtainecl the significant advantages which should be realizable from such non-ipitaxial, vertical, bipolar, integrated circuits cannot be achieved.
With the development of laser annealing it was found that junctions lying less than 0.35 microns from the surface of the body can be annealed with a laser beam without substantial thermal diffusion of the implanted ions. Thus, precisely controlled junctions could be realized.
In the Applied Physics Letter, February 1, 1978, pgs.
15 142-144, Gat and Gibbons teach that ion implantation annealing with substantially no thermal diffusion can be obtained for arsenic implanted regions at the surface of a semiconductor body by use of a continuous argon laser.
In the Applied Physics Letter, March l, 1978, pgs.
20 276-278, the same authors, taught that the method of the above described reference provides 100% electrical activation of the implanted ions. Again, the same authors in the ~pplied Physics Letter of September l, 1978, pgs. 389-391, taught that continuous wave laser, inen, krypton, provide better control of diffusion profiles since no melting of the body occurs as previously found in pulse systems.
However, in the Solid-State Technology Journal, 76~
dated November 1979, on pgs. 59-68, the author Gat, in con~unction with several others discussed the entire problem of continuous wave annealing and clearly taught on page 66, that deeply implanted ions; lying more than 0.35 microns from the surface of the device, cannot be annealed by laser techniques.
Other prior art which may be of interest can be found in the Applied Physics Letter, September 15, 1978, pgs. 542-544, where Williams et al, teach that contin-lous wave laser anneal-ing is proba~ly due to solid state epitaxial re-growth of damaged silicon and that dwell times o~ continuous wave argo~ lasers on the order of milliseconds provide adequate time and temperature to allow regrowth without melting and associated thermal diffusion of the circuit.
Also of interest Gat et al, in the Journal of Applied Physics, April 1979, pgs. 2926-2929, taught that heated semiconductor bodies could be utilized during continuous wave~ argon annealing and apparent-ly relates the laser energy to that required to raise the anneal portion from its bulk temperature to tha-t requixed for solid state epitaxial regrowth.
IBM*Te~hnical Disclosure Bulletin, Yol. 21, #10, March 1979, pg. 4040, also disclosed the use of the heated substrate during neodymimum laser annealing in order to provide more uniform absorption characteris-tics by the silicon substrate.
U.S. Patent 4,151,008 is representative of a substantial amount of literature which teaches that a laser beam having a pulse duration on the order of *Regls-tered Trade Mark one millisecond can be used for purposes of annealing surface areas of semiconductor devices.
However, although the prior art described the solution of a number of problems associated with laser annealing of semiconductor bodies none of them achieved the annealing, by laser technique, of implanted regions located more than 0.35 microns from the surface of the semi-conductor body without altering the ion implanta-tion curve.
SUMMARY OF THE PRESENT INVENTION
Accoxdingly, it is an object of the present invention to provide a method of annealing buried ion implanted regions in a semiconductor body without the undesirable effects of thermal diffusion of the implanted species. The method of the pre-sent invention includes irradiation of the implanted region by a continuous lasPr ha~ing an emission frequency at which ion implanted regions absorb strongly and at which the unimplanted regions are substantially unabsorbing.
It is another object of the present invention to pro~ide an ion implantation method of forming and annealing ion implanted regions more than 0.35 mi~
crons from the surface of the semiconductor body.
This annealing can be done by using continuous lasers whose emission wavelength is passed through the un-implanted portion of the body without any substantial absorption but is substantially absorbed in the buried implanted regions of the body. The absorp-tion of the laser emission wavelength causes solid state regrowth and electrical activation of the implanted species in the implanted region without substantial thermal diffusion of the implanted species.
BU-9-81~001 6~
It is stiLl another object of the present invention to provide a laser annealing method for ion implanted reg.ions in a semiconductor body without melting or deleteriously altering of the structure of the surface layers of the semiconductor body being annealed.
. The above and other objects of the present invention are achieved by a method of forming and annealing deep buried ion implanted regions in a semiconductor body comprising ion implanting im-purity ions into a crystalline semiconductor body to provide a buried region having a high con-centration of the impurity ions at a predetermined depth below the surface of the body, and anneal-ing the buried region by exposure to the light emitted by a continuous laser having an emission frequency to which the unimplanted body is sub-stantially transparent but which is substan-tial.ly absor~ed by the buried region.
The method of the present invention may be advantageously employed in the production of vertical bipolar integrated circuits.
The foregoing and other objects features ad vantages of the invention will be apparent from the following more particular description of the pre-erred embodiment of the invention as illustrated in the accompanying drawing.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a large cross-sectional partial view of an ion implanted region in a semiconductor body that can be treated by the present invention together 6~q5 with a curve showing the distribution, that is the concentration varia~ional depth, of the impurities forming the implanted region.
DESCRIPTION ~F THE PREFER~ED EMBODIMENT
Selected oxide isolation regions 11, of which only one is shown, are formed in a silicon body lO comprised of p-type material and having a resistivity in the order of lO ohm-centimeters.
The oxide region 11 preferably extends into the body up to 5 microns. The formation of such iso-lation regions 11 is well known to the semiconduc-tor art and basically employs etching and thermal oxidation techniques. Simultaneously an oxide layer 12, also, may be formed on the entire sur-face 13 of the body lO. Again the formation ofsuch oxidation techniques are well known to the semiconductor industry.
Following formation of the layer 12, the body 10 is subjected to a blanket ion implantation of phosphorous ions at an energy lavel of, for example, 400 keV and a dosage of 1 to 5 x lO15 centimeter2.
This ion implantation step is carried out using stan-dard ion i~plantation techni~ues well known to the art.
This ion implantation step creates an n-type surface region 14 in the body having an impurity distribution of the implanted ion as indicated by the curve 18.
The distxibution of the implanted ions in the re-gion 14 basically comprises a gaussian curve having an extended tail reaching toward the surface 13.
The region 14 may be roughly characterized into BU-9-81-OCl ~l~1!39~6~
three regions 15, 16 and 17. The most hlghly doped region 16 is usually located from .5 to 5 microns below the surface 13 and contains the peak concentration of ions which is approximately 102 atoms per centimeter3 However, the peak concentration could range from 1015 to 1021 atoms per centimeter3. The regions 15 and 17 bound-ing region 16 both contain a lesser concentration of ions than does region 16. Region 15 is term-inated by the surface 13 and region 17 is terminated by the p-n junction 19.
As is well known such ion implantation causes damage in the semiconductor lattice. This damage must be annealed out of the semiconductor lattice and the implanted ions themselves moved into sub-stitutional positions in the lattice where they are electrically active. To achieve this desired .
result the following method is employed. The body 10 is heated to about 300C. After the body reaches this temperature, the body is exposed to the emission spectra of a laser having an emission wavelength larger than 600 nanometers. Specifically, a continuous neodynimum: Yittrium Aluminum Garnet (Nd:Yag) laser, operating at a wavelength of 1.06 microns, meets this requirement and was used in the actual experiments. Tha laser beam impinging on the body, shown in Fig. 1, passes without effect through the oxide layer 12 which is transparent to the light ~mitted by this-laser. As the laser beam penetrates the underlying region 14 it be-comes absorbed by the damage sites within the semiconductor lattice. This absorption of the light heats the region, anneals the damage and causes the implanted dopant ions in the vicinity to become BU-3-81~001 9~
electrically active by causing the ions to move into electrically active substitutional positions in the lattice. This occurs without causing melting of the lattice.
The distribution of damage in the implanted region can, for all practical purposes, be con-sidered to have the same distribution as the implanted regions. Thus, the energy of the laser beam will be most strongly absorbed in the heavily implanted region 16 and less strongly ab-sorbed in the more lightly implanted regions 15 and 17.
It has been found that heating of the semi-conductor wafer to about 300C eliminates the effect of any instability in the laser beam and prevents damage to the wafer such as slip dislocation. This heatiny results in this improvement because it re- .
duces the effect of two deleterious mechanisms which are present in all continuous wave neody~ium-YAG
annealing, that is, the decreasing thermal conduc-tivity of the silicon as the substrate -temperature increases and the increasing absorption coefficient of the silicon with increasing temperature.
Initial analysis of devices treated in accor-dance with the above described invention shows thatthere are no structural defects within the first quarter of a micron of the region 14 in which the impurity concentration is less than 2xlOl9 ions per centimeter3. Conti.nuing research indicates that the defect free region extends considerably deeper.
This indicates that the laser treatment in accor-dance with the invention does not cause melting or the other adverse effects associated with the laser annealing treatments disclosed by the prior art discussed above.
Any of the laser emission spectra un-S absorbed by the implanted region passes throughto the substrate 10 and is only weakly abosrbed causing little effect.
Following this laser annelaing step base and emitter base regions 20 and 21 can be formed within the surface region 15 using additional ion implantation techniques. Specifically arsenic ions can be implanted at 25 keV to a level of 8 times 1015 ions per centimeter2 to create an emitter following which boron ions also lS ai: an energy level of 25 keV and a density of 4 times 1013 ions per centimeter2 can be deposited to create the base region. The implantation and activation of the implanted ions in the emit-ter and base region results in the formation of a bipolar integrated circuit as taught in U.5. Patent 4,111,720.
While the specific example has been described with respect to a npn type transistor it will be obvious that pnp transistors and complementary transistors can also be formed.
While the invention has been particularly shown and described with reference to the preferred em-bodiments thereof it would be understood by those skilled in the art that various changes in form and detail may be made therei~ without departing from the spirit and scope of the invention.
Typical high speed, high performance devices are taught in U.S. Patent 4,111,720 to A.E. Michel et al, which is assigned to the same assignee as the present invention.
This patent describes the formation of non-epitaxial, verticall bipolar, integrated circuits involving ion implantation. In the formation of such circuits thermal annealing has been found to be undesirable for it causes substantial ~-9~81-001 diffusion of the implanted ions which prevents the fabrication of sub-micron, bipolar devices with very '~
precisely controlled sub-micron junctions. If precisely controlled junctions are not obtainecl the significant advantages which should be realizable from such non-ipitaxial, vertical, bipolar, integrated circuits cannot be achieved.
With the development of laser annealing it was found that junctions lying less than 0.35 microns from the surface of the body can be annealed with a laser beam without substantial thermal diffusion of the implanted ions. Thus, precisely controlled junctions could be realized.
In the Applied Physics Letter, February 1, 1978, pgs.
15 142-144, Gat and Gibbons teach that ion implantation annealing with substantially no thermal diffusion can be obtained for arsenic implanted regions at the surface of a semiconductor body by use of a continuous argon laser.
In the Applied Physics Letter, March l, 1978, pgs.
20 276-278, the same authors, taught that the method of the above described reference provides 100% electrical activation of the implanted ions. Again, the same authors in the ~pplied Physics Letter of September l, 1978, pgs. 389-391, taught that continuous wave laser, inen, krypton, provide better control of diffusion profiles since no melting of the body occurs as previously found in pulse systems.
However, in the Solid-State Technology Journal, 76~
dated November 1979, on pgs. 59-68, the author Gat, in con~unction with several others discussed the entire problem of continuous wave annealing and clearly taught on page 66, that deeply implanted ions; lying more than 0.35 microns from the surface of the device, cannot be annealed by laser techniques.
Other prior art which may be of interest can be found in the Applied Physics Letter, September 15, 1978, pgs. 542-544, where Williams et al, teach that contin-lous wave laser anneal-ing is proba~ly due to solid state epitaxial re-growth of damaged silicon and that dwell times o~ continuous wave argo~ lasers on the order of milliseconds provide adequate time and temperature to allow regrowth without melting and associated thermal diffusion of the circuit.
Also of interest Gat et al, in the Journal of Applied Physics, April 1979, pgs. 2926-2929, taught that heated semiconductor bodies could be utilized during continuous wave~ argon annealing and apparent-ly relates the laser energy to that required to raise the anneal portion from its bulk temperature to tha-t requixed for solid state epitaxial regrowth.
IBM*Te~hnical Disclosure Bulletin, Yol. 21, #10, March 1979, pg. 4040, also disclosed the use of the heated substrate during neodymimum laser annealing in order to provide more uniform absorption characteris-tics by the silicon substrate.
U.S. Patent 4,151,008 is representative of a substantial amount of literature which teaches that a laser beam having a pulse duration on the order of *Regls-tered Trade Mark one millisecond can be used for purposes of annealing surface areas of semiconductor devices.
However, although the prior art described the solution of a number of problems associated with laser annealing of semiconductor bodies none of them achieved the annealing, by laser technique, of implanted regions located more than 0.35 microns from the surface of the semi-conductor body without altering the ion implanta-tion curve.
SUMMARY OF THE PRESENT INVENTION
Accoxdingly, it is an object of the present invention to provide a method of annealing buried ion implanted regions in a semiconductor body without the undesirable effects of thermal diffusion of the implanted species. The method of the pre-sent invention includes irradiation of the implanted region by a continuous lasPr ha~ing an emission frequency at which ion implanted regions absorb strongly and at which the unimplanted regions are substantially unabsorbing.
It is another object of the present invention to pro~ide an ion implantation method of forming and annealing ion implanted regions more than 0.35 mi~
crons from the surface of the semiconductor body.
This annealing can be done by using continuous lasers whose emission wavelength is passed through the un-implanted portion of the body without any substantial absorption but is substantially absorbed in the buried implanted regions of the body. The absorp-tion of the laser emission wavelength causes solid state regrowth and electrical activation of the implanted species in the implanted region without substantial thermal diffusion of the implanted species.
BU-9-81~001 6~
It is stiLl another object of the present invention to provide a laser annealing method for ion implanted reg.ions in a semiconductor body without melting or deleteriously altering of the structure of the surface layers of the semiconductor body being annealed.
. The above and other objects of the present invention are achieved by a method of forming and annealing deep buried ion implanted regions in a semiconductor body comprising ion implanting im-purity ions into a crystalline semiconductor body to provide a buried region having a high con-centration of the impurity ions at a predetermined depth below the surface of the body, and anneal-ing the buried region by exposure to the light emitted by a continuous laser having an emission frequency to which the unimplanted body is sub-stantially transparent but which is substan-tial.ly absor~ed by the buried region.
The method of the present invention may be advantageously employed in the production of vertical bipolar integrated circuits.
The foregoing and other objects features ad vantages of the invention will be apparent from the following more particular description of the pre-erred embodiment of the invention as illustrated in the accompanying drawing.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a large cross-sectional partial view of an ion implanted region in a semiconductor body that can be treated by the present invention together 6~q5 with a curve showing the distribution, that is the concentration varia~ional depth, of the impurities forming the implanted region.
DESCRIPTION ~F THE PREFER~ED EMBODIMENT
Selected oxide isolation regions 11, of which only one is shown, are formed in a silicon body lO comprised of p-type material and having a resistivity in the order of lO ohm-centimeters.
The oxide region 11 preferably extends into the body up to 5 microns. The formation of such iso-lation regions 11 is well known to the semiconduc-tor art and basically employs etching and thermal oxidation techniques. Simultaneously an oxide layer 12, also, may be formed on the entire sur-face 13 of the body lO. Again the formation ofsuch oxidation techniques are well known to the semiconductor industry.
Following formation of the layer 12, the body 10 is subjected to a blanket ion implantation of phosphorous ions at an energy lavel of, for example, 400 keV and a dosage of 1 to 5 x lO15 centimeter2.
This ion implantation step is carried out using stan-dard ion i~plantation techni~ues well known to the art.
This ion implantation step creates an n-type surface region 14 in the body having an impurity distribution of the implanted ion as indicated by the curve 18.
The distxibution of the implanted ions in the re-gion 14 basically comprises a gaussian curve having an extended tail reaching toward the surface 13.
The region 14 may be roughly characterized into BU-9-81-OCl ~l~1!39~6~
three regions 15, 16 and 17. The most hlghly doped region 16 is usually located from .5 to 5 microns below the surface 13 and contains the peak concentration of ions which is approximately 102 atoms per centimeter3 However, the peak concentration could range from 1015 to 1021 atoms per centimeter3. The regions 15 and 17 bound-ing region 16 both contain a lesser concentration of ions than does region 16. Region 15 is term-inated by the surface 13 and region 17 is terminated by the p-n junction 19.
As is well known such ion implantation causes damage in the semiconductor lattice. This damage must be annealed out of the semiconductor lattice and the implanted ions themselves moved into sub-stitutional positions in the lattice where they are electrically active. To achieve this desired .
result the following method is employed. The body 10 is heated to about 300C. After the body reaches this temperature, the body is exposed to the emission spectra of a laser having an emission wavelength larger than 600 nanometers. Specifically, a continuous neodynimum: Yittrium Aluminum Garnet (Nd:Yag) laser, operating at a wavelength of 1.06 microns, meets this requirement and was used in the actual experiments. Tha laser beam impinging on the body, shown in Fig. 1, passes without effect through the oxide layer 12 which is transparent to the light ~mitted by this-laser. As the laser beam penetrates the underlying region 14 it be-comes absorbed by the damage sites within the semiconductor lattice. This absorption of the light heats the region, anneals the damage and causes the implanted dopant ions in the vicinity to become BU-3-81~001 9~
electrically active by causing the ions to move into electrically active substitutional positions in the lattice. This occurs without causing melting of the lattice.
The distribution of damage in the implanted region can, for all practical purposes, be con-sidered to have the same distribution as the implanted regions. Thus, the energy of the laser beam will be most strongly absorbed in the heavily implanted region 16 and less strongly ab-sorbed in the more lightly implanted regions 15 and 17.
It has been found that heating of the semi-conductor wafer to about 300C eliminates the effect of any instability in the laser beam and prevents damage to the wafer such as slip dislocation. This heatiny results in this improvement because it re- .
duces the effect of two deleterious mechanisms which are present in all continuous wave neody~ium-YAG
annealing, that is, the decreasing thermal conduc-tivity of the silicon as the substrate -temperature increases and the increasing absorption coefficient of the silicon with increasing temperature.
Initial analysis of devices treated in accor-dance with the above described invention shows thatthere are no structural defects within the first quarter of a micron of the region 14 in which the impurity concentration is less than 2xlOl9 ions per centimeter3. Conti.nuing research indicates that the defect free region extends considerably deeper.
This indicates that the laser treatment in accor-dance with the invention does not cause melting or the other adverse effects associated with the laser annealing treatments disclosed by the prior art discussed above.
Any of the laser emission spectra un-S absorbed by the implanted region passes throughto the substrate 10 and is only weakly abosrbed causing little effect.
Following this laser annelaing step base and emitter base regions 20 and 21 can be formed within the surface region 15 using additional ion implantation techniques. Specifically arsenic ions can be implanted at 25 keV to a level of 8 times 1015 ions per centimeter2 to create an emitter following which boron ions also lS ai: an energy level of 25 keV and a density of 4 times 1013 ions per centimeter2 can be deposited to create the base region. The implantation and activation of the implanted ions in the emit-ter and base region results in the formation of a bipolar integrated circuit as taught in U.5. Patent 4,111,720.
While the specific example has been described with respect to a npn type transistor it will be obvious that pnp transistors and complementary transistors can also be formed.
While the invention has been particularly shown and described with reference to the preferred em-bodiments thereof it would be understood by those skilled in the art that various changes in form and detail may be made therei~ without departing from the spirit and scope of the invention.
Claims (9)
1. A method of annealing buried ion implanted regions in a semiconductor body comprising;
ion implanting impurity ions into a crystalline semiconductor body to provide in the body a buried region having a high concentra-tion of said impurity ions at a predetermined depth below the surface, and annealing said buried region by ex-posure of the body to the emission of a continuous laser having an emission frequency which is sub-stantially absorbed by the buried region and to which the remainder of the body is substantially transparent.
ion implanting impurity ions into a crystalline semiconductor body to provide in the body a buried region having a high concentra-tion of said impurity ions at a predetermined depth below the surface, and annealing said buried region by ex-posure of the body to the emission of a continuous laser having an emission frequency which is sub-stantially absorbed by the buried region and to which the remainder of the body is substantially transparent.
2. The method of claim 1 wherein there is further provided the step of heating the body during exposure of the body to said laser.
3. The method of claim 1 wherein said body comprises silicon and said implanted ions are phosphorous ions implanted at an energy level of 400 keV with a dosage of 1 to 5 x 1015 centimeter2.
4. The method-of claim 2 wherein said emission frequency of said laser is larger than 600 nanometers.
5. The method of claim 1 wherein said laser is a Yittrium Aluminum Garnet laser operating at a wavelength of 1.06 microns.
6. The method of claim 4 wherein said buried region lies between 0.5 microns and 5.0 microns below the surface of a body and the peak concentration of implanted ions in said body ranges from 1015 to 1020 ions per centimeter3.
7. The method of claim 2 wherein there is further provided after said annealing step the steps of ion implanting 2 base region and an emitter region in said buried region.
8. A method of annealing buried ion implanted regions in a semiconductor body without undesirable effects of thermal diffusion of said implanted region by a continuous laser having an emission frequency at which said ion implanted regions absorb strongly and at which the unim-planted regions are substantially unabsorbed.
9. A method of forming and annealing deep buried ion implanted regions in a semiconduc-tor body comprising;
ion implanting impurity ions into a crystalline semiconductor body to provide a buried region having its highest concentration of impurity ions at a predetermined depth of at least 0.35 mi-crons below the surface of the body, and annealing the buried region by ex-posure of said body to the light emitted by a continuous laser having an emission frequency greater than 600 nanometers to which the unim-planted body is substantially transparent but which is substantially absorbed by the buried region.
ion implanting impurity ions into a crystalline semiconductor body to provide a buried region having its highest concentration of impurity ions at a predetermined depth of at least 0.35 mi-crons below the surface of the body, and annealing the buried region by ex-posure of said body to the light emitted by a continuous laser having an emission frequency greater than 600 nanometers to which the unim-planted body is substantially transparent but which is substantially absorbed by the buried region.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/281,267 US4379727A (en) | 1981-07-08 | 1981-07-08 | Method of laser annealing of subsurface ion implanted regions |
| US281,267 | 1981-07-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1189768A true CA1189768A (en) | 1985-07-02 |
Family
ID=23076599
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000404043A Expired CA1189768A (en) | 1981-07-08 | 1982-05-28 | Method of laser annealing of subsurface ion implanted regions |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4379727A (en) |
| EP (1) | EP0069327B1 (en) |
| JP (1) | JPS5810822A (en) |
| CA (1) | CA1189768A (en) |
| DE (1) | DE3277264D1 (en) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5823479A (en) * | 1981-08-05 | 1983-02-12 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS5856409A (en) * | 1981-09-30 | 1983-04-04 | Toshiba Corp | Production of semiconductor device |
| US4698486A (en) * | 1984-02-28 | 1987-10-06 | Tamarack Scientific Co., Inc. | Method of heating semiconductor wafers in order to achieve annealing, silicide formation, reflow of glass passivation layers, etc. |
| US4571348A (en) * | 1984-08-08 | 1986-02-18 | General Motors Corporation | Reducing hydrogen content of vacuum deposited films |
| US4621411A (en) * | 1984-09-28 | 1986-11-11 | Texas Instruments Incorporated | Laser-enhanced drive in of source and drain diffusions |
| US4666557A (en) * | 1984-12-10 | 1987-05-19 | Ncr Corporation | Method for forming channel stops in vertical semiconductor surfaces |
| US5578520A (en) | 1991-05-28 | 1996-11-26 | Semiconductor Energy Laboratory Co., Ltd. | Method for annealing a semiconductor |
| US5766344A (en) * | 1991-09-21 | 1998-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming a semiconductor |
| JPH06124913A (en) * | 1992-06-26 | 1994-05-06 | Semiconductor Energy Lab Co Ltd | Laser treatment |
| JP3211394B2 (en) * | 1992-08-13 | 2001-09-25 | ソニー株式会社 | Method for manufacturing semiconductor device |
| JPH06232069A (en) * | 1993-02-04 | 1994-08-19 | Semiconductor Energy Lab Co Ltd | Manufacture of semiconductor device |
| GB9406900D0 (en) * | 1994-04-07 | 1994-06-01 | Philips Electronics Uk Ltd | Manufacture of electronic devices comprising thin -film transistors |
| DE19511251A1 (en) * | 1995-03-27 | 1996-10-02 | Siemens Ag | Bipolar silicon transistor |
| WO1999028960A1 (en) * | 1997-11-28 | 1999-06-10 | Matsushita Electric Industrial Co., Ltd. | Method and device for activating semiconductor impurities |
| US6417515B1 (en) | 2000-03-17 | 2002-07-09 | International Business Machines Corporation | In-situ ion implant activation and measurement apparatus |
| US6594446B2 (en) * | 2000-12-04 | 2003-07-15 | Vortek Industries Ltd. | Heat-treating methods and systems |
| CN100416243C (en) * | 2001-12-26 | 2008-09-03 | 加拿大马特森技术有限公司 | Temperature measurement and heat-treating methods and system |
| DE10393962B4 (en) | 2002-12-20 | 2019-03-14 | Mattson Technology Inc. | Method and device for supporting a workpiece and for heat treating the workpiece |
| WO2005059991A1 (en) * | 2003-12-19 | 2005-06-30 | Mattson Technology Canada Inc. | Apparatuses and methods for suppressing thermally induced motion of a workpiece |
| TWI237857B (en) * | 2004-10-21 | 2005-08-11 | Nanya Technology Corp | Method of fabricating MOS transistor by millisecond anneal |
| US7989888B2 (en) * | 2006-08-31 | 2011-08-02 | Infineon Technologies Autria AG | Semiconductor device with a field stop zone and process of producing the same |
| US8454356B2 (en) * | 2006-11-15 | 2013-06-04 | Mattson Technology, Inc. | Systems and methods for supporting a workpiece during heat-treating |
| FR2921752B1 (en) * | 2007-10-01 | 2009-11-13 | Aplinov | METHOD FOR HEATING A PLATE BY A LUMINOUS FLOW |
| WO2009137940A1 (en) | 2008-05-16 | 2009-11-19 | Mattson Technology Canada, Inc. | Workpiece breakage prevention method and apparatus |
| FR2938116B1 (en) * | 2008-11-04 | 2011-03-11 | Aplinov | METHOD AND DEVICE FOR HEATING A LAYER OF A PLATE BY PRIMING AND LUMINOUS FLUX |
| WO2011096326A1 (en) * | 2010-02-04 | 2011-08-11 | 富士電機システムズ株式会社 | Process for production of semiconductor element, and device for production of semiconductor element |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4151008A (en) * | 1974-11-15 | 1979-04-24 | Spire Corporation | Method involving pulsed light processing of semiconductor devices |
| US4111720A (en) * | 1977-03-31 | 1978-09-05 | International Business Machines Corporation | Method for forming a non-epitaxial bipolar integrated circuit |
| US4230505A (en) * | 1979-10-09 | 1980-10-28 | Rca Corporation | Method of making an impatt diode utilizing a combination of epitaxial deposition, ion implantation and substrate removal |
| US4269631A (en) * | 1980-01-14 | 1981-05-26 | International Business Machines Corporation | Selective epitaxy method using laser annealing for making filamentary transistors |
| US4318752A (en) * | 1980-05-16 | 1982-03-09 | Bell Telephone Laboratories, Incorporated | Heterojunction semiconductor laser fabrication utilizing laser radiation |
-
1981
- 1981-07-08 US US06/281,267 patent/US4379727A/en not_active Expired - Lifetime
-
1982
- 1982-05-20 JP JP57084092A patent/JPS5810822A/en active Granted
- 1982-05-28 CA CA000404043A patent/CA1189768A/en not_active Expired
- 1982-06-29 DE DE8282105775T patent/DE3277264D1/en not_active Expired
- 1982-06-29 EP EP82105775A patent/EP0069327B1/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| US4379727A (en) | 1983-04-12 |
| EP0069327A3 (en) | 1984-09-12 |
| EP0069327B1 (en) | 1987-09-09 |
| JPS5810822A (en) | 1983-01-21 |
| DE3277264D1 (en) | 1987-10-15 |
| JPS6244849B2 (en) | 1987-09-22 |
| EP0069327A2 (en) | 1983-01-12 |
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