CA1217261A

CA1217261A - Method and apparatus for sending a data message to a selected station during a silent interval between ringing

Info

Publication number: CA1217261A
Application number: CA000457423A
Authority: CA
Inventors: Carolyn A. Doughty
Original assignee: American Telephone and Telegraph Co Inc
Current assignee: AT&T Corp
Priority date: 1983-07-12
Filing date: 1984-06-26
Publication date: 1987-01-27
Also published as: WO1985000487A1; DE3382242D1; EP0148836A1; US4551581B1; EP0148836B1; JP2584433B2; US4551581A; JPS61500089A

Abstract

METHOD AND APPARATUS FOR SENDING A DATA
MESSAGE TO A SELECTED STATION DURING A
SILENT INTERVAL BETWEEN RINGING

Abstract For use with a telephone switching system serving a plurality of stations and having a central processor for generating data messages and a ringing circuit for generating ringing signals to a selected station, method and apparatus are disclosed for sending a data message to a selected station during a silent interval between ringing signals. The apparatus includes a detector and a sender.
Responsive to a first ringing signal, the detector generates a status signal representative of the silent interval between ringing signals. During the silent interval, the sender sends to the selected station a frequency shift keyed signal representative of the data message. (FIG. 1).

Description

METHOD AND APPARATUS FOR SENDING A DATA
MESSAGE TO A SELECTEO STATION DURING A
SILENT INTERVAL BETWEEN RINGING

Te~h~i ~
This invention relates to communicati~ns systems serving a plurality of stations and particularly to a method and apparatus for sending a data messaye from a telephone switching system to a selected station~
Background of the Invention . ~
In the past, certain special services have been made available to telephone customers to provide them with features which render their telephone usage more convenient and more flexible. For example, these services include call screening, calling number identification, automatic recall and callback, customer-originated call tracing, and others in which special service information is sent to a selected station. This special service information may include a special service indication, the directory number of a called/calling station, personal messages, etc.
Historically, this special service information has been sent to an off-hook station in the form of audio messages from a telephone office announcement system. This is particularly annoying when the customer wants to ~5 ~ 2 -screen calls prior to anSwering and respond to only designated parties. In addition, a customer may have initiated several special services at the same time in which the customer is rung bac~c. When rung back~ the customer wants to know the identity of the special service or associated party before responding to the ring back signal.
~ nother solution to providing the customer with special service information is to have a separate data communication link associated with the customer station.
~owever, unless the data link is used with other data processing services, this is a very inefficient and costly approach.
~ f_the Invention In accordance with an aspect of the invention there is provided in a telephone switching system serving a plurality of stations and having a central processor for generating a data message and a ringing circuit for trans-mitting a first and a second ringing signal to a selected one of said stations, said first and second ringing signals having a silent interval therebetween, apparatus Eor send-ing a data message to a selected station during the silent interval between ringing signals; comprising detector means responsive to said first ringing signal for generating a status signal representative of said silent interval between said first and second ringing signals; and sender means responsive to said status signal for sending to said selected station a first frequency shift keyed signal representative of said data message during said silent interval.
In accordance with another aspect of the invention there is provided in a telephone switching system serving a plurality of stations and having a c~ntral processor for generating special service information and also having a , .~

7~
- 2a -ringing circuit for transmitting to a selected one of said stations intermittent ringing signals separated by silent intervals, a method for sending special service lnformation to a selected station during a silent interval between intermittent ringing signals; comprising the steps of detecting a first one of said ringing signals to said selected station; detecting a first one of said silent intervals after said first ringing signal; and sending a signal representative oE said special service in~ormation to said selected station during said first silent interval~
In one illustrative embodiment of ~he invention, the arrangement comprises a control uni~ and a plurality of line units each associated with an individual ringing circuit~ The central processor of the switching system generates a data message to the control unit t which includes line unit identification and special services information. Each line unit comprises a ringing detector t universal asynchronous receiver transmitter (UART3, and a C. A. ~ouyhty 2 frequency shift keyed ~FSK) signal modulator. Responslve to a ringing signal to a selected station from an associated ringing circuit, the ringing detector ascertain~ the sllent in~erval between ringing signals and so indicates to the control unit~ The control unit then loads the UART with the special service information which is serially sent to the FSK signal modulator. The modulator then sends to the selec-ted station during the silent interval between ringing signals a frequency shift keyed signal representative of the spe~ial service information.
Brief Description of the Drawin~
The inven-tion may ~e better understood from the following detailed description when read with reference to the drawing in which:
FIG. 1 shows, in block diagram form, a typical stored program-controlled telephone switching system equipped with a data transmitter for sending data messages to a selected station during the silent interval between ringing signals;
FIG. 2 shows a more detailed block diagram of the contr~l circuit of the data transmitter;
FIG. 3 depicts the memory l.ayout of an individual line unit status block in the data memory o~
the control circult;
FIG. ~ shows a more detailed block diagram of the line unit selector for translating line unit address signal from the control circuit to a dedicated enable signal for the identified line unit;
FIG. 5 shows a more detailed block diagram of ona of a plurality of line units of the data transmitter;
FIG. 6 shows a detailed flow diagram of an input interrupt routine used by the transmitter to receive and store data messayes from the central processor;
FIG. 7 shows a flow diagram of a routine utilized by the data transmitter to increment a software real-time clock count;

C. A. ~oughty 2 FIG. 8 shows a flow diagram of a base le~el program utilized by the control unlt of the transmitter to service each of the line unlts;
FIGS. 9 through 15 show a deta1led ~low dlagram of the routines and subroutines utilized by the control unit to service the line units; and FIG. 16 graphically depicts idealized ringing and data message signals to a selected station with respect to time as well as the state of the line unit status block.
Detailed Description .. _ . .. .
The general organization of a system employing the inv~ntion is illustrated in the block diagram of FIG. 1 which shows a typical telephone switching office 100 serving a plurality of customer stations such as 101 and 102. By way of example, the telephone switc'ning office is suitably an electronic program-controlled switching system of the type disclosed in U.S.
Patent No. 3,570,008, to R. W. Downing et al. of March 9, 1971, and also disclosed in The Bell System Technical Journal, V. 43, ~o. 5, Parts 1 and 2, September, 1964.
, ~
These citations may be referred to for a more comprehensive understanding of the construction and operation of the switching system but a brief description will be given herein to illustrate how the invention functions with the switching system.
Switching offic~ 100 comprises line link network 104, trunk link network 105, and a stored program-controlled processor 108. Line link network 104 provides the terminations for customer stations such as 101 and 1O2J while trunk link network 105 provides terr.linations for interoffice trunks such as 132 which is terminated at switching office 100 via trunk circult 131.
The trunk link network also provides terminations for ringing circuits such as 1~3 and 134 and other miscellaneous service circuits which lave not been shown to simplify the drawing.

C. A. Doughty 2 1~'7;~

Under the control of central processor 108, any customer may be selectiv~ly connected through th~ line and trunk link networks to a ringing circuit whicn transmits int~rmittent ringing signals to the c~nnected station.
Between each pair of ringing signals is a silent interval or, more particularly, a period of time in which a ringing signal is not present. Consequently, a called station commonly receives a two second burst of a 20-hertz ringiny signal followed by four seconds o~ silence. This sequence of ringing and sil~nce is normally repeated until the customer at tne called station answers or the caller abandons the call. Connected to each of the ringing circuits is ringing source 135 for generating the rlnging slgnals. Coupllng the ringing circults to the trunk lln~
1~ network is data transmitter 120 WhiCh sends data messayes from processor 10~ to the connected station durin~J the silent interval between ringing signals. These messages include special service informa~ion such as the directory number of t~ie calling station. The lin~ and trunX link networks are interconnected via wire junctors lOv to per~it the interconnection of lines, trunks, and service circuits for call processing under the control of processor 108. Line link network 104 is also interconnected by junctor circuits such as 107 to complete and supervise intraof~ice calls.
The majority o~ the logic, control, storage, supervisory, and translatlons functions required for the operatlon of this system are performea by cen~ral processor 1~. A typlcal central processor sultable for 3~ use in the illustratlve swi~chlng system is descri~e~ in The Bell System Technical Journal, Vol. ~, No. 2, .
February, lY77. Processor 1~ is a data processing facility and can functionally be divi~ed into central control 109, call store 110, program store 111, and input-output proc~ssor 112, plus maintenance apparatus whicn has not been shown to simplify the drawing.

C. A. Doughty 2 ~LZ~

Call store 110 is a memory for storing translation and routing informa~ion in addition to temporary information relating to calls in progress and special services. For example, this temporary information includes the busy/idle status of circuits and stations, the directory numbers of calling and called stations, special service indicators, etc.
Program store 111 is a memory or storing program instructions which direct the central control to sequentially perform its many functions.
Central control 109 is the information processing unit of the system that executes the program instructlons stored in program store 111 using temporary information stored in call store 110.
Input-output processor 112 interfaces with periphexal units such as data transmit-ter 120 via serial data links. For example, responsive to a message from central control 105, the I/0 processor sends the message to data transmitter 120 via serial data link 117.
Processor 108 interfaces with lines, trunXs, and service circuits via scanners 113 throuyh 115 and distributor 116. Distributor 116 responds to an order over bus system 103 from the central control to apply pulses to distribution points connected to various peripheral units of equipment~ For example, in response to an appropriate order, distributor 116 signals over conductor 150 to actuate apparatus such as a relay in trunk circuit 131.
Scanners 113 through 115 are used -to gather information for the central control by monitoring leads connected to the various peripheral units and customer stations. Thus, when a trunk circuit such as 131 c~anges state as a result of a seizure from a distant oriyinating switching office, a signal is transmitted via conductor 151 to scanner 115. Similarly, scanner 115 recognizes c~lanyeS of sta-te in rinying circuits such as 133 and 1~4 in order -to ascertain a ring-trip signal C. A. Doughty 2 - ~2~7~

from a called customer station. Scanners 113 and 114 r~cognize the off-hoo]c/on hook condition of customer stations such as 101 and 102. Periodically, ~he scanners are addressed by central control 109 over bus system 119 to determine the state of the peripheral units and, customer stationsO
In accordance with this invention, data transmitter 120 sends a data message from central processor 10~ to a selected on-hoo]c st~tion during the silent interval bet~een ringing signals. As previously suggested,~these messayes include information to provide special cu~tomer services. For example, let it be assumed that the customer at station 102 desires to call the customer at station 101. The customer at calling station 102 }ifts his receiver off hook at ~hich time dial tone is returned to the station, The customer then dials or enters the directory number o called station 101, and central control 109 reads the dialed digits received by a digit receiver ~not shown) and stores them in a temporary call register in call store 110. Under the control of a digit analysis program and throuyh the use of translation tables in call store 11~, central control 10~ determines the disposition of the calL. Recognlzing that the dialeQ
digits correspond to the directory number of called

2~ station 101, central control translates the directory number to an equipment number which designates the termination of called station 101 on the line link network. A ringing circuit such as 1~3 is then connected through the line and trunX linX networks to called station 101.
In this illustrative embodiment, called customer station 101 has been provided with a plurality of speclal services which includes displaying the directory number of the calling station. To display the directory number of calling station 102 at called station 101, a data message which includes the directory number of calling station 102 is sent by central control 10~ ~o data transmitter 120.

~Z~7~
., Connected between ringlng circuit 133 and trunk link net-work 105 the data transmitter in turn processes the data message and sends to called station 101 the directory number of calling station 102. The directory number of calling station 102 is then exhibited at display 118 of called station 101 which is a LED or the like display station se~. Reference to copending Canadian Patent application serial number 457,421 of C.A. Doughty filed on June 26~ 1984, entitled "Method and Apparatus or Displaying a Data Message during a Silent Interval between Rin~ing", is made for a description of such a display station set.
Data transmitter 120 comprises a plurality of line units such as 121 and 122 and controller 125 which com-prises line unit selector 123 and control circuit 124.
Line unit 121 connects the tip and ring leads of ringing circuit 133 to terminations on trunk link network 105 which are selectively connected to the tip and ring leads of called station 101. Thus t coupled to the tip and ring leads of ringing circuit 133 and called customer station 101, line unit 121 transmits the directory number of calling station 102 as well as other special service information to called station 101 using well-known frequency shift keyed signaling. The frequency shift keyed signal represents the high and low logic levels o special service information which is received from control circuit 124 via data bus 152. Line unit 121 is selected to receive this special service information in response to an enable signal from line unit selector 123.
Control circuit 124 is the processing unit of data transmitter 120. In response to a data message which includes line unit identification~ a data character count, and special service information from processor 108/ control circuit 124 sends a line unit address signal to line unit selector 123 via address bus 154. The line unit selector translates the line unit address signal to an enable signal which is sent to the identified line unit via a dedicated conductor such as E0 conductor 155 to line .

C. A. Doughty 2 12i~
, g unit 121. Similarly, enable signals are sent to line unit 122 via dedicated El5 conductor 156. Common to all the line units are read (R), write (W), address bit (AO), and clock conductors 157 through 160. The signals on these conductors from control circuit 124 cause a selected line unit to perform various functions.
Depicted in FIG. 2 is a block diayram of control circuit 124 which performs three basic operations: namely, it receives messages from processor 1013, main.ains a software clock, and services line units. Control circuit ~omprises rnicroprocessor 201, program memory 202, data memory 203, address decoder 204, universal synchroncaus asynchronous receiver transmitter (USART) 205, real-time clock 20~, and baud rate generator 207 which are all well-Xnown and cornrnercially availa,ble units. Also included are data bus 152 and address bus 154 which interconnect the various units as shown. Comrnon to ~he various units of the control circuit are read (R) and write (W~ conductors 157 and 15~3 for conveying read and write signals from microprocessor 201 to the other aevices of the control circuit as well as the line units.
Individual select (S) conductors 252, 253, and 254 from address decoder 204 are used to access program memory 202, data memory 203, and USART 205, respectively.
Data memory 203 is a temporary and erasable memory such as a random access memory for storing information related to specific calls in progress. The data memory is segmented into status blocks each dedicated to a single line unit and an additional block for storing program variables.
Depicted in ~IG. 3 is the layout of a single lin~ unit status blocX (LUSB) whicl~ is segmented to store a LUSB state, a timing count, a data c~naracter count, and data characters.
Prograrn memory 202 is a permanent memory such as an erasable proyrarnrnable read only melnory ( EP~OM ) and stores program ins~ructions which direct C. A. Doughty 2 .'7~

microprocessor 201 to sequentially perform its many functions.
Microprocessor 201 is the informati~n processing unit of the control circuit and executes the program instructions stored in program memory 202 to send line unit address signals and special service information to the various line units. Furthermore, receiving a data message from processor 10~, microprocessor 201 loads the data character count and special service information portions of the message into an identified message line unit status block.
Universal synchronous asynchronous receiver transmitter (USART~ 205 interfaces with microprocessor 201 to receive serial data messages from processor 108. These serial data messages are converted by USART 205 to a parallel format ~hich may be interpreted by microprocessor 201. As previously described, these serial format data messages include line unit identi~ication, a data character count, and special service information.
The special service information includes data characters whic'n represent t~e individual digits of a directory number and a message type character which designates the directory number as that o~ a calling station.
Responsive to address signals received on address bus 154 from microprocessor 201, address decoder 204 selects program mernory 202, data memory 203, and USART 205 to receive address signals on address bus 154 and data on data bus 152 in a well-known manner.
Real-time clock 206 and baud rate generator 207 interact with each other to generate a plurality o interrupt and timing signals 'naving various bit ra-tes.
Baud rate generator 207 generates clock signals having different bit rates. For example, one clock signal has a bit rate of 16 x 300 baud and is sent to all the line units via conductor lG0. Another clock signal having, for example, a bit rate of 1~ x 1200 baud causes USART 205 to receive 1200 bau~ serial messages from processor 108.

C. A. Dou-~hty 2 Responsive to the 16 x 1200 baud clock signal real-time clock 206 generates periodic interrupt signals ko microprocessor 201 via logic OR gate 20~. This interrupt siynal c~uses the microprocessor to advance the count of a software real-time clock in the program variables portion of data memory 203. Microprocessor 201 also receives another interrupt signal from USART 205 via logic OR
gate 203 when a complete data character (byte) has been received from processor 108.
As previously mentioned control circuit 124 performs tnree basic operations as a result of program instructions in program memory 202 for microprocessor 201.
The first operation involves receiving a data message from processor 108 and storing the data character count and special service information of the message into the line unit status block of the identified line unit. Receiving the first character of the serial data message via data link 117 USART 205 stores the byte of data in a receive buffer register ~nd sends an interrupt request signal to microprocessor 201. This causes microprocessor 201 to call an input interrupt routine which is stored in progra~
memory 202.
Depicted in FIG. 6 is the I~PUT I~TERRUPT
routine which controls the loading of the data message characters into the identified line unit status block.
Under the control of this routine microprocessor 201 addresses USART 205 in a well-known manner and reads the byte stored in -the receive buffer reyis-ter of USART 205 (block 601). Recognizing this byte as the first character of a message (block 602) which is the line unit identification the inicroprocessor stores the line unit identification in the program variables blocX (block 603) and sets the state of the identifie~ line unit status block to "idle" (block 604). Control is then returned to the base level program which services the other line units until another interrupt signal is received from USART 205.

C. A. Doughty 2 ~2~

Xeceiving the second`character of the message, U~AXT 205 sends another interrupt signal to microprocessor 201 to read the USART buf~er. Again, the interrup, routine is called to cause the microprocessor to read the character in the USART buffer (block 601). The second character of the message is the data character byte count and is store~ in the clata count portion of the identified line unit status block (block 605). The data count speciEies the number of subsequent data characters to be received for this message and is decremented each time a character is received until the entire message has been received ~block 606). The data count is also used by the microprocessor to specify the length o~ the message whlch is sent to the selected sta~lon. Once aga1n, l~ control is returned to the base level program un~i~. the next byte is loaded in the USAR'r bufrer.
I'he next character o~ the message is speclal service in~ormatlon such as the message type that is to be sent to the selecte~ statlon. The INPU~r INIrEK~UPT rout1ne is called agaln, and the character is stored in the data segment o~ the status block ~or the identl~led line unlt.
Thls operat1on contlnues unt11 all o~ the speclal service informatlon of the data message such as the indlvl~ual dig1ts ot the call1ng statlon dlrectory num~er hava been recelved a~ter w~ich the state of the line unit status block is advanced to "ringing detect" (blocX 6U7).
Microprocessor 201 then sends llne unlt address and read slgnals to reset the ringing detector of th~ identl~led line unlt (block 6~).. Control is then returned to the base level program.
The second operatlon per~or~ea by control clrcult 1~4 is to advance the count of a so~tware real~
time clock, whlch is a program variable stored in data memory 2~. Responsive to a periodic interrupt signal from real-tlme cloc~ ZU~ whlch is generated, for example, every lU mllliseconds, mlcropro~essor 201 calls a SO~T~AXE
CL~CK il~'l'ERRUPT routina which is depicted in FI~. 70 As ~.

C. ~. ~oughty 2 ~Z~

shown, this routine causes the microprocessor to increment t'ne software real-time clock count in the program variables portion of data me~ory 203. This real-time clock count and the timinc3 count in each of the line unit status blocks are then compared to per$orm various,tlming and waltlng functlons whlch will be desc~ibed hereinaf-ter.
The third operation performed by control circult 124 is to periodically service each one o~ a plurality o~ llne un1ts based on the state of the line 1~ unit status bLock. These services will be descri'oed after a further description of data transmitter 120.
Controller 125 of the data transmitter also comprises line unlt selector 12~ which is depicted in FIG. 4. Line unlt selector 1~3 translates bits Al through ~15 o~ a line unit address signal on address bus 154 from rnicroprocesSor 201 ~o a dedicated enable signal for tne identifled line u~it. Line unit selector 123 comprises well-kno~n and commercially available logic gates 401-403 and two, 3 to-8 decoders 404 and 405 which are connected to translate 15 bits of a 16-bit address signal to a dedicated enable signal for one out of 16 possible line units. With access to 15 bits of a typical 16-bit address bus, logic A~D gate 401 is responsive to the upper 11 bits (A5-A15) of address bus 154 to select a valid line unit 2S address field. When gate 4Ql is active, logic A~D
gates ~02 and 403, along with decoders 4~4 and 405, are actlve to translate address bits Al through A4 to a line unit enable signal on one of dedicated line unlt conductors E0 through ElS. Responslve to address blt A0 30 vla A0 conductor 1~ ~FIG. 1~, the enabled line unlt assumes one o~ several states as will be descrlbed herelna~'ter.
~ ata transmi~ter 1~0 also comprlses a plurallty o~ llne unlts such as 121 whlch is deplc-tea in FIG. 5.

3~ Line unlt 121 connec~s tlp and ring Leads 5~0 and 5~1 o~
rlnging circult 133 to those o~ called statlon 101. Line unlt 121 detects rlnging slgnals on the ring lead as well C. A. ~ougnty 2 ~17~

as the silent interval between rlnging signals. During the sllent lnterval, the l1ne unlt sends to the on-hook called station a frequency shl~t keyed slgnal wnlch represents the characters o~ the speclal service 5 in~orma~lon. Included in t~lls speclal service in~orrnatlon is the type and length of the message. The irst character sent is t~e message ~ype which, in this em~odiment, specl~les a calling statlon directory num~er.
The second character represents the length o~ -the rnessase to be sent to the called statlon. The message length is derived by-the microprocessor from the data character count stored in the identi~ied line un1t status block.
After the rnessage length character are characters whlch represent the diyits of the directory number. Following 1~ th~ directory num~er characters is a check sum or other error detection character which is used to detec-t errors in transmissiorl. In this illustrative embodiment, the speciai serYice information represents the directory number of the calling station but may represent the directory number of a called station or incluae another special service indicator, a personal message, the time of day, etc.
As shown in E'IG. 5, line unit 121 comprises ringing ~etector 501, microprocessor interface 502, 2~ coupler 5U~ and sender 5~U ~ihlch comprlses unlversal asynchrorlous recelver transmitter ~UART) 503 and fre~quency~shift-keyed ~FS~J modem 504. Ringirlg detector 501 comprlses comparator 5~ and latch 50/ such as an SR-type fllp-flop for detectlng a ringing slgnal as 3U ~iell as the sllent interval bet~een rlnging slgnals on rirlg lead 550. Generated by the ringing circuit, this ringing signal typically cornprises a 20 hertæ, 86 volt R~l~
sinew~va superimposed on -4~ volts. Comparator 50G which is a commercially available device is biased to change state and "set" flip-flop 507 when a voltage such as -100 volts is presen-t on ring lead 550. This predeterMined voltage l~vel is established at the plus input terminal of C o A . ~ouyhty 2 the comparator by voltage divider resistors 510 and 511 which are serially connected between positiv~ and negative potential sources 512 and 513, respectively. The voltage on the ring lead is applied to the negative terminal of 5 the comparator via voltage divider resistors 50~ a~d 509 which are serially connected between ring lead 550 and positive potential source 512. In addition, filter capacitor 512 is connected to voltage divider resistors 508 and ~09 to prevent spurious voltage spikes from triggering the comparator. Thus, when a ringing signal is present on ring lead 550, comparator 506 sets flip-flop 507 via the S input terminal. Microprocessor interface 502 periodically resets the flip-flop via the R
in~ut terminal and RESET conductor 552 to detect the silent interval between ringing signals. The state of flip-flop 507 is present on the Q output terminal and is applied io the microprocessor interface via conductor 553 Hence, once ringing has been detected and the flip-flop has not been set for a predetermined interval such as 90 milliseconds, it is assumed that a silent interval between ringing signals has been entered.
In response to a combination of read, write, enable, and address signals from the line unit selector and control circuit, microprocessor interface 502 causes the line unit to assume one of two modes (control and data) and perform various functions. The interface reports the ~tate of the ringing detector and UA~T on respective bits D7 and D0 of data bus 152 when requested by the control circuit. Each line unit is controlled by line unit selector 123 and microprocessor 201 via control signals received by microprocessor interface 502 on enable (E0), read (R), write (~), and address bit A0 conductoxs 155 and 157 through 159. In addition, data is transferred from microprocessor 201 to the line unit via -data bus 152.

C . A . Doug}lty 2 The microprocessor interface comprises logic gates such as A~D gates 514 throuyh 517 and well-known three-state buffer devices 518 and 519 which are connected as shown. Decoding read, write, enable, and addr0ss signals from line unit selector 123 and control unit 124, logic A~D gates 514 through 516 generate load, set, and reset signals on correspo~ding conductors 558, 557, and 552. In addition, loglc AND gate 517 causes t'nree-state devices 51~ and 51~ to gate the state of ringing detector 501 and U~RT 503 onto bits D7 and DO o~ data bus 152 vi~ conductors 554 and ~56, respectively.
The mode of each line unit is controlled via address signal bit AO which assu~les either a high ("1"~ or a low ~"0") logic level. Thus, address signal bit AO
1~ deslgnates either an odd ~"l") or an even ("O") address.
~emaining bits Al through hl~ of the address siynal from the microprocessor are interpreted by the line unit selector to send a dedicated enable signal to the identi~ied line unlt. The enable, address b1t AO, rea~, 2~ an~ write signals are translated by interface 5~ to c~use ring detector 5~1, U~R~' 50~, and FSlC modem 5~4 to perform their various functiorls. When the microprocessor "reads"
an odd address bit AO of an enabled line unit, the line unit causes several status bits such as DO and D7 to be gated on the data bus. Status bit DO represents the state of the transmit buffer register of UART 5~3, whereas status bit D7 represents the state of ringing de-tector flip-flop 5U/~ ~en status blt D7 is "set", a ringing signal was detected on the ring lead since the last reset 3~ slynal. ~en status blt D7 is "reset", a ringing signal has not been detected on the ring lead since the last reset signal. Simllarly, a "set" status bit DO represents that the transmit buffer register of UART 5~ is empty, and a "reset" bit represerlts that data is in the transmlt 3~ bu~er register of the U~RT.

C. ~. vougnty 2 - ~.2~'7~
, When the microprocessor "wr1tes" an odd address blt A0 of an enabled line unit, the interface causes data on data bus 1~ to be written into the transmlt buf~er register o~ t~e U~K'I' by sending a load slgna1 via L~A~
conductor 5~.
Wrltlng and reading an even address blt A0 causes the line unlt to assume one of two modes.
"Readlng" an even ad~ress blt A0 causes tl~e line unlt to assume a control mode, thereby resetting ringing 1~ detector 501, UART 5U~, FSK modem via RESET conductor 552.
"Writing" an even address bit A0 causes the line unit to assume a data mode, thereby setting the FS~ modem via S~T
conductor 557. This causes the FS15 modem to generate a single frequency FSK signal.
Universal asynchronous receiver transmitter (UAP~Tj 50~ is a well-known and commercially avalla~le device for converting parallel ~ormat data on data bus 15 to a serial format for F~K modem 5U~. Responsive to ~he load s1gnal from interface SU~, a parallel format data byte is gated into ~he transmlt buf~er register of U~R~l~ 5ui in a well-known manner. In response to t~le bit rate clock signal on conductor 1~, the UAK~l~ serlally shl~ts the data byte out of the transmlt buI~er register in-to F~K modem ~U4 on conductor 5~Y, agaln, ln a well-~3 kno~n manner. ~rnen all o~ -the data byte has been shl~ted out o~ the transmlt bur~er register, tne U~l' sends a bu~er empty slgnal to the interface vla conduc~or 5~.
Thls bu~er empty signal lS then gated onto bit D~ o~ the bus by three-state bu~er 51~ vla conductor 5~. When a ~u reset slgnal is recelved from the inter~ace, tne UAK'l`
transmlt bu~er register is cleared, and a bu~er empty signal is returned.
~ SK modem 5~4 is a well-known and con~ercially available modulator and demodulator w~lich generates a frequency shift keyed signal representa~ive of the logic levels of the data byte receive~ from U.~RT 503. Receiving a "set" signal from the interface causes the modem to send C. ~. ~oug~lty 2 7~

one of the two FSK frequencies to the called station via coupler 505. Receiving a "reset" signal causes the modem to stop transmission of any FSK signal.
Coupler 50~ applies the FSK slgnal from modem 504 in a balanced manner to the tip and ring leads of ringing circuit 133 and called station 101. The coupler comprises low-impedance coupling transformers 5~G
and 531, operational amplifiers 532 and 5~3, feed-bac~
resistors 534 through 537, and coupling capacitors 53S and 5~3 for the operational amplifiers connected as shown.
The secondary wlnding of transformer 530 is serially connected to RING lead 550 and presents a low impedance to the 20 hertz ringing signal. Serially connec~ed between the output of operational amplifier 532 and ground, the primary of transformer 530 magnetically couples the amplified FSK carrier signals on conductor 570 fram amplifier 522 which amplifies the FSK signals from FSK
modem 504. Likewise, transformer 531 and operational amplifier 533 ~re connected to TIP lead 551 to apply the FSK siynal on conductor 571 from inverter 521.
Inverter 521 inverts the FSK signal from FSK modem 504 5uch as to have an amplitude equal in magnitude and opposite in polarity to the F~K signal on conductor 570.
Tllus, the two FSK signals are applied in a balanced manner to the tip and ring leads of the called station during the silent interval between ringing signals.
To illustrate the operation of this novel arr~ngement for sending special service information such as the directory number of the calling station to the called station during the silent interval be~ween ringing signals, the reader's attention is directed to the flow diagram of FIGS. ~ through 15. Depic-ted in FIG. 8 is the base level program stored in program memory 20~, whlch is executed by microprocessor 201. As a result of this program, the microprocessor periodically services each one of a plurality of line units 0 t}lrough (n). E'or example, to service line unit 0 (121), t~le microprocessor calls a C. ~. Doughty 2 6~

LINE UNI'r routine w~lich is depicted in FIG. 9. The microprocessor first determines the state of the line unit status block (LUSB) in data memory 203 for the particular line unit (block 901). In this illustrative embodiment, the LUSB state may assume any one of six possihle states:
"idle", "ringing detec~", "silent interval detec~", "long silent interval confirm", "carrier send", and "data send".
Havlng determined the state of the line unit status block, tne microprocessor calls an associated subroutine (blocks 902 through 907).
The IDLE subroutine is depicted in FIG. 10.
When the line unit status block is in the 'idle" state, the associated line unit and ringing circuit have not been connec~ed to a called station, and no action on the part of the line unit is required. Control is immediately returned to the LINE UNIT routine which, in turn, causes the microprocessor ~o call the LINE UNIT routine for the next line unit as depicted in the base level program cycle of FIG. ~.
The DETECT ~INGI~G subroutine is is depicted in FIG. ll. ~en the line unit status block is in -the "ringing detect" state, processor 10~ has connected the line unit and ringing circuit to a called station and sen-t the directory number of the calling station to be loaded in the data area of t'ne status block. As previously described, when a ringing signal is on the ring lead of the called station, ringing detector 501 sets SR flip-flop 507 whose state represents the state of the ringing detector. The microprocessor retrieves the ringiny detector state by reading an odd address bit ~0 of the enabled line unit and receiving the ringing detector status on bit D7 of data bus (block 1101). When the status bit represents ringing, the microprocessor writes the state of the line unit status block to "silent ~5 interval detect" (block 1103~. In addition, the timing count of the line unit status block is wri~ten to represent a ringing interval such as 50 ~illiseconds which C. ~. ~ouyhty 2 . .

is the period of a 20-hertz signal (block 1104), Even address A0 ~it of the enabled line unit is then read to "reset" the ringing detec~or flip-~lop (block 1105~. Once a~ain, control is returned to the line unit routine and then the base level program to service the next line unit.
The DETECT SILE~T INTERV~L subroutine is depicted in FIG. 12. Under the control of this subroutine, the microprocessor compares the timing count of ~he line unit status block with the software real-time clock count in the program variables portion of data memory 203~(block 1201~. As previously described, the software clock count is incremented in a well-kno~n manner each time the microprocessor receives an interrupt signal from real-time clock 206. This interrupt signal may occur, for example, every 10 milliseconds. ~en the 50 millisecond ringing interval has not elapsed (block 1202), control is returned ~o the line unit routine since sufficient time has not elapsed to complete one cycle of the 20-llertz ringing signal. When the 50 millisecond ringing interval has elapsed ~block 1202), the state of the ringing detector is checked to determine whether another cycle of the ringing signal has been detected on the ring lead of the called station (block 1203). ~en another cycle of the ringing signal is not detected on the 2~ line, microprocessor 201 sets the line unlt status block state to "long silent interval confirm" (block 1204) and writes the timing count for a special silent interval such as 300 milliseconds (block 1205), When another cycle of the xinging signal is detected on the ring lead, the microprocessor again sets the *iming count to the rinying interval (block 1~) and reads even address bit A0 o~ the enabled line unit to reset the line unlt ringing detector (block 1~07). Once again, control is returned to the line unit routine.
3S Depic~ed in FI~ is the C~iFI~I LOI~G SILEI~T
~ ERVAL subrouline which is used to wait for the lapse of the speci~l silent time in-terval initiated by the ~ETECT

C. ~. Doughty 2 .'7~
,, .

SILE~T I~TERV~ subroutine. After waiting for the completion of the special silent time interval, a check is made to determine whether another ringing signal has been detected. ~nen another ringing siynal is de~ected, the llne unl~ status block is set to detect the next silent interval. When the continuance of the silent interval is confirmed, the status block is set to send a single frequency F~K slgnal tc. the calle~ statlon. Under control of the C~FIR~I LO~G SILEL~T INTERVAL su~routlne, 1~ mlcropxocessor 201 compare~ tne timiny count of the line unlt status block with the software real-time clock count (block 1~01) to determine whether the special silent interval has e1apsed (block 1~02). Recognizing tnat the special silent interval has not elapsed, control is lS irnmediately returned to the line unlt routine. ~en the interval has elapsed, the state of the ringing detector is checked to determine whether another ringing signal is on the ring lead of the called station (block 1303). This ls done to assure that the present silent interval is not a short interval associated with special ringing signals for various special services. When ringing for these special services is detected, the microprocessor again sets the line unit status block state to "silent interval detect"
(block 1~4) and wrltes the timing count to the ringing 2~ interval (block 130~). In addition, the ringing detector is "reset" 5block l~OG).
Recogrlizing that a ringing signal has not been detected and that a normal silent interval such as 4 seconds between ringing signals has been entere~, the 3~ microprocessor se-ts the state of the line unlt status block to "carrier send" (block 1~07) and wrltes the tlmlng coun~ to a carrier interval such as, for example, 9~
mllliseconds ~block 1~). Even address blt A0 o~ the enabled line unlt is then written by the microprocessor to cause the line unlt to send a single frequency FsK signal on the tip and ring leads of the called statlon ~block 1~09). After this, control is returne~ to -the line C. A. ~oùght~ 2 - ~1'7~1 - 22 -unit routine.
The SE~D CA~RI~R subroutine is depicted in FIG. 14 and is implemented to send a single frequency (unmodulated) FSK signal to the called customer station.
This initializes the station set to receive the special service information which inc]udes the directory number of the calling station. Microprocessor 201 compares the line unlt status block timing count with th~ software real-time clock count (block 1401) to determine whether the carrier 1~ interval has elapsed (block 1402). When the carrier interval h~s elapsed, the microprocessor sets the state of the lina unit status block to "~ata send" (block 1~03) and xeturns control to the line unit rou~lne. Otherwlse, control is returned to the line unit routineO
The SEND D~TA subroutine is called to send a character of the special service information to the called station and is depicted in FIG. 15. ~licroprocessor 201 first determines whether the UART transmit buffer register is empty (block 1~01). This is accomplished by the ~0 microprocessor reading odd address bit A0 o~ the enabled line unit wh1ch causes the status of the UART to be returned on bit D0 of the data bus. When the status bit indicates that the buffer is empty, the data count of the line unit status block is checked to determine whether any data characters remain in the data storage area (block 1502). If not, control is returned to the line unit routine. When data characters are present, the first chaxacter of data is loaded into the UART transmit buffer register via the data bus (block 1503). This is 0 accom~olis~led by the microprocessor writing odd address bit A0 of the enabled line unit. In addition, the data count of the ~ta~us block is decremen~ed each time to indicate that there is one less character ~yte in tne data storage area (block 1~04).
3~ The data message sent to an on-hook called station during t'ne silent interval between ringing signals may comprlse any number of character bytes, each with C. ~. ~ug~lty 2 ~ ~Z~'72~

additional start and stop bits. The ~irst c'naracter o~
the messaye identl~ies the type of message such as, for example, callingjcalled directory num~er, speclal service indicator, personal messayes, etc. The second character specl~ies the num~er of subsequent character bytes in the message. The next characters represent the digits of the calling station directory numher. ~'he last charac~er sent to the called station i5 a check sum which the station set uses to veri~y that errors have not been intro~uced in lU transmissio.
When ~he transmit bu~fer register of the UAKI' is loaded, the character byte is serially shifted out of the transmit buf$er register and sent to the FSK modem. The ~ART adds the start and stop bits, and the FSK modem sends l~ each c~aracter as a two frequency (modulated) FSK slgnal to t'ne calLed station. One carrier frequency represents the high loyic levels of the data character; the other represents the lo~ logic levels. Control is returned to the line unit routine. This D~TA SEND subroutine is repeated until all the charac~ers of the special service information along with the check sum have been sent to the called station.
Returning the reader's attention to block 1~02, it can be seen that when the data sto.age area is empty, the microprocessor sets the state of the line unit status block to "idle" (block 1~05) and resets the UART to stop sending an unmo~ulated F~lC signal to the called station (bLock 1~06~ Thls is accomplished by the microprocessor reading even address bit A0 of the enabled line unit.
Asain, control is returned to the line unit routine.
Graphically depicted in FIG. 16 are idealized ringing and data message signals, which are sent to a called station plotted with respect to time as well as the state of the line unit status block. When connec-ting an associated line unit and ringing circuit to a called station, processor lO~ sends ~o the data transmitter a data message which includes line unit identi~ication, a C. A. Douyh-ty ~
.~2 ~'7~

data character count, and special service information such as the directory number of the calling st~tion. The "idle" line unit status block of the identi~ied line unit is loaded with the special service information and advanced to the "ringing detect" state. In addition, the ringing detector is reset to detect a ringing signal.
Ringing circuit 133 then transmits ringing signal 1601 to called station 101 for a period of approximately t~Jo seconds which is normally followed by a silent interval of approximately 4 seconds before transmitting another ringing signal~ When a ringing signal is detected on the line, the line unit ringing detector is set which is reported to microprocessor 201. The line unit status block is then advanced to the "silent interval detect"
state to determine when the silen~ interval between ringing signals is entered.
~ nen the line unit status block is in the "silent interval detect" state, the ringing detector continues to monitor the ring lead of the called station for a ringing signal. After each ringing in~erval such as 50 milliseconds, whic'n is the period of a 20-'nertz ringing signal, the ringing detector is polled until the ringing signal is no longer detected on the ring lead.
Microprocessor 201 then advances the line unit status blocX to the "long silent interval confirm" state~
Whan the line unit status block is in the "lony silent interval confirm" state, an additional silent interval such as, for example, 300 milliseconds is timed to assure that a ringing signal associated with a special service is no-t detected on the line. When another ringing signal such as 1602 is detected during this special silent interval, the line unit status block is, again, set to the "silent interval detect" state. The status block remains in this state until another silent interval ~las been detected.

C. A. Dough ty 2 Z~7~

When rinying siynal 1602 is no longer detected on the ring l~ad, the line unit status block is once again set to the "lGng silent interval confirm" state, After the special silent interval has elapsed without detecting a ringing signal, the line unit status block is advanced to the "carfier send" state, and a single frequency carrier signal is sent to the called station. This "unmodulated" signal sucl~ as 1~03 is maintained for a predetermined interval such as 90 milliseconds to assure that the called station set is initializeZ to receive the subsequent-data message. Once the called station is initialized, the line unit status block is advanced to the "data send" s-tate, and the special service information such ~s the directory number o~ the calling station is sequentially transmitted to the called station via a modulated FSK signal such as 1604. As suggested, thls data message signal wlll include the message type, message length, and remaining special service informatlon such as the directory number of the calling statlon followed by a 2U message check sum. Olher special service information such as the time of day, personal message, etc., may also be sent. The entire message is sent during the typical 4 second silent interval between ringing signals~ After the message has been sent, the line unit status block is set to the "idle" state in preparation for the next called station transmission.
It is to be understood that the above described data transmission arrangeMent is merely an illus-trative embodiment of the principles o~ this invention and that 3~ numerous other arrangements may be devised by those sXilled in the art without depar~ing from the spirit and scope of the invention. In particular, the data transmit~r arrangement may be modi~ied to send special service information ~uriny successive silcnt intervals, or 3S alternatively, mo~i~ied to exchange special service information signals between the called station and trànsmitter to provide any number of special servlces.

Claims

Claims:

1. In a telephone switching system serving a plurality of stations and having a central processor for generating a data message and a ringing circuit for trans-mitting a first and a second ringing signal to a selected one of said stations, said first and second ringing signals having a silent interval therebetween, apparatus for send-ing a data message to a selected station during the silent interval between ringing signals; comprising:
detector means responsive to said first ringing signal for generating a status signal representative of said silent interval between said first and second ringing signals; and sender means responsive to said status signal for sending to said selected station a first frequency shift keyed signal representative of said data message during said silent interval.

2. The apparatus in accordance with claim 1 further comprising coupler means for coupling said sender means to said ringing circuit and said selected station.

3. The apparatus in accordance with claim 1 in which said detector means comprises comparator means responsive to a predetermined voltage level and said first ringing signal for generating said status signal when the magnitude of said ringing signals is less than the magnitude of said predetermined voltage level and latch means for storing said status signal.

4. The apparatus in accordance with claim 1 in which said sender means comprises transmitter means for storing said data message from said central processor and modulator means responsive to said stored data message for generating said first frequency shift keyed signal.

5. The apparatus in accordance with claim 1 further comprising means responsive to said first frequency shift keyed signal for generating a second frequency shift keyed signal having a voltage level equivalent in magnitude and opposite in polarity to that of said first frequency shift keyed signal

6. The apparatus in accordance with claim 5 wherein a tip and a ring lead interconnect said ringing circuit and said selected station and in which said apparatus further comprises first and second transformers each having a primary and a secondary winding, the secondary winding of said first transformer being connected to said ring lead, the secondary winding of said second transformer being connected to said tip lead; first amplifier means connected to the primary winding of said first transformer for amplifying said first frequency shift keyed signal; and second amplifier means connected to the primary winding of said second transformer for amplifying said second frequency shift keyed signal.

7. In a telephone switching system serving a plurality of stations and having a central processor for generating special service information and also having a ringing circuit for transmitting to a selected one of said stations intermittent ringing signals separated by silent intervals, a method for sending special service information to a selected station during a silent interval between intermittent ringing signals; comprising the steps of:
detecting a first one of said ringing signals to said selected station;
detecting a first one of said silent intervals after said first ringing signal; and sending a signal representative of said special service information to said selected station during said first silent interval.

8. The method as set forth in claim 7, further comprising the steps of waiting a first special time interval after said first ringing signal and confirming the continuance of said first silent interval after said first special time interval and wherein said step of sending a signal representative of said special service information to said selected station during said first silent interval comprises sending said representative signal after confirming the continuance of said first silent interval.
g. The method as set forth in claim 8 further comprising the steps of:
responsive to detecting a second one of said ringing signals to said selected station during said first special time interval, detecting a second one of said silent intervals, detecting a second one of said silent intervals after said second ringing signal;
waiting a second special time interval after said second ringing signal;
confirming the continuance of said second silent interval after said second special time interval has elapsed; and sending a signal representative of said special service information to said selected station during said second silent interval after confirming the continuance of said second silent interval.