CA1239712A - Conference circuit for digital communication systems - Google Patents
Conference circuit for digital communication systemsInfo
- Publication number
- CA1239712A CA1239712A CA000487004A CA487004A CA1239712A CA 1239712 A CA1239712 A CA 1239712A CA 000487004 A CA000487004 A CA 000487004A CA 487004 A CA487004 A CA 487004A CA 1239712 A CA1239712 A CA 1239712A
- Authority
- CA
- Canada
- Prior art keywords
- sum
- conference
- samples
- conference participants
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/42—Systems providing special services or facilities to subscribers
- H04M3/56—Arrangements for connecting several subscribers to a common circuit, i.e. affording conference facilities
- H04M3/561—Arrangements for connecting several subscribers to a common circuit, i.e. affording conference facilities by multiplexing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
- H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
- H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
- H04B3/238—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using initial training sequence
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/002—Applications of echo suppressors or cancellers in telephonic connections
Abstract
ABSTRACT OF THE DISCLOSURE
A circuit arrangement four conference circuits in digital communications systems, particularly in PCM telephone systems, provide digitized voice signals of the conference participants which are added in the conference circuit and are transmitted to all conference participants minus a voice signal generated by the respective participant. In the conference circuit, linear samples are transmitted to a subtracter in a frame-delayed manner by an intermediate memory and are compared by a transverse filter to the sum of all preceding samples respectively multiplied by a correction value derived dependent on the phase position to the sum of a momentary sample. As a result, each conference subscriber receives the sum of the voice signal of all conference subscribers minus his own voice signal, whereby the echo signals of the conference participants are suppressed except for one's own echo signal.
A circuit arrangement four conference circuits in digital communications systems, particularly in PCM telephone systems, provide digitized voice signals of the conference participants which are added in the conference circuit and are transmitted to all conference participants minus a voice signal generated by the respective participant. In the conference circuit, linear samples are transmitted to a subtracter in a frame-delayed manner by an intermediate memory and are compared by a transverse filter to the sum of all preceding samples respectively multiplied by a correction value derived dependent on the phase position to the sum of a momentary sample. As a result, each conference subscriber receives the sum of the voice signal of all conference subscribers minus his own voice signal, whereby the echo signals of the conference participants are suppressed except for one's own echo signal.
Description
I
BACKGROUND OF THE INVENTION
Field of the Invention The present invention relates to a circuit arrangement for conference circuits in digital communications systems, particularly in PAM telephone systems in which digitized voice signals of the conference participants are added in the conference circuit and are transmittable to all conference participants minus one's own voice signal generated by the respective conference circuit participants themselves.
Description of the Prior Art In conference circuits defined in such a manner, therefore, the voice signals of the three through n conference participants are added and are transmitted to all conference participants minus the voice signal emitted by the individual conference participants. Depending on the type of length of the transmission link between the individual conference participants, however, particularly given interconnection of mixed analog and digital transmission links in conjunction with non-adapted lines, disturbing echo signals occur which greatly deteriorate the comprehension of the transmitted useful signals (voice signals). Since the echo signals of the conference participants add in the same manner as their useful signals and the sum signal, the useful signals and the echo signals of all participants, is transmitted to every individual conference participant, the echo signals can assume the order of magnitude of the useful signals relatively quickly and, therefore, lead to total incomprehensibility of the voice signals for the individual conference participants.
"
I
Numerous methods for echo suppression are known for the elimination of these disturbing influences due to the echo signals and, therefore, for example, the use of various essay barriers and, to an increasing degree, the automatic compensation of echo signals by so-called echo compensators. All of the methods provide that the echo suppression occurs immediately at each individual conference subscriber location and, consequently, considerable pro-performance must be undertaken for connections having many conference participants.
SUMMARY OF THE INVENTION
The object of the present invention is to provide for considerably reducing the expense for echo compensation and, in particular for conferences having a great number owe conference participants, to provide a circuit arrangement wherein the echo compensation can optimally occur regardless of the number of conference participants and their variously-constituted transmission links.
The foregoing object is achieved in a circuit arrangement for conference connections in digital communications systems, particularly PAM telephone systems, wherein digitized voice signals of the conference participants are added in the conference circuit and are transmittable to all conference participants minus the voice signal generated by the respective conference participants themselves, is particularly character-iced by (1) the conference circuit comprises a first converter device for recoding voice signals digitized at the transmission side into linear samples, the output of the first converter device transmitting the recoded samples to the input of the Lo multiplexer device and a first adder device, (2) the multi-plexer device is in communication with an intermediate memory which accepts the samples frame-wise and which, by means of a demultiplexer, transmits the samples delayed by two frames to the input of a second subtraction device, (3) the first adder is connected at its output to a transversal jilter such that the sum of a momentary sample of all conference participants can be compared by a first subtraction device to a number of sums of respectively preceding samples of all conference participants, the number of sums corresponding to the number of James, whereby the sum of the momentary sample and the sum of the respectively preceding samples of the conference participants, dependent on the phase position relative to the sum of the momentary sample of all conference participants, multiplied by a correction value determined by a respective control device and stored in a correspondingly-assigned coefficient register, together with the corresponding sum of the momentary sample or, respectively, with the sum of the respectively preceding samples of a second adder which adds all the sum signals are supplied to the transversal filter device, I the first subtraction device is in communication with a memory whose output signal differs between the sum of the momentary sample and the sums of all preceding samples respectively multiplied by the corresponding correction value is supplied to the second subtraction device and to the control devices, and (5) the conference circuit comprises a second converter device for recoding the linear samples into voice signals digitized at the receiving side, the input of the second converter device being connected to the ox put of the second subtraction device.
I
The circuit arrangement, according to the present invention, therefore provides a centrally disposed intermediate memory for all conference participants which, in combination with the transversal filter likewise provided in common for all conference participants, sees to it that, in addition to the sum of the voice signals of all conference participants, each conference participant only receives his own line-conditioned echo signal transmitted to him. It is therewith guaranteed that the otherwise usual summing of the echo signals is suppressed and the disturbing influence for each individual conference participant is restricted to his own echo signal. It is to be viewed as essential for the invention that this arrangement is not to be decent rally provided for every individual conference participant, but is centrally used for a conference call independently of the number of conference participants and their transmission links.
In accordance with an advantageous feature of the invention, it is provided that a setting device for the level limit value is interconnected between the second subtraction device and the second converter device, so that the sum signals which may be too great under certain conditions due to the summing can be limited to a defined, allowed level value.
BRIEF DESCRIPTION OF THE DRAWING
Other objects, features and advantages of the invention will be best understood from the following detailed description, taken in conjunction with the accompanying drawing, on which there is a single figure which is a schematic representation of an exemplary embodiment of the invention in which the switch devices necessary for an urlerstanding of tune I
invention are shown.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
The conference circuit is disposed between a so-called highway, whereby the voice signals PCM-SS digitized at the transmitting side represent the input and the voice signals ACMES digitized at the receiving side represent the output of the conference circuit. The voice signals of all conference participants to be connected to one another in the conference circuit are on this PAM highway. The momentary samples of the voice signals of the conference participants are thereby transmitted in serial succession within specific time slots. The time for the transmission of a sample of all conference subscribers is referred to as a frame cycle. The frame cycle cynically repeats in accordance with the sampling rate.
The voice signals PCM-SS digitized at the transmitting side are transmitted to a first converter Cavil and are recoded into linear samples by the converter Cavil. The output of the first converter Cavil is connected to the input of a multiplexer Mull. the multiplexer Mull writes the samples which are transmitted from the first converter Cowbell into the memory cellst~Zl...Zn, Yl...Yn, Xl...Xn of an intermediate memory ZAP. The multiplexer Mull is thereby controlled by a control line AIR that the memory cells Zl...Zn! Yl...Yn or Xl...Xn are rota tingly written in a frame-dependent manner, i.e. when the samples are written into the memory cells Zl...Zn, the samples of the first recoding frame are stored in the memory cells Yin and the samples of the second preceding frame are stored in the memory cells Len When the memory I
cells Xl...Xn are wren with samples, then the samples of the first frame previous thereto are stored in the memory cells Yl...Yn and the samples of the second frame previous are stored in the memory cells Zl...Zn, etc.
At the same time, the multiplexer Mull is controlled by the control line AIR so that the samples are always deposited in a time slot suitable manner into the corresponding memory cells Z..., Y...., X... of the inter-mediate memory ZAP, i.e. that the samples from the conference participants on the time slot 1 of the PAM highway always lie in the memory cells I Ye and Al and the samples of the conference subscriber of the time slot _ always lie on the memory locations Z2, Ye and X2, etc.
Further, the output of a demultiplexer MECCA is connected to a subtracter SUB. The demultiplexer MECCA
reads the samples from the memory cells Snow, Lyon, Al...
On of the intermediate memory ZAP and transfers the same to the subtracter SUB. The subtracter SUB is controlled by the control line AIR such that the memory cells Zl...Zn, Yl...Yn and Xl...Xn are read rotationally in a frame-dependent manner, i.e. when the demultiplexer MECCA reads the memory cells Al...
Zen, the memory cells Xl..Xn are simultaneously overwritten by way of the multiplexer Mull. When, by contrast, the memory cells Yl...Yn are read by the demultiplexer MECCA, the memory cells Zl...Zn are simultaneously written by way of the multi-plexer Mull, etc. The demultiplexer MECCA always reads the samples of the frame which is not transmitted at the same time but, rather, of the second frame previous. The demultiplexer MECCA is thereby controlled by the control line AIR so that the I
samples are always read in a time slot suitable manner out of the corresponding memory cells Xanadu X... of the inter-mediate memory ZAP, i.e. the sample of the first time slot of the PAM highway is always read from the memory cells Al, Ye and Al and the sample of the second time slot is always read from the memory cells Z2, Ye and X2, etc.
Further the output of the converter Cavil is connected to the first input of an adder ADD, whereby the adder represents an accumulating adder whose output is connected to its second input. The first adder Add accordingly adds the samples transferred from the output of the first converter Cavil in succession. The adder Add is always reset with a control line RAY when the sum of all samples of the conference participants is at the output of the adder Addle The output of the adder Add is connected to a transverse filter TOE
which, among other things, contains shift registers SRl...SRn and multipliers MPl...MPn. The shift resisters are initiated by the control lines RAY to store the samples applied to their inputs, so that, at every frame change, the respective momentary SUM signal at the output of the adder Add is transferred into the first shift register Sol and with the further frame change it is restored into the following shift registers SR2, 5R3...SRn. Further, control devices Relearn in communication with the transverse filter TOE are provided, their respective second inputs being connected to the output of the corresponding shift register SRl..SRn. Further, the first inputs of all control devices Relearn are connected in common to the output of a memory SPEW The output of the control device Relearn simultaneously forms the input of a P
I
corresponding coefficient register KRl...KRn. The control devices Relearn thereby compare the samples at their inputs.
Depending on whether the results are positive or negative or, respectively, the samples are equiphase or not eq~iph~se, the content of the appertaining coefficient register KRl~.KRn is incremented or decrement Ed by a small amount. The contents of the coefficient registers KRl..KRn are fed to the multipliers MPl..MPn of the transverse filter TOE, their respective second input being connected to the output of the corresponding shift register SRl...SRn. The multipliers MY execute a multiplication of the content of the shift register SO with the content of the respective coefficient register OR and apply the result to their outputs which simultaneously form the inputs of an adder ADD in the transverse filter TOE. The adder ADD adds the output values of the multipliers and applies the result to its output.
Further, the first input of a subtracter Sub is connected to the output of the shift register Sol so that the sum sample of the conference participants is applied to the first input of the subtracter Sub. The second input of the subtracter Sub is connected to the output of the adder ADD
and contains the so-called echo correction signal. The subtracter Sub subtracts the echo correction signal from the sum sample so that the corresponding differential signal appears at the output, this differential signal being inter-mediately stored in the hollowing memory SUE and, in turn, being transmitted by way of the output to the respective control device Relearn.
Further, the inputs of the subtxactor SUB are connected both to the output of the memory SUE and the output 37~
of the demultiplexer MECCA. The subtracter SVB2 subtracts the time slot suitable sample of the individual conference subscriber from the value, the sum signal of all conference subscribers, permanently transmitted to it by way of a frame, the time slot suitable sample being transmitted to the subtracter SUB from the demultiplexer MECCA. The result is applied to the output of the subtracter Swiss. The subtracter SUB is followed by a level limit value setting device PEE
which reduces the sum sogginess which may be too great under certain conditions due to the sunning to, for example, the level values allowed by the CCITT.
From the level limit value setting device, the voice signal which may be corrected proceeds to a converter COVE which converts the linear samples into the voice signals PCM-SE digitized at the receiving side. Therefore, every conference participant receives the sum signals of all conference participants minus his self-generated voice signals, whereby the echo signals of the conference participants are eliminated except for one's own echo signal.
For further explanation of the exemplary embodiment, modules which are suitable for the individual function units are set forth below.
After the serially incoming PAM signal has been converted, for example, in a shift register (Texas Instruments US 164) into an 8-bit data word as a voice signal PCM-SS
digitized at the transmitting side the linearization of this signal into a 13-bit signal can occur by the first converter Cavil by way of two programmable read only memories proms) having eye designation MY 27 527. Subsequently, this 13-bit I
signal is stored in an intermediate memory ZAP having two random access memories (RAMs),as may be provided by the Toshiba 20 16, and is in turn read out two frames later. The time delay occurs by way of a suitable address sequence. The write and read addresses are alternately applied to the Rams This can be realized by way of two 8 bit counters having parallel output registers 2 modules Texas Instruments LO 590) in conjunction with 8 two-to-one multiplexes (Texas Instruments LO 606) or, respectively, with a ~56 x PROM
MY 275 15). The 13-bit signals succeeding one another in such a manner are subsequently summed up in the first adder Add which is formed of standard circuits (four modules, Texas Instruments, LO 381, one Texas Instruments module LS182).
The Saabs signals existing in two's complement are converted by two Proms (2 modules, AND 27 537) into the representational form of the input signal according to amount and operational sign and are returned to the first adder Add at a suitable time.
The first and second subtracters Sub, SUB, are likewise composed of standard circuits (four modules, Texas Instruments LS381, one module, Texas Instruments LS182), where-as the converter COVE which converts the 15-bit wide sum signal into an 8 bit signal is formed by a 32k I 8 PROM
(Toshiba TAM I 256 P). When the first adder Add supplies a signal whose amount is greater than 12-bits then, two frames before this signal arrives at the level limit value setting device PEE, the overflow is intermediately stored in a shift register (Texas Instruments LS164). The outputs of the shift register specify the attenuation level.. To this end, the most recent and the oldest signal are weighted with the value 1, it ~39~
the second most recent and the second oldest signal are weighted with the value 2, and the center signal is weighted with the value 3. The sum of these weighting defines the attenuation level which is realized by an ok x 8 PROM
(Toshiba TAM 23 64 P).
In order to convert the Betty signal into the serial voice signal ACMES digitized at the receiving side, a multiplexer (Texas Instruments LS356) can be utilized.
In the transverse filter TOE, the sum signals coming from the adder Add are written into two Rams (Toshiba TM 20 18) and are transmitted frame-by-frame to the multipliers MY and to the adder AD which are realized by a module (TRW
TIC 10 43).
The coefficient register OR is formed by a RAM
(Toshiba TAM 2018) which contains the 1023 coefficients.
Signal and coefficients are then offset relative to one another by one place in every following frame, whereby the Rams in the transverse filter TOE behave like a shift register.
The new coefficients are generated by the control devices RYE by way of a counter (Texas Instruments AS 869) and a control logic (Fairchild AS 86, AS 00), whereby the adaptation of the buses occurs by way of flip-flops (Fairchild AS 74) and latches with resets (Texas Instruments AS 873). The conversion of the signal existing from the first subtracter SUB from representation in two's complement into a representation according to an amount and operational signal is realized by two lo x 8 Proms DO 27 537) or the memory SPEW
I
Although I have described my invention by reference to a particular illustrative embodiment thereof, many changes and modifications of the invention may become apparent to those skilled in the art without departing from the spirit and scope of the invention,. I therefore intend to include within the patent warranted heron all such changes and modifications as may reasonably and properly be included within the scope of my contribution to the art.
BACKGROUND OF THE INVENTION
Field of the Invention The present invention relates to a circuit arrangement for conference circuits in digital communications systems, particularly in PAM telephone systems in which digitized voice signals of the conference participants are added in the conference circuit and are transmittable to all conference participants minus one's own voice signal generated by the respective conference circuit participants themselves.
Description of the Prior Art In conference circuits defined in such a manner, therefore, the voice signals of the three through n conference participants are added and are transmitted to all conference participants minus the voice signal emitted by the individual conference participants. Depending on the type of length of the transmission link between the individual conference participants, however, particularly given interconnection of mixed analog and digital transmission links in conjunction with non-adapted lines, disturbing echo signals occur which greatly deteriorate the comprehension of the transmitted useful signals (voice signals). Since the echo signals of the conference participants add in the same manner as their useful signals and the sum signal, the useful signals and the echo signals of all participants, is transmitted to every individual conference participant, the echo signals can assume the order of magnitude of the useful signals relatively quickly and, therefore, lead to total incomprehensibility of the voice signals for the individual conference participants.
"
I
Numerous methods for echo suppression are known for the elimination of these disturbing influences due to the echo signals and, therefore, for example, the use of various essay barriers and, to an increasing degree, the automatic compensation of echo signals by so-called echo compensators. All of the methods provide that the echo suppression occurs immediately at each individual conference subscriber location and, consequently, considerable pro-performance must be undertaken for connections having many conference participants.
SUMMARY OF THE INVENTION
The object of the present invention is to provide for considerably reducing the expense for echo compensation and, in particular for conferences having a great number owe conference participants, to provide a circuit arrangement wherein the echo compensation can optimally occur regardless of the number of conference participants and their variously-constituted transmission links.
The foregoing object is achieved in a circuit arrangement for conference connections in digital communications systems, particularly PAM telephone systems, wherein digitized voice signals of the conference participants are added in the conference circuit and are transmittable to all conference participants minus the voice signal generated by the respective conference participants themselves, is particularly character-iced by (1) the conference circuit comprises a first converter device for recoding voice signals digitized at the transmission side into linear samples, the output of the first converter device transmitting the recoded samples to the input of the Lo multiplexer device and a first adder device, (2) the multi-plexer device is in communication with an intermediate memory which accepts the samples frame-wise and which, by means of a demultiplexer, transmits the samples delayed by two frames to the input of a second subtraction device, (3) the first adder is connected at its output to a transversal jilter such that the sum of a momentary sample of all conference participants can be compared by a first subtraction device to a number of sums of respectively preceding samples of all conference participants, the number of sums corresponding to the number of James, whereby the sum of the momentary sample and the sum of the respectively preceding samples of the conference participants, dependent on the phase position relative to the sum of the momentary sample of all conference participants, multiplied by a correction value determined by a respective control device and stored in a correspondingly-assigned coefficient register, together with the corresponding sum of the momentary sample or, respectively, with the sum of the respectively preceding samples of a second adder which adds all the sum signals are supplied to the transversal filter device, I the first subtraction device is in communication with a memory whose output signal differs between the sum of the momentary sample and the sums of all preceding samples respectively multiplied by the corresponding correction value is supplied to the second subtraction device and to the control devices, and (5) the conference circuit comprises a second converter device for recoding the linear samples into voice signals digitized at the receiving side, the input of the second converter device being connected to the ox put of the second subtraction device.
I
The circuit arrangement, according to the present invention, therefore provides a centrally disposed intermediate memory for all conference participants which, in combination with the transversal filter likewise provided in common for all conference participants, sees to it that, in addition to the sum of the voice signals of all conference participants, each conference participant only receives his own line-conditioned echo signal transmitted to him. It is therewith guaranteed that the otherwise usual summing of the echo signals is suppressed and the disturbing influence for each individual conference participant is restricted to his own echo signal. It is to be viewed as essential for the invention that this arrangement is not to be decent rally provided for every individual conference participant, but is centrally used for a conference call independently of the number of conference participants and their transmission links.
In accordance with an advantageous feature of the invention, it is provided that a setting device for the level limit value is interconnected between the second subtraction device and the second converter device, so that the sum signals which may be too great under certain conditions due to the summing can be limited to a defined, allowed level value.
BRIEF DESCRIPTION OF THE DRAWING
Other objects, features and advantages of the invention will be best understood from the following detailed description, taken in conjunction with the accompanying drawing, on which there is a single figure which is a schematic representation of an exemplary embodiment of the invention in which the switch devices necessary for an urlerstanding of tune I
invention are shown.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
The conference circuit is disposed between a so-called highway, whereby the voice signals PCM-SS digitized at the transmitting side represent the input and the voice signals ACMES digitized at the receiving side represent the output of the conference circuit. The voice signals of all conference participants to be connected to one another in the conference circuit are on this PAM highway. The momentary samples of the voice signals of the conference participants are thereby transmitted in serial succession within specific time slots. The time for the transmission of a sample of all conference subscribers is referred to as a frame cycle. The frame cycle cynically repeats in accordance with the sampling rate.
The voice signals PCM-SS digitized at the transmitting side are transmitted to a first converter Cavil and are recoded into linear samples by the converter Cavil. The output of the first converter Cavil is connected to the input of a multiplexer Mull. the multiplexer Mull writes the samples which are transmitted from the first converter Cowbell into the memory cellst~Zl...Zn, Yl...Yn, Xl...Xn of an intermediate memory ZAP. The multiplexer Mull is thereby controlled by a control line AIR that the memory cells Zl...Zn! Yl...Yn or Xl...Xn are rota tingly written in a frame-dependent manner, i.e. when the samples are written into the memory cells Zl...Zn, the samples of the first recoding frame are stored in the memory cells Yin and the samples of the second preceding frame are stored in the memory cells Len When the memory I
cells Xl...Xn are wren with samples, then the samples of the first frame previous thereto are stored in the memory cells Yl...Yn and the samples of the second frame previous are stored in the memory cells Zl...Zn, etc.
At the same time, the multiplexer Mull is controlled by the control line AIR so that the samples are always deposited in a time slot suitable manner into the corresponding memory cells Z..., Y...., X... of the inter-mediate memory ZAP, i.e. that the samples from the conference participants on the time slot 1 of the PAM highway always lie in the memory cells I Ye and Al and the samples of the conference subscriber of the time slot _ always lie on the memory locations Z2, Ye and X2, etc.
Further, the output of a demultiplexer MECCA is connected to a subtracter SUB. The demultiplexer MECCA
reads the samples from the memory cells Snow, Lyon, Al...
On of the intermediate memory ZAP and transfers the same to the subtracter SUB. The subtracter SUB is controlled by the control line AIR such that the memory cells Zl...Zn, Yl...Yn and Xl...Xn are read rotationally in a frame-dependent manner, i.e. when the demultiplexer MECCA reads the memory cells Al...
Zen, the memory cells Xl..Xn are simultaneously overwritten by way of the multiplexer Mull. When, by contrast, the memory cells Yl...Yn are read by the demultiplexer MECCA, the memory cells Zl...Zn are simultaneously written by way of the multi-plexer Mull, etc. The demultiplexer MECCA always reads the samples of the frame which is not transmitted at the same time but, rather, of the second frame previous. The demultiplexer MECCA is thereby controlled by the control line AIR so that the I
samples are always read in a time slot suitable manner out of the corresponding memory cells Xanadu X... of the inter-mediate memory ZAP, i.e. the sample of the first time slot of the PAM highway is always read from the memory cells Al, Ye and Al and the sample of the second time slot is always read from the memory cells Z2, Ye and X2, etc.
Further the output of the converter Cavil is connected to the first input of an adder ADD, whereby the adder represents an accumulating adder whose output is connected to its second input. The first adder Add accordingly adds the samples transferred from the output of the first converter Cavil in succession. The adder Add is always reset with a control line RAY when the sum of all samples of the conference participants is at the output of the adder Addle The output of the adder Add is connected to a transverse filter TOE
which, among other things, contains shift registers SRl...SRn and multipliers MPl...MPn. The shift resisters are initiated by the control lines RAY to store the samples applied to their inputs, so that, at every frame change, the respective momentary SUM signal at the output of the adder Add is transferred into the first shift register Sol and with the further frame change it is restored into the following shift registers SR2, 5R3...SRn. Further, control devices Relearn in communication with the transverse filter TOE are provided, their respective second inputs being connected to the output of the corresponding shift register SRl..SRn. Further, the first inputs of all control devices Relearn are connected in common to the output of a memory SPEW The output of the control device Relearn simultaneously forms the input of a P
I
corresponding coefficient register KRl...KRn. The control devices Relearn thereby compare the samples at their inputs.
Depending on whether the results are positive or negative or, respectively, the samples are equiphase or not eq~iph~se, the content of the appertaining coefficient register KRl~.KRn is incremented or decrement Ed by a small amount. The contents of the coefficient registers KRl..KRn are fed to the multipliers MPl..MPn of the transverse filter TOE, their respective second input being connected to the output of the corresponding shift register SRl...SRn. The multipliers MY execute a multiplication of the content of the shift register SO with the content of the respective coefficient register OR and apply the result to their outputs which simultaneously form the inputs of an adder ADD in the transverse filter TOE. The adder ADD adds the output values of the multipliers and applies the result to its output.
Further, the first input of a subtracter Sub is connected to the output of the shift register Sol so that the sum sample of the conference participants is applied to the first input of the subtracter Sub. The second input of the subtracter Sub is connected to the output of the adder ADD
and contains the so-called echo correction signal. The subtracter Sub subtracts the echo correction signal from the sum sample so that the corresponding differential signal appears at the output, this differential signal being inter-mediately stored in the hollowing memory SUE and, in turn, being transmitted by way of the output to the respective control device Relearn.
Further, the inputs of the subtxactor SUB are connected both to the output of the memory SUE and the output 37~
of the demultiplexer MECCA. The subtracter SVB2 subtracts the time slot suitable sample of the individual conference subscriber from the value, the sum signal of all conference subscribers, permanently transmitted to it by way of a frame, the time slot suitable sample being transmitted to the subtracter SUB from the demultiplexer MECCA. The result is applied to the output of the subtracter Swiss. The subtracter SUB is followed by a level limit value setting device PEE
which reduces the sum sogginess which may be too great under certain conditions due to the sunning to, for example, the level values allowed by the CCITT.
From the level limit value setting device, the voice signal which may be corrected proceeds to a converter COVE which converts the linear samples into the voice signals PCM-SE digitized at the receiving side. Therefore, every conference participant receives the sum signals of all conference participants minus his self-generated voice signals, whereby the echo signals of the conference participants are eliminated except for one's own echo signal.
For further explanation of the exemplary embodiment, modules which are suitable for the individual function units are set forth below.
After the serially incoming PAM signal has been converted, for example, in a shift register (Texas Instruments US 164) into an 8-bit data word as a voice signal PCM-SS
digitized at the transmitting side the linearization of this signal into a 13-bit signal can occur by the first converter Cavil by way of two programmable read only memories proms) having eye designation MY 27 527. Subsequently, this 13-bit I
signal is stored in an intermediate memory ZAP having two random access memories (RAMs),as may be provided by the Toshiba 20 16, and is in turn read out two frames later. The time delay occurs by way of a suitable address sequence. The write and read addresses are alternately applied to the Rams This can be realized by way of two 8 bit counters having parallel output registers 2 modules Texas Instruments LO 590) in conjunction with 8 two-to-one multiplexes (Texas Instruments LO 606) or, respectively, with a ~56 x PROM
MY 275 15). The 13-bit signals succeeding one another in such a manner are subsequently summed up in the first adder Add which is formed of standard circuits (four modules, Texas Instruments, LO 381, one Texas Instruments module LS182).
The Saabs signals existing in two's complement are converted by two Proms (2 modules, AND 27 537) into the representational form of the input signal according to amount and operational sign and are returned to the first adder Add at a suitable time.
The first and second subtracters Sub, SUB, are likewise composed of standard circuits (four modules, Texas Instruments LS381, one module, Texas Instruments LS182), where-as the converter COVE which converts the 15-bit wide sum signal into an 8 bit signal is formed by a 32k I 8 PROM
(Toshiba TAM I 256 P). When the first adder Add supplies a signal whose amount is greater than 12-bits then, two frames before this signal arrives at the level limit value setting device PEE, the overflow is intermediately stored in a shift register (Texas Instruments LS164). The outputs of the shift register specify the attenuation level.. To this end, the most recent and the oldest signal are weighted with the value 1, it ~39~
the second most recent and the second oldest signal are weighted with the value 2, and the center signal is weighted with the value 3. The sum of these weighting defines the attenuation level which is realized by an ok x 8 PROM
(Toshiba TAM 23 64 P).
In order to convert the Betty signal into the serial voice signal ACMES digitized at the receiving side, a multiplexer (Texas Instruments LS356) can be utilized.
In the transverse filter TOE, the sum signals coming from the adder Add are written into two Rams (Toshiba TM 20 18) and are transmitted frame-by-frame to the multipliers MY and to the adder AD which are realized by a module (TRW
TIC 10 43).
The coefficient register OR is formed by a RAM
(Toshiba TAM 2018) which contains the 1023 coefficients.
Signal and coefficients are then offset relative to one another by one place in every following frame, whereby the Rams in the transverse filter TOE behave like a shift register.
The new coefficients are generated by the control devices RYE by way of a counter (Texas Instruments AS 869) and a control logic (Fairchild AS 86, AS 00), whereby the adaptation of the buses occurs by way of flip-flops (Fairchild AS 74) and latches with resets (Texas Instruments AS 873). The conversion of the signal existing from the first subtracter SUB from representation in two's complement into a representation according to an amount and operational signal is realized by two lo x 8 Proms DO 27 537) or the memory SPEW
I
Although I have described my invention by reference to a particular illustrative embodiment thereof, many changes and modifications of the invention may become apparent to those skilled in the art without departing from the spirit and scope of the invention,. I therefore intend to include within the patent warranted heron all such changes and modifications as may reasonably and properly be included within the scope of my contribution to the art.
Claims (2)
1. A circuit arrangement for conference connections in digital communications systems, particularly in PCM telephone systems, for interposition in a -PCM highway, wherein digitized voice signals of the conference participants are added in the conference circuit and are transmittable to all conference participants minus the voice signal generated by the respective conference participants, comprising:
a first converter device for receiving and recoding voice signals at the transmitting side into linear samples;
a first multiplexer connected to said first converter;
a first adder connected to said first converter;
an intermediate memory connected to said multiplexer for accepting the recoded samples frame-by-frame;
first and second subtractors;
a demultiplexer connected between said intermediate memory and said second subtractor for transmitting the samples delayed by two frames to said second subtractor;
a transverse filter connected to said first adder and to said first subtractor;
a plurality of control devices connected to said transverse filter and a plurality of coefficient registers respectively connected to said control devices and connected to said transverse filter;
said transverse filter comprising a second adder and operable to provide that the sum of a momentary sample of all conference participants are compared by said first subtracter to a number of sums of respectively preceding samples of all conference participants, the number of sums corresponding to the number of frames, whereby the sum of the momentary sample and the sum of the respectively preceding samples of the conference participants, dependent on the phase position relative to the sum of the momentary sample of all conference participants, multiplied by a correction value determined by a respective one of said control devices and stored in the respective coefficient register together with the corresponding sum of the momentary sample or, respectively, with the sum of the respectively preceding samples of said second adder adding all sum signals, are supplied to said transverse filter;
a memory connected between said first and second subtracters and connected to said control devices and operable to provide an output signal which is the difference between the sum of the momentary sample and the sum of all preceding samples respectively multiplied by the corresponding correction value; and a second converter for recoding the linear samples into digitized voice signals.
a first converter device for receiving and recoding voice signals at the transmitting side into linear samples;
a first multiplexer connected to said first converter;
a first adder connected to said first converter;
an intermediate memory connected to said multiplexer for accepting the recoded samples frame-by-frame;
first and second subtractors;
a demultiplexer connected between said intermediate memory and said second subtractor for transmitting the samples delayed by two frames to said second subtractor;
a transverse filter connected to said first adder and to said first subtractor;
a plurality of control devices connected to said transverse filter and a plurality of coefficient registers respectively connected to said control devices and connected to said transverse filter;
said transverse filter comprising a second adder and operable to provide that the sum of a momentary sample of all conference participants are compared by said first subtracter to a number of sums of respectively preceding samples of all conference participants, the number of sums corresponding to the number of frames, whereby the sum of the momentary sample and the sum of the respectively preceding samples of the conference participants, dependent on the phase position relative to the sum of the momentary sample of all conference participants, multiplied by a correction value determined by a respective one of said control devices and stored in the respective coefficient register together with the corresponding sum of the momentary sample or, respectively, with the sum of the respectively preceding samples of said second adder adding all sum signals, are supplied to said transverse filter;
a memory connected between said first and second subtracters and connected to said control devices and operable to provide an output signal which is the difference between the sum of the momentary sample and the sum of all preceding samples respectively multiplied by the corresponding correction value; and a second converter for recoding the linear samples into digitized voice signals.
2. The circuit arrangement of claim 1, and further comprising:
a level limit value setting device connected between said second subtracter and said second converter.
a level limit value setting device connected between said second subtracter and said second converter.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19843427303 DE3427303A1 (en) | 1984-07-20 | 1984-07-20 | CONFERENCE CIRCUIT FOR DIGITAL COMMUNICATION SYSTEMS |
| DEP3427303.4 | 1984-07-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1239712A true CA1239712A (en) | 1988-07-26 |
Family
ID=6241458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000487004A Expired CA1239712A (en) | 1984-07-20 | 1985-07-18 | Conference circuit for digital communication systems |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4635252A (en) |
| JP (1) | JPS6139758A (en) |
| CA (1) | CA1239712A (en) |
| DE (1) | DE3427303A1 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1240431A (en) * | 1985-03-01 | 1988-08-09 | Nippon Telegraph And Telephone Corporation | Speech additive distribution equipment for conferencing system |
| IT1215490B (en) * | 1987-05-14 | 1990-02-14 | Sgs Microelettronica Spa | METHOD OF ATTENUATION OF THE ECHO SIGNAL IN CONVERSION CIRCUITS, SO CALLED BY TELEPHONE FORKS, INTENDED FOR TELEPHONE CONFERENCES, AND EQUIPMENT OPERATING ACCORDING TO SUCH METHOD. |
| US4757493A (en) * | 1987-06-01 | 1988-07-12 | Motorola Inc. | Multi-party telephone conferencing apparatus |
| JPH01243767A (en) * | 1988-03-25 | 1989-09-28 | Toshiba Corp | Conference call system |
| CA2102857C (en) * | 1992-12-31 | 1998-06-23 | Alexander Feiner | Technique for reducing echoes in conference communications |
| US5666407A (en) * | 1995-12-05 | 1997-09-09 | Ncr Corporation | Software-based bridging system for full duplex audio telephone conferencing |
| DE19815961A1 (en) * | 1998-04-09 | 1999-10-14 | Cit Alcatel | Electronic circuit for multi-channel processing of basic functions |
| US6944137B1 (en) * | 2000-03-24 | 2005-09-13 | Motorola, Inc. | Method and apparatus for a talkgroup call in a wireless communication system |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4224688A (en) * | 1978-10-30 | 1980-09-23 | Northern Telecom Limited | Digital conference circuit |
| DE2853139A1 (en) * | 1978-12-08 | 1980-06-19 | Siemens Ag | Transversal filter for echo compensator - has delay register and coefficient register for telephone subscriber's circuit in digital TDM system |
| DE3148886C1 (en) * | 1981-12-10 | 1983-08-11 | Standard Elektrik Lorenz Ag, 7000 Stuttgart | Method and circuit arrangement for establishing a conference connection |
| US4482998A (en) * | 1982-05-27 | 1984-11-13 | At&T Bell Laboratories | Method and apparatus for improving the quality of communication in a digital conference arrangement |
| US4535445A (en) * | 1983-06-16 | 1985-08-13 | At&T Information Systems | Conferencing system adaptive signal conditioner |
-
1984
- 1984-07-20 DE DE19843427303 patent/DE3427303A1/en active Granted
-
1985
- 1985-07-18 CA CA000487004A patent/CA1239712A/en not_active Expired
- 1985-07-19 JP JP15845885A patent/JPS6139758A/en active Pending
- 1985-07-22 US US06/757,656 patent/US4635252A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE3427303C2 (en) | 1988-12-22 |
| JPS6139758A (en) | 1986-02-25 |
| DE3427303A1 (en) | 1986-01-30 |
| US4635252A (en) | 1987-01-06 |
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