CA1254789A - Multilayer hybrid integrated circuit - Google Patents

Multilayer hybrid integrated circuit

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Publication number
CA1254789A
CA1254789A CA000477379A CA477379A CA1254789A CA 1254789 A CA1254789 A CA 1254789A CA 000477379 A CA000477379 A CA 000477379A CA 477379 A CA477379 A CA 477379A CA 1254789 A CA1254789 A CA 1254789A
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CA
Canada
Prior art keywords
weight percent
triazine
acrylate
mixture
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000477379A
Other languages
French (fr)
Inventor
Richard D. Small, Jr.
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Application granted granted Critical
Publication of CA1254789A publication Critical patent/CA1254789A/en
Expired legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/027—Non-macromolecular photopolymerisable compounds having carbon-to-carbon double bonds, e.g. ethylenic compounds
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676—Single layer compositions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0133—Elastomeric or compliant polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
    • Y10S430/1053—Imaging affecting physical property or radiation sensitive material, or producing nonplanar or printing surface - process, composition, or product: radiation sensitive composition or product or process of making binder containing
    • Y10S430/1055—Radiation sensitive composition or product or process of making
    • Y10S430/114—Initiator containing
    • Y10S430/12—Nitrogen compound containing
    • Y10S430/121—Nitrogen in heterocyclic ring

Abstract

MULTILAYER HYBRID INTEGRATED CIRCUIT
Abstract A multilayer circuit device comprises a substrate having a plurality of metallized patterns thereon said patterns being separated by a pohotodefined polymeric dielectric film formed from a polymeric photodefinable triazine base mixture including a photosensitive acrylate moiety. The various circuit patterns are interconnected by means of microvias through the polymeric film or film layers.

Description

7~

MULTILAYER HYBRID INTEGRATED CIRCUIT

=
This invention relates to multilayer hybrid integrated circuits having novel dielectric layer employed as part of the circuit.
BACKGROUND OF THE INVENTION
In the evolution of hybrid integrated circuits for switching systems and high performance processes as well as other electronic devices one of the most critical system packaging needs is the capability of utilizing effectively high I/O pin-out devices with high speed interconnections.
To meet this goal multilayer ceramic hybrid integrated circuits have been developed. However, the currently available multilayer ceramic circuits require a complex manufacturing system and are relatively expensive.
Consequently, in order to meet the packaging needs of such hybrid integrated circuits while retaining quality, reliability and per~ormance demands, especially in conjunction with the use of very large scale integrated circuit chips, in a cost competitive package, further improvements are necessary.
To meet this goal, I believe that a multilayer polymer hybrid integrated circuit configuration is one approach to solvinq the problem. The polymer layer must act as a dielectric material between layers containing thin film circuitry and must meet many other stringent re~uirements including a hi~h Tg, a high thermal . stability and hybrid process compatibility. It would also be preferred if such a polymeric material were photodefinable.
SUMMARY OF THE INVENTION
A multilayer circuit device comprising a substrate having a metallized pattern thereon and a plurality of polymeric dielectric ~ilm layers each having a metallized circuit pattern thereon with metallized microvias interconnecting the metallized patt~erns of one layer with :. ~

~2~7~

that of at least one other metallized layer thereunder, said polymeric dielectric layer being formed from a photodefinable triazine base mixture including a photosensitive acrylate moiety.

The Figure is a cross-sectional elevational view representing processing steps, ~ to E, in forming a device in accordance with the invention.
DETAILED DESCRIPTION
It should be understood that the novel device as summarized above is suitable for use as a multilayer printed circuit board employing substrates which are commonly used and are well known in the printed circuit board industry. Also, because of the characteristics of the triazine based dielectric layer employed, the device is especially suited for use in what is known as a multilayer hybrid integrated circuit device generally employing a ceramic substrate.
To meet the requirements of advancing technology involving hybrid integrated circuits for switching systems and high performance processes, a multilayer hybrid integrated circuit must be capable of employing a high number of I/O pin-out devices with high speed interconnections. Due to the heat developed and the electrical requirements, minimum requirements for the dielectric material employed to separate conductor layers include a glass tran ition temperature (Tg) o~ at least 140C and good thermal stability to about 220C, a dielectric constant of no greater than 3.5 and preferably, the material should be capable of being imaged by means of actinic radiation so as to be able to achieve fine line features and an aspect ratio approaching l. In addition, the dielectric materials must be tough enough to withstand thermal cycling specifications with severe mismatch in dimensional stability between the ceramic substrates and the dielectric materials; the dielectric must be compatible with typical ceramic resistors and conductors under ~25~ 9 accelerated life testing and the surface of the dielectric must be metallizible so as to form at an adherent circuit pattern thereon. In addition, the dielectric material must have chemical resistance to all chemicals used in further processing steps and should be in a form that can be coated reproducibly and efficiently. The polymeric dielectric material must also have good high voltage breakdown characteristics and be compatible with all other components and materials employed. Preferably, for commercial purposes, good shelf stability and shel life of the uncured polymer is required. Heretofore, poly~eric dielectric materials meeting these requirements were not available.
In accordance with the present invention, a polymeric mixture having a triazine resin as its primary constituent and including a photosensitive acrylate moiety crosslinking agent, can be used to achieve the necessary goals. The acrylate moiety can be on a separate compound or on the trizine itself. More particularly, a suitable polymeric dielectric formulation giving the ranges of its constituents in weight percent is as follows: triazine, ~0-65%; rubber resin, 0-30%; an epoxy-acrylate hybrid resin or individual epoxy and acrylate resins totaling from 0-50%; a hardener, 0-1~%; a crosslinking agent, 0-8%; a coupling agent, 0-5%; and a photoinitiator, 1/2-3~.
The preferred rubber resins are acrylonitrile butadiene resins~ It is preferred that a hybrid epoxy-acrylate resin be employed rather than individual separate . epoxy resin and acrylate resin. Such hybrid resin may be epoxy terminated or vinyl terminated. For example, the half acrylate of the diglycidyl ether of bisphenol-A is su~table. A particularl~ suitahle hardener is N-vinylpyrrolidone. Furth~r, a particularly suitable ` crosslinking agent is trimethylolpropanetriacrylate. Also a particularly suitable coupling agent to enhance the adhesion of the polymeric dielectric material to the underlying material is a silane coupling agent such as ~25~ 9 glycidoxypropyltrimethoxy-silane. Coupling agents, and in particular silane coupling agents, are well known in the art for enhancing adhesion between dissimilar layers. A
suitable photoinitiator is 2,2-dimethoxy-2-phenylacetophenone. In addition to the above, one may alsoadd small amounts of pigment, surfactant and copper chelate thermal stabilizer, e.g., copper benzylacetonate. Such additives are generally included, if desired, in amounts of up to about 1~.
Generally preferred formulations of the triazine mixture are as follows:
(A) triazine 50-60 weight percent; epoxy acrylate hybrid 20-30 weight percent, hardener 5-12 weight percent, crosslinking agent 2-6 weight percent, coupling agent 2-5 weight percent, photoinitiator 1-3 weight percent; or (B3 triazine 50-60 weight percent; acrylated rubber 10-25 weight percent, epoxy acrylate hybrid 5-15 weight percent, hardener, crosslinking agent and photoinitiator as in (A); or (C) triazine 50-55 weight percent; acrylated rubber 20-30 weight percent and the remainder of the ingredients as in ~B) plus pigment, surfactant and stabilizer up to 1 weight percent.
More specific exampl`es of suitable photodefinable resin mixtures utilized to form the polymeric dielectric are as followsO
EXAMPLE I

30 Triazine 56%

Hal~f acrylate of the diglycidyl ether of bisphenol-A
(Celanese) 25%
N-vinylpyrrolidone 9%

~ ~5~7~9 Trimethylolpropanetriacrylate4%

Glycidoxypropyltrimethcxysilane 4%

5 2-2-dimethoxy-2-phenylacetophenone~%

EXAMPLE II
Com onentWeight Percent P

Triazine 52%

Acrylated acrylonitrile butadiene rubber 16%

Half acrylate of the diglycidyl ether of bisphenol-A9%

N-vinylpyrrolidone 9%

Epoxy propylacrylate 3.5%

Trimethylolpropanetriacrylate4~

25 Glycidoxypropyltrimethoxysilane 4.5%
2,2-dimethoxy-2-phenylacetophenone 2%

.~ .
EXAMPLE III

, The basic formulation of this example is as follows:

Com onent Triaæine ~ 50%

~2~7~3 Acrylated acrylonitrile butadiene rubber 26 Half acrylate of the 5 diglycidyl ether of bisphenol-A 9 N-vinylpyrrolidone 9 Trimethylolpropanetriacrylate 4 Glycidoxypropyltrimethoxysilane 2%

Added to this basic formula is the following:
2~ dimethoxy-2-phenylacetophenone 2~

Magenta pigment 0.5%

20 Surfactant 0.2%

Copper benzyl acetonate 0.5~

The various photodefinable triazine resin mixtures as set above are employed, as previously indicated, in the manufacture of multilayer circuit devices such as multilayer hybrid integrated circuits. A typical multilayer fabrication process is shown with reference to FIG. 1 A-E. FIG. 1A shows the bare substrate 10 such as an alumina ceramic substrate. FIG. 1B is a representation of the substrate 10 after a conductor pattern 12 has been pl~ced on one surface thereof. This metallized pattern can be formed by any of the well known techniques including thin film technology, thick film technology, vacuum evaporation and electroless plating techniques. Further, while the layer is shown to be patterned to form a circuit one may employ a blanket metalliæe~ layer which may be used 78~

as a ground plane or power plane for the devices to be attached. FIG. lC depicts the substate 10 and first metallized layer 12 with a pho~odefinable dielectric 14 applied thereover. This dielectric 14 may be applied by any of the well known techniques including screen printing~
brushing, spraying, dipping or the like. Subsequent to application of the photodefinable dielectric 14, as shown in FIG. lD, the photodefinable dielectric 14 is subjected to actinic radiation so as to define microvias 16 which, upon development, are formed therethrough. These microvias 16 allow additional metallization 18 as shown in FIG. lE to form a contact between adjacent metallized layers. In this way, any desired portions of a top metallized layer may be made to electrically contact any lower metallized layer.
Steps lC to lE can be repeated to build as many levels as needed or desired. Discrete devices such as integrated circuit chips, resistors, capacitors or the like can be mounted such as by surface mounting techniques or any other available techniques known in the art to any of the ?O metallized layers or preferentially to the top layer. Upon completion, a complete hybrid integrated circuit package is formed In order to achieve a commercially feasible hybrid integrated circuit for high density packaging of integrated circuit devices and a large number of I/O pin counts, the polymeric dielectric material should have the property requirements tabulate~ hereinbelow. Where, however, the use is not so stringent and a high number of I/O pin counts is not necessar~ and lower power is to be used, the requirements may be relaxed. The various requirements and
3~ the performance of the photodefinable triazine mixtures as set forth herein with respect to those requirements are given in the table below.

~2~ 9 S~ecific Material Re~uirements Photodefined Triazine 5 Paramet r Requirement Performance T >130C 150-190C
g Thermal stability Long term 100C 180C
Short term 125C 210C
Spikes 300C-10-15 sec. Passes Dielectric constant <4.0 3.4-3.6 Resistor compatibility Thin film Yes Yes Via-resolution 7.6x10 3cm 7.6x10 3cm (3 mil) minimum (3 mil) min.

Chemical resistance Not sensitive to Passes any of the process chemicals Leaka~e current <l micro amp <1 micro amp Thermal cycle 5 cycles Pass EXAMPLE IV
, This example sets forth the essential steps in preparing a multilayer integra~ed circuit employing one oE
` the novel triazine mixtures as the photosensitive dielectric layer. In accordance with this process, which is just one example of many variations of processes which can be used for preparing a multilayer integrated circuit ~L25i~9 g employing the novel photodefinable dielectric, a substrate is ~irst sputter metallized to form a very thin base metal layer thereon. A photoresist such as Dupont Riston is then applied to the surface and the Riston is exposed and developed so as to form an image of ~he desired conductor pattern thereon. The exposed metallized layer is then electroplated such as with copper followed by nickel and gold and thereafter the Riston is stripped from the surface and the substrate is etched so as to remove the initially applied sputtered layer. Thereafter the photode~inable dielectric triazine mi~ture is applied to the surface of the substrate by any of the known coating techniques, e.g., spray coating and is warmed so as to prevent bubble formation. The triazine mixture is then imaged by exposing to actinic radiation in a desired pattern and then developed so as to create microvias in the triazine dielectric layer. The dielectric is cured, e.~., by heating at temperatures from 100C to 210C.
Preferably, the surface of the dielectric layer is then treated such as by means of an argon etch so as to enhance the adhesion of that sur~ace ~or subsequent metallization.
Thereafter a metal layer is sputtered onto the surface o~
the tria~ine dielectric layer, another layer of Riston is applied over the sputtered layer and the Riston is imaged ~5 in a desired pattern and a second metallization layer is built up by electroplating techni~ues. The Riston is thereafter stripped such as with methylene chloride and the underlying thin sputtered metal layer over which there is no electroplate is removed by etchingO By this technique, interconnections between the first and second pattern layers of electroplated conductors are made through the mi~rovias in the tri~zine dielectric layer. These steps can then be repeated as many times as required to build as many layers as is necessary. Alsc interconnections can be 3~ made between any lower and any upper layer skipping any middle layer if desired. Such techniques would be ob~ious to on~ skilled in the art. Subsçquent to completing the ~5~7~

last layer, circuit devices such as capacitors, resistors and the like can be mounted or formed so as to interconnect with the top conductive layer or pattern. Further, where desired, the pattern may include a ground plane or power plane or both.
The utilization of these materials will also be important in other circuit material applications, such as encapsulants, cover coats and for single polymer layer circuits.

Claims (16)

Claims
1. A multilayer cirucit device comprising a substrate having a metallized pattern thereon and a plurality of polymeric dielectric film layers each having a metallized circuit pattern thereon with metallized microvias interconnecting the metallized patterns of one layer with that of at least one other metallized layer thereunder, said polymeric dielectric layer being formed from a photodefinable triazine base mixture including a photosensitive acrylate moiety.
2. The device of claim 1, wherein the triazine mixture comprises 40 to 65 weight percent triazine, 0 to 30 weight percent rubber resin, 0 to 50 weight percent of a member of a group consisting of an epoxy acrylate hybrid resin and a combination of an epoxy resin and an acrylate resin, 0 to 12 weight percent of a hardener, 0 to 8 weight percent of a crosslinking agent, 0 to 5 weight percent of a coupling agent and 1/2 to 3 weight percent of a photoinitiator.
3. The device as set forth in claim 2, wherein the rubber resin is an acrylonitrile butadiene rubber, the epoxy and acrylate is in the form of a hybrid epoxy-acrylate resin which is carboxy or vinyl terminated and the coupling agent is a silane coupling agent.
4. The device recited in claim 3 further including N-vinylpyrrolidone as the hardener, and 2,2-dimethoxy-2-phenylacetophenone as the photoinitiator.
5. The device as recited in claim 2 further including a surfactant and a copper chelate thermostabilizer.
6. The device as recited in claim 1, wherein the triazine mixture comprises:
triazine - 50-60 weight percent;
half acrylate of the diglycidyl ether of bisphenol-A - 20-30 weight percent;
N-vinylpyrrolidone - 5-12 weight percent;

trimethylolpropanetriacrylate - 2-6 weight percent;
glycidoxypropyltrimethoxysilane - 2-5 weight percent; and 2,2-dimethoxy-2-phenylacetophenone - 1-3 weight percent.
7. The device recited in claim 1, wherein the triazine mixture comprises:
triazine - 50-60 weight percent;
acrylated acrylonitrile butadiene rubber - 10-25 weight percent;
half acrylate of the diglycidyl ether of bisphenol-A - 5-15 weight percent;
N-vinylpyrrolidone - 5-12 weight percent;
epoxy propylacrylate - 1-5 weight percent;
trimethylolpropanetriacrylate - 2-6 weight percent;
glycidoxypropyltrimethoxysilane - 2-5 weight percent; and 2,2-dimethoxy-2-phenylacetophenone - 1-3 weight percent.
8. The device recited in claim 1, wherein the triazine mixture comprises:
triazine - 50-55 weight percent;
acrylated acrylonitrile butadiene rubber - 20-30 weight percent;
half acrylate of the diglycidyl ether of bisphenol-A - 5-15 weight percent;
N-vinylpyrrolidone - 5-12 weight percent;
trimethylolpropanetriacrylate - 2-4 weight percent;
glycidoxypropyltrimethoxysilane - 1-5 weight percent;
2,2-dimethoxy-2-phenylacetophenone - 1-3 weight percent;
pigment - 0.25-1 weight percent;

surfactant - 0.1-1 weight percent; and stabilizer - 0.2-1 weight percent.
9. A photodefinable dielectric material comprising a triazine mixture which mixture comprises 40-65 weight percent triazine, 0-30 weight percent rubber resin, 0-50 weight percent of a member of a group consisting of an epoxy acrylate hybrid resin and a combination of an epoxy resin and an acrylate resin, 0-12 weight percent of a hardener, 0-8 weight percent of a crosslinking agent, 0-5 weight percent of a coupling agent and 1/2-3 weight percent of a photoinitiator.
10. The mixture as set forth in claim 9, wherein the rubber resin is an acrylonitrile butadiene rubber, the epoxy and acrylate is a hybrid epoxy-acrylate resin which is carboxy or vinyl terminated and the coupling agent is a silane coupling agent.
11. The mixture recited in claim 10 further including N-vinylpyrrolidone as the hardener, and 2,2-dimethoxy-2-phenylacetophenone as the photoinitiator.
12. The mixture as recited in claim 11 further including a surfactant and a copper chelate thermostabilizier.
13. The mixture as recited in claim 9 comprising:
triazine - 50-60 weight percent;
half acrylate of the diglycidyl ether of bisphenol-A - 20-30 weight percent;
N-vinylpyrrolidone - 5-12 weight percent;
trimethylolpropanetriacrylate - 2-6 weight percent;
glycidoxypropyltrimethoxysilane - 2-5 weight percent; and 2,2-dimethoxy-2-phenylacetophenon - 1-3 weight percent.
14. The mixture recited in claim 9 comprising:
triazine - 50-60 weight percent;

acrylated acrylonitrile butadiene rubber - 10-25 weight percent;
half acrylate of the diglycidyl ether of bisphenol-A - 5-15 weight percent;
N-vinylpyrrolidone - 5-12 weight percent;
epoxy propylacrylate - 1-5 weight percent;
trimethylolpropanetriacrylate - 2-6 weight percent;
glycidoxypropyltrimethoxysilane - 2-5 weight percent; and 2,2-dimethoxy-2-phenylacetophenone 1-3 weight percent.
15. The mixture recited in claim 9 comprising:
triazine - 50-55 weight percent;
acrylated acrylonitrile butadiene rubber - 20-30 weight percent;
half acrylate of the diglycidyl ether of bisphenol-A - 5-15 weight percent;
N-vinylpyrrolidone - 5-12 weight percent;
trimethylolpropanetriacrylate - 2-4 weight percent;
glycidoxypropyltrimethoxysilane - 1-5 weight percent;
2,2-dimethoxy-2-phenylacetophenone - l-3 weight percent;
pigment - 0.25-1 weight percent;
surfactant - 0.1-1 weight percent; and stabilizer - 0.2-1 weight percent.
16. An electronic device having a layer thereon which layer is formed from a photodefinable triazine based mixture.
CA000477379A 1984-04-06 1985-03-25 Multilayer hybrid integrated circuit Expired CA1254789A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/597,626 US4554229A (en) 1984-04-06 1984-04-06 Multilayer hybrid integrated circuit
US597,626 1984-04-06

Publications (1)

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CA1254789A true CA1254789A (en) 1989-05-30

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US (1) US4554229A (en)
EP (1) EP0176555B1 (en)
JP (1) JPS61501806A (en)
CA (1) CA1254789A (en)
DE (1) DE3566767D1 (en)
WO (1) WO1985004780A1 (en)

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WO1985004780A1 (en) 1985-10-24
JPH0447475B2 (en) 1992-08-04

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