CA1321661C - Wafer handling system - Google Patents
Wafer handling systemInfo
- Publication number
- CA1321661C CA1321661C CA000616010A CA616010A CA1321661C CA 1321661 C CA1321661 C CA 1321661C CA 000616010 A CA000616010 A CA 000616010A CA 616010 A CA616010 A CA 616010A CA 1321661 C CA1321661 C CA 1321661C
- Authority
- CA
- Canada
- Prior art keywords
- wafer
- displacement
- indicia
- transport stage
- rotation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/682—Mask-wafer alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S414/00—Material or article handling
- Y10S414/135—Associated with semiconductor wafer handling
- Y10S414/136—Associated with semiconductor wafer handling including wafer orienting means
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S414/00—Material or article handling
- Y10S414/135—Associated with semiconductor wafer handling
- Y10S414/137—Associated with semiconductor wafer handling including means for charging or discharging wafer cassette
- Y10S414/138—Wafers positioned vertically within cassette
Abstract
ABSTRACT Method and apparatus are disclosed for pre-aligning the transport stage of an automated wafer handling lithographic system. The wafer is first rotated and its displacement in X, Y, and O from a desire orientation is determined. The wafer chuck of the transport stage is then displaced by a compensating amount.
Description
WAFER HANDLING SYSTEM
Technical Field This invention pertains to the automatic handling of semiconductor wafers in a lithographic process.
Background Art Conventionally, semiconductor wafers are coated with photoresist material and exposed to radiation from a mercury lamp in order to apply electrical circuits thereon. This process is repeated a number of times, typically in a projection mask alignment and exposure system. It is extremely important that a wafer be precisely oriented for each exposure in order to insure correct registration of each successive image. The usual methods of transporting a wafer within such a system have been by means of belts and air tracks. However, these methods have not provided sufficiently positive control.
As a result, wafers have tended to slide and bounce, thereby generating particles which, upon landing on the wafer could damage the micro circuits being printed.
Accordingly, it is an object of this invention to increase the control exercised over each wafer while, at the same time, precisely aligning each wafer with a :. ~
minimum of handling. The manner in which this is achieved will be apparent from the following desGription and appended claims.
Disclosure of Invention A randomly oriented semiconductor wafer contained in an input cassette is automatically removed from the cassette and, in one revolution, is Gharacterized in X, Y, and 0 with respect to a spin axis. It is rotated to a predetermined 0 position and is transferred onto a transport stage that has been pre-positioned in X and Y, in accordance with the offsets determined during rotation.
Brief Description of Drawings FIG. 1 is a partially schematic plan view which illustrates the movement of a wafer in accordance with the invention;
FIG. 2 is an elevational cross-section through the pre-aligner of the invention;
FIG. 3 is an enlarged detail, partially in cross-section, of the input shuttle of the invention;
FIG. 4 is an elevational view of the wafer lifter of the invention with portions of the wafer and wafer ~ : : .
~ .
.
1 3~1 661 chuck in cross-section;
FIG. 5 is an elevation of the output shuttle of the invention; and FIG. 6 is a right end view of the shuttle of FIG.
5.
Best Mode for Carrying out the Invention Illustrated in FIG. 1 are portions of the structure 10 of an automated lithographic instrument for the production of semiconductor wafers. An input cassette 12 of conventional construction holds a plurality of wafers 14 in random orientation. As will be apparent from the plan view of FIG. 1, the wafers 14 within the cassette 12 are horlzontally positioned. The cassette 12 is lowered by means of a lead screw (not shown) in fixed increments to successively deposit each of the wafers 14 onto a load shuttle 16. The load shuttle 16 includes a conventional hook shaped portion having a vacuum groove for securely retaining the wafer 14.
The load shuttle 16 is connected for reciprocation along a "loading" air bar 18 which is of conventional construction, i.e., a square tube 20 movable along and spaced from a bar 22 by means of air pressure.
Each of the wafers 14 is transported in turn by the load . ~ ~
shuttle 16 to a position designated 14a above a pre-aligner.
The pre-aligner, which is illustrated in FIG. 2, comprises a base member 24 from whiGh a motor assembly 26 is suspended by a pair of leaf flexures 28a, 28b. The motor assembly 26 comprises a support housing 30 to which is secured a dc motor 32. The motor shaft 34 extends upwardly through bearings 36 to a spinner 38 which defines a vacuum chamber 40 connected by a channel 42 to a vacuum source 44. The vertical position of the motor assembly 26 is controlled by an air pot 46 and limit stops 48. The air pot 46 forces the motor assembly 26 upward so that the spinner 38 engages the underside of the wafer at 14a and vacuum is applied to chamber 40.
The vacuum on load shuttle 16 releases and the load shuttle is retracted along the air bar 18 into its initial position to extraGt the next wafer. The motor assembly 26 is then retracted by the air pot 46 to the position indicated in FIG. 2.
Positioned above the edge of the wafer 14 is a detector array 50. This may be a commercially available detector such as the Fairchild CCD 143 comprising a linear array of light detecting elements. Positioned below the wafer and the array 50 is an illumination system 52 comprising a light source 54 and collimating lens 56. As will be apparent from FIG. 2, a portion of .
the light from the illuminating system 52 is blocked by the wafer 14 from reaGhing the detector array 50. If the Genter of the wafer 14 is exaGtly aligned with the axis of rotation of the spinner 38, the amount of light received by the deteGtor array 50 remains Gonstant throughout a revolution of the wafer (exGept for that passed by the notGh or flat described below). If, however, the wafer is offset in X or Y (mutually orthogonal axes in the plane of the wafer), the output from the detector array 50 will be cyGliGally variable.
This output is supplied to a central processing unit (CPU) 58 which is programmed to determine the X and Y
offsets.
The manufacturers of semiGonductor wafers incorporate some type of angular, or "0" indicia on each wafer to indicate the direGtion of crystal growth. This is required because it is important for chip produGers to properly position cirGuits in accordance with crystal orientation. The wafer shown in position 14a of FIG. 1 carries a small notch 60 as a 0 indicia. Flats are also widely used for this purpose. In any event, during the one rotation of the wafer 14, the 0 indicia will be readily noted by the presence of an extra light pulse at detector 50 which passes a resulting signal to the central processing unit 58. It is then a simple matter for the central processing unit 58 to command the motor . ~ .
~ , , 32 to stop with the 0 indicator in a desired predetermined position.
The X and Y offsets computed by the central processing unit 58 are employed to pre-position a vacuum chuck 62 which forms a portion of a transport stage which will be employed to expose the wafer to a circuit pattern. Upon completion of pre-alignment, the spinner once again raises the wafer to the 14a position where it is engaged by an input shuttle 64 mounted for translation along the X direction on an air bar 66. As will be apparent from FIG. 3, the input shuttle assembly 64 includes a shuttle arm 68 having the usual C-shaped vacuum groove 70 for securely holding a wafer 14. It is mounted on a shaft 72 for 90 pivotal rotation on bearings 74 under control of a stepping motor 76 through gear box 78.
After acquiring the wafer 14, the input shuttle 68 moves in the X direction to the left as viewed in FIG. 1 and, at the same time, it is rotated downwardly through 90 to position the wafer 14 in a vertical plane in order that it may be acquired by the pre-positioned vacuum chuck 62 of the transport stage.
Vacuum chuck 62 acquires the wafer by the mechanism shown in FIG. 4. This comprises a head 80 carrying rubber vacuum cups 82 mounted on flexures 84 under the control of an air pot 86. The air pot 86 forces the head 80 through the central opening in chuck 62 permitting the vacuum cups 82 to engage the wafer 14.
The assembly is then retracted to place the wafer 14 on the vacuum chuck 62 where it is retained by the vacuum grooves 88. As explained above, the vacuum chuck 62 has been pre-positioned to compensate for the initial X and Y
displacements seen by detector 50. This pre-positioning may be accomplished by means of a planar force motor such as those described, for example, in the following United States Patents:
4,485,339 of Trost for "Electro-Magnetic Alignment Device";
4,506,205 of Trost and Galburt for "Electro-Magnetic Alignment Apparatus"; and 4,507,597 of Trost for "Electro-Magnetic Alignment Assemblies".
SuGh motors provide very accurate control of rotational position. Accordingly, they are employed to make very fine adjustments in 0 as well as X and Y.
When the wafer 14 has been accurately positioned on the chuck 62 it is advanced to the exposure stage (which does not form a part of this invention). After exposure, the wafer is unloaded by the output shuttle assembly illustrated in FIGS. 5 and 6. The output shuttle 90 engages the wafer 14 as shown in FIG. 5 and is then retracted to the dotted line position. It also ~ :.: . : :
` 1 32 1 66 1 rotates the wafer 90 to a horizontal position from which it is inserted into the output cassette 92. As this cassette is located on a different level from that of the input cassette 12, it is illustrated in FIG. 1 by dotted lines.
It will be noted that the system described herein is fully automatic and requires operator assistance only for loading and unloading of the cassettes. It automatically and precisely orients each wafer prior to exposure. It will also be noted that a number of variations and modifications may be made in this invention without departing from its spirit and scope.
Accordingly, the foregoing description is to be construed as illustrative only, rather than limiting. This invention is limited only by the scope of the following claims.
, '' ~ .
Technical Field This invention pertains to the automatic handling of semiconductor wafers in a lithographic process.
Background Art Conventionally, semiconductor wafers are coated with photoresist material and exposed to radiation from a mercury lamp in order to apply electrical circuits thereon. This process is repeated a number of times, typically in a projection mask alignment and exposure system. It is extremely important that a wafer be precisely oriented for each exposure in order to insure correct registration of each successive image. The usual methods of transporting a wafer within such a system have been by means of belts and air tracks. However, these methods have not provided sufficiently positive control.
As a result, wafers have tended to slide and bounce, thereby generating particles which, upon landing on the wafer could damage the micro circuits being printed.
Accordingly, it is an object of this invention to increase the control exercised over each wafer while, at the same time, precisely aligning each wafer with a :. ~
minimum of handling. The manner in which this is achieved will be apparent from the following desGription and appended claims.
Disclosure of Invention A randomly oriented semiconductor wafer contained in an input cassette is automatically removed from the cassette and, in one revolution, is Gharacterized in X, Y, and 0 with respect to a spin axis. It is rotated to a predetermined 0 position and is transferred onto a transport stage that has been pre-positioned in X and Y, in accordance with the offsets determined during rotation.
Brief Description of Drawings FIG. 1 is a partially schematic plan view which illustrates the movement of a wafer in accordance with the invention;
FIG. 2 is an elevational cross-section through the pre-aligner of the invention;
FIG. 3 is an enlarged detail, partially in cross-section, of the input shuttle of the invention;
FIG. 4 is an elevational view of the wafer lifter of the invention with portions of the wafer and wafer ~ : : .
~ .
.
1 3~1 661 chuck in cross-section;
FIG. 5 is an elevation of the output shuttle of the invention; and FIG. 6 is a right end view of the shuttle of FIG.
5.
Best Mode for Carrying out the Invention Illustrated in FIG. 1 are portions of the structure 10 of an automated lithographic instrument for the production of semiconductor wafers. An input cassette 12 of conventional construction holds a plurality of wafers 14 in random orientation. As will be apparent from the plan view of FIG. 1, the wafers 14 within the cassette 12 are horlzontally positioned. The cassette 12 is lowered by means of a lead screw (not shown) in fixed increments to successively deposit each of the wafers 14 onto a load shuttle 16. The load shuttle 16 includes a conventional hook shaped portion having a vacuum groove for securely retaining the wafer 14.
The load shuttle 16 is connected for reciprocation along a "loading" air bar 18 which is of conventional construction, i.e., a square tube 20 movable along and spaced from a bar 22 by means of air pressure.
Each of the wafers 14 is transported in turn by the load . ~ ~
shuttle 16 to a position designated 14a above a pre-aligner.
The pre-aligner, which is illustrated in FIG. 2, comprises a base member 24 from whiGh a motor assembly 26 is suspended by a pair of leaf flexures 28a, 28b. The motor assembly 26 comprises a support housing 30 to which is secured a dc motor 32. The motor shaft 34 extends upwardly through bearings 36 to a spinner 38 which defines a vacuum chamber 40 connected by a channel 42 to a vacuum source 44. The vertical position of the motor assembly 26 is controlled by an air pot 46 and limit stops 48. The air pot 46 forces the motor assembly 26 upward so that the spinner 38 engages the underside of the wafer at 14a and vacuum is applied to chamber 40.
The vacuum on load shuttle 16 releases and the load shuttle is retracted along the air bar 18 into its initial position to extraGt the next wafer. The motor assembly 26 is then retracted by the air pot 46 to the position indicated in FIG. 2.
Positioned above the edge of the wafer 14 is a detector array 50. This may be a commercially available detector such as the Fairchild CCD 143 comprising a linear array of light detecting elements. Positioned below the wafer and the array 50 is an illumination system 52 comprising a light source 54 and collimating lens 56. As will be apparent from FIG. 2, a portion of .
the light from the illuminating system 52 is blocked by the wafer 14 from reaGhing the detector array 50. If the Genter of the wafer 14 is exaGtly aligned with the axis of rotation of the spinner 38, the amount of light received by the deteGtor array 50 remains Gonstant throughout a revolution of the wafer (exGept for that passed by the notGh or flat described below). If, however, the wafer is offset in X or Y (mutually orthogonal axes in the plane of the wafer), the output from the detector array 50 will be cyGliGally variable.
This output is supplied to a central processing unit (CPU) 58 which is programmed to determine the X and Y
offsets.
The manufacturers of semiGonductor wafers incorporate some type of angular, or "0" indicia on each wafer to indicate the direGtion of crystal growth. This is required because it is important for chip produGers to properly position cirGuits in accordance with crystal orientation. The wafer shown in position 14a of FIG. 1 carries a small notch 60 as a 0 indicia. Flats are also widely used for this purpose. In any event, during the one rotation of the wafer 14, the 0 indicia will be readily noted by the presence of an extra light pulse at detector 50 which passes a resulting signal to the central processing unit 58. It is then a simple matter for the central processing unit 58 to command the motor . ~ .
~ , , 32 to stop with the 0 indicator in a desired predetermined position.
The X and Y offsets computed by the central processing unit 58 are employed to pre-position a vacuum chuck 62 which forms a portion of a transport stage which will be employed to expose the wafer to a circuit pattern. Upon completion of pre-alignment, the spinner once again raises the wafer to the 14a position where it is engaged by an input shuttle 64 mounted for translation along the X direction on an air bar 66. As will be apparent from FIG. 3, the input shuttle assembly 64 includes a shuttle arm 68 having the usual C-shaped vacuum groove 70 for securely holding a wafer 14. It is mounted on a shaft 72 for 90 pivotal rotation on bearings 74 under control of a stepping motor 76 through gear box 78.
After acquiring the wafer 14, the input shuttle 68 moves in the X direction to the left as viewed in FIG. 1 and, at the same time, it is rotated downwardly through 90 to position the wafer 14 in a vertical plane in order that it may be acquired by the pre-positioned vacuum chuck 62 of the transport stage.
Vacuum chuck 62 acquires the wafer by the mechanism shown in FIG. 4. This comprises a head 80 carrying rubber vacuum cups 82 mounted on flexures 84 under the control of an air pot 86. The air pot 86 forces the head 80 through the central opening in chuck 62 permitting the vacuum cups 82 to engage the wafer 14.
The assembly is then retracted to place the wafer 14 on the vacuum chuck 62 where it is retained by the vacuum grooves 88. As explained above, the vacuum chuck 62 has been pre-positioned to compensate for the initial X and Y
displacements seen by detector 50. This pre-positioning may be accomplished by means of a planar force motor such as those described, for example, in the following United States Patents:
4,485,339 of Trost for "Electro-Magnetic Alignment Device";
4,506,205 of Trost and Galburt for "Electro-Magnetic Alignment Apparatus"; and 4,507,597 of Trost for "Electro-Magnetic Alignment Assemblies".
SuGh motors provide very accurate control of rotational position. Accordingly, they are employed to make very fine adjustments in 0 as well as X and Y.
When the wafer 14 has been accurately positioned on the chuck 62 it is advanced to the exposure stage (which does not form a part of this invention). After exposure, the wafer is unloaded by the output shuttle assembly illustrated in FIGS. 5 and 6. The output shuttle 90 engages the wafer 14 as shown in FIG. 5 and is then retracted to the dotted line position. It also ~ :.: . : :
` 1 32 1 66 1 rotates the wafer 90 to a horizontal position from which it is inserted into the output cassette 92. As this cassette is located on a different level from that of the input cassette 12, it is illustrated in FIG. 1 by dotted lines.
It will be noted that the system described herein is fully automatic and requires operator assistance only for loading and unloading of the cassettes. It automatically and precisely orients each wafer prior to exposure. It will also be noted that a number of variations and modifications may be made in this invention without departing from its spirit and scope.
Accordingly, the foregoing description is to be construed as illustrative only, rather than limiting. This invention is limited only by the scope of the following claims.
, '' ~ .
Claims (6)
1. The method of precisely positioning a semiconductor disc wafer bearing O indicia on a transport stage prior to optical exposure in a lithographic process which comprises:
rotating the wafer about an axis normal to its major plane;
observing the displacement of the wafer edge relative to a fixed spatial location during rotation;
determining from the edge displacement, the displacement of the wafer center along orthogonal X and Y
axes from the axis of rotation;
observing the O indicia during said rotation;
stopping rotation of the wafer with its O indicia substantially located in a predetermined position;
positioning the transport stage along orthogonal X and Y axes to compensate for wafer center displacement and for the remaining displacement of the O indicia from the predetermined position; and depositing the wafer onto the transport stage whereby said wafer is accurately positioned thereon in X, Y, and O.
rotating the wafer about an axis normal to its major plane;
observing the displacement of the wafer edge relative to a fixed spatial location during rotation;
determining from the edge displacement, the displacement of the wafer center along orthogonal X and Y
axes from the axis of rotation;
observing the O indicia during said rotation;
stopping rotation of the wafer with its O indicia substantially located in a predetermined position;
positioning the transport stage along orthogonal X and Y axes to compensate for wafer center displacement and for the remaining displacement of the O indicia from the predetermined position; and depositing the wafer onto the transport stage whereby said wafer is accurately positioned thereon in X, Y, and O.
2. The method of claim 1 wherein said wafer is rotated no more than one revolution.
3. The method of claim 1 including the additional step of removing said wafer from a storage cassette prior to the rotating step.
4. Apparatus for precisely positioning a semiconductor disc wafer bearing O indicia on a transport stage prior to optical exposure in a lithographic process which comprises:
means for rotating the wafer about an axis normal to its major plane;
means for determining the displacement of the wafer edge relative to a fixed spatial location during rotation of the wafer;
means responsive to said O indicia for halting rotation of the wafer with said O indicia substantially located in a predetermined position;
means responsive to wafer edge displacement and to O indicia location for positioning said transport stage along orthogonal X and Y to compensate for wafer center displacement and for the remaining displacement of the O indicia from the predetermined position; and means for depositing the wafer onto the transport stage whereby said wafer is accurately positioned thereon in X, Y, and O.
means for rotating the wafer about an axis normal to its major plane;
means for determining the displacement of the wafer edge relative to a fixed spatial location during rotation of the wafer;
means responsive to said O indicia for halting rotation of the wafer with said O indicia substantially located in a predetermined position;
means responsive to wafer edge displacement and to O indicia location for positioning said transport stage along orthogonal X and Y to compensate for wafer center displacement and for the remaining displacement of the O indicia from the predetermined position; and means for depositing the wafer onto the transport stage whereby said wafer is accurately positioned thereon in X, Y, and O.
5. The apparatus of claim 4 wherein said edge displacement determining means comprises a light source on one side of said wafer and a light detector on the other side of said wafer.
6. The apparatus of claim 4 wherein said depositing means comprises:
a shuttle adapted to retain said wafer by vacuum;
and a vacuum chuck on said transport stage adapted to receive the wafer from the shuttle.
a shuttle adapted to retain said wafer by vacuum;
and a vacuum chuck on said transport stage adapted to receive the wafer from the shuttle.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/012,538 US4846626A (en) | 1987-02-09 | 1987-02-09 | Wafer handling system |
| US012,538 | 1987-02-09 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000558132A Division CA1285335C (en) | 1987-02-09 | 1988-02-04 | Wafer handling system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1321661C true CA1321661C (en) | 1993-08-24 |
Family
ID=21755440
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000558132A Expired - Lifetime CA1285335C (en) | 1987-02-09 | 1988-02-04 | Wafer handling system |
| CA000616010A Expired - Fee Related CA1321661C (en) | 1987-02-09 | 1991-02-27 | Wafer handling system |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000558132A Expired - Lifetime CA1285335C (en) | 1987-02-09 | 1988-02-04 | Wafer handling system |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4846626A (en) |
| EP (1) | EP0278462B1 (en) |
| JP (1) | JP2591776B2 (en) |
| KR (1) | KR960010142B1 (en) |
| CA (2) | CA1285335C (en) |
| DE (1) | DE3889473T2 (en) |
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| US5277539A (en) * | 1988-09-30 | 1994-01-11 | Canon Kabushiki Kaisha | Substrate conveying apparatus |
| IT1228105B (en) * | 1988-12-20 | 1991-05-28 | Sgs Thomson Microelectronics | CLAMP FOR HANDLING, ADVANTAGEOUSLY ROBOTIC, OF ONE OR MORE SLICES OF SILICON AND / OR A SUPPORT OF SUCH SLICES |
| JP2683933B2 (en) * | 1989-01-20 | 1997-12-03 | 信越半導体株式会社 | Inspection device for front and back and orientation of semiconductor wafer |
| US5238354A (en) * | 1989-05-23 | 1993-08-24 | Cybeq Systems, Inc. | Semiconductor object pre-aligning apparatus |
| JP2642216B2 (en) * | 1989-05-23 | 1997-08-20 | サイベック システムズ | Semiconductor article pre-positioning method and apparatus |
| EP0452041B1 (en) * | 1990-04-06 | 1996-11-27 | Canon Kabushiki Kaisha | Substrate conveying device and method of controlling the same |
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| US4556362A (en) * | 1983-12-21 | 1985-12-03 | At&T Technologies, Inc. | Methods of and apparatus for handling semiconductor devices |
| US4539695A (en) * | 1984-01-06 | 1985-09-03 | The Perkin-Elmer Corporation | X-Ray lithography system |
| JPS60192345A (en) * | 1984-03-14 | 1985-09-30 | Hitachi Ltd | Wafer positioning device |
| GB2156582A (en) * | 1984-03-29 | 1985-10-09 | Perkin Elmer Corp | Small part transport system |
| US4566726A (en) * | 1984-06-13 | 1986-01-28 | At&T Technologies, Inc. | Method and apparatus for handling semiconductor wafers |
| JPS61228644A (en) * | 1985-04-02 | 1986-10-11 | Hitachi Electronics Eng Co Ltd | Alignment apparatus for wafer |
-
1987
- 1987-02-09 US US07/012,538 patent/US4846626A/en not_active Expired - Lifetime
-
1988
- 1988-02-04 CA CA000558132A patent/CA1285335C/en not_active Expired - Lifetime
- 1988-02-08 DE DE3889473T patent/DE3889473T2/en not_active Expired - Lifetime
- 1988-02-08 EP EP88101813A patent/EP0278462B1/en not_active Expired - Lifetime
- 1988-02-09 JP JP63026708A patent/JP2591776B2/en not_active Expired - Lifetime
- 1988-02-09 KR KR1019880001177A patent/KR960010142B1/en not_active IP Right Cessation
-
1991
- 1991-02-27 CA CA000616010A patent/CA1321661C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP0278462A3 (en) | 1990-08-16 |
| CA1285335C (en) | 1991-06-25 |
| KR960010142B1 (en) | 1996-07-26 |
| JP2591776B2 (en) | 1997-03-19 |
| EP0278462A2 (en) | 1988-08-17 |
| EP0278462B1 (en) | 1994-05-11 |
| US4846626A (en) | 1989-07-11 |
| DE3889473T2 (en) | 1994-08-25 |
| KR880010474A (en) | 1988-10-10 |
| DE3889473D1 (en) | 1994-06-16 |
| JPS63308339A (en) | 1988-12-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKLA | Lapsed | ||
| MKLA | Lapsed |
Effective date: 20030825 |