CA2003821A1 - Process controller single memory chip shadowing technique - Google Patents

Process controller single memory chip shadowing technique

Info

Publication number
CA2003821A1
CA2003821A1 CA2003821A CA2003821A CA2003821A1 CA 2003821 A1 CA2003821 A1 CA 2003821A1 CA 2003821 A CA2003821 A CA 2003821A CA 2003821 A CA2003821 A CA 2003821A CA 2003821 A1 CA2003821 A1 CA 2003821A1
Authority
CA
Canada
Prior art keywords
program
memory chip
address field
main
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2003821A
Other languages
French (fr)
Other versions
CA2003821C (en
Inventor
Richard J. Molnar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elsag International BV
Original Assignee
Babcock and Wilcox Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Babcock and Wilcox Co filed Critical Babcock and Wilcox Co
Publication of CA2003821A1 publication Critical patent/CA2003821A1/en
Application granted granted Critical
Publication of CA2003821C publication Critical patent/CA2003821C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules

Abstract

A process and apparatus for shadowing memory uses a single memory chip which is addressable into an address field which is smaller than the memory chip. A program having a main control portion is programmed into a main memory area of the memory chip and is directly connected to a main address space of the address field. The program also includes a plurality of secondary program portions which can be used one at a time with the main control portion of the program. Each of the secondary program portions is stored in a separate secondary and shadowed memory area of the memory chip. A secondary address space of the address field which is large enough to accommodate only one secondary memory area at a time, is controlled so as to be latched to only one secondary memory area at a time. Latching is achieved through higher bits of address locations in a selected portion of the address field. Interrupt and power-up routines are provided in the main portion of the program to avoid entering and leaving the program through different secondary program portions.
CA002003821A 1989-04-20 1989-11-24 Process controller single memory chip shadowing technique Expired - Fee Related CA2003821C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US34098589A 1989-04-20 1989-04-20
US340,985 1989-04-20

Publications (2)

Publication Number Publication Date
CA2003821A1 true CA2003821A1 (en) 1990-10-20
CA2003821C CA2003821C (en) 1996-12-03

Family

ID=23335773

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002003821A Expired - Fee Related CA2003821C (en) 1989-04-20 1989-11-24 Process controller single memory chip shadowing technique

Country Status (5)

Country Link
US (1) US5410665A (en)
EP (1) EP0393281A3 (en)
JP (1) JPH0752409B2 (en)
AU (1) AU628519B2 (en)
CA (1) CA2003821C (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5537627A (en) * 1993-09-08 1996-07-16 Hilevel Technology, Inc. Microprogrammable processor capable of accessing unused portions of control store as fast data memory
DE19720990A1 (en) * 1997-05-20 1998-11-26 Alsthom Cge Alcatel Program-controlled setup with the possibility of reloading and switching to the second operating system without program interruption
DE19829615A1 (en) * 1997-07-10 1999-02-25 Schenck Vibro Gmbh Program memory expansion for microprocessor
US5986962A (en) * 1998-07-23 1999-11-16 International Business Machines Corporation Internal shadow latch
US6968469B1 (en) 2000-06-16 2005-11-22 Transmeta Corporation System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5171648A (en) * 1974-12-18 1976-06-21 Panafacom Ltd
US4503491A (en) * 1981-06-29 1985-03-05 Matsushita Electric Industrial Co., Ltd. Computer with expanded addressing capability
US4475176A (en) * 1981-08-06 1984-10-02 Tokyo Shibaura Denki Kabushiki Kaisha Memory control system
JPS5892054A (en) * 1981-11-27 1983-06-01 Sharp Corp Programmable chip enable circuit
JPS60205644A (en) * 1984-03-29 1985-10-17 Ascii Corp Memory address extension system
EP0179981B1 (en) * 1984-10-26 1992-08-26 International Business Machines Corporation Data processing apparatus with fixed address space and variable memory
IT1183808B (en) * 1985-04-30 1987-10-22 Olivetti & Co Spa ELECTRONIC CIRCUIT TO CONNECT A MICROPROCESSOR TO A HIGH CAPACITY MEMORY
US4755967A (en) * 1986-03-21 1988-07-05 Monolithic Memories, Inc. Programmable synchronous sequential state machine or sequencer having decision variable input mapping circuit responsive to feedback signals
JPS62260244A (en) * 1986-05-06 1987-11-12 Nintendo Co Ltd Memory cartridge
JPH0679290B2 (en) * 1987-05-31 1994-10-05 日本電気株式会社 Computer device
US5146581A (en) * 1988-02-24 1992-09-08 Sanyo Electric Co., Ltd. Subprogram executing data processing system having bank switching control storing in the same address area in each of memory banks
JPH077353B2 (en) * 1988-10-26 1995-01-30 日本電気株式会社 Address selection method
JPH02242355A (en) * 1989-03-16 1990-09-26 Fujitsu Ltd Microprocessing system with extended address space
US4985871A (en) * 1989-11-13 1991-01-15 Chips And Technologies, Inc. Memory controller for using reserved dram addresses for expanded memory space
US5202994A (en) * 1990-01-31 1993-04-13 Hewlett-Packard Company System and method for shadowing and re-mapping reserved memory in a microcomputer

Also Published As

Publication number Publication date
JPH0752409B2 (en) 1995-06-05
AU5373690A (en) 1990-10-25
CA2003821C (en) 1996-12-03
EP0393281A2 (en) 1990-10-24
JPH033049A (en) 1991-01-09
EP0393281A3 (en) 1991-07-10
AU628519B2 (en) 1992-09-17
US5410665A (en) 1995-04-25

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