CA2023327A1 - Phase accumulator with dithered incrementing of accumulation due to fine phase components - Google Patents

Abstract

PHASE ACCUMULATOR WITH DITHERED INCREMENTING OF
ACCUMULATION DUE TO FINE PHASE COMPONENTS
ABSTRACT OF THE DISCLOSURE
A phase accumulator for accumulating digital frequency words, which, as accumulated, represent the phase of cyclic waveform of a predetermined frequency. The phase accumulator includes a coarse-component accumulator for accumulating coarse phase components of the digital frequency words; a fine-component accumulator for accumulating fine phase components of the digital frequency words; and means for incrementing the coarse-component accumulator in response to accumulation of the fine phase components. The incrementing means include means for providing a variable randomly generated value for each fine-component accumulation cycle; means for periodically sampling the accumulation of the fine phase components in relation to the randomly generated value; and means for incrementing the coarse component register for each fine-component accumulation cycle, with the phase of said incrementing being ditheredin accordance with the number of times the accumulated fine phase components exceed the randomly generated values during the sampling period.

Description

f , ~f ~
- ~23~7 PHA-~E AE:C:UMiuLATolR WITH DITHIERED ll~ REMENTlNG OF
Aclc~ LAT3o~d Dl3E!~ TO FINE PIHA~E COlVlP11:3NE~NTS
Ag:l~GROUND OF TIHE 15~VENTION
Th~ present invention gcn~rallv pertairts to phas~ accumulators, such as aro us~d in direct digital frequcncy synthesizers, and i~ particularly dirscted to dithering the pha~a at which ~ coarse-component accumulator i~ incremanted in response to accumulatlon of the fine phase componen~s.
A dir~Gt sligi~al trequerlcy syn~hcsizer generates an analo~ waveform ot a prsd~germined trequ~ncy from accumulated digit~l frequency words, whlch, as accumulated, r~presen1: the phase of a cycllc wav~torm, such as a sine wave ot s~3d predetermined frequcncy. A t~pical prior art d~r~c~ dlgital trequency synthesiz~r includes a ph~se aecumulator for accumulatln5~ the digital frequencyword$ ~nd ~ pha~e-to-ma~nituda convsrter for convertin~ th~ accumul~t~d phase value into an ~nalo0 waveform of ths pred~t~rmincd tr~quency. The phase-to-megnitude conver~sr convert3 the phaee v~lue sccumulat~d In the phass accumulator into an ~nalog si~nal magnitud0 ~or the ph~se an~le ot the eycllc w~vetorm ~ha~ is repr~sented by the phas~ v~lue in the phas~ sccumula~or.
The phfise accumula~or has 3 ieng~h o~ m blts and 1~ drlv~n at a clock rate fc~ At e~ch clock pulse, a frequency word havln0 ~ len~th ot k bits is ~dded to the pr0sen~ ~alue In the ph~se accurnulatcr. The value In the phflse acçumul~tor Incre~se~ st this ra~e untll It overflow3 loslng all bits th~t exceed 2m-1. Tho phase valw in ~he ph~se accumulator at an~ time rcpre3ents the inst~ntan~oLs phas~ ~n~le of ~he cyclic waveform over a ran~e ~F 2~ radl~n~.
There ar0 ~2m different phase V~llIU3S; and the actual ou~put frequency is ~ times fC/2m, wh0re 9 can range from one ~o 2m. The frequencv resolution is also equal ~o f~/2m, which maans that the resolution requir~ments can gcnerally be met by tr~din~ ff tc ~nd m.

i - l c 2~23327 The phasa ~ccumulator performs a phase calcul~tion onc~ aach clock cycle b~ adding the trequency word which is proportion~3 to the desired output frequellcy to the contcn~s of the phase ascumulator.
It is not prac~ically fe~sible (or n0c~sa~) to r~ain evcry bit from the phase aecumul~tor for use In ~ fr~quency syntheslzar: so the ph~se accumuiator is divided into a coars~-component accumul~tor and ~ fine-componen~ accumulaeor.
Ttle hlll m bi~s are par~itioned into c bits in the coarse-comporlcnt accumulator and ~ blts in the fln0-component accumulator. Onl-~ the c bîts of tl e coarse-componen~ accumulaeo~ are us~d to determin~ the ph~se value tor one cycle of phas~ accumula~sr output wherekv phass resolution i3 limited to 21r/2C radian~.
Both the coarse compon~nt accumulator and tl-e flne-compon~nt accL~mulator ~r~
clocked to run at a frcqu~r1cy f fc~ e minlmum frequcncy ~hDt the coarse-component accumulator can provid~3 is ~c/2C Hz. Tha tine-compon~nt accumulator provides finer frcquQncv resolution by periodiG~lly addln~ a c~rry-in to the coarse-ComponQnt accumulators LS@ of 21r~2C radi~n. ~3iven that ~he flne-component açcumulator consists of t bits and a1so runs at fc~ the lesat c~rry-in rate it can provide is tGl25. As each coarse LSB Is worth 2n/2C radlan~ the rninimum averagefraqusncy ~dded by the fine-component accumulator is 21r/2C tin-0~ ~c/2f radians/second or fJ2C~ Hz. Since m ~ c ~ ~ tha overall resolution as well as minimum ~tep ~Ize remæin~ unch~nged by the sep~r~tlon.
t:hlly ihs blt$ f~om the coarse-compon~nt accumul~or ~the c bl~s) are usad ta rspr~3~nt the necessary ph~e Intorm~ion with ~ resolution of 2~/2C
radl~n. ~ the rernslnin~ tin0-componert accumul~tor bits (~he t bits~ ot the phase acc~mul~or sre l~nor~d the output phase fune~ion ~2nerslly has ~ phase srror with respect to the total phass function contained in the phase ~ccumulator. Thephass error is slightly periodic in time wi~h ~he resultant effect o~ spurious lines or phase mod~lation ~PM) spurs (spurious si0nals) in tha output sp~ctrum.
It ha~ bees~ su~gested th~t phas~ errors due to PM sp~r~ can be -- 2~33~7 suppress~d bV dith0ring the phase at which the coarse-compon~nt accumula~or is incremented in response to accumulation of the fine pha~e components.
SUMMARY OF THE INVEIITION
~he present inv~nt~on provides a ph~se ~ccumulator in which thc phase o~ incrementln~ the coa~se-component register is randornly dith~red in such m~nn~r th~t the di~herln~ proce~s itself doe3 not in~roduce ~ur~h~r PM spurs.
The pres~n~ inv~nt~on i5 a phase accumulator for ~Gcumul3t~ng dlgital ~requ~ncy words, which, as ~ccumulated, repr~sant the phase o~ a cyclic wav~torm- ot a preds~efmin~d trequ0ncy, with ~he ph~se ~ccumulator includlng a coarse-componerl~ ~ccumulator for accumulatin~ coarse phase components of the di~ital frequency words; ~ flne componen~ accumul~tor ~or accurnulatill~ fine phase components of the dli~ital frequency words; and me~n~ for incrementln~ the coar~e-componsnt accumulator in respon~ to accumulatlon of the fine phase componen~s, wherein said incrarn~n~tlng me~ns comprise m~an3 for providing ~
varlable r~nd:omly ~nerat~d value for e~ch fine-componeng accumul~tion cycle;
me~n~ tor periodk~lly sampling ~he ascumulstion of the flrlQ ph~ compon~nts in rel~tion to the rarl~omly ~enerag0d v~lue; ~nd 1119an$ tor incremonting th~ co~rse component reyister hr e~ch tlne-componont acclimulation cycla, with the pha~e otsdld incrsm0ntin~ bain0 dithsr~d in ~ccord~rlc~ wlth the nurnber ot tlm~ tho accumulated ~In~ ph~s~ component~ exca~d ~h~ randoml~ g~nerated v~lues during tha samplln~ pcrlod.
R~ferrin~ to the Incrementing-count timing dia3r~m o~ Fi~ur~ 1, the bo~md~F~e~ ot the tina-component-accumul~tion cyC119$ are dcmarcated by solid lines A, tho rand~mlv gener3ted values for the diff~r~nt flno-component-accumulatlon cycle~ are indicat~d b~ the dash~d lln0s C, and the sampling times ara indicated by the arrows Sl, S2, S3, .... A samplin0 perlod is the intsrval betwa0n the samplin~ ~ime~ S, as de~ermined bV ~he phase cccumul3~0r clock .:

2~23~27 . . .

~ignal. The relative durations of the fine-component-accurnulatlon cycles and the s~mpling periods depends upon the samplin~ rate ~nd the ratlo of the v~lues of the flno ph~se components of the dîgital frequenc~,f worJs to th~ value of the least significant bit ot the coarse-component accumulator. For example, when sarnples are ciocked by the ph~s~ accumulatoJ clock aignal, and ths average value of the fine ph~se cornpon~n~s of thc di~ital frequ~ncy word~ is ~pproximately one-h~lt th~ value ot the le~st signiflc~nt bit o~ the coarse-componer.t accurnulator, ~he duration ~ the ~-.rcr~e fine-component-accumul~ion c~cle is approxima~ely twics th~t of ~h~ samplin~ pzriod.
Sfill refarring to Figure 1, it is ssen that at sampling timas Sl and S2, She accumulated flne ph~se componengs have exc~aded ~ r~ndomh~ ~eneratsd valua once durln~ e2ch o~ the sampling period.~ precedin~ the r~spe~lve samplil)~ timEl$
S1 and S2. Accordingly, the coarse-componeRt accumulator is th0n incrementad by a count of 1. At ~mpling time S3, the 2ccumulated tine phase components have not exc~ecied ~ randomly gener~t0d value dur3n~ the samplin0 period prec~dln~ ~he s~mplin~ time S3, whereby the coars0-componant ~ccumulator is not than incrarnen~ad. At samplinsl time S~, the accumulatsd flne ph~se components h~ve exc~0dad ~ randomly gemrfit~d v~lua twica durln~ the s~rnplin~
perlod ,arecedln~ th~ s~mplin~ time S4, whereby th~ coarse-cemponerlt accumul~tor Is then incremen~erJ by a count of 2.
The onlV ~nomslous components introd~c~d by the randomly dithered ph~a Incrom~n~ln~ sch~me c,e the present inventlon ~re hsrmonics o~ the samplln~ q~ncy, which are already present In the phase accumul3tor by virtue ot the phas~ ~ccumulator b~in~ clocked at the s~mplin~ r~te.
Addi~ional t~tures of the presant invell~ion are d~scrlbed In relation to the description of ~h~ pr~farred embodlment.

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2~2~

~RIEF DESCRI~TION OF TIIE D~WIN~
Figure 1 is an incrementing-count tlming dlagr~m for the phase acwmulator of the present invention.
Figure 2 is a bleck diagram of one pr~err0d embodlmi3nt ot the phase accumulator ot ~he pr~sant invention.
Figure 3 is a st~te diagram of th~ state machine in the phase accumulator ot FT~ure 2.
Figura 4 is a block dia~ram o~ another preferred emb~diment ot the .m phasa accumulator of the present invention.
DE55:RIPTIOI~1 QF THE PREFER~4@D EMI~Oi91MENT
Reterring to Figure 2, one preferr~d ernbodlment of the phase accumulator ot the pr0sent invention includ~s an ~-bit fine-componant register 60, an sdder 62, a ph~se r&gister 64, a cornparator 68, ~ limit register 68, ~ r2ndom nurnbar generator 70, a state machine 72, a c-bit coars~-component aceumulator 48 and 3 cloclc 45. The f-bit tine omponent re~i~ger 60, ths phase re~lster 64, th0 llmit rs~ister 68, the state m~chine 72, anci the c-bit co2rse-component acsumulator 48 a~ svnchronously clocked ~t a r~te tc by a clock slgnal provided by the ct~ck 45.
The phas~ accumulator is an m-bit accumul~or tor ~ccumulating phase compon~ o~ k bit di~ltal frequency words 52. The dl~ital frequcnc~r words 52, as accumul~ed, represent the phase ot 2 sine wsve o~ a pred~termined ~requency.
The c-bit coarse-component accumulator 48 accumulate~ co3rse phase co7nponen~s of the digital frsquency words 52; and ~he t~bit tlne-component register 60 registers fine phase components of the dlgital frequency words 52.
The fine phase componen~s are shffted in par~llel from ~he fine-:

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2~33~7 component ra~ist~r 60 throl~h the adder ~2 ~nto ~he ph~se registQr 64, and are 3ccumul~tsd in th~ phsse register 64. Whenever the tine phase components accumulated in the phas0 reglster 64 exc~ed th~ c~p~cit~ of the phase reglst~r 64, the adder 62 respond~ b~ providlng an accumulator carry bit "A~ to ths state machln~ 72 via line 76.
The coars~-component accumul~tor 48 include~ ~ coarse-componene re~lster, an adder and a phase rsgislter configur0d and operable irl the s~ma manner as the ~ine-component r~gister 60, the adder 62 ~nd ~he ph~se regist3r 64.
The comparator 66 comp~r~ the value in the phas0 re~istQr 64 with the v&tue in the limit r~gist~r 68, and provldes ~ comparator c~rry bit ~C~ to the state m~chine 72 via line 78 whanever the valua in the phase r~gister B4 exceeds th~
v~lu0 in the limit regist~r 68. The vahle in tbe limit ra~ister 681~ provid~d b~ the random numbar gen~rator 70. A new value is ent~r~d Into the limit registar 68 from the r~ndom number generator 70 ~ach time an ~nable signal "E~ is provided on lln0 80 by ths state machlne 72.
The random numb~r genaratol 70 is either ~ truly random number gsner~to~, as implement~d bV 8 nOi5~1i quantlz~tlon processor, for axampl0, or ~p~eudo random number generator, ~s implemented by a shl1t rs~ist~r scquenca gan~tnr, for ex~mpla The term ~r~ndom number, ~ used hereln, means both truly r~ndom number~ and pseudo random numbars.
Each tim0 the state machin~ 72 Is s&mpled by the clock si~nal ~rom the clock 45, th~ ~t~te rnachlne 72 provide~ a carr~ count of either 0, 1, or 2 to the co~ componon~ re~lst~r 48 via line~ 82 in accordance with the number ot times the acoumlll,3ted flne ph~se componen~s excesd ehe randornly ~ener~t~d valu0 ZO durln0 the ~amplln~ period, as indlc~ted by a comblnation of the stat~ ot the state machine 72 and whether an accurnulator carry bi~ A and/or a comparator carry bitC is providad to the state machine 72 when the state machin0 72 i~ sampled.

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The add0r o~ the eoarss-component aeclJmulator 48 incr~ments the accusrul~ted coarse phase components in th~ pha~e r~ t0r th~reof by the carry count on line 82 from the state rnachine 72 goyeth~r with and ~ the same time ~swhen it ir;crement3 such accumulated co~rw phase components by ~he coarse ph~ss compon~n~ in the coarse-componant re~ist0r ther~of. .
A stat0 di~gram for the stats m~chine 72 i~ set forth as Fi~ure 3; and Tabl~ 1 s~s forth tha response of the statc machine 72 to the combinstions of the accumulator carry bit A and the compara~or car~y bit l:: durin~ ~ch of three diffarent states o~ the state machine 91.

2~2~32~ `

ST~ C COUNT ~ N~ STATE
O O O
O O

3 7 ~ 1 1 3 Tabl~ 1 The fi~5t st~t9 1, stat0 1, repre~ents the prevlou~ s~mpllng period; ~he second ~t~t~, st~te 2, represent~ the presont s~mpling per~od; and ~he thirti state, stat~ 3~ r~pr0sent ~h~ n*xt s~rnplin~ period. The ~E~ column indicat0s the condi~ion~ undor which an en~ble signal E is provid~d by the st~te m~chin~ 72 to~ha limlt re01st~r 68 for rs~is~aring a new random valua in the limit register 68.
Th~ ~NEX~ STATE" column indicates the state oll the state machine 72 durlng ths subsequent sampling perioai.
R~fe~lrlg to Figur~ 4, sno~her pre~rr~ smbosilment ot the pha~e ~2~27 accumul~tor of the present inv~ntion includes ~n f-blt finQ-component re~ist~r 84, an adder 35, a phase regi~ter 86, a first comp~ratw 87, a second comparator 88, a limit rsgister 89, ~ random number gencra~ar ~O, ~ state m3chine 91, a c-bit co~rse-component accumulator 48 and a clock 45. The f-bit flne-component register 84, the phase register 86, the limit r~gister 89, the state machins g1, and the c-bit coarse-cornponellt accumulator 48 ara synchronously eloek~d at a rate fc b~ clock sign~i provided bV the clock 45.
The phase accurnulator is an rn-bit accurnula~or for ~couglulating phase cornponents ot k-bit di~ital frequancy words 52. The dl~it~l frequencv wcrds 52,as accumulated, repr~sent the phase of ~ stn~ w3ve ot a predetermin~d frcquancy.
The c-bit coarse-componant accumulstor 48 accumul~tes coarse phase eomponent~ of the digit~l fr~quencv words 52; and the f-bit fin~componant re~is~er 84 re~istersfine phase components o~the aiisitalfr0quency words 52.
The fin~ phase components are ~hi~sd in parallel trom the fine-component re~ister 84 thraugh the adder 85 into the phass register 86, and are sccumul~ted in the phase register 86. Whsnaver the finc phase components acoumul~eed in the ph~se register 8~ exceed the c~p~city of the phsse r0gister 86, the adder 85 responds bV providin~ an ~ccumul3tor carr~ bit ~A~ to th0 st~t~
m~chine 91 vi~ llne 93.
The çoars~ component-accumul~tor 48 Inelude~ a coarse-somponant reg~ste~, ~n ~dd~r ~nd ~ phase reg~stsr confl~ur~d an~ operable In the s~me marina~ u9 th~ fine-cornponent register 84, the ~dder 85 and the ph~se register 86.
Tho tirst comparator $7 comparss the value In the phase reglster 86 with th0 value then provided ~y ~ha r3ndom nurnber 00ner~tor 90 and provid~
~5 comparntor carrV bl~ "C1~ to the stata macllin9 91 via line ~4 whsnever tha value in thc phase register 86 axceeds the value then provided by the random number ~eneratoF 90.

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~: f ) 2~3~7 The second cornp~r~tor 88 compares the v~lue in the phasæ rs~ister 86 with the value in ~h~ llmit re~lster 89, and provlde~ a cemp~ra~or c~rr~ bi~ nC2~ to the state m~chine 91 vi~ lln0 95 whenever the valu~ in ths phase re3~ister 8~
exceeds the value in the limit register 89. The vdlue in the limit raglster 89 is provided by th~ random numbeY ~enerator 9O. A new v~lue is enter~d into the limle registsf 89 from the r~ndom number gQner3tor ~O in respon~e to ~ach clock pu~sa from the closlc 45. The valu~ in ~he iimi~ register 89 Is the sam~ as thatprovided b~l th~ random number genera~or 90 durin~ th~ previou~ s~mpling period.
This use of the two comparator~ 87, 88 in comparison to th~ use of only one oom~r~tor in th~ embodiment ot Figs~re 2 silows the timit registsr 89 to be lo~dad ind~p~nd0rltl~ of the tunctlonin~ of the s~ata machllle 91, which In tursl enabl~ the ~ener~isn of the ~ocumu~tor carr~t bit A to b~ tully plp~lined wi~h the ~enera~loll ot the comp~rator carry bits C1 and C:2. How0veF, the v~lue ot the fine phase component3 of the frequency words 52 must be at ie~ one-half the value ot ~ho le~st significan~ bit ot the coarse-compon~nt accumulator 48, whlch in turn limits the number of comparison~ to noe more th~n two durln5~ any on~ ~ine-phase-aomponant-acsumula~ion perio~i.
Each tirne the atate rn2chine 9î i~ sampled Iby the closk signal trom tha clock 45, the stat~ mschine 91 pro~ida~ ~ c~rry count of eith~r 0, 1, or 2 to the coarse compon~nt re~i3ter 48 vl~ llne~ 97 In accordsnce wlth the number of time~~he accumul~ted fln~ phas0 component~ exceed ths rdndomly gonerated valua durin~ tho ~mplin~ p0rlod, as Indlcatod by a combinatlon o~ the statc ot the state m~chlno 91 utd whsther 31t accumul~tor carry blt A ~nd/or ~ comp~rator carry bitCl or C2 1~ provld~d to the staee mach~ne 9t when th~ st~te machine 91 i5 ~ampled.
The adde~ oF the coarse-compon~nt accumulator 48 incraments the accumulatsd co~rs~ phaso cornponen~s in lths phase rQgister thereof by the carr~I::OUIlt on line 97 from th~ state machine 91 ~ogsther with and at the same time as . . .

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when it Incrcment$ such accumulDted coar3s ph~sf~ componants by the coarse ph~se component in the coarse component re~ist0r th~reot.
Table 2 sats forth the r~sponse ot the s~ate m~chine ~1 to the combinations of tha accumulator carr~ bit A and tha comp~rator carr~ bits C1 andC2 durin~ ~ach of four differsnt states of the state m~china 91.
STATE A C1 C2 CQUNT I~IEXT STATIE
~i 0 0 X 1 3 2 0 0 X ~ 3 2 ~ 1 X 1 2 3 ~ X 0 ~ *
3 0 X 1 ~ *
3 1 ~ O O ~i 3 t X 1 ~i 2 4 0 X X ~ b T~ble 2 2~23327 .

ln Table 2, an ax~ indicates that the sta~e ot the p~cular bit i~
imm~t~rial, and 311 '~ indicatss an ill~al condltion becaus~ i~ would imply mor~than two compatisons during a fine-phase-cernponent-~ccumul~tion par70d.
The first st~te, stat0 1, of the state machin~ 91 is a state in which the comparison is ma~e bv the first comparator 87 in a sampling p~riod followinS a samplin~ p~rlod in which no comparator carry ble C1 or C2 was provid2d; the second stat~, state 2, Is a state in which the comparison is made by ~h~ first comp~rator 87 in a samplin~ perlod followin~ ~ sampling period In whlch a comp~r~tor carry bit C1 or C2 was provided; the third st~te, state 3, is a s~ate in which th0 comparison is mad~ by the second compuator 88; and tho tourth state, stat~ 4, is a ssmplin~ period tollowing s first or second sta~e sampling pcriod in whi~h ~ compsrstor carry bit C1 or C2 was provided but an accumulatof carry bit A ws~ not provid0d.
The ~NEXT STATE~ column indicat~s the stat~ ot the state machine 91 dwing the subs~quent sampling pariod.

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Claims (3)

1. A phase accumulator for accumulating digital frequency words, which, as accumulated, represent the phase of a cyclic waveform of a predetermined frequency, comprising a coarse-component accumulator for accumulating coarse phase components of the digital frequency words;
a fine-component accumulator for accumulating fine phase components of the digital frequency words; and means for incrementing the coarse-component accumulator in response to accumulation of the fine phase components;
wherein said incrementing means components;
means for providing a variable randomly generated value for each fine-component accumulation cycle;
means for periodically sampling the accumulation of the fine phase components in relation to the randomly generated value; and means for incrementing the coarse component register for each fine-component accumulation cycle, with the phase of said incrementing being dithered in accordance with the number of times the accumulated fine phase components exceed the randomly generated values during the sampling period.

2. A phase accumulator according to Claim 1, wherein the combination of the fine-component accumulator and the incrementing means comprise means for generating random values;

a limit register for registering said generated random values;
a fine-phase register;
means for incrementing the fine-phase register whenever the accumulated fine phase components exceed a predetermined value, and for providing an indication that said predetermined value has been exceeded;
a comparator for comparing the contents of the fine-phase register with the contents of the limit register, and for providing an indication whenever thevalue registered in the fine-phase register exceeds the value registered in the limit register;
a state machine for processing the indication provided by the means for incrementing the fine-component register with the indication provided by the comparator to produce carry bits indicating a count in accordance with the number of times the accumulated fine phase components exceed the randomly generated values during the sampling period, as indicated by a combination of the state ofthe state machine, and indications provided by the means for incrementing the fine-phase register and by the comparator; and means for incrementing the coarse-component register by the count indicated by said carry bits.

3. A phase accumulator according to Claim 1, wherein the combination of the fine-component accumulator and the incrementing means comprise means for generating random values;
a limit register for registering said generated random values;
a fine-phase register;
means for incrementing the fine-phase register whenever the accumulated fine phase components exceed a predetermined value, and for providing an indication that that said predetermined value has been exceeded;
a first comparator for comparing the contents of the fine-phase register with the then generated random value, and for providing an indication whenever the value registered in the fine-phase register exceeds the then generated random value;
a second comparator for comparing the contents of the fine-phase register with the contents of the limit register, and for providing an indication whenever the value registered in the fine-phase register exceeds the value registered in the limit register;
a state machine for processing the indication provided by the means for incrementing the fine-component register with the indication provided by the comparators to produce carry bits indicating a count in accordance with the number of time the accumulated fine phase components exceed the randomly generated values during the sampling period, as indicated by a combination of the state of the state machine, and indications provided by the means for incrementing the fine-phase register and by the comparators; and means for incrementing the coarse-component register by the count indicated by said carry bits.