CA2067466A1 - Method and apparatus for testing an nvm - Google Patents
Method and apparatus for testing an nvmInfo
- Publication number
- CA2067466A1 CA2067466A1 CA2067466A CA2067466A CA2067466A1 CA 2067466 A1 CA2067466 A1 CA 2067466A1 CA 2067466 A CA2067466 A CA 2067466A CA 2067466 A CA2067466 A CA 2067466A CA 2067466 A1 CA2067466 A1 CA 2067466A1
- Authority
- CA
- Canada
- Prior art keywords
- nvm
- address space
- nvms
- microprocessor
- testing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
Abstract
Apparatus for testing an NVM comprising, a microprocessor, a plurality of NVMs respectively connected to the microprocessor, each of the NVMs having an address space for storing data therein, and the microprocessor including, structure for selecting one of the plurality of NVMs structure for byte-write-mode writing data having a predetermined page size to the selected NVM for storage in the address space thereof, structure for page-write-mode writing different data having the predetermined page size to the selected NVM for storage in the address space thereof, and structure for counting the number of changed bytes in the address space of the NVM.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US69562491A | 1991-05-03 | 1991-05-03 | |
US695,624 | 1991-05-03 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2067466A1 true CA2067466A1 (en) | 1992-11-04 |
CA2067466C CA2067466C (en) | 1997-07-15 |
Family
ID=24793783
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002067466A Expired - Fee Related CA2067466C (en) | 1991-05-03 | 1992-04-28 | Method and apparatus for testing an nvm |
Country Status (4)
Country | Link |
---|---|
US (1) | US5502813A (en) |
EP (1) | EP0513607B1 (en) |
CA (1) | CA2067466C (en) |
DE (1) | DE69217707T2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102116834B (en) * | 2010-01-05 | 2013-04-24 | 上海华虹Nec电子有限公司 | Corresponding method for coordinates among different variety parameters in NVM (Non-Volatile Memory) testing |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4916623A (en) * | 1982-01-29 | 1990-04-10 | Pitney Bowes Inc. | Electronic postage meter having redundant memory |
US4578774A (en) * | 1983-07-18 | 1986-03-25 | Pitney Bowes Inc. | System for limiting access to non-volatile memory in electronic postage meters |
US4998203A (en) * | 1985-03-12 | 1991-03-05 | Digiulio Peter C | Postage meter with a non-volatile memory security circuit |
US4742469A (en) * | 1985-10-31 | 1988-05-03 | F.M.E. Corporation | Electronic meter circuitry |
US4802117A (en) * | 1985-12-16 | 1989-01-31 | Pitney Bowes Inc. | Method of preserving data storage in a postal meter |
JPS62266798A (en) * | 1986-05-13 | 1987-11-19 | Mitsubishi Electric Corp | Nonvolatile semiconductor memory device |
JPS63153799A (en) * | 1986-08-08 | 1988-06-27 | Nec Corp | Semiconductor memory |
JPH07109720B2 (en) * | 1988-07-29 | 1995-11-22 | 三菱電機株式会社 | Nonvolatile semiconductor memory device |
US5021963A (en) * | 1988-12-30 | 1991-06-04 | Pitney Bowes Inc. | EPM having an improvement in accounting update security |
JPH03137900A (en) * | 1989-07-27 | 1991-06-12 | Nec Corp | Nonvolatile semiconductor memory |
US5170044A (en) * | 1990-11-09 | 1992-12-08 | Pitney Bowes Inc. | Error tolerant 3x3 bit-map coding of binary data and method of decoding |
-
1992
- 1992-04-28 CA CA002067466A patent/CA2067466C/en not_active Expired - Fee Related
- 1992-05-04 EP EP92107493A patent/EP0513607B1/en not_active Expired - Lifetime
- 1992-05-04 DE DE69217707T patent/DE69217707T2/en not_active Expired - Fee Related
-
1994
- 1994-07-13 US US08/274,562 patent/US5502813A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69217707T2 (en) | 1997-07-31 |
EP0513607A2 (en) | 1992-11-19 |
US5502813A (en) | 1996-03-26 |
EP0513607A3 (en) | 1993-11-24 |
DE69217707D1 (en) | 1997-04-10 |
EP0513607B1 (en) | 1997-03-05 |
CA2067466C (en) | 1997-07-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |