CA2068425C - Fast phase shift adjusting method and device for linear transmitter - Google Patents
Fast phase shift adjusting method and device for linear transmitterInfo
- Publication number
- CA2068425C CA2068425C CA002068425A CA2068425A CA2068425C CA 2068425 C CA2068425 C CA 2068425C CA 002068425 A CA002068425 A CA 002068425A CA 2068425 A CA2068425 A CA 2068425A CA 2068425 C CA2068425 C CA 2068425C
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- feedback signal
- signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C1/00—Amplitude modulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3294—Acting on the real and imaginary components of the input signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B2001/0408—Circuits with power amplifiers
- H04B2001/0433—Circuits with power amplifiers with linearisation using feedback
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Transmitters (AREA)
- Amplifiers (AREA)
Abstract
A method (100) and device (300) are set forth for, where a linear transmitter has inphase and quadrature modulation paths for an input signal and at least one open feedback signal path is provided, substantially correcting an initial phase relationship between an input signal having an input signal vector with a phase and a magnitude, and an input feedback signal having an input feedback signal vector with a phase and a magnitude. The present invention provides a more time-efficient phase correction to at least one feedback signal path.
Description
`~ ~ 1 2~68~2~
FAST PHASE SHIFT ADJUSTING METHOD AND DEVICE FOR
LINEAR TRANSMITTER
Field of the Invention This invention relates in general to linear transmitters, 10 and more particularly, to phase shift adjustment of linear transmitters utilizing negative feedback.
Background of the Invention Transmitters typically implement a linear power amplifier to amplify modulated signals that have a time-varying amplitude (magnitude) for transmission. It is desirable for the linear power amplifier to provide good linearity and efficient power conversion. Class B or AB power
FAST PHASE SHIFT ADJUSTING METHOD AND DEVICE FOR
LINEAR TRANSMITTER
Field of the Invention This invention relates in general to linear transmitters, 10 and more particularly, to phase shift adjustment of linear transmitters utilizing negative feedback.
Background of the Invention Transmitters typically implement a linear power amplifier to amplify modulated signals that have a time-varying amplitude (magnitude) for transmission. It is desirable for the linear power amplifier to provide good linearity and efficient power conversion. Class B or AB power
2 0 amplifiers are typically the most suitable amplifiers for obtaining a best efficiency relative to distortion. However, many communications applications require a further reduction in amplifier distortion, which may be obtained by negative feedback. A cartesian loop is a known method for implementing negative feedback around a linear power amplifier. A net phase shift around the cartesian loop must be maintained near 180 degrees at a desired channel frequency in order to insure stable operation. Component variability, time delay in the loop, and other factors can cause the loop phase shift to vary considerably. Therefore, in order to keep the cartesian loop stable in the presence of phase shift variation, methods for measuring and adjusting the loop phase shift have been proposed. However, these earlier methods have required ~ 2~684~
low frequency sine waves as input signals, resulting in somewhat complex phase adjustment computation.
Phase shift compensation in cartesian-loop transmitters has been utilized, but has required at least 40 milliseconds. There is a need for a faster phase shift compensation method for a linear transmitter using negative feedback to allow more time for productive use of a transmitted signal.
Summary of the Invention Accordingly, in a linear transmitter having inphase and quadrature modulation paths for a first input signal, the invention provides a method of substantially correcting an initial phase relationship between a first input signal having an input signal vector with an input phase and an input magnitude, and a first input feedback signal having a first input feedback signal vector with a first input feedback phase and a first input feedback magnitude, wherein an open loop signal path is provided, comprising the steps of:
(A) providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) obtaining a first comparison of said resultant feedback signal vector with one of the test signal inphase and quadrature components;
and (C) adjusting the initial phase relationship between said first input signal and said first input feedback signal in response to said first comparison, such that the time required for implementing the method is less than 40 milliseconds.
. ~
~ 2068425 In a linear caFtesian-loop feedback transmitter having inphase and quadrature modulation paths, the invention provides a device for correcting an initial phase relationship between a first input signal having an input signal vector with an input magnitude and an input phase and a first input feedback signal having a first input feedback signal vector with a first input feedback magnitude and a first input feedback phase, wherein an open loop signal path is provided, comprising:
(A) first means for providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to the modulation paths for obtaining a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) second means, responsive to the first means, for adjusting said first feedback signal vector and said first carrier feedback vector obtained in correlation with one of the first test signal inphase and quadrature components for obtaining a first adjusted resultant feedback vector;
(C) third means, responsive to the first means, for providing, on said open loop signal path, a second test signal having a second test signal vector with known inphase and quadrature components to the modulation paths to obtain a second feedback signal vector and a second carrier feedback vector;
(D) fourth means, responsive to the third means, for adjusting said second feedback signal vector and said second carrier feedback vector in correlation with one of the second test signal inphase and quadrature components for obtaining a second adjusted resultant feedback signal vector;
(E) fifth means, responsive to the second means and the fourth means, for adjusting the initial phase relationship between said first input signal and said first input feedback signal in correlation with said first and second adjusted resultant feedback signal vectors, such that the time required for implementing the correction is less than 40 milliseconds.
Brief Description of the Drawings FIG. 1 is a flow chart illustrating one embodiment of the method of the present invention.
FIG. 2A illustrates more specifically one embodiment of the method of the present invention; FIG. 2B is a graphic representation of vectors implemented in one of the embodiments of the method of the present invention set forth in FIG. 2A.
FIG. 3 is a block diagram of one hardware implementation of the 1 5 present invention .
FIG. 4 illustrates one hardware implementation of an analog channel determiner utilized in the present invention.
FIG. 5 illustrates one hardware implementation of an I channel processor utilized in the present invention;
FIG. 6 illustrates one hardware implementation of a Q channel processor utilized in the present invention.
FIG. 7 illustrates one hardware implementation of a first formulator utilized in the present invention.
FIG. 8 illustrates one hardware implementation of a second formulator utilized in the present invention.
FIG. 9 illustrates one hardware implementation of an oscillator control utilized in the present invention.
FIG. 10 iiiustrates one hardware implementation of a phase adjusting oscillator control utilized in the present invention.
,~, ',~
4 20~842~
Detailed Description of a Preferred Embodiment FIG. 1, numeral 100, is a flow chart illustrating one embodiment of the method of the present invention for 5 correcting an initial phase relationship between a first input signal having a first input signal vector with an input phase and an input magnitude and a first input feedback signal having a first input fee~ack signal vector with a first input feedback signal phase and a first input 10 feedback signal magnitude, in a linear transmitter having inphase and quadrature modulation paths for the at least first input signal, wherein at least one open feedback signal path is provided, such that an implementation time of less than 40 miiliseconds is utilized.
It can b~ shown that:
(Vjq * Vfi) - (Vii * Vfq) = lVil * lVfl * sin B (1) where 1~ is a phase shift between an input signal vector Vj that has an inphase component Vjj and a quadrature component Vjq, and a resultant feedback signal vector Vf that has an inphase 20 component Vfiand a quadrature component Vfq. Substantially, at least a first test signal (FTS), typically being at least a first test signal pulse (FTSP) is provided on at least one open loop signal path, each at least first test signal pulse having at least a first test signal vector with known inphase and 25 quadrature components ( AL FIRST TSV-I,Q) applied to the modulation paths, such that at least one carrier feedback vector (AL A FIRST CFV) and at least a first feedback signal having at least a first feedback signal vector having inphase and quadrature components ( AL A FIRST FSV-I,Q) are obtained 30 (102). The at least one carrier feedback vector is typically not desired, but is present in practical circuit implementations.
Each AL A FSV-I,Q is compared to the AL FIRST TSV-I,Q
utilized (104), each at least first comparison being used to ~ ~ 5 i25 provide for adjusting the initial phase relationship (INIT P
REL) of the at least first (Al F) input signal and the at least first feedback signal (ALF FS) in accordance with equation (1) of the preceding paragraph.
As is set forth more particularly below, a procedure of application of the at least one test signal pulse to only one of:
the inphase modulation path and the quadrature modulation path, allows simplification of phase shift correction determination. Thus, for an input of a test signal pulse into only the inphase modulation path, phase shift correction determination would simplify to:
Vfq ~ -sgn(V~ Vfl ~ sin B.
FIG. 2A, numeral 225, illustrates more specifically one embodiment of the method of the present invention utilizing applying the at least at least first test signal pulse (AL A
FTSP) only to a nonzero inphase modulation path (I~NONZERO:
center column designations), and alternately, only to a nonzero quadrature modulation path (Q-NONZERO: right column designations). Below, the alternate embodiments are separated by commas, the nonzero inphase modulation path input being before the comma, and the nonzero quadrature modulation path input being after the comma. Inphase and quadrature components of a vector are designated I and Q, respectively.
Specifically, in one embodiment of the method of the present invention illustrated in FIG. 2~, in a linear cartesian-loop feedback transmitter having inphase and quadrature modùlation paths for at least a first input signal, a method of the present invention is set forth for substantially correcting an initial phase relationship between the at least first input
low frequency sine waves as input signals, resulting in somewhat complex phase adjustment computation.
Phase shift compensation in cartesian-loop transmitters has been utilized, but has required at least 40 milliseconds. There is a need for a faster phase shift compensation method for a linear transmitter using negative feedback to allow more time for productive use of a transmitted signal.
Summary of the Invention Accordingly, in a linear transmitter having inphase and quadrature modulation paths for a first input signal, the invention provides a method of substantially correcting an initial phase relationship between a first input signal having an input signal vector with an input phase and an input magnitude, and a first input feedback signal having a first input feedback signal vector with a first input feedback phase and a first input feedback magnitude, wherein an open loop signal path is provided, comprising the steps of:
(A) providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) obtaining a first comparison of said resultant feedback signal vector with one of the test signal inphase and quadrature components;
and (C) adjusting the initial phase relationship between said first input signal and said first input feedback signal in response to said first comparison, such that the time required for implementing the method is less than 40 milliseconds.
. ~
~ 2068425 In a linear caFtesian-loop feedback transmitter having inphase and quadrature modulation paths, the invention provides a device for correcting an initial phase relationship between a first input signal having an input signal vector with an input magnitude and an input phase and a first input feedback signal having a first input feedback signal vector with a first input feedback magnitude and a first input feedback phase, wherein an open loop signal path is provided, comprising:
(A) first means for providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to the modulation paths for obtaining a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) second means, responsive to the first means, for adjusting said first feedback signal vector and said first carrier feedback vector obtained in correlation with one of the first test signal inphase and quadrature components for obtaining a first adjusted resultant feedback vector;
(C) third means, responsive to the first means, for providing, on said open loop signal path, a second test signal having a second test signal vector with known inphase and quadrature components to the modulation paths to obtain a second feedback signal vector and a second carrier feedback vector;
(D) fourth means, responsive to the third means, for adjusting said second feedback signal vector and said second carrier feedback vector in correlation with one of the second test signal inphase and quadrature components for obtaining a second adjusted resultant feedback signal vector;
(E) fifth means, responsive to the second means and the fourth means, for adjusting the initial phase relationship between said first input signal and said first input feedback signal in correlation with said first and second adjusted resultant feedback signal vectors, such that the time required for implementing the correction is less than 40 milliseconds.
Brief Description of the Drawings FIG. 1 is a flow chart illustrating one embodiment of the method of the present invention.
FIG. 2A illustrates more specifically one embodiment of the method of the present invention; FIG. 2B is a graphic representation of vectors implemented in one of the embodiments of the method of the present invention set forth in FIG. 2A.
FIG. 3 is a block diagram of one hardware implementation of the 1 5 present invention .
FIG. 4 illustrates one hardware implementation of an analog channel determiner utilized in the present invention.
FIG. 5 illustrates one hardware implementation of an I channel processor utilized in the present invention;
FIG. 6 illustrates one hardware implementation of a Q channel processor utilized in the present invention.
FIG. 7 illustrates one hardware implementation of a first formulator utilized in the present invention.
FIG. 8 illustrates one hardware implementation of a second formulator utilized in the present invention.
FIG. 9 illustrates one hardware implementation of an oscillator control utilized in the present invention.
FIG. 10 iiiustrates one hardware implementation of a phase adjusting oscillator control utilized in the present invention.
,~, ',~
4 20~842~
Detailed Description of a Preferred Embodiment FIG. 1, numeral 100, is a flow chart illustrating one embodiment of the method of the present invention for 5 correcting an initial phase relationship between a first input signal having a first input signal vector with an input phase and an input magnitude and a first input feedback signal having a first input fee~ack signal vector with a first input feedback signal phase and a first input 10 feedback signal magnitude, in a linear transmitter having inphase and quadrature modulation paths for the at least first input signal, wherein at least one open feedback signal path is provided, such that an implementation time of less than 40 miiliseconds is utilized.
It can b~ shown that:
(Vjq * Vfi) - (Vii * Vfq) = lVil * lVfl * sin B (1) where 1~ is a phase shift between an input signal vector Vj that has an inphase component Vjj and a quadrature component Vjq, and a resultant feedback signal vector Vf that has an inphase 20 component Vfiand a quadrature component Vfq. Substantially, at least a first test signal (FTS), typically being at least a first test signal pulse (FTSP) is provided on at least one open loop signal path, each at least first test signal pulse having at least a first test signal vector with known inphase and 25 quadrature components ( AL FIRST TSV-I,Q) applied to the modulation paths, such that at least one carrier feedback vector (AL A FIRST CFV) and at least a first feedback signal having at least a first feedback signal vector having inphase and quadrature components ( AL A FIRST FSV-I,Q) are obtained 30 (102). The at least one carrier feedback vector is typically not desired, but is present in practical circuit implementations.
Each AL A FSV-I,Q is compared to the AL FIRST TSV-I,Q
utilized (104), each at least first comparison being used to ~ ~ 5 i25 provide for adjusting the initial phase relationship (INIT P
REL) of the at least first (Al F) input signal and the at least first feedback signal (ALF FS) in accordance with equation (1) of the preceding paragraph.
As is set forth more particularly below, a procedure of application of the at least one test signal pulse to only one of:
the inphase modulation path and the quadrature modulation path, allows simplification of phase shift correction determination. Thus, for an input of a test signal pulse into only the inphase modulation path, phase shift correction determination would simplify to:
Vfq ~ -sgn(V~ Vfl ~ sin B.
FIG. 2A, numeral 225, illustrates more specifically one embodiment of the method of the present invention utilizing applying the at least at least first test signal pulse (AL A
FTSP) only to a nonzero inphase modulation path (I~NONZERO:
center column designations), and alternately, only to a nonzero quadrature modulation path (Q-NONZERO: right column designations). Below, the alternate embodiments are separated by commas, the nonzero inphase modulation path input being before the comma, and the nonzero quadrature modulation path input being after the comma. Inphase and quadrature components of a vector are designated I and Q, respectively.
Specifically, in one embodiment of the method of the present invention illustrated in FIG. 2~, in a linear cartesian-loop feedback transmitter having inphase and quadrature modùlation paths for at least a first input signal, a method of the present invention is set forth for substantially correcting an initial phase relationship between the at least first input
3 0 signal having a first input signal vector with a first input magnitude and a first input phase and at least a first input feedback signal having a first input feedback signal vector with a first input feedback magnitude and a first input 6 2068~2~
fee~b~ck phase, wherein at least one open loop feedback signal path is provided, comPrising at least the steps of:
providing at least a first test signal, where ~he FTSP is an input having a Q c~ ent ~at is ZERO and an I colllpollent ~at is NON7FRO, and S ~e third test signal pulse ~ITSP) has an input c~lllponel~l ~at is ZERO, and a Q colll~ ent ~at is NON7ERO;
to obtain at least (AL) a FIRST,THIRD carrier feedback vector (CFV) and AL A FIRST,THIRD feedback signal vector 10 (FSV) (202) having a feedback signal path;
summins the AL FIRST,THIRD CFV ànd AL FIRST,THIRD
FSV to obtain at least (AL) a FIRST,THIRD VECTOR SUM, that vector sum being AL a FIRST,THIRD resultant feedback signal vector (RFSV) (202);
applyin~ a FIRST,FOURTH phase adjustment (PHASE ADJ) to obtain an adiusted (ADJ) FIRST,THIRD RFSV with substantially a nonzero inphase component,nonzero quadrature component (I~NONZERO,QzNONZERO) and substantially a zero quadrature,zero inphase component (Q~ZERO,I~ZERO) and the 20 RFSV being substantially an adjusted (ADJ) FIRST,THIRD
VECTOR SUM of at least (AL) an adjusted (ADJ) FIRST,THIRD
CFV and an adjusted (ADJ) FIRST,THIRD FSV having PHASE
31 relative to the ADJ FIRST,THIRD RFSV (202) where 31 is a phase error magnitude of the FIRST,FOURTH phase 25 adjustment and is typically due to the presence of the ADJ
FIRST,THIRD CFV;
providing at least (AL) an inverted (INV) FTSP,TTSP to obtain a FIRST,SECOND pulse-invert (P-l) FSV (204);
summing the FIRST,SECOND P-l FSV with a 3 0 SECOND,FOURTH CFV to obtain a SECOND,FOURTH RFSV (204);
inverting the SECOND,FOURTH RFSV to obtain an inverted (INV) SECOND,FOURTH RFSV and applying a SECOND,FIFTH phase adjustment (PHASE ADJ) to obtain an adjusted (ADJ) inverted (INV) SECOND,FOURTH RFSV with a I~NONZERO,Q~-NONZERO and A., ~ 7 20~842~
Q-ZERO,I~ZERO, and the ADJ INV SECOND,FOURTH RSFV being subst~ntially an adjusted (ADJ) SECOND,FOURTH VECTOR SUM
of the at least adjusted inverted (AL ADJ INV) SECOND,FOURTH
CFV and an adjusted inverted (ADJ INV) FlRST,SECOND P-l FSV, 5 the ADJ INV FIRST,SECOND P-l FSV having a PHASE l~21,l~41 relative to the the ADJ INV SECOND,FOURTH RFSV (206) where l~21,l~41 is a phase error magnitude of the SECOND,FIFTH phase adjustment and is typically due to a presence of the AL ADJ
INV SECOND,FOURTH CFV; and applying a THIRD,SIXTH PHASE adjustment (ADJ) to the feedback signal path where the phase adjustment is substantially equal to the algebraic average of the FIRST,FOURTH and SECOND,FIFTH phase adjustments (208), thereby obtaining a THIRD,SIXTH feedback signal vector having !
15 a THIRD,SIXTH modified phase magnitude of substantially 21 ~ 31 - 1~41 1 . . ...
2 1~ 1 2 1~ thereby adJusting the Inltlal relationship between the at least first (ALF) input signal and ~he at least first input feedback signal (AL A FIRST FS). The THIRD,SIXTH modified phase magnitude is a phase error 20 magnitude remaining at an end of the phase adjustments set forth above, and is typically substantially less than a magnitude of either of the phase error magnitudes 1~11,1H31 or a2l,1~4l-FIG. 2B is a graphic representation of vectors 25 irnplemented in one of the embodiments of the method of thepresent invention set forth in FIG. 2A, the center column. Each carrier feedback vector is substantially characterized by at least a pair of associated vectors, a first vector of that pair representing a carrier feedthrough term influenced by each 30 phase adjustment, and a second vector of that pair representing a carrier feedthrough term not influenced by each phase adjustment. Thus, each carrier feedback vector (CFV) is substantially a CFV vector sum of its at least pair of associated vectors.
Upon AL A FTS being provided on an at least one open loop signal path, the AL FTS having at least a first test signal 5 vector (FTSV) and the AL FTS being input with a nonzero I
component and a zero Q component (202, center column), an at least FIRST CFV (238, 240) characterized by at least a first pair of associated vectors (238, 240) and a FIRST FSV (236) are obtained. The FIRST FSV (236) and FIP~ST CFV (238, 240) 1 0 are summed to obtain a FIRST RFSV (242). A firs' phase adjustment is applied to the FIRST RFSV (242) to obtain an ADJ FIRST RFSV (232) with a substantially nonzero inphase component (Vfj)and a substantially zero quadrature component (Vfq) and being an adjusted first vector sum of at least an ADJ
1 5 FIRST CFV (212, 214) and an ADJ FIRST FSV (210) having a phase e1 relative to the ADJ FIRST RFSV (232). FIG. 2B sets forth the first phase adjustment by means of two dashed arrows, with a single dot thereon, that illustrate rotation of thc FIRST FSV (236) to a position of the ADJ FSV (210), and 20 the rotation of the FIRST RFSV (242) to a position of the ADJ
FIRST RFSV (232).
At least an INV FTSP is provided on the at least one open loop signal path to obtain a FIRST P-l FSV (216) at an angle of (180 minus e1) and at least (AL) a SECOND CFV (218, 220) 25 substantially characterized by at least a second pair of ~ssoci~ted vectors (218, 220). The FIRST P-l FSV (216) is substantially summed with the AL SECOND CFV (218, 220) to obtain a SECOND RFSV (234). The SECOND RFSV (234) is substantially inverted to obtain an inverted (INV) second RFSV
30 (244), and a second phase adjustment is applied to the INV
SECOND RFSV (244) to obtain an ADJ INV SECOND RFSV (232) with a substantially nonzero inphase component (Vfj) and a substantially zero quadrature component (Vfq) and being an adjusted second vector sum of at least an ADJ INV SECOND CFV
9 2~6842S
(228, 230) and an ADJ INV FIRST P-l FSV (226) having a phase ~2 relative to the ADJ INV SECOND RFSV (position - substantially also that of 232). After the second phase adjustment, a magnitude of quadrature components of the 5 vectors combined is substantially zero.
A THIRD,SIXTH phase adjustment is applied to an initial phase relationship of an at least first input signal and at least a first input feedback signal, where the THIRD,SIXTH phase adjustment is substantially equal to an algebraic average of 10 the FIRST,FOURTH and SECOND,FIFTH phase adjustments, thereby obtaining a THIRD,SIXTH feedback signal vector having a THIRD,SIXTH modified phase magnitude substantially equivalent to ¦ 1 2 ¦~ ¦ 1 2 ¦ (208)- Thus, typically the at least one open loop signal path is closed 15 subsequent to adjusting the initial phase relationship stated above, and the magnitude of the at least first test signal vector is at this time substantially reduced, allowing closure of the at least one open cartesian feedback loop with minimal splatter or off channel energy, and providing a time-efficient 2 0 phase correction.
FIG. 3, numeral 300, is a block diagram of one hardware implementation of the present invention setting forth, in a linear transmitter having inphase and quadrature modulation paths for an input signal, a device for substantially correcting 2 5 an initial phase relationship between at least a first input signal having at least a first input signal vector with an input phasa and an input magnitude and at least a first input feedback signal having a first input feedback signal vector with an input feedback phase and an input feedback magnitude, 30 wherein at least one open feedback signal path is provided. The device utilizes an analog channel determiner (302) connected to an input to process at least a first test signal having at least a first test signal vector with known inphase and - ~ 10 206842S
quadrature components in the modulation paths. An adjuster (307) is operably connected to th~ analog channel determiner (302) and to a first combiner (316) such that the inphase and the quadrature components of the at least one test signal 5 vector provide at least a first feedback signal vector (FIRST
FSV). The at least FIRST FSV is compared with the at least first test signal vector and is modified by the adjuster (307) in r~lation thereto. A typical adjustment is modifying one of the inphase and quadrature components of the at least one F~V
10 to zero, thereby obtaining an FSV with substantially only one inphase,quadrature component and a first phase error.
FIG. 3 further sets forth a hardware implementation of the present invention with the analog channel determiner (302) providing an inphase component of the at least first test 1 5 signal to an inphase (I) channel processor (304) and a quadrature component of the at least first test signal to a quadrature (Q) channel processor (308). The I channel processor (304) and the Q channel processor (308) are connected to an oscillator (OSC) control (306). FIG. 9, numeral 2 0 900, sets forth one hardware implementation of an oscillator control (306), such that a local oscillator (902), as is known in the art, is connected to an inphase (I) mixer (506, FIG. 5) of the I channel processor (304) and is connected by means of a phase shifter (PS)(904) to a quadrature (Q) mixer (606, FIG.6) of the 25 Q channel processor (308). The PS (904) typically shifts a signal ninety degrees.
FIG.4, numeral 400, illustrates one hardware implementation of an analog channel determiner utilized in the present invention, being a signal processor (402) utilized to 30 provide at least two digital signal paths to at least a first (404) and a second (406) digital to analog converter, the at least first and second digital to analog converters being further connected to at least a first (408) and a second (410) filter. The at least first (408) and second (410) filters are - ~ 11 2068425 typically lowpass, providing inphase (408) and quadrature (410) input modulation paths.
FIG. 5, numeral 500, illustrates one hardware implementation of an inphase (I) channel processor (304) 5 utilized in the present invention, that processor having an inphase (I) combiner (502) connected to an inphase (I) adjuster (504), and the inphase (I) adjuster (504) connected to an inphase (I) mixer (506). Typically, the inphase (I) combiner (502) is substantially a first summer that sums the inphase 10 component of the at least first input test signal, when desired, with an inphase feedback signal vector. The inphase (I) adjuster (504) typically comprises at least a second summer for addition of at least one input signal path carrier feedthrough vector, an amplifier for amplification, if desired, 1 S and a lowpass loop filter. The inphase (I) mixer (506) ~ypically mixes an adjusted signal from the inphase (I) adjuster (504) with an oscillator control signal from the oscillator control local oscillator (902). Further the inphase (I) mixer (506) of the inphase (I) channel processor (304) is 20 connected to the first combiner (316) to provide an adjusted inphase input.
FIG. 6, numeral 600, illustrates one hardware implementation of a quadrature (Q) channel processor (308) utilized in the present invention, that processor having a 25 quadrature (Q) combiner (602) connected to a quadrature (Q) adjuster (604), and the quadrature (Q) adjuster (604) connected to a quadrature (Q) mixer (606). Typically, the quadrature (Q) combiner (602) is substantially a third summer ~or summing the quadrature component of the at least one 30 input test signal, when desired, with a quadrature feedback signal vector. The quadrature (Q) adjuster (604) typically comprises at least a fourth summer for addition of at least one upper path carrier feedback vector, an amplifier for amplification, if desired, and a lowpass loop filter. The ~ 12 2068425 quadrature (Q) mixer t606) typically provides for mixing of an adjusted signal from the quadrature (Q) adjuster (604) with an oscillator control signal from the oscillator control local oscillator (902). Further the quadrature (Q) mixer (606) of the 5 quadrature (Q) channel processor (308) is connected to the first combiner (316) to provide an adjusted quadrature input.
The first combiner (316) typically includes a power amplifier, the linearity of which is improved by negative feedback when all feedback signal paths are closed subsequent 10 to the phase adjustments of the present invention.
A first formulator (310) is connected to the first combiner (316) and is operably controlled by connections with a phase adjust oscillator control (PA OSC CONTROL)(312). The first formulator, as illustrated in one implementation further 15 set forth in FIG. 7, numeral 700, typically comprises an inphase (I) feedback mixer (702) for mixing an inphase feedback signal with a phase adjusted oscillator control signal and an inphase (I) feedback adjuster (704). The inphase (I) feedback adjuster (704) typically comprises at least a fifth 20 summer for addition of at least an inphase carrier feedback vector and an adjustment for, when desired, allowing the inphase feedback loop to be open.
A second formulator (314) is connected to the first combiner (316) and is operably controlled by connections with 25 a phase shifter (904) that is attached to a phase adjust oscill tor control (PA OSC CONTROL)(312). The second formulator, as illustrated in one implementation further set forth in FIG. 8, numeral 800, typically comprises a quadrature (Q) feedback mixer (802) for mixing a quadrature (Q) feedback 30 signal with a phase adjusted oscillator control signal and a quadrature (Q) feedback adjuster (804). The quadrature feedback adjuster (804) typically comprises at least a sixth summer for addition of at least one quadrature carrier 1 3 2068~25 feedback vector and an adjustment for, when desired, allowing the quadrature feedback loop to be open.
FIG. 10, numeral 1000, illustrates one hardware implementation of a phase adjusting oscillator control utilized 5 in the present invention. The phase adjusting oscillator control provides for the phase adjustments described above.
The first formulator (310) is connected to a first comparator (1002) that is connected to a control (1004). The second formulator (314) is connected to a second comparator (1012) 10 that is connected to a storage device (1014), typically a storage register. The control (1004) typically utilizes control logic to process a signal received by the first comparator (1002) from the first formulator (310) and a signal received by a second comparator (1012) which is stored in the storage 15 device (1014), and utilizes a first (1006) and a second (1016) memory device to provide an adjusted sine value and an adjusted cosine value, the memory devices being connected to a third (1008) and a fourth (1018) digital to analog converter respectively that are connected to a first mixer (1010) and a 20 second mixer (1020). Clearly one memory device may be utilized in place of the two memory devices described herein.
An OSC CONTROL (1022), as previously described in FIG. 9, is operably connected to the first (1010) and second (1020) mixers. Outputs from the first (1010) and the second (1020) 25 mixers is summed in a second combiner (1024). The second combiner (1024), typically a seventh summer, is directly connected to the inphase (I) mixer (506) of the first formulator (310) and is connected through a phase shifter (PS) (904) to the quadrature (Q) mixer (606) of the second 3 0 formulator (314).
Again, typically, the at least one open loop signal path is closed subsequent to adjusting the initial phase relationship between the at least first input signal and the at least first input feedback signal in response to the at least first ~ 14 2068~5 c~mparison, thereby providing negative feedback and minimizing off channel energy splatter when desired information signals are input.
Thus, the device of the present invention provides for 5 adjusting the initial phase relationship of at least first input signal and at least a first input feedback signal, allowing closing of an open loop such that stable feedback is obtained and splatter of off channel energy is minimized. Not only does the device of the present invention provide the above 10 adjustments, but the device requires less than 40 milliseconds for the adjustments, thus providing more utilizable signal time.
I claim:
fee~b~ck phase, wherein at least one open loop feedback signal path is provided, comPrising at least the steps of:
providing at least a first test signal, where ~he FTSP is an input having a Q c~ ent ~at is ZERO and an I colllpollent ~at is NON7FRO, and S ~e third test signal pulse ~ITSP) has an input c~lllponel~l ~at is ZERO, and a Q colll~ ent ~at is NON7ERO;
to obtain at least (AL) a FIRST,THIRD carrier feedback vector (CFV) and AL A FIRST,THIRD feedback signal vector 10 (FSV) (202) having a feedback signal path;
summins the AL FIRST,THIRD CFV ànd AL FIRST,THIRD
FSV to obtain at least (AL) a FIRST,THIRD VECTOR SUM, that vector sum being AL a FIRST,THIRD resultant feedback signal vector (RFSV) (202);
applyin~ a FIRST,FOURTH phase adjustment (PHASE ADJ) to obtain an adiusted (ADJ) FIRST,THIRD RFSV with substantially a nonzero inphase component,nonzero quadrature component (I~NONZERO,QzNONZERO) and substantially a zero quadrature,zero inphase component (Q~ZERO,I~ZERO) and the 20 RFSV being substantially an adjusted (ADJ) FIRST,THIRD
VECTOR SUM of at least (AL) an adjusted (ADJ) FIRST,THIRD
CFV and an adjusted (ADJ) FIRST,THIRD FSV having PHASE
31 relative to the ADJ FIRST,THIRD RFSV (202) where 31 is a phase error magnitude of the FIRST,FOURTH phase 25 adjustment and is typically due to the presence of the ADJ
FIRST,THIRD CFV;
providing at least (AL) an inverted (INV) FTSP,TTSP to obtain a FIRST,SECOND pulse-invert (P-l) FSV (204);
summing the FIRST,SECOND P-l FSV with a 3 0 SECOND,FOURTH CFV to obtain a SECOND,FOURTH RFSV (204);
inverting the SECOND,FOURTH RFSV to obtain an inverted (INV) SECOND,FOURTH RFSV and applying a SECOND,FIFTH phase adjustment (PHASE ADJ) to obtain an adjusted (ADJ) inverted (INV) SECOND,FOURTH RFSV with a I~NONZERO,Q~-NONZERO and A., ~ 7 20~842~
Q-ZERO,I~ZERO, and the ADJ INV SECOND,FOURTH RSFV being subst~ntially an adjusted (ADJ) SECOND,FOURTH VECTOR SUM
of the at least adjusted inverted (AL ADJ INV) SECOND,FOURTH
CFV and an adjusted inverted (ADJ INV) FlRST,SECOND P-l FSV, 5 the ADJ INV FIRST,SECOND P-l FSV having a PHASE l~21,l~41 relative to the the ADJ INV SECOND,FOURTH RFSV (206) where l~21,l~41 is a phase error magnitude of the SECOND,FIFTH phase adjustment and is typically due to a presence of the AL ADJ
INV SECOND,FOURTH CFV; and applying a THIRD,SIXTH PHASE adjustment (ADJ) to the feedback signal path where the phase adjustment is substantially equal to the algebraic average of the FIRST,FOURTH and SECOND,FIFTH phase adjustments (208), thereby obtaining a THIRD,SIXTH feedback signal vector having !
15 a THIRD,SIXTH modified phase magnitude of substantially 21 ~ 31 - 1~41 1 . . ...
2 1~ 1 2 1~ thereby adJusting the Inltlal relationship between the at least first (ALF) input signal and ~he at least first input feedback signal (AL A FIRST FS). The THIRD,SIXTH modified phase magnitude is a phase error 20 magnitude remaining at an end of the phase adjustments set forth above, and is typically substantially less than a magnitude of either of the phase error magnitudes 1~11,1H31 or a2l,1~4l-FIG. 2B is a graphic representation of vectors 25 irnplemented in one of the embodiments of the method of thepresent invention set forth in FIG. 2A, the center column. Each carrier feedback vector is substantially characterized by at least a pair of associated vectors, a first vector of that pair representing a carrier feedthrough term influenced by each 30 phase adjustment, and a second vector of that pair representing a carrier feedthrough term not influenced by each phase adjustment. Thus, each carrier feedback vector (CFV) is substantially a CFV vector sum of its at least pair of associated vectors.
Upon AL A FTS being provided on an at least one open loop signal path, the AL FTS having at least a first test signal 5 vector (FTSV) and the AL FTS being input with a nonzero I
component and a zero Q component (202, center column), an at least FIRST CFV (238, 240) characterized by at least a first pair of associated vectors (238, 240) and a FIRST FSV (236) are obtained. The FIRST FSV (236) and FIP~ST CFV (238, 240) 1 0 are summed to obtain a FIRST RFSV (242). A firs' phase adjustment is applied to the FIRST RFSV (242) to obtain an ADJ FIRST RFSV (232) with a substantially nonzero inphase component (Vfj)and a substantially zero quadrature component (Vfq) and being an adjusted first vector sum of at least an ADJ
1 5 FIRST CFV (212, 214) and an ADJ FIRST FSV (210) having a phase e1 relative to the ADJ FIRST RFSV (232). FIG. 2B sets forth the first phase adjustment by means of two dashed arrows, with a single dot thereon, that illustrate rotation of thc FIRST FSV (236) to a position of the ADJ FSV (210), and 20 the rotation of the FIRST RFSV (242) to a position of the ADJ
FIRST RFSV (232).
At least an INV FTSP is provided on the at least one open loop signal path to obtain a FIRST P-l FSV (216) at an angle of (180 minus e1) and at least (AL) a SECOND CFV (218, 220) 25 substantially characterized by at least a second pair of ~ssoci~ted vectors (218, 220). The FIRST P-l FSV (216) is substantially summed with the AL SECOND CFV (218, 220) to obtain a SECOND RFSV (234). The SECOND RFSV (234) is substantially inverted to obtain an inverted (INV) second RFSV
30 (244), and a second phase adjustment is applied to the INV
SECOND RFSV (244) to obtain an ADJ INV SECOND RFSV (232) with a substantially nonzero inphase component (Vfj) and a substantially zero quadrature component (Vfq) and being an adjusted second vector sum of at least an ADJ INV SECOND CFV
9 2~6842S
(228, 230) and an ADJ INV FIRST P-l FSV (226) having a phase ~2 relative to the ADJ INV SECOND RFSV (position - substantially also that of 232). After the second phase adjustment, a magnitude of quadrature components of the 5 vectors combined is substantially zero.
A THIRD,SIXTH phase adjustment is applied to an initial phase relationship of an at least first input signal and at least a first input feedback signal, where the THIRD,SIXTH phase adjustment is substantially equal to an algebraic average of 10 the FIRST,FOURTH and SECOND,FIFTH phase adjustments, thereby obtaining a THIRD,SIXTH feedback signal vector having a THIRD,SIXTH modified phase magnitude substantially equivalent to ¦ 1 2 ¦~ ¦ 1 2 ¦ (208)- Thus, typically the at least one open loop signal path is closed 15 subsequent to adjusting the initial phase relationship stated above, and the magnitude of the at least first test signal vector is at this time substantially reduced, allowing closure of the at least one open cartesian feedback loop with minimal splatter or off channel energy, and providing a time-efficient 2 0 phase correction.
FIG. 3, numeral 300, is a block diagram of one hardware implementation of the present invention setting forth, in a linear transmitter having inphase and quadrature modulation paths for an input signal, a device for substantially correcting 2 5 an initial phase relationship between at least a first input signal having at least a first input signal vector with an input phasa and an input magnitude and at least a first input feedback signal having a first input feedback signal vector with an input feedback phase and an input feedback magnitude, 30 wherein at least one open feedback signal path is provided. The device utilizes an analog channel determiner (302) connected to an input to process at least a first test signal having at least a first test signal vector with known inphase and - ~ 10 206842S
quadrature components in the modulation paths. An adjuster (307) is operably connected to th~ analog channel determiner (302) and to a first combiner (316) such that the inphase and the quadrature components of the at least one test signal 5 vector provide at least a first feedback signal vector (FIRST
FSV). The at least FIRST FSV is compared with the at least first test signal vector and is modified by the adjuster (307) in r~lation thereto. A typical adjustment is modifying one of the inphase and quadrature components of the at least one F~V
10 to zero, thereby obtaining an FSV with substantially only one inphase,quadrature component and a first phase error.
FIG. 3 further sets forth a hardware implementation of the present invention with the analog channel determiner (302) providing an inphase component of the at least first test 1 5 signal to an inphase (I) channel processor (304) and a quadrature component of the at least first test signal to a quadrature (Q) channel processor (308). The I channel processor (304) and the Q channel processor (308) are connected to an oscillator (OSC) control (306). FIG. 9, numeral 2 0 900, sets forth one hardware implementation of an oscillator control (306), such that a local oscillator (902), as is known in the art, is connected to an inphase (I) mixer (506, FIG. 5) of the I channel processor (304) and is connected by means of a phase shifter (PS)(904) to a quadrature (Q) mixer (606, FIG.6) of the 25 Q channel processor (308). The PS (904) typically shifts a signal ninety degrees.
FIG.4, numeral 400, illustrates one hardware implementation of an analog channel determiner utilized in the present invention, being a signal processor (402) utilized to 30 provide at least two digital signal paths to at least a first (404) and a second (406) digital to analog converter, the at least first and second digital to analog converters being further connected to at least a first (408) and a second (410) filter. The at least first (408) and second (410) filters are - ~ 11 2068425 typically lowpass, providing inphase (408) and quadrature (410) input modulation paths.
FIG. 5, numeral 500, illustrates one hardware implementation of an inphase (I) channel processor (304) 5 utilized in the present invention, that processor having an inphase (I) combiner (502) connected to an inphase (I) adjuster (504), and the inphase (I) adjuster (504) connected to an inphase (I) mixer (506). Typically, the inphase (I) combiner (502) is substantially a first summer that sums the inphase 10 component of the at least first input test signal, when desired, with an inphase feedback signal vector. The inphase (I) adjuster (504) typically comprises at least a second summer for addition of at least one input signal path carrier feedthrough vector, an amplifier for amplification, if desired, 1 S and a lowpass loop filter. The inphase (I) mixer (506) ~ypically mixes an adjusted signal from the inphase (I) adjuster (504) with an oscillator control signal from the oscillator control local oscillator (902). Further the inphase (I) mixer (506) of the inphase (I) channel processor (304) is 20 connected to the first combiner (316) to provide an adjusted inphase input.
FIG. 6, numeral 600, illustrates one hardware implementation of a quadrature (Q) channel processor (308) utilized in the present invention, that processor having a 25 quadrature (Q) combiner (602) connected to a quadrature (Q) adjuster (604), and the quadrature (Q) adjuster (604) connected to a quadrature (Q) mixer (606). Typically, the quadrature (Q) combiner (602) is substantially a third summer ~or summing the quadrature component of the at least one 30 input test signal, when desired, with a quadrature feedback signal vector. The quadrature (Q) adjuster (604) typically comprises at least a fourth summer for addition of at least one upper path carrier feedback vector, an amplifier for amplification, if desired, and a lowpass loop filter. The ~ 12 2068425 quadrature (Q) mixer t606) typically provides for mixing of an adjusted signal from the quadrature (Q) adjuster (604) with an oscillator control signal from the oscillator control local oscillator (902). Further the quadrature (Q) mixer (606) of the 5 quadrature (Q) channel processor (308) is connected to the first combiner (316) to provide an adjusted quadrature input.
The first combiner (316) typically includes a power amplifier, the linearity of which is improved by negative feedback when all feedback signal paths are closed subsequent 10 to the phase adjustments of the present invention.
A first formulator (310) is connected to the first combiner (316) and is operably controlled by connections with a phase adjust oscillator control (PA OSC CONTROL)(312). The first formulator, as illustrated in one implementation further 15 set forth in FIG. 7, numeral 700, typically comprises an inphase (I) feedback mixer (702) for mixing an inphase feedback signal with a phase adjusted oscillator control signal and an inphase (I) feedback adjuster (704). The inphase (I) feedback adjuster (704) typically comprises at least a fifth 20 summer for addition of at least an inphase carrier feedback vector and an adjustment for, when desired, allowing the inphase feedback loop to be open.
A second formulator (314) is connected to the first combiner (316) and is operably controlled by connections with 25 a phase shifter (904) that is attached to a phase adjust oscill tor control (PA OSC CONTROL)(312). The second formulator, as illustrated in one implementation further set forth in FIG. 8, numeral 800, typically comprises a quadrature (Q) feedback mixer (802) for mixing a quadrature (Q) feedback 30 signal with a phase adjusted oscillator control signal and a quadrature (Q) feedback adjuster (804). The quadrature feedback adjuster (804) typically comprises at least a sixth summer for addition of at least one quadrature carrier 1 3 2068~25 feedback vector and an adjustment for, when desired, allowing the quadrature feedback loop to be open.
FIG. 10, numeral 1000, illustrates one hardware implementation of a phase adjusting oscillator control utilized 5 in the present invention. The phase adjusting oscillator control provides for the phase adjustments described above.
The first formulator (310) is connected to a first comparator (1002) that is connected to a control (1004). The second formulator (314) is connected to a second comparator (1012) 10 that is connected to a storage device (1014), typically a storage register. The control (1004) typically utilizes control logic to process a signal received by the first comparator (1002) from the first formulator (310) and a signal received by a second comparator (1012) which is stored in the storage 15 device (1014), and utilizes a first (1006) and a second (1016) memory device to provide an adjusted sine value and an adjusted cosine value, the memory devices being connected to a third (1008) and a fourth (1018) digital to analog converter respectively that are connected to a first mixer (1010) and a 20 second mixer (1020). Clearly one memory device may be utilized in place of the two memory devices described herein.
An OSC CONTROL (1022), as previously described in FIG. 9, is operably connected to the first (1010) and second (1020) mixers. Outputs from the first (1010) and the second (1020) 25 mixers is summed in a second combiner (1024). The second combiner (1024), typically a seventh summer, is directly connected to the inphase (I) mixer (506) of the first formulator (310) and is connected through a phase shifter (PS) (904) to the quadrature (Q) mixer (606) of the second 3 0 formulator (314).
Again, typically, the at least one open loop signal path is closed subsequent to adjusting the initial phase relationship between the at least first input signal and the at least first input feedback signal in response to the at least first ~ 14 2068~5 c~mparison, thereby providing negative feedback and minimizing off channel energy splatter when desired information signals are input.
Thus, the device of the present invention provides for 5 adjusting the initial phase relationship of at least first input signal and at least a first input feedback signal, allowing closing of an open loop such that stable feedback is obtained and splatter of off channel energy is minimized. Not only does the device of the present invention provide the above 10 adjustments, but the device requires less than 40 milliseconds for the adjustments, thus providing more utilizable signal time.
I claim:
Claims (12)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. In a linear transmitter having inphase and quadrature modulation paths, a method of substantially correcting an initial phase relationship between a first input signal having an input signal vector with an input phase and an input magnitude, and a first input feedback signal having a first input feedback signal vector with a first input feedback phase and a first input feedback magnitude, wherein an open loop signal path is provided, comprising the steps of:
(A) providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) obtaining a first comparison of said resultant feedback signal vector with one of the test signal inphase and quadrature components; and (C) adjusting the initial phase relationship between said first input signal and said first input feedback signal in response to said first comparison, such that the time required for implementing the method is less than 40 milliseconds.
(A) providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) obtaining a first comparison of said resultant feedback signal vector with one of the test signal inphase and quadrature components; and (C) adjusting the initial phase relationship between said first input signal and said first input feedback signal in response to said first comparison, such that the time required for implementing the method is less than 40 milliseconds.
2. The method of claim 1, further comprising the step of closing said open loop signal path subsequent to step (C).
3. In a linear cartesian-loop feedback transmitter having inphase and quadrature modulation paths, a method of correcting an initial phase relationship between a first input signal having an input signal vector with an input magnitude and an input phase, and a first input feedback signal having a first input feedback signal vector with a first input feedback magnitude and a first input feedback phase, wherein an open loop signal path is provided, comprising the steps of:
(A) providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector and a first carrier feedback vector;
(B) adjusting said first feedback signal vector and said first carrier feedback vector obtained in correlation with one of the first test signal inphase and quadrature components for obtaining a first adjusted resultant feedback vector;
(C) providing, on said open loop signal path, a second test signal having a second test signal vector with known inphase and quadrature components to obtain a second feedback signal vector and a second carrier feedback vector;
(D) adjusting said second feedback signal vector and said second carrier feedback vector obtained in correlation with one of the second test signal inphase and quadrature components for obtaining a second adjusted resultant feedback signal vector; and (E) adjusting the initial phase relationship between said first input signal and said first input feedback signal with said first and second adjusted resultant feedback signal vectors, such that a time required for implementing the method is less than 40 milliseconds.
(A) providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector and a first carrier feedback vector;
(B) adjusting said first feedback signal vector and said first carrier feedback vector obtained in correlation with one of the first test signal inphase and quadrature components for obtaining a first adjusted resultant feedback vector;
(C) providing, on said open loop signal path, a second test signal having a second test signal vector with known inphase and quadrature components to obtain a second feedback signal vector and a second carrier feedback vector;
(D) adjusting said second feedback signal vector and said second carrier feedback vector obtained in correlation with one of the second test signal inphase and quadrature components for obtaining a second adjusted resultant feedback signal vector; and (E) adjusting the initial phase relationship between said first input signal and said first input feedback signal with said first and second adjusted resultant feedback signal vectors, such that a time required for implementing the method is less than 40 milliseconds.
4. The method of claim 3 further comprising the step of closing said open loop signal path subsequent to step (E).
5. A method as claimed in claim 4 wherein only the inphase component to the modulation path has a non-zero value, said adjusting steps comprising:
(a) inputting said first test signal into the inphase modulation path, said first test signal being a first test signal pulse having a first test signal magnitude and a first test signal phase;
(b) obtaining said first carrier feedback vector and said first feedback signal vector and a first vector sum of those vectors, the first vector sum being a first resultant feedback signal vector;
(c) applying a first phase adjustment to a first feedback signal path to obtain an adjusted first resultant feedback signal vector, having a quadrature vector component that is substantially equal to zero, and an inphase vector component that is substantially nonzero, and being an adjusted first vector sum of an adjusted first carrier feedback vector and an adjusted first feedback signal vector, the adjusted first feedback signal vector having a phase .theta.1 relative to the adjusted first resultant feedback signal vector;
(d) inputting said second test signal, said second test signal being an inverted first test signal pulse of substantially the same magnitude as that of the first test signal pulse, to obtain a first pulse-invert feedback signal vector having invert quadrature and invert phase components;
(e) obtaining a second vector sum of the first pulse-invert feedback signal vector and said second carrier feedback vector, the second carrier feedback vector being equivalent to said first carrier feedback vector, the second vectorsum being a second resultant feedback signal vector;
(f) inverting the second resultant feedback signal vector to obtain an inverted second resultant feedback signal vector, being an inverted second vector sum having an inverted second carrier feedback vector component and an inverted first pulse-invert feedback signal vector component;
(g) applying a second phase adjustment to the first feedback signal path to obtain an adjusted inverted second resultant feedback signal vector, having aquadrature vector component that is substantially equal to zero and an inphase vector component that is substantially nonzero, and being an adjusted second vector sum of an adjusted inverted second carrier feedback vector and an adjusted inverted first pulse-invert feedback signal vector the adjusted inverted first pulse-invert feedback signal vector having a phase .theta.2 relative to the adjusted inverted second resultant feedback signal vector; and (h) applying a third phase adjustment, equivalent to the algebraic average of the first and second phase adjustments, to the first feedback signal path, for obtaining a third feedback signal vector having a third modified phase magnitudeequivalent to .
(a) inputting said first test signal into the inphase modulation path, said first test signal being a first test signal pulse having a first test signal magnitude and a first test signal phase;
(b) obtaining said first carrier feedback vector and said first feedback signal vector and a first vector sum of those vectors, the first vector sum being a first resultant feedback signal vector;
(c) applying a first phase adjustment to a first feedback signal path to obtain an adjusted first resultant feedback signal vector, having a quadrature vector component that is substantially equal to zero, and an inphase vector component that is substantially nonzero, and being an adjusted first vector sum of an adjusted first carrier feedback vector and an adjusted first feedback signal vector, the adjusted first feedback signal vector having a phase .theta.1 relative to the adjusted first resultant feedback signal vector;
(d) inputting said second test signal, said second test signal being an inverted first test signal pulse of substantially the same magnitude as that of the first test signal pulse, to obtain a first pulse-invert feedback signal vector having invert quadrature and invert phase components;
(e) obtaining a second vector sum of the first pulse-invert feedback signal vector and said second carrier feedback vector, the second carrier feedback vector being equivalent to said first carrier feedback vector, the second vectorsum being a second resultant feedback signal vector;
(f) inverting the second resultant feedback signal vector to obtain an inverted second resultant feedback signal vector, being an inverted second vector sum having an inverted second carrier feedback vector component and an inverted first pulse-invert feedback signal vector component;
(g) applying a second phase adjustment to the first feedback signal path to obtain an adjusted inverted second resultant feedback signal vector, having aquadrature vector component that is substantially equal to zero and an inphase vector component that is substantially nonzero, and being an adjusted second vector sum of an adjusted inverted second carrier feedback vector and an adjusted inverted first pulse-invert feedback signal vector the adjusted inverted first pulse-invert feedback signal vector having a phase .theta.2 relative to the adjusted inverted second resultant feedback signal vector; and (h) applying a third phase adjustment, equivalent to the algebraic average of the first and second phase adjustments, to the first feedback signal path, for obtaining a third feedback signal vector having a third modified phase magnitudeequivalent to .
6. A method as claimed in claim 5, wherein only the quadrature component to the modulation path has a non-zero value, said adjusting steps further comprising:
(a) inputting said first test signal into the quadrature modulation path, said first test signal being a third test signal pulse having a third test signal magnitude and a third test signal phase, (b) obtaining a third carrier feedback vector and a third feedback signal vector and obtaining a third vector sum of those vectors, the third vector sum being a third resultant feedback signal vector;
(c) applying a fourth phase adjustment to a second feedback signal path to obtain an adjusted third resultant feedback signal vector, having an inphase vector component that is substantially equal to zero, and a quadrature vector component that is substantially nonzero, and being an adjusted third vector sum of an adjusted third carrier feedback vector and an adjusted third feedback signal vector, the adjusted third feedback signal vector having a phase .theta.3 relative to the adjusted third resultant feedback signal vector;
(d) inputting said second test signal, an inverted third test signal pulse of substantially the same magnitude as that of the third test signal pulse, to obtain a second pulse-invert feedback signal vector having invert quadrature and invertphase components;
(e) obtaining a fourth vector sum of the second pulse-invert feedback signal vector and a fourth carrier feedback vector, the fourth carrier feedback vector being equivalent to said third carrier feedback vector, the fourth vectorsum being a fourth resultant feedback signal vector;
(f) inverting the fourth resultant feedback signal vector to obtain an inverted fourth resultant feedback signal vector, being an inverted fourth vector sum having an inverted fourth carrier feedback vector component and an inverted second pulse-invert feedback signal vector component;
(g) applying a fifth phase adjustment to the second feedback signal path to obtain an adjusted inverted fourth resultant feedback signal vector, having an inphase vector component that is substantially equal to zero and a quadrature vector component that is substantially nonzero, and being an adjusted fourth vector sum of an adjusted inverted fourth carrier feedback vector and an adjusted inverted second pulse-invert feedback signal vector, the adjusted inverted second pulse-invert feedback signal vector, having a phase .theta.4 relative to the adjusted inverted fourth resultant feedback signal vector; and (h) applying a sixth phase adjustment, equivalent to the algebraic average of the fourth and fifth phase adjustments, to the second feedback signal path, for obtaining a sixth feedback signal vector having a sixth modified phase magnitudeequivalent to .
(a) inputting said first test signal into the quadrature modulation path, said first test signal being a third test signal pulse having a third test signal magnitude and a third test signal phase, (b) obtaining a third carrier feedback vector and a third feedback signal vector and obtaining a third vector sum of those vectors, the third vector sum being a third resultant feedback signal vector;
(c) applying a fourth phase adjustment to a second feedback signal path to obtain an adjusted third resultant feedback signal vector, having an inphase vector component that is substantially equal to zero, and a quadrature vector component that is substantially nonzero, and being an adjusted third vector sum of an adjusted third carrier feedback vector and an adjusted third feedback signal vector, the adjusted third feedback signal vector having a phase .theta.3 relative to the adjusted third resultant feedback signal vector;
(d) inputting said second test signal, an inverted third test signal pulse of substantially the same magnitude as that of the third test signal pulse, to obtain a second pulse-invert feedback signal vector having invert quadrature and invertphase components;
(e) obtaining a fourth vector sum of the second pulse-invert feedback signal vector and a fourth carrier feedback vector, the fourth carrier feedback vector being equivalent to said third carrier feedback vector, the fourth vectorsum being a fourth resultant feedback signal vector;
(f) inverting the fourth resultant feedback signal vector to obtain an inverted fourth resultant feedback signal vector, being an inverted fourth vector sum having an inverted fourth carrier feedback vector component and an inverted second pulse-invert feedback signal vector component;
(g) applying a fifth phase adjustment to the second feedback signal path to obtain an adjusted inverted fourth resultant feedback signal vector, having an inphase vector component that is substantially equal to zero and a quadrature vector component that is substantially nonzero, and being an adjusted fourth vector sum of an adjusted inverted fourth carrier feedback vector and an adjusted inverted second pulse-invert feedback signal vector, the adjusted inverted second pulse-invert feedback signal vector, having a phase .theta.4 relative to the adjusted inverted fourth resultant feedback signal vector; and (h) applying a sixth phase adjustment, equivalent to the algebraic average of the fourth and fifth phase adjustments, to the second feedback signal path, for obtaining a sixth feedback signal vector having a sixth modified phase magnitudeequivalent to .
7. In a linear transmitter having inphase and quadrature modulation paths, a device for correcting an initial phase relationship between a first input signal having an input signal vector with an input phase and an input magnitude,and a first input feedback signal having a first input feedback signal vector with a first input feedback phase and a first input feedback magnitude, wherein an open loop signal path is provided, comprising:
(A) first means for providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector, and a first carrier feedback vector, and for obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) second means, responsive to the first means, for obtaining a first comparison of said first resultant feedback signal vector with one of the test signal inphase and quadrature components; and (C) third means, responsive to the second means, for adjusting the initial phase relationship between said first input signal and said first input feedbacksignal in response to said first comparison, such that a time required for implementing the correction is less than 40 milliseconds.
(A) first means for providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to obtain a first feedback signal vector, and a first carrier feedback vector, and for obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) second means, responsive to the first means, for obtaining a first comparison of said first resultant feedback signal vector with one of the test signal inphase and quadrature components; and (C) third means, responsive to the second means, for adjusting the initial phase relationship between said first input signal and said first input feedbacksignal in response to said first comparison, such that a time required for implementing the correction is less than 40 milliseconds.
8. The device of claim 7, further comprising means for closing said open loop signal path subsequent to adjusting the initial phase relationship between said first input signal and said first input feedback signal in response to said first comparison.
9. In a linear cartesian-loop feedback transmitter having inphase and quadrature modulation paths, a device for correcting an initial phase relationship between a first input signal having an input signal vector with an input magnitude and an input phase and a first input feedback signal having a first input feedback signal vector with a first input feedback magnitude and a first input feedback phase, wherein an open loop signal path is provided, comprising:
(A) first means for providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to the modulation paths for obtaining a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) second means, responsive to the first means, for adjusting said first feedback signal vector and said first carrier feedback vector obtained in correlation with one of the first test signal inphase and quadrature components for obtaining a first adjusted resultant feedback vector;
(C) third means, responsive to the first means, for providing, on said open loop signal path, a second test signal having a second test signal vector with known inphase and quadrature components to the modulation paths to obtain a second feedback signal vector and a second carrier feedback vector;
(D) fourth means, responsive to the third means, for adjusting said second feedback signal vector and said second carrier feedback vector in correlation with one of the second test signal inphase and quadrature componentsfor obtaining a second adjusted resultant feedback signal vector;
(E) fifth means, responsive to the second means and the fourth means, for adjusting the initial phase relationship between said first input signal and said first input feedback signal in correlation with said first and second adjusted resultant feedback signal vectors, such that the time required for implementing the correction is less than 40 milliseconds.
(A) first means for providing, on said open loop signal path, a first test signal having a first test signal vector with known inphase and quadrature components to the modulation paths for obtaining a first feedback signal vector and a first carrier feedback vector and obtaining a first vector sum of said first feedback signal vector and said first carrier feedback vector, the first vector sum being a first resultant feedback signal vector;
(B) second means, responsive to the first means, for adjusting said first feedback signal vector and said first carrier feedback vector obtained in correlation with one of the first test signal inphase and quadrature components for obtaining a first adjusted resultant feedback vector;
(C) third means, responsive to the first means, for providing, on said open loop signal path, a second test signal having a second test signal vector with known inphase and quadrature components to the modulation paths to obtain a second feedback signal vector and a second carrier feedback vector;
(D) fourth means, responsive to the third means, for adjusting said second feedback signal vector and said second carrier feedback vector in correlation with one of the second test signal inphase and quadrature componentsfor obtaining a second adjusted resultant feedback signal vector;
(E) fifth means, responsive to the second means and the fourth means, for adjusting the initial phase relationship between said first input signal and said first input feedback signal in correlation with said first and second adjusted resultant feedback signal vectors, such that the time required for implementing the correction is less than 40 milliseconds.
10. The device of claim 9, further comprising means for closing said open loop signal path subsequent to adjusting the initial relationship between said first input signal and said first input feedback signal.
11. The device of claim 10, wherein only the inphase component to the modulation path has a non-zero value and said first test signal input into the inphase modulation path is a first test signal pulse having a first test signal magnitude and a first test signal phase, further including:
(a) sixth means, responsive to the first means, for obtaining said first carrier feedback vector and said first feedback signal vector and a first vectorsum of those vectors, the first vector sum being a first resultant feedback signal vector;
(b) seventh means, responsive to the sixth means, for applying a first phase adjustment to a first feedback signal path to obtain an adjusted first resultant feedback signal vector, having a quadrature vector component that is substantially equal to zero, and an inphase vector component that is substantially nonzero, and being an adjusted first vector sum of an adjusted first carrier feedback vector and an adjusted first feedback signal vector, the adjusted firstfeedback signal vector having a phase .theta.1 relative to the adjusted first resultant feedback signal vector;
(c) eighth means, responsive to the first means, for inputting said second test signal, an inverted first test signal pulse of substantially the same magnitude as that of the first test signal pulse, to obtain a first pulse-invert feedback signal vector having invert quadrature and invert phase components;
(d) ninth means, responsive to the eighth means and the first means, for obtaining a second vector sum of the first pulse-invert feedback signal vector and said second carrier feedback vector, the second carrier feedback vector being equivalent to said first carrier feedback vector, the second vector sum being a second resultant feedback signal vector;
(e) tenth means, responsive to the ninth means, for inverting the second resultant feedback signal vector to obtain an inverted second resultant feedbacksignal vector, being an inverted second vector sum having an inverted second carrier feedback vector component and an inverted first pulse-invert feedback signal vector component;
(f) eleventh means, responsive to the tenth means, for applying a second phase adjustment to the first feedback signal path to obtain an adjusted inverted second resultant feedback signal vector, having a quadrature vector component that is substantially equal to zero and an inphase vector component that is substantially nonzero, and being an adjusted second vector sum of an adjusted inverted second carrier feedback vector and an adjusted inverted pulse-invert feedback signal vector, the adjusted inverted pulse-invert feedback signal vector having a phase .theta.2 relative to the adjusted inverted second resultant feedback signal vector; and (g) twelfth means, responsive to the seventh means and to the eleventh means, for applying a third phase adjustment, equivalent to the algebraic average of the first and second phase adjustments, to the first feedback signal path, for obtaining a third feedback signal vector having a third modified phase magnitudeequivalent to .
(a) sixth means, responsive to the first means, for obtaining said first carrier feedback vector and said first feedback signal vector and a first vectorsum of those vectors, the first vector sum being a first resultant feedback signal vector;
(b) seventh means, responsive to the sixth means, for applying a first phase adjustment to a first feedback signal path to obtain an adjusted first resultant feedback signal vector, having a quadrature vector component that is substantially equal to zero, and an inphase vector component that is substantially nonzero, and being an adjusted first vector sum of an adjusted first carrier feedback vector and an adjusted first feedback signal vector, the adjusted firstfeedback signal vector having a phase .theta.1 relative to the adjusted first resultant feedback signal vector;
(c) eighth means, responsive to the first means, for inputting said second test signal, an inverted first test signal pulse of substantially the same magnitude as that of the first test signal pulse, to obtain a first pulse-invert feedback signal vector having invert quadrature and invert phase components;
(d) ninth means, responsive to the eighth means and the first means, for obtaining a second vector sum of the first pulse-invert feedback signal vector and said second carrier feedback vector, the second carrier feedback vector being equivalent to said first carrier feedback vector, the second vector sum being a second resultant feedback signal vector;
(e) tenth means, responsive to the ninth means, for inverting the second resultant feedback signal vector to obtain an inverted second resultant feedbacksignal vector, being an inverted second vector sum having an inverted second carrier feedback vector component and an inverted first pulse-invert feedback signal vector component;
(f) eleventh means, responsive to the tenth means, for applying a second phase adjustment to the first feedback signal path to obtain an adjusted inverted second resultant feedback signal vector, having a quadrature vector component that is substantially equal to zero and an inphase vector component that is substantially nonzero, and being an adjusted second vector sum of an adjusted inverted second carrier feedback vector and an adjusted inverted pulse-invert feedback signal vector, the adjusted inverted pulse-invert feedback signal vector having a phase .theta.2 relative to the adjusted inverted second resultant feedback signal vector; and (g) twelfth means, responsive to the seventh means and to the eleventh means, for applying a third phase adjustment, equivalent to the algebraic average of the first and second phase adjustments, to the first feedback signal path, for obtaining a third feedback signal vector having a third modified phase magnitudeequivalent to .
12. A device as claimed in claim 11, wherein only the quadrature component to the modulation path has a non-zero value and said first test signalinput into the quadrature modulation path is a third test signal pulse having a third test signal magnitude and a third test signal phase, further including:
(a) thirteenth means, responsive to the first means, for obtaining a third carrier feedback vector and a third feedback signal vector and obtaining a thirdvector sum of those vectors, the third vector sum being a third resultant feedback signal vector;
(b) fourteenth means, responsive to the thirteenth means, for applying a fourth phase adjustment to a second feedback signal path to obtain an adjusted third resultant feedback signal vector, having an inphase vector component that is substantially equal to zero, and a quadrature vector component that is substantially nonzero, and being an adjusted third vector sum of an adjusted third carrier feedback vector and an adjusted first feedback signal vector, the adjusted third feedback signal vector having a phase .theta.3 relative to the adjusted third resultant feedback signal vector;
(c) fifteenth means, responsive to the first means, for inputting said second test signal, an inverted third test signal pulse of substantially the same magnitude as that of the third test signal pulse, to obtain a second pulse-invert feedback signal vector having invert quadrature and invert phase components;
(d) sixteenth means, responsive to the fifteenth means and the first means, for obtaining a fourth vector sum of the second pulse-invert feedback signal vector and a fourth carrier feedback vector, the fourth carrier feedback vector being equivalent to said third carrier feedback vector, the fourth vectorsum being a fourth resultant feedback signal vector;
(e) seventeenth means, responsive to the sixteenth means, for inverting the fourth resultant feedback signal vector to obtain an inverted fourth resultant feedback signal vector, being an inverted fourth vector sum having an inverted fourth carrier feedback vector component and an inverted second pulse-invert feedback signal vector component;
(f) eighteenth means, responsive to the seventeenth means, for applying a fifth phase adjustment to the second feedback signal path to obtain an adjusted inverted fourth resultant feedback signal vector, having an inphase vector component that is substantially equal to zero and a quadrature vector component that is substantially nonzero, and being an adjusted fourth vector sum of an adjusted inverted fourth carrier feedback vector and an adjusted inverted secondpulse-invert feedback signal vector, the adjusted inverted second pulse-invert feedback signal vector having a phase .theta.4 relative to the adjusted inverted fourth resultant feedback signal vector; and (g) nineteenth means, responsive to the fourteenth means and to the eighteenth means, for applying a sixth phase adjustment, equivalent to the algebraic average of the fourth and fifth phase adjustments, to the second feedback signal path, for obtaining a sixth feedback signal vector having a sixth modified phase magnitude equivalent to .
(a) thirteenth means, responsive to the first means, for obtaining a third carrier feedback vector and a third feedback signal vector and obtaining a thirdvector sum of those vectors, the third vector sum being a third resultant feedback signal vector;
(b) fourteenth means, responsive to the thirteenth means, for applying a fourth phase adjustment to a second feedback signal path to obtain an adjusted third resultant feedback signal vector, having an inphase vector component that is substantially equal to zero, and a quadrature vector component that is substantially nonzero, and being an adjusted third vector sum of an adjusted third carrier feedback vector and an adjusted first feedback signal vector, the adjusted third feedback signal vector having a phase .theta.3 relative to the adjusted third resultant feedback signal vector;
(c) fifteenth means, responsive to the first means, for inputting said second test signal, an inverted third test signal pulse of substantially the same magnitude as that of the third test signal pulse, to obtain a second pulse-invert feedback signal vector having invert quadrature and invert phase components;
(d) sixteenth means, responsive to the fifteenth means and the first means, for obtaining a fourth vector sum of the second pulse-invert feedback signal vector and a fourth carrier feedback vector, the fourth carrier feedback vector being equivalent to said third carrier feedback vector, the fourth vectorsum being a fourth resultant feedback signal vector;
(e) seventeenth means, responsive to the sixteenth means, for inverting the fourth resultant feedback signal vector to obtain an inverted fourth resultant feedback signal vector, being an inverted fourth vector sum having an inverted fourth carrier feedback vector component and an inverted second pulse-invert feedback signal vector component;
(f) eighteenth means, responsive to the seventeenth means, for applying a fifth phase adjustment to the second feedback signal path to obtain an adjusted inverted fourth resultant feedback signal vector, having an inphase vector component that is substantially equal to zero and a quadrature vector component that is substantially nonzero, and being an adjusted fourth vector sum of an adjusted inverted fourth carrier feedback vector and an adjusted inverted secondpulse-invert feedback signal vector, the adjusted inverted second pulse-invert feedback signal vector having a phase .theta.4 relative to the adjusted inverted fourth resultant feedback signal vector; and (g) nineteenth means, responsive to the fourteenth means and to the eighteenth means, for applying a sixth phase adjustment, equivalent to the algebraic average of the fourth and fifth phase adjustments, to the second feedback signal path, for obtaining a sixth feedback signal vector having a sixth modified phase magnitude equivalent to .
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/607,423 US5134718A (en) | 1990-10-31 | 1990-10-31 | Fast phase shift adjusting method and device for linear transmitter |
| US607,423 | 1990-10-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2068425A1 CA2068425A1 (en) | 1992-05-01 |
| CA2068425C true CA2068425C (en) | 1995-11-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002068425A Expired - Lifetime CA2068425C (en) | 1990-10-31 | 1991-09-20 | Fast phase shift adjusting method and device for linear transmitter |
Country Status (10)
| Country | Link |
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| US (1) | US5134718A (en) |
| EP (1) | EP0506908B1 (en) |
| JP (1) | JPH0622335B2 (en) |
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| CN (1) | CN1022966C (en) |
| AU (1) | AU644961B2 (en) |
| CA (1) | CA2068425C (en) |
| DE (1) | DE69132241T2 (en) |
| TW (1) | TW215135B (en) |
| WO (1) | WO1992008291A1 (en) |
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| US5551070A (en) * | 1993-01-28 | 1996-08-27 | Telefonaktiebolaget Lm Ericsson | Cartesian multicarrier feedback |
| US5423082A (en) * | 1993-06-24 | 1995-06-06 | Motorola, Inc. | Method for a transmitter to compensate for varying loading without an isolator |
| US5559468A (en) * | 1993-06-28 | 1996-09-24 | Motorola, Inc. | Feedback loop closure in a linear transmitter |
| US5613226A (en) * | 1993-11-30 | 1997-03-18 | Nec Corporation | Linear transmitter for use in combination with radio communication systems |
| GB2286302B (en) * | 1994-01-29 | 1998-12-16 | Motorola Inc | Power amplifier and radio transmitter |
| US5574992A (en) * | 1994-04-29 | 1996-11-12 | Motorola, Inc. | Method and apparatus for reducing off-channel interference produced by a linear transmitter |
| GB2293935B (en) * | 1994-10-03 | 1999-07-14 | Linear Modulation Tech | Automatic calibration of carrier suppression and loop phase in a cartesian amplifier |
| GB2301247A (en) * | 1995-05-22 | 1996-11-27 | Univ Bristol | A cartesian loop transmitter amplifier |
| US5732333A (en) * | 1996-02-14 | 1998-03-24 | Glenayre Electronics, Inc. | Linear transmitter using predistortion |
| US5783968A (en) * | 1996-11-14 | 1998-07-21 | Motorola, Inc. | RF amplifier method and apparatus |
| GB9715278D0 (en) | 1997-07-18 | 1997-09-24 | Cambridge Consultants | Signal processing system |
| SE512623C2 (en) | 1997-11-03 | 2000-04-10 | Ericsson Telefon Ab L M | Procedure and device in a telecommunications problem |
| US6731694B2 (en) | 2001-08-07 | 2004-05-04 | Motorola, Inc. | Isolator eliminator for a linear transmitter |
| US7058369B1 (en) | 2001-11-21 | 2006-06-06 | Pmc-Sierra Inc. | Constant gain digital predistortion controller for linearization of non-linear amplifiers |
| GB2400250B (en) * | 2003-03-31 | 2005-05-25 | Motorola Inc | Wireless communication unit and linearised transmitter circuit therefor |
| US7421252B2 (en) * | 2005-08-02 | 2008-09-02 | Freescale Semiconductor, Inc. | Center frequency control of an integrated phase rotator band-pass filter using VCO coarse trim bits |
| US7719355B2 (en) * | 2007-05-31 | 2010-05-18 | Motorola, Inc. | Method and apparatus for providing a Cartesian training waveform |
| JP4468422B2 (en) * | 2007-08-09 | 2010-05-26 | 株式会社東芝 | Wireless transmitter using Cartesian loop |
| WO2009147891A1 (en) * | 2008-06-02 | 2009-12-10 | 株式会社 東芝 | Wireless transmission device using cartesian loop |
| GB2466072B (en) * | 2008-12-12 | 2011-03-23 | Motorola Inc | Adaptive cartesian loop transmitter for broadband and optimal loop stability adjustment |
| GB2469076B (en) * | 2009-03-31 | 2013-05-22 | Motorola Solutions Inc | IQ phase imbalance correction method in cartesian linearization feedback path with dual phase shifters |
| CN105187346B (en) * | 2015-09-25 | 2019-03-05 | 海能达通信股份有限公司 | The method and transmitter that transmitter phase adaptively adjusts |
Family Cites Families (5)
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| FR2554656B1 (en) * | 1983-11-04 | 1986-06-27 | Lgt Lab Gen Telecomm | FREQUENCY MODULATION TRANSMITTER APPLICABLE TO FM BROADCASTING |
| US4696017A (en) * | 1986-02-03 | 1987-09-22 | E-Systems, Inc. | Quadrature signal generator having digitally-controlled phase and amplitude correction |
| US4933986A (en) * | 1989-08-25 | 1990-06-12 | Motorola, Inc. | Gain/phase compensation for linear amplifier feedback loop |
| US5066922A (en) * | 1989-10-16 | 1991-11-19 | Motorola, Inc. | Stabilizing circuit for feedback RF amplifier |
| US4993986A (en) * | 1989-11-01 | 1991-02-19 | Bloomfield Steven L | Fuzz blower power tube |
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1990
- 1990-10-31 US US07/607,423 patent/US5134718A/en not_active Expired - Lifetime
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1991
- 1991-09-10 TW TW080107136A patent/TW215135B/zh not_active IP Right Cessation
- 1991-09-20 CA CA002068425A patent/CA2068425C/en not_active Expired - Lifetime
- 1991-09-20 WO PCT/US1991/006789 patent/WO1992008291A1/en active IP Right Grant
- 1991-09-20 JP JP3517088A patent/JPH0622335B2/en not_active Expired - Fee Related
- 1991-09-20 KR KR1019920701556A patent/KR950013611B1/en not_active IP Right Cessation
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- 1991-09-20 EP EP91918022A patent/EP0506908B1/en not_active Expired - Lifetime
- 1991-10-10 CN CN91109621A patent/CN1022966C/en not_active Expired - Lifetime
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1992
- 1992-05-07 AU AU16078/92A patent/AU644961B2/en not_active Ceased
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| WO1992008291A1 (en) | 1992-05-14 |
| CN1022966C (en) | 1993-12-01 |
| KR920704437A (en) | 1992-12-19 |
| EP0506908A4 (en) | 1994-10-12 |
| AU644961B2 (en) | 1993-12-23 |
| EP0506908B1 (en) | 2000-05-31 |
| KR950013611B1 (en) | 1995-11-13 |
| DE69132241T2 (en) | 2001-01-04 |
| DE69132241D1 (en) | 2000-07-06 |
| EP0506908A1 (en) | 1992-10-07 |
| CA2068425A1 (en) | 1992-05-01 |
| CN1061310A (en) | 1992-05-20 |
| JPH0622335B2 (en) | 1994-03-23 |
| AU1607892A (en) | 1993-02-18 |
| JPH05500596A (en) | 1993-02-04 |
| TW215135B (en) | 1993-10-21 |
| US5134718A (en) | 1992-07-28 |
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