CA2069658A1 - Active intelligent termination - Google Patents

Active intelligent termination

Info

Publication number
CA2069658A1
CA2069658A1 CA2069658A CA2069658A CA2069658A1 CA 2069658 A1 CA2069658 A1 CA 2069658A1 CA 2069658 A CA2069658 A CA 2069658A CA 2069658 A CA2069658 A CA 2069658A CA 2069658 A1 CA2069658 A1 CA 2069658A1
Authority
CA
Canada
Prior art keywords
data
bus
field effect
effect transistor
conducting mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2069658A
Other languages
French (fr)
Other versions
CA2069658C (en
Inventor
David Kazuo Okura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Publication of CA2069658A1 publication Critical patent/CA2069658A1/en
Application granted granted Critical
Publication of CA2069658C publication Critical patent/CA2069658C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

Abstract

An active intelligent termination circuit is designed to function as a self-switching clamp adapted to attenuate unwanted signals on a data bus. A field effect transistor is switched on or off in a conducting mode or non-conducting mode respectively in accordance with the data transmitted on the data bus. Any low level unwanted signals which may appear on the bus when data having a voltage level corresponding to a logic zero is present will be attenuated by the field effect transistor which is coupled to both the data bus and to a ground plane. The field effect transistor switches to the non-conducting mode when data corresponding to a logic level one is transmitted on the bus.
CA002069658A 1991-07-25 1992-05-27 Active intelligent termination Expired - Fee Related CA2069658C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/735,730 US5166561A (en) 1991-07-25 1991-07-25 Active intelligent termination
US735,730 1991-07-25

Publications (2)

Publication Number Publication Date
CA2069658A1 true CA2069658A1 (en) 1993-01-26
CA2069658C CA2069658C (en) 1998-09-15

Family

ID=24956953

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002069658A Expired - Fee Related CA2069658C (en) 1991-07-25 1992-05-27 Active intelligent termination

Country Status (2)

Country Link
US (1) US5166561A (en)
CA (1) CA2069658C (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4234402A1 (en) * 1992-10-07 1994-04-14 Siemens Ag Arrangement for transmitting binary signals over a signal line
US5329174A (en) * 1992-10-23 1994-07-12 Xilinx, Inc. Circuit for forcing known voltage on unconnected pads of an integrated circuit
US5534811A (en) * 1993-06-18 1996-07-09 Digital Equipment Corporation Integrated I/O bus circuit protection for multiple-driven system bus signals
US5466975A (en) * 1993-08-13 1995-11-14 The Whitaker Corporation Switched termination for bus tap-off line
US5585741B1 (en) * 1994-04-22 2000-05-02 Unitrode Corp Impedance emulator
US5811984A (en) * 1995-10-05 1998-09-22 The Regents Of The University Of California Current mode I/O for digital circuits
US5933021A (en) * 1996-06-18 1999-08-03 Sun Microsystems, Inc Noise suppression method and circuits for sensitive circuits
US5994918A (en) * 1997-08-29 1999-11-30 Hewlett-Packard Co. Zero delay regenerative circuit for noise suppression on a computer data bus
KR100304691B1 (en) * 1998-05-29 2001-09-29 윤종용 Tristate detection circuit & digital signal generator having the same
US6294942B2 (en) 1999-03-09 2001-09-25 International Business Machines Corporation Method and apparatus for providing self-terminating signal lines
US6424169B1 (en) * 2000-01-24 2002-07-23 Broadcom Corporation Active termination network
US6351138B1 (en) 2001-03-22 2002-02-26 Pericom Semiconductor Corp. Zero-DC-power active termination with CMOS overshoot and undershoot clamps
US6429678B1 (en) 2001-03-22 2002-08-06 Pericom Semiconductor Corp. Capacitively-coupled extended swing zero-DC-power active termination with CMOS overshoot/undershoot clamps
US6686763B1 (en) 2002-05-16 2004-02-03 Pericam Semiconductor Corp. Near-zero propagation-delay active-terminator using transmission gate
JP4018941B2 (en) * 2002-06-26 2007-12-05 オリオン電機株式会社 Signal interference prevention unit and signal processing apparatus
US7026839B1 (en) * 2003-06-26 2006-04-11 Marvell International Ltd. Circuits, architectures, systems and methods for overvoltage protection
US10425361B2 (en) 2017-03-16 2019-09-24 Trane International Inc. Dynamic allocation of termination resistors in a communication network

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5321266B2 (en) * 1972-10-04 1978-07-01
US3832575A (en) * 1972-12-27 1974-08-27 Ibm Data bus transmission line termination circuit
US3937988A (en) * 1974-04-05 1976-02-10 Fairchild Camera And Instrument Corporation Active termination network for clamping a line signal
US4015147A (en) * 1974-06-26 1977-03-29 International Business Machines Corporation Low power transmission line terminator
US4228369A (en) * 1977-12-30 1980-10-14 International Business Machines Corporation Integrated circuit interconnection structure having precision terminating resistors
US4450370A (en) * 1979-01-31 1984-05-22 Phillips Petroleum Company Active termination for a transmission line
US4345171A (en) * 1980-06-30 1982-08-17 Texas Instruments Incorporated Adaptable nonlinear transmission line terminator
US4498021A (en) * 1982-07-13 1985-02-05 Matsushita Electric Industrial Co., Ltd. Booster for transmitting digital signal
US4596940A (en) * 1984-04-19 1986-06-24 Hewlett-Packard Company Three state differential ECL bus driver
US4766334A (en) * 1986-03-07 1988-08-23 The Singer Company Level clamp for Tri-state CMOS bus structure
JPS62214714A (en) * 1986-03-15 1987-09-21 Fujitsu Ltd Lsi device equipped with noise countermeasure circuit
US4748426A (en) * 1986-11-07 1988-05-31 Rodime Plc Active termination circuit for computer interface use
US4859877A (en) * 1988-01-04 1989-08-22 Gte Laboratories Incorporated Bidirectional digital signal transmission system

Also Published As

Publication number Publication date
CA2069658C (en) 1998-09-15
US5166561A (en) 1992-11-24

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed