CA2082066A1 - Software debugging system and method especially adapted for code debugging within a multi-architecture environment - Google Patents
Software debugging system and method especially adapted for code debugging within a multi-architecture environmentInfo
- Publication number
- CA2082066A1 CA2082066A1 CA2082066A CA2082066A CA2082066A1 CA 2082066 A1 CA2082066 A1 CA 2082066A1 CA 2082066 A CA2082066 A CA 2082066A CA 2082066 A CA2082066 A CA 2082066A CA 2082066 A1 CA2082066 A1 CA 2082066A1
- Authority
- CA
- Canada
- Prior art keywords
- debugging
- commands
- domain
- architecture
- code
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3664—Environments for testing or debugging software
Abstract
In a computer system that embodies a first hardware (X) architecture and includes a memory system and at least one simulator for a second (Y) architecture and a system for executing and debugging multiple codes having an environment manager that handles cross-domain calls, a system is provided for debugging code in each domain as part of said multi-code executing and debugging system in a multi-architecture environment. The debugging system includes means for receiving calls for debugger operation from either the X domain or the Y domain. Commands are generated for debugging operations in either domain. The commands that may be generated by the user include RUN and STEP commands for the machine state in the debug domain. General support commands and debug operations support commands may also be generated. The debug operations support commands include EXAMINE, DEPOSIT, SET BREAKPOINT AND CANCEL BREAKPOINT. The latter commands are implemented differently for the different domains.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US66588891A | 1991-03-07 | 1991-03-07 | |
US665,888 | 1991-03-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2082066A1 true CA2082066A1 (en) | 1992-09-08 |
CA2082066C CA2082066C (en) | 1998-04-21 |
Family
ID=24671965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002082066A Expired - Fee Related CA2082066C (en) | 1991-03-07 | 1992-03-05 | Software debugging system and method especially adapted for code debugging within a multi-architecture environment |
Country Status (8)
Country | Link |
---|---|
US (1) | US5548717A (en) |
EP (1) | EP0532744B1 (en) |
JP (1) | JP2753500B2 (en) |
AU (1) | AU651453B2 (en) |
CA (1) | CA2082066C (en) |
DE (1) | DE69216020T2 (en) |
IE (1) | IE79073B1 (en) |
WO (1) | WO1992015947A1 (en) |
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US20080098359A1 (en) * | 2006-09-29 | 2008-04-24 | Ventsislav Ivanov | Manipulation of trace sessions based on address parameters |
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US20130132063A1 (en) * | 2011-11-18 | 2013-05-23 | Michael J. Rieschl | Systems and methods for debugging just-in-time static translation in an emulated system |
US10339229B1 (en) | 2013-05-31 | 2019-07-02 | Cadence Design Systems, Inc. | Simulation observability and control of all hardware and software components of a virtual platform model of an electronics system |
US9262305B1 (en) * | 2013-05-31 | 2016-02-16 | Cadence Design Systems, Inc. | Simulation observability and control of all hardware and software components of a virtual platform model of an electronics system |
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US11487561B1 (en) | 2014-12-24 | 2022-11-01 | Cadence Design Systems, Inc. | Post simulation debug and analysis using a system memory model |
US10802852B1 (en) | 2015-07-07 | 2020-10-13 | Cadence Design Systems, Inc. | Method for interactive embedded software debugging through the control of simulation tracing components |
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-
1992
- 1992-03-05 AU AU17619/92A patent/AU651453B2/en not_active Ceased
- 1992-03-05 DE DE69216020T patent/DE69216020T2/en not_active Expired - Fee Related
- 1992-03-05 WO PCT/US1992/001612 patent/WO1992015947A1/en active IP Right Grant
- 1992-03-05 CA CA002082066A patent/CA2082066C/en not_active Expired - Fee Related
- 1992-03-05 EP EP92910631A patent/EP0532744B1/en not_active Expired - Lifetime
- 1992-03-05 JP JP4509670A patent/JP2753500B2/en not_active Expired - Lifetime
- 1992-03-06 IE IE920746A patent/IE79073B1/en not_active IP Right Cessation
-
1995
- 1995-02-14 US US08/389,089 patent/US5548717A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH05505695A (en) | 1993-08-19 |
US5548717A (en) | 1996-08-20 |
AU651453B2 (en) | 1994-07-21 |
DE69216020D1 (en) | 1997-01-30 |
DE69216020T2 (en) | 1997-07-10 |
EP0532744B1 (en) | 1996-12-18 |
JP2753500B2 (en) | 1998-05-20 |
AU1761992A (en) | 1992-10-06 |
EP0532744A1 (en) | 1993-03-24 |
IE79073B1 (en) | 1998-04-08 |
WO1992015947A1 (en) | 1992-09-17 |
IE920746A1 (en) | 1992-09-09 |
CA2082066C (en) | 1998-04-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |