CA2090297C

CA2090297C - Adaptive noise reduction circuit for a sound reproduction system

Info

Publication number: CA2090297C
Application number: CA002090297A
Authority: CA
Inventors: A. Maynard Engebretson; Michael P. O'connell
Original assignee: K/S Himpp
Current assignee: K/S Himpp
Priority date: 1992-02-27
Filing date: 1993-02-24
Publication date: 2001-04-24
Anticipated expiration: 2013-02-24
Also published as: AU658476B2; JP3040893B2; AU3304693A; KR100253539B1; US5412735A; DE69325529D1; CA2090297A1; MY131305A; DK0558312T3; JPH077786A; DE69325529T2; KR930019059A; EP0558312A1; EP0558312B1

Abstract

A noise reduction circuit for a hearing aid having an adaptive filter for producing a signal which estimates the noise components present in an input signal. The circuit includes a second filter for receiving the noise-estimating signal and modifying it as a function of a user's preference or as a function of an expected noise environment. The circuit also includes a gain control for adjusting the magnitude of the modified noise-estimating signal, thereby allowing for the adjustment of the magnitude of the circuit response.
The circuit also includes a signal combiner for combining the input signal with the adjusted noise-estimating signal to produce a noise reduced output signal.

Description

20909'7 ADAPTIVE NOISE REDUCTION CIRCUIT
FOR A SOUND REPRODUCTION SYSTEM
Copyright ~1988 Central Institute for the Deaf. A
port-.ion of tl~e disclosure of this patent dacument contains m~fieri~l which is subject to copyright protection. The copyrigfvt owner has no ol~jeclion to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it apk>ears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
__ekground of the Invention The present invention relates to a noise reduction circuit for a sound reproduction system and, more particu-larly, to an adaptive noise reduction circuit for a hearing aid.
A common complaint of hearing aid users is their inability to understand speech in a noisy environment. In the past, hearing aid users were limited to listening-in-noise strategies such as adjusting the overall gain via a volume control, adjusting the frequency response, or simply removing tkie hearing aid. More recent hearing aids have used noise reduction techniques based on, for example, the modification of the low frequency gain in response to noise. Typically, however, these strategies and techniques have not achieved as complete a removal of noise components from the audible range of sounds as desired.
In addition to reducing noise effectively, a practi-cal ear-level hearing aid design must accommodate the power, size and microphone placement limitations dictated by current commercial hearing aid designs. While powerful digital signal processing techniques are available, they require considerable space and power such that most are not suitable for use in a hearing aid. Accordingly, there is a need for a noise reduc-tion circuit that requires modest computational resources, that uses only a single microphone input, that has a large range of responses for different noise inputs, and that allows for the customization of the noise reduction according to a particular user's preferences.

Summary of the Invention Among the several objects of the present invention may be noted the provision of a noise reduction circuit which estimates the noise components in an input signal and reduces S them; the provision of such a circuit which is small in size and which has minimal power requirements for use in a hearing aid; the~provision of such a circuit having a frequency response which is adjustable according to a user's preference;
the provision of such a circuit having a frequency response which is adjustable according to an expected noise environ-ment; the provision of such a circuit having a gain which is adjustable according to a user's preference; the provision of such a circuit having a gain which is adjustable according to an existing noise environment; and the provision of such a circuit which produces a noise reduced output signal.
Generally, in one form the invention provides a noise reduction circuit for a sound reproduction system having a microphone for producing en input signal in response to sound in which noise comgonents are present. The circuit includes an adaptive filter comprising a variable filter responsive to the input signal to produce a noise estimating signal and further comprising a first combining means respon-sive to the input signal and the noise-estimating signal to produce a composite signal. The parameters of the variable filter are varied in response to the composite signal to change its operating characteristics. The circuit further includes a second filter which responds to the noise-estimating signal to produce a modified noise-estimating signal and also includes means for delaying the input signal to produce a delayed signal. The circuit also includes a second combining means which is responsive to the delayed signal and the modified noise-estimating signal to produce a noise-reduced output signal. The variable filter may include means for continually sampling the input signal during predetermined time intervals to produce the noise-estimating signal. The circuit may be used with a digital input signal and may include a delaying ~0~020~

means for delaying the input signal by an integer number of samples N to produce the delayed signal and may include a second filter comprising a symmetric FIR filter having a tap length of 2N+1 samples. The circuit may also include means S for acJjusting the amplitude of the modified noise-estimating signal.
Another form of the invention is a sound reproduc-tion system having a microphone for producing an input signal in response to sound in which noise components are present and a variable filter which is responsive to the input signal to produce a noise-estimating signal. The system has a first combining means responsive to the input signal and the noise-estimating signal to produce a composite signal. The parame-ters of the variable filter are varied in response to the com-posite signal to change its operating characteristics. The system further comprises a second filter which is respon-sive to the noise-estimating signal to produce a modified noise-estimating signal and also includes means for delaying the input signal to produce a delayed signal. The system additionally has a second combining means responsive to the delayed signal and the modified noise-estimating signal to produce a noise-reduced output signal and also has a transducer for producing sound with a reduced level of noise components as a function of the noise-reduced output signal. The variable filter may include means for continually .sampling the input signal during predetermined time intervals to produce the noise-estimating signal. The system may be used with a digital input signal and may include a delaying means for delaying the input signal by an integer number of samples N to produce the delayed signal and may include a second filter comprising a symmetric FIR filter having a tap length of 2N+1 samples. The system may also include means for adjusting the amplitude of tire modified noise-estimating signal.
An additional form of the invention is a method of reducing noise components present in an input signal in the audible frequency range which comprises the steps of filtering the input signal with a variable filter to produce a noise-estimating signal and combining the input signal and the noise-estimating signal to produce a composite signal. The method further includes the steps of varying the parameters of the variable filter in response to the composite signal and filtering the noise-estimating signal according to predetermined parameters to produce a modified noise-estimating signal. The method also includes the steps of delaying the input signal to produce a delayed signal and combining the delayed signal and the modified noise-estimating signal to produce a noise-reduced output signal. The method may include a filter parameter varying step comprising the step of continually sampling the input signal and varying the parameters of said variable filter during predetermined time intervals. The method may be used with a digital input signal and may include a delaying step comprising delaying the input signal by an integer number of samples N to produce the delayed signal and may include a noise-estimating signal filtering step comprising filtering the noise-estimating signal with a symmetric FIR filter having a tap length of 2N+1 samples. The method may also include the step of selectively adjusting the amplitude of the modified noise estimating signal.
In accordance with the present invention there is provided a noise reduction circuit for a sound reproduction system having a microphone for producing an input signal in response to sound in which a noise component is present, said circuit comprising: an adaptive filter including a variable filter responsive to the input signal for producing a noise-estimating signal and further including a first combining means responsive to the input signal and the noise-estimating signal for producing a composite signal; said variable filter having parameters which are varied in response to the composite signal to change the operating characteristics thereof; a second 4a filter for filtering the noise-estimating signal to produce a filtered noise-estimating signal; means for delaying the input signal to produce a delayed signal; and second combining means for combining the delayed signal and the filtered noise-s estimating signal to attenuate noise components in the delayed signal and for producing a noise-reduced output signal.
In accordance with the present invention there is further provided a sound reproduction system comprising: a microphone for producing an input signal in response to sound in which noise components are present; a variable filter responsive to the input signal to produce a noise-estimating signal; a first combining means responsive to the input signal and the noise-estimating signal for producing a composite signal; said variable filter having parameters which are varied in response to the composite signal to change the operating characteristics thereof; a second filter for filtering the noise-estimating signal to produce a filtered noise-estimating signal; means for delaying the input signal to produce a delayed signal; second combining means for combining the delayed signal and the filtered noise-estimating signal to attenuate noise components in the delayed signal and for producing a noise-reduced output signal; and a transducer for producing sound with a reduced level of noise components as a function of the noise-reduced output signal.
In accordance with the present invention there is further provided a method of reducing noise components present in an input signal in the audible frequency range comprising the steps of: filtering the input signal with a variable filter to produce a noise-estimating signal; combining the input signal and the noise-estimating signal to produce a composite signal; varying the parameters of the variable filter in response to the composite signal; filtering the noise-estimating signal according to predetermined parameters to 4b produce a filtered noise-estimating signal; delaying the input signal to produce a delayed signal; and combining the delayed signal and the filtered noise-estimating signal to attenuate noise components in the delayed signal to produce a noise-reduced output signal.
In accordance with the present invention there is further provided a hearing aid comprising: a microphone for producing an input signal in response to sound in which noise components are present; a variable filter responsive to the input signal to produce a noise-estimating signal; a first combining means responsive to the input signal and the noise-estimating signal for producing a composite signal; said variable filter having parameters which are varied in response to the composite signal to change the operating characteristics thereof; a second filter for filtering the noise-estimating signal to produce a filtered noise-estimating signal; means for delaying the input signal to produce a delayed signal; second combining means for combining the delayed signal and the filtered noise-estimating signal to attenuate noise components in the delayed signal and for producing a noise-reduced output signal; and a transducer for producing sound with a reduced level of noise components as a function of the noise-reduced output signal.
In accordance with the present invention there is further provided a noise reduction circuit for a sound reproduction system having a microphone for producing an input signal in response to sound in which a noise component is present, said circuit comprising: an adaptive filter including a variable filter responsive to the input signal for producing an noise-estimating signal and further including a first combining means responsive to the input signal and the noise estimating signal for producing a composite signal; said variable filter having parameters which are varied in response 4c to the composite signal to change the operating characteristics thereof; means for adjusting the amplitude of the noise-estimating signal to produce an amplitude adjusted signal; and second combining means for combining the input signal and the amplitude adjusted signal to attenuate noise components in the input signal and for producing a noise-reduced output signal.
Other objects and features will be in part apparent and in part pointed out hereinafter.
Brief Description of the Dra~iags Fig. 1 is a block diagram of a noise reduction circuit of the present invention.
Fig. 2 is a block diagram of a sound reproduction system of the present invention.
Fig. 3 illustrates the present invention embodied in a headset.

2U~029~
Fig. 4 illustrates a hardware implementation of the block diagram of Fig. 2.
Fig. 5 is a block diagram of an analog hearing aid adopted for use with the present invention.

5 Detailed Descri~ti.on of a Preferred Embodiment A noise reduction circuit of the present invention as it would be embodied in a hearing aid is generally indicated at reference numeral 10 in Figure 1. Circuit 10 has an input 12 which cnay be any conventional source of an input signal such as a microphone, signal processor, or the like. Input 12 also includes an analog to digital converter (not shown) for analog inputs so that the signal transmitted over a line 14 is a digi-tal signal. The input signal on line 14 is received by an N-sample delay circuit 16 for delaying the input signal by an integer number of samples N, an adaptive filter within dashed line 18, a delay 20 and a signal level adjuster 36.
Adaptive filter 18 includes a signal combiner 22, and a variable filter 24. Delay 20 receives the input signal from line 14 and outputs a signal on a line 26 which is simi-lar to the input signal except that it is delayed by a prede-termined number of samples. In practice, it has been found drat the length of the delay introduced by delay 20 may be set according to a user's preference or in anticipation of an expected noise environment. The delayed signal on line 26 is received by variable filter 24. Variable filter 24 continu-ally samples each data bit in the delayed input signal to pro-duce a noise-estimating signal on a line 28 which is an esti-mate of the noise components present in the input signal on line 14. Alternatively, if one desires to reduce the signal processing requirements of circuit 10, variable filter 24 may be set to sample only a percentage of the samples in the delayed input signal. Signal combiner 22 receives the input signal from line 14 and receives the noise-estimating signal oru line 28. Signal cornbiuer 22 combines the two signals to produce an error signal carried by a line 30. Signal combiner 22 preferably takes the difference between the two signals.
Variable filter 24 receives the error signal on line 30. Variable filter 24 responds to the error signal by varying tl~e filler parameters according to an algorithm. If the prod-uct. of the error and delayed sample is positive, the filter parameter corresponding to the delayed sample is increased.
I.f t_liis product is negative, tte filler parameter is decreased.
This is done for each parameter. Variable filter 24 preferably uses a version of tl~e LMS filter algorithm for adjusting the filter parameters in response to the error signal. The LMS
filter algorithm is commonly understood by those skilled in ttie art and is more fully described in Widrow, Glover, McCool, Kaunitz, Williams, Hearn, Ziedler, Dong and Goodlin, Adaptive N_uise Cance ling: Principles and Applications, Proceedings of t_he IEEE, 63(12), 1692-1716 (1975), Those skilled in the art will recognize that other adaptive filters and algorithms could be used within the scope of the invention. The invention preferably embodies l~i~e binary version of the LMS algorithm. The binary version is similar to the traditional LMS algorithm with the exception Llrat the binary version uses the sign of the error signal to ~.~p~late the filter parameters instead of the value of the error signal. In operation, variable filter 24 preferably has an adaplion time constant on the order of several seconds. This time constant is used so that the output of variable filter 24 is an estimate of the persisting or stationary noise components present in the input signal on line 14. This time constant prevents the system from adapting and cancelling incoming transient signals and speech energy which change many times during the period of one time constant. The time constant is del:ermined by the parameter update rate and parameter update value.

A filter 32 receives the noise estimating signal from variaule filter 24 and produces a modified noise-estimating signal. Filter 32 teas preselected filter param-eters which rnay be set as a Lunction of the user's trearing impairment or as a function of an expected noise environment.
Filter 32 is used to select the frequencies over which circuit operates to reduce noise. For example, if low frequencies cause trouble for the bearing impaired due to upward spread of masking, filter 32 may allow only the low frequency components 10 of else noise estimating signal to pass. This would allow circuit 10 to remove the noise components through signal com-biner 42 in the low frequencies. Likewise, if the user is trouuled by Higher frequencies, filter 32 may allow only the krigUer frequency components of tire noise-estimating signal to pass which reduces the output via signal combiner 42. In practice, it has been found that there are few absolute rules and that the final setting of the parameters in filter 32 should be determined on the basis of the user's preference.
When circuit 10 is used in a hearing aid, the param-el:eis of filter 32 are Qetermined according to the user's preferences during the filling session for the hearing aid.
'flee hearing aid preferably includes a connector and a data link as slrowri iu Fig. 2 of U.S. Pateot No. 4,548,082 for setting the parameters of filter 32 during the fitting session.
Z5 1'He filling session is preferably conducted as more fully descried in U.S. Patent No. 4,548,082.
Filter 32 outputs the modified noise-estimating signal on a line 34 which is received Uy a signal level adjuster 36. Signal level adjuster 36 adjusts the amplitude of t:he modified noise-estimating signal to produce an ampli-tude adjusted signal on a line 38. If adjuster 36 is manually operated, the user can reduce the amplitude of the modified noise-estimating signal during quiet times when there is less ~0~0~07 need for circuit 10. Likewise, the user can allow the full modified-noise estimating signal to pass during noisy times.
It is also within the scope of the invention to provide for the automatic control of signal level adjuster 36. This is done by having signal level adjuster 36 sense the minimum trrreslnold level of the signal received from input 12 over line 14. When the minimum threshold level is large, it indicates a noisy environment which suggests full output of the modified noise-estimating signal. When the minimum threshold level is small, it indicates a quiet environment which suggests that the modified noise-estimating signal should be reduced. For intermediate conditions, intermediate adjustments are set for signal level adjuster 36.
N-sample delay 16 receives the input signal from input 12 and outputs the signal delayed by N-samples on a line 40. A signal combiner 42 combines the delayed signal on line 40 with the amplitude adjusted signal on line 38 to produce a noise-reduced output signal via line 43 at an output 44.
Signal cornbiner 42 preferably takes the difference between the two signals. This operation of signal combiner 42 cancels signal components that are present both in the N-sample delayed signal and the filtered signal on line 38. The numeric value of N in N-sample delay 16 is determined by the tap length of falter 32, which is a symmetric FIR filter with a delay of N-Samples. For a given tap length L, L = 2N + 1. Tire use of this equation ensures that proper timing is maintained between the output of N-sample delay 16 and the output of filter 32.
When used in a hearing aid, noise reduction circuit 10 may be connected in series with commonly found filters, amplifiers and signal processors. Fig. 2 shows a block diagram for using circuit 10 of Fig. 1 as the first signal processing stage in a hearing aid 100. Common reference numerals are used in the figures as appropriate. Fig. 2 shows a microphone 50 which is positioned to produce an input signal in response 20~029'~

to sound external to hearing aid 100 by conventional means.
An analog to digital converter 52 receives the input signal and converts it to a digital signal. Noise reduction circuit lU receives the digital signal and reduces the noise components in it as more fully described in Fig. 1 and the accompanying text. A signal processor 54 receives the noise reduced output signal from circuit 10. Signal processor 54 may be any one or more of the commonly available signal processing circuits available for processing digital signals in hearing aids. For example, signal processor 54 may include the filter-limit-filter structure disclosed in U.S. Patent No. 4,548,082.
Signal processor 54 may also include any combination of the other commonly found amplifier or filter stages available for use in a hearing aid. After the digital signal has passed through the final stage of signal processing, a digital to analog converter 56 converts the signal to an analog signal for use by a transducer 58 in producing sound as a function of the noise reduced signal.
In addition to use in a traditional hearing aid, the present invention may be used in other applications requiring the removal of stationary noise components from a signal. For example, the work environment in a factory may include back-ground IlOlSe SLrCh as fan or motor noise. Fig. 3 shows circuit 10 of Fig. 1 installed in a headset 110 to be worn over the ears by a worker or in the worker's helmet for reducing the fan or motor noise. Headset 110 includes a microphone 50 for detecting sound in the work place. Microphone 50 is connected by wires (not shown) to a circuit 112. Circuit 112 includes the analog to digital converter 52, noise reduction circuit 10 and digital to analog converter 56 of Fig. 2. Circuit 112 thereby reduces the noise components present in the signal produced by microphone 50. Those skilled in the art will recognize that circuit 112 may also include other signal processing as that found in signal processor 54 of Fig. 2.

to I~eadset 110 also includes a transducer 58 for producing sound as a function of the noise reduced signal produced by circuit 112.
Fig. 4 shows a Hardware implementation 120 of an emuodiment of the invention and, in particular, it shows an implementation of t:he block diagram of Fig. 2, but simplified to unity gain function with the omission of signal processor 54. Hardware 120 includes a digital signal processing board 122 comprised of a TMS 32040 14-bit analog to digital and digital to analog converter 126, a TMS 32010 digital signal processor 128, and an EPROM and RAM memory 130, which operates in real time at a sampling rate of 12.5 khz. Component 126 combines the functions of converters 52 and 56 of Fig. 2 while 128 is a digital signal processor that executes the program in EPROM program memory 130 to provide the noise reduction func-tions of the noise reduction circuitry 10. Hardware 120 includes an ear module 123 for inputting and outputting acous-tic signals. Ear module 123 preferably comprises a Knowles EK
3024 microphone and preamplifier 124 and a Knowles ED 1932 receiver 134 packaged in a typical behind the ear hearing aid case. Thus microphone and preamplifier 124 and receiver 134 provide the functions of microphone 50 and transducer 58 of Fig. 2.
Circuit 130 includes EPROM program memory for imple-meeting the noise reduction circuit 10 of Fig. 1 through com-puter program "NRDEF.320" which is set forth in Appendix A
hereto and incorporated herein by reference. The NRDEF.320 program preferably uses linear arithmetic and linear adaptive coefficient quantization in processing the input signal. Con-trol of the processing is accomplished using the serial port communication routines installed in the program.
In operation, the NRDEF.320 program implements noise reduction circuit 10 of Fig. 1 in software. The reference cluaracters used in Fig. 1 are repeated in the following 24~0~9'~

description of Fig. 4 to correlate the block from Fig. 1 with the corresponding software routine in the NRDEF.320 program wliicli implements the block. Accordingly, the NRDEF.320 pro-gram implements a 6 tap variable filter 24 with a single delay 20 in the variable filter path. Variable filter 24 is driven by the error signal generated by subtracting the variable filter output from the input signal. Based on the signs of the error signal and corresponding data value, the coefficient of variable tiller 24 to be updated is incremented or decre-mented by a single least significant bit. The error signal is used only to update the coefficients of variable filter 24, and is not used in furtluer processing. The noise estimate output from the variable filter 24 is low pass filtered by an 11 tap linear phase filter 32. This lowpass filtered noise estimate is then scaled by a multiplier (default=1) and subtracted from the input signal delayed 5 samples to produce a noise-reduced output signal.
Fig. 5 illustrates the use of the present invention with a traditional analog hearing aid. Fig. 5 includes an analog to digital converter 52, an acoustic noise reduction circuit 10, and a digital to analog converter 56, all as Qescribed above. Circuit 10 and converters 52 and 56 are preferably mounted in an integrated circuit chipset by conven-tional means for connection between a microphone 50 and an amplifier 57 in the hearing aid.
In view of the above, it will be seen that the several objects of the invention are achieved and other advantageous results attained.
As various changes could be made in the above constructions without departing from the scope of the invention, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

APPENDIX A
* PROGRAM 'nrdef.320' *
Michael P. 0'Connell * Copyright 1988 Central Institute for the Deaf * 818 S. Euclid * Saint Louis, Misssouri 63110 * This program is based on the 50 tap adaptive filter program 'nr * In this program the noise estimate is low passed filtered with * x tap linear phase lowpass filter, scaled and used to cancel an * appropriately delayed input signal. The error term used in the * adaptive filter update remains the same. The coefficient updat * uses a leaky coefficient form such that:
* w(k,n+1) ~ w(k,n)*(1-leakJ + delta * where leak and delta are programmable.
* This program also includes the serial port communication protoc * allow t.'~e program parameters to be adjusted throuqh the serial * communication port.
* The do offset from the input is removed using and adaptive null * which subtracts an offset from the input to generate a zero mea * input stream.
* 50 tap adaptive filter using the sign-update method *
* This program implements a 50 tap (or smaller) adaptive filter a * the sign bit update method. The program is designed to use the * 32010 DSP board with the AT_C acting as both A/D and D/A.
*
f f The ada~;.~ve structure implemented is * . _ +
* x~r.) ____+______________________________~+ ______+____> err * I __ I
* / I I
* I .~_____~. +____________+ I I
* I I -'- I I I I I
+____I Z I___I w(*) I___+ y(n) I
* I I I I I
* +_____+ +______~____+ I
* / I
* ______________________+
* "
* The output signal is ~ ~98~ ~'ENr,~A~ irvsr~r~rE ,~o,~ r,~~ ~E,~,~

*
* I -S I +
* x ( n ) -__--_--__ _ I Z I ---~.~~~_~> outpu t " I I " -* ,.w-~ I
* i * +_-_-w ...~ I
* I I i * y ( n ) -____- I 11 tap FSR p~~-~..?g.~~~~
* I I "
* r___~ I
* I
* sensitivity *
************************.v**************x*****x*x****************x*x***
* The default conditions for this program are:
* - 6 tan adaptive filter * - non-leaking coef:icients * - 1 LSB update of adaptive coef=icients * - unity sensitivity tars ( 32767 wisere 32768 is unity) ***************************x********x******x*****x****x***************
* DATA AREAS
* page 0 * 0 - 50 inn_ut samples * 51 - 100 adaptive filter coef=-cients * page 1 = 0 - 11 noisy sst-sate samples ***********x*******************************x***********x**************
* page 0 data locations d0 equ 0 input data x(n) d5 equ 5 input data x(n-5) d49 equ 49 input data x(n-49) d50 equ ~0 input data x(n-50 w0 equ 51 adaptive FIR coef~ic:.ent w(0) w49 equ 100 adaptive FIR coefficient w(49) y equ 101 adaptive filter output (estimate) err equ 102 estimate error ( err ~ x(a) - y(n)]

*

'emp equ 103 temporary working location deltaequ 104 coefficient update magnitude / 2 *

lpestequ 105 low pass filtered noise estimate sees equ 106 noise reduction sensitivity term dcoffequ 107 adaptive do offset pulling term *

taps equ 108 number of adaptive filter taps - 1 leak equ 109 leaky coefficient multiplier * serialcommunication locations serinequ I18 serial input data from uart seroutequ 119 serial output data to uart valueequ 120 hex value of valid input cadd equ 121 address from serial port communication cdataequ 122 data from serial port communication word equ 123 working location used in building a wor one equ 124 data memory address containing 1 mask equ 125 data memory address of 14 high order bit mask din equ 126 a/d input sample dout equ 127 d/a output sample page data cations 1 lo y0 equ 0 current noise estimate y(n) y10 equ 10 noise estimate y(n-10) * AORG 0 b start hard reset vector * a~C r:utine * i..tar:u~t _ sint in din,0 read a/d input sample out dout.0output d/a sample pop load return address into accumulator add one,l add offset to return address push store new return address eint enable interrupts and clear intf ret return from interrupt call bmaskdata >fffc output~bit mask ' fsrtadata >OclB rata data for 12.25 kHz sampling fsrtbdata >448a rb/tb data for 12.25 kHz sampling ksensdata 32761 default noise reduction sensitivity *

Program zation initiali startdint disable interrupts from AIC

ldpk 0 Ioad data page pointer to page 0 sovm set over: low dipping mode lack ksens default noise reduction sensitivity tblr sens read noise reduction sensitivity lack 2 load coefficient delta value sacl delta store coefficient delta value lack 5 load number of taps - 1 sacl taps store the desired number of taps -lack >0 default coefficient leak term (1 -leak/2'16]

sacl leak store default leak term *

* clearcoefficients and data areas * (start to clear filter taps without resetting at cldat * modelparameters) cldatlarp 0 use aux rcq. 0 lark 0,100 set word counter to 100 zac clear accumulator cld sacl * clear lower 100 data locations banz cld branch until alI locations clear lark 0,50 initialize ARO to 50 lark 1,0 initialize RR1 to 0 *

* startpoint resetting parameters for * (thisdoes set delta, sens, or the number of taps) not * (doesnot clearfilter taps) start)dint disable inter_u~ts =:om AI_ l~ak 0 load ~a~a gage goiat=r to page 0 sovm set over=ow c_ipping mode lack bmask output bit mask tblr mask read bit mask lack 1 load one (1) in accumulator sac) one stare value of 1 in one * This code ed to set the sampling rate and AIC
is us configuratic zac clear accumulator sac) Bout zero output data to AIC

out dout,0 clear AIC serial register out dout,7 reset AIC

out dout,7 reset AIC

out dout,0 clear AIC serial register ~0~0~9'~

eint enable interrupts *

hl b hl ignore first inter: sat lack 3 data to init:at_ secondary communicat_on sac'_ dout store data in interrupt region c0 b c9 wait for interrupt lack fsrta ta/ra settings tblr dout read ta/ra settings cl b cl wait for interrupt lack 3 data to initiate secondary communication .

sacl dout store data in interrupt region cZ b c2 wait for inter:upt lack .:.9r.'.''~7t:7/r~.~. Stt~~ngS

' tblr dout read tb/rb settiags c3 b c3 wait for interrupt lack 3 data to init'_ate secondary communication sacl lout store data in iaterrupt region c4 b c4 wait for inter:upt lack >63 AIC data for no as / 3v FS / in+ input sacl dout store AIC settings c5 b c5 wait for interrupt zac clear accumulator sacl dout store output sample of D

c5 b c5 wait for interrupt *

* This is the region in which the main program sampling loop is * execsted_ * null the inputdo of=set 'cot lac di:.l2 load new input sample 5~:.: d=C __ . 3 3L:'t:3C
_ dC
C-~52~

sac: ciz.l st:._a i:pu= :~Wz do t=:~ nul'_ed bgc -aco=: br3aci= of=sec input si;z:al ?ositive ,.
._lac dtof= load adaptive do oi=set term -'sub one f=sat t-rm reduce o sac'_ dcaE~ store new of=set ...

b filter barer to adaptive filter code izca_= dcof= load adapt_ve do offset term lac add one r inc:ease of; set term sac'_ dcoff store new of~set * calculate adaptive filter output the filter clear accumulator zac It d49 load x(n-49) into T register ~~90~9'~

mpy w49 P reg. ~ x(n-49)*w(49) ltd 48 load x(n-48) in T reg., accumulate, Z**-1 mpy 99 P reg. ~ x(n-48)*w(48) ltd 47 mw 9 8 ltd 46 mPY 97 ltd 45 mpy 96 ltd 44 mpy 95 ltd 43 mpy 94 ltd 42 mpy 93 ltd 41 mpy 92 ltd 40 mpy 91 ltd 39 mpy 90 ltd 38 mpy 89 ltd 37 mpy 88 ltd 36 mPY 87 Ltd 35 mpy 86 ltd 34 mpy 85 ltd 33 mpy 84 ltd 32 mpy 83 ltd 31 lt3 30 may 81 ltd 29 mDV 80 1L~ za mDV 79 lta 27 mpy 78 ltd 26 mpy 77 ltd 25 mpy 76 ltd 24 mpy 75 ltd 23 ~o~o~~~

mpy 74 ltd 22 may 73 ltd 21 mpy 72 ltd 20 mpy 71 ltd 19 mpy 70 ltd 18 mpy 69 ltd 17 mpy 69 ltd 16 mpy 67 ltd 15 mpy 66 ltd 14 mpy 65 ltd 13 mpy 64 ltd 12 mpy 63 ltd 11 mpy 62 ltd 10 t 1 l 9 d mpy 60 ltd 8 mgy 59 ltd 7 w mpy 58 ltd 6 mpy 57 ltd 5 may 56 ltd 4 may 55 l 3 td 'mav 54 ltd 2 mpy 53 ltd 1 mpy 52 ' ltd d0 load t reg. x(n), accumulate, Z**-1 ,mpy w0 P reg. x(n)*w(n) apac accumulate final product sac: y,l store estimate y(n) add y,15 add result for gain of 6 dB

add one, round result l4 sack y,l store estimate + 6 d8 (prevent overflow in fil;

2~D~~~~'~

*

* calculate ate error (assume delay of one) estim 1ac din load current input x(n+1) sac. d0 store new input sample in ar:ay sub y subtract estimate err - x(n+1) - y(n>

sacl err store error * update a singlefilter coefficient using the sign bit method * -ARO unts from 50 to 1, w(k) to be updated has addres co * <ARO> + 50, applicable data x(n-k) has address <ARO>
*

sar O,tempstory x(n-k) pointer in location temp lack 50 load w(k) offset in accmulator -add temp add coefficient pointer value sacl temp store w(k) coefficient address in temp lar l,tempload w(k) address in ARl It *,1 load x(n-k) in to T register, set ARP-1 mpy err err * x(n-k) in P reg.

pac load accumulator with product blz nprd branch if err * x(n-k) is negative * add k) delta to w( lac delta, l5 coefficient delta in accumulator b updat branch to update code * subtract from w(k) delta nerd zac clear accumulator sub delta, l5 negative coefficient delta in accumulat *. update w(k) using address stored in u~dazadd *,15 add r(k) to cur:~nt delta add *,15 add w(k) again to make use of overflew processi ' It * load w(k) in T reg. for leak term mpy leak multiply by leak term snot subtract scaled w(k) foc leak saca *,0,0 story updated w(k), set ARP-0 *.

* update t:~e coefficient pointer ARO

mar *-,0 subtract one from ARO to offset count (49-0) banz cntak branch if coefficient counter not zero lar O,tapsreset coefficient counter cntokmar *+,0 add one to ARO to use again as address pointer * low ss r and scale the noise estimate pa filte lac y load current noise estimate in accumlatar ldpk 1 change to data page 1 sacl y0 store current noise estimate in page 1 * lowpassfilter 1 ksZ BW, -40 dB at 3kHz) ( zac clear accumulator It y10 load y(n-10) in T register mpyk -59 multiply by h(10) ltd 9 load y(n-9) in T register, accumulate, Z**-1 mpyk -68 multiply by h(9) ltd 8 mpyk 113 Itd 7 mpyk 545 ltd 6 mpyk 1036 ltd 5 mpyk 1255 ' ltd 4 mpyk 1036 ltd 3 mpyk 545 Itd 2 w mpyk 113 ltd 1 mpyk -68 ltd y0 load y(n) in T register, accumulate, Z**-1 mpyk -59 multiply by h(0) apac accumulate last product ldpk 0 return to data page 0 each lpest,4store lowpass estimate of noise It lpest lowpass noise estimate in T register mpy lens multiply by noise reduction sensiti~itr pac accsmulate casult sac.~. Ipest,ls;.or= f_:=e=ed, scaled, noise estimate * output desireddata * __ dac lac d5 load x(n-5) into lower accumulator sub lpest subtract lowoass, scaled noise estimate and mask mask of: 14 high order bits sacl dout store output data *

wait b wait wait for inter:upt bioz loop continue loop if no serial input present *

* program gencom.320 * This program contains routines for communication via ar.

* RS232 line and the TMS32010 board. It contains routines to :ea * and write to the data and program memory, and begin execut'_on c * the 32010 code at a given location.

* The command formats as follows:
are * /Oxxxx start execution at address xxxx * /lxxxxddddcccc... write data to program memory starting * at address xxxx * /2xxxx (R~x returned)read data from program memorl address :.

* /3xxxxddddcccc... write data to data memory starting at * address xxxx * /4xxxx (RXXX returned)read data from data memory address xxxx * /Sxxxx write data xxxx to WDHA interface * /6 (XRXX returned) read data xX7c7t from WDHA interface * /7 (xRXX returned) read wDBA serial output line, * 0000 if low, 0001 if high * communisation routinesfor the log D8A evaluation system * At this point a character has been received through the serial .

* interrupting program execution The subroutine used to service * seeial port will be called. If program control returns to this * from 'getch' a character other than '/' has been received. Fur * program execution halt until a valid character has been will re charm disable ASC interrupts dint call ge:c:~ call character input routine b c :aria wai ~ for val id '/' character * This portion begins the command interpretation por~'_on of the r ' ' * Program control passescharacter /
to this paint whenever an * __received.

common get command character call getch lac value load received command value bz exec branch to execute routine sub one check for 1 command bz lpm branch to load program memory sub one check for 2 command bz rpm branch to read program memory sub one check for 3 command bz ldm branch to load data memory routine sub one check far 4 command ~ooo~o~

bz rdm branch to read data memory routine sub one check for 5 command bz wwdha branch to write wdha routine sub one check for 6 command bz rwdha branch to read wdha routine sub one check for 7 command bz cwdha branch to check wdha serial output ~i:

b charin branch to get valid control sequence * execute routine * , exec call gword call word input routine to get address lac word load starting address cala jump to desired starting location * load program memoryroutine lpm call gword call word input routine to get address lac word load new word sacl cadd store command address lpml call gword call word input to get data lac word load new word ' earl cdata store command data lac cadd load write address tblw cdata write data .

add one increment address earl cadd store new address b lpml branch for new word * read program memoryroutine rpm call gword call word input routine to get address lac word load address in accumulator tblr word read memory contents C31~ Sword se:ld Word t0 :IOSt b cha:iz read next command , * load data memory routine * .._ ldm call gword call word input routine to get address lac word load address in accumulator earl cadd store starting address for write to mea ldml cal gword call word input to get data l lac word load data into accumulator lara 1 seleet aux register 1 _ l,cadd load progam memory address in aux reg.
lar earl ** store new data increment, increment adc ear l,cadd store updated address in cadd larp 0 select aux register 0 b ldml branch for next data input * read d ata aemory routine rdm call gwocd ~ call word input routine to get address lar l,word load address in aux. reg. 1 larp 1 select aux reg. I

lac * read data memory location earl word store data from memory location larp 0 select aux reg. 0 call sword call send word routine b charin read next comaand *

* write to wdha routine wwdha call gwvcd word input coutiae to get data for wdha lac one,l5 sat wdha detain high for leading 1 earl cadd use cadd for working location out cadd,6 clear wdha clocks to 0 i lac one,l5 set wdha detain high for leading i add one, l4 set wdha clkin high earl eadd store wdha output signals j out eadd,6 clock in leading 1 zac clear accumulator earl cadd low clock signals out cadd,6 output low clock signals tar p1 select aux ceg 0 .i 'lar k1,15 store bit shift counter wr0 lac one,l5 mask for data bit and word mask off high order bit earl cdata store output data bit w cdata,6 output data bit to wdha, clkin low ' out lac one, l4- set clkin high or cdata add data bit sac: cdaca stars data b-t, c'_:cin high out cdaca.o cloc!c in data to wdha Iac word,l shift data word earl word store shi:~ed output word banz wr0 branc:s for next bit output -larp 0 select aux. register 0 b charm brand for next command * wdha read word routine r~rdha zac clear accsmulator wsacl word clear input data word.

out word,6 set clkout low larn 1 select aux reg 0 lark 1,15 store bit shift counter r0 lac word,l shift building input word saclword store shifted word in cdata,6 read dataout bit lac cdata,l shift data by 1 left eachcdata store new bit lac one set low order bit and cdata mask off new bit or word add bit to low order bit of word saclword store word lac one,l3 set clkout bit r saclcdata store clkout bit out cdata,6 set clkout high, generate leading edge zac clear accumulator saclcdata clear clkout bit out cdata,6 set clkout low banzr0 branch until all bits read larp0 select aux reg. 0 callsword call wood send routine b charin wait for next command * checkwdha serialoutput bit cwdha in cdata,6 read wdha serial outa ut bit lac one,l5 _ mask for wdha serial bit and cdata check serial input bit bz bitlow branch if bit low lac one load one is accumulator saclword store 0001 in output word b cw0 branch to send word out bitlowzac clear accumulator saelword store 0000 in output word cw0 callsword call word send routine b charin wait for next command * wordsend routine(output word passed in word) .

sword lac word,4 shift fist nibble into upper accumulac sac'.~.c~a=s sto:~ nibble lack15 4 low order bit mask and cdata mask nibble saclcdata store nibble to be output callsandch call send character routine lac word,8 shit second nibble into upper accumula sac'scdata store nibble lack15 4 low order bit mask and cdata mask nibble saclcdata store nibble to be output callsendch call send character routine lac word, l2 shift third nibble into upper accumulat sackcdata store nibble lack15 4 low order bit mask and cdata mask nibble saclcdata store nibble to be output callsendch call send character routine lack15 4 low order bit mask and word mask low order nibble saclcdata stare nibble to be outDUt callsendca call send character routine rat ' return from sword * sendcharacter routine(output nibble in cdata) sendchtarp1 load auxiliary pointer to 1 for delay lack9 load 9 in accumulator sub cdata check for chars 0-9 blz saf branch if value A-F

lack48 base ascii offset for 0-9 add cdata prepare ascii character saclcdata store ascii code for 0-9 b sc0 branch to serial output processing saf lack55 base ascii offset for A-F

add cdata prepare ascii character saclcdata store ascii code for A-F

b sc0 branch to serial output processing delay lark1,40 delay counter for traps buffer to empty del0 banzdel0 delay loop larp0 select aux rag. 0 sc0 bioztbechk check for pending input character b charin check for new coamand tbechkin sersn,l read serial input register lac one,l0 mask for the bit and satin check the bit bz delay if buffer full branch to delay out edata,l output character to t9ART

rat return from sendch * wordconstruct routine(results returned in word) gwor3 c31=getc:~ read b?ts 15-I2 lac value load :~cut data value ~~

blz char-a f invalid character received branc:~

lac value,l2 load hex nibble in bits 15-12 saclword store building xord callgetch read bits 11-8 lac value load input data value blz charin branch if invalid character received 1ac value,8 load hex nibble in bits 11-8 or word or wits word saclwprd store building word callgetch read bits 7-4 lac value load input data value blz charin branc!~ if invalid character received lac value,4 load hex nibble in bits 7-4 or word or wit: word 20~0~9"~

r earl word store building word call getch , read bits 3-0 lac value load input data value blz charin branch if invalid character received Iac value load hex nibble in bits 3-0 or word or with word earl word ' store building word ret return from gword * serialinput routine *

getch bioz getch wait for serial input larp 1 select aux reg 1 lark 1,10 store delay counter cwait banz cwait wait for wart registers larp 0 select aux ceg 0 in serin,l read serial input register * checkfor '/' ((ESCJ) lack >ff load 8 bit low order mask and serin load input data into accumulator earl serin store data only earl serout store input data (prepare for echo) lack d7 load '/' ((ESCJ) code in accumulator sub secin compare input bz escin branch if '/' ((ESC)) command character * checkfor 0-9 hex character lack d8 ascii code for 0 earl temp store ascii offset lac serin load serin in accumulator sub temp subt:act of_'set for ascii 0 , , blz iaer: branch (<0) to invalid character r~u;~:.

earl serin store shifted serin lack 9 aseii code offset far 9 __-earltemp store ascii offset -lac serin load input data sub temp subtract 9 bgz not09 branch if serin > 9 Iac serin load value 0-9 in accumulator earl value store input character value b goad branch to character echo routine .

* checkfor A-c hex racter cha not09 lack 17 additional offset for A-r earl temp store offset .

~o~o~o~

lac serin load input data sub temp subtract new offset invalid character routir, blz inert branch (<01 to sacl serin store shifted serin lack 5 ascii code offset sacl temp store ascii offset lac . load input data serin sub temp subtract 5 > 5 i bgz inert n brands if sec lack 10 load value for hex A

add serin add input data tore input chatactee value sacl value s branch to character echo routine .

b good * validcharacter echo good out serout.l output valid character ut in p return from character ret * invalid character echo inertlack 33 ascii code for to be echoed sacl serout store character out serout,l output character clear accumulator zac -1 in accumulator sub one store -1 in value arl value e return from character input ret *
* ~/~
character echo i out serout.i output '/' character n clear return address esc o branch to command interpretation b p , coin * select aux reg. 1 bell P ~

i3= ~12~ ~ store delay counter waitb wait :or ua:t regiscsrs waitbbanz 0 select aux reg. 0 larp * 112 branch if no pending character b bioz e branch to serial input handler _- - charin read serial input register b bellZin satin.l mask for the bit lac one,l0 check the bit and serin if buffer full branch to bell bz bell * 7 ascii bell in accumulator lack serout store bell character earl out serout,l send bell character bell send another bell end

Claims

1. A noise reduction circuit for a sound reproduction system having a microphone for producing an input signal in response to sound in which a noise component is present, said circuit comprising:
an adaptive filter including a variable filter responsive to the input signal for producing a noise-estimating signal and further including a first combining means responsive to the input signal and the noise-estimating signal for producing a composite signal;
said variable filter having parameters which are varied in response to the composite signal to change the operating characteristics thereof;
a second filter for filtering the noise-estimating signal to produce a filtered noise-estimating signal;
means for delaying the input signal to produce a delayed signal; and second combining means for combining the delayed signal and the filtered noise-estimating signal to attenuate noise components in the delayed signal and for producing a noise-reduced output signal.

2. The circuit of claim 1 wherein the variable filter comprises means for sampling a percentage of the input signal to produce the noise-estimating signal which is a function of the noise components during said time intervals.

3. The circuit of claim 1 or 2 wherein the input signal is a digital signal; wherein the delaying means comprises means for delaying the input signal by an integer number of samples N to produce the delayed signal; and wherein the second filter comprises a symmetric FIR filter having a tap length of 2N+1 samples.

4. The circuit of claim 1 or 2 further comprising means for adjusting the amplitude of the filtered noise-estimating signal to produce an amplitude adjusted signal, and wherein the second combining means is responsive to the delayed input signal and the amplitude adjusted signal.

5. The circuit of claim 4 wherein the input signal is a digital signal and wherein the circuit further comprises means for delaying the input signal by a preset number of samples to produce a preset delayed signal; and wherein the variable filter is responsive to the preset delayed signal to produce the noise-estimating signal.

6. The circuit of claim 1 or 2 wherein the first combining means comprises means for taking the difference between the input signal and the noise-estimating signal and wherein the second combining means comprises means for taking the difference between the delayed input signal and the filtered noise-estimating signal.

7. The circuit of claim 1 or 2 wherein the input signal is a digital signal and wherein the circuit further comprises means for delaying the input signal by a preset number of samples to produce a preset delayed signal, and wherein the variable filter is responsive to the preset delayed signal to produce the noise-estimating signal.

8. The circuit of claim 1 or 2 wherein the sound reproduction system is a hearing aid for use by the hearing impaired and wherein the second filter has filter parameters which are selected as a function of a user's hearing impairment.

9. The circuit of claim 1 or 2 wherein the second filter has filter parameters which are selected as a function of expected noise components.

10. A sound reproduction system comprising;
a microphone for producing an input signal in response to sound in which noise components are present;
a variable filter responsive to the input signal to produce a noise estimating signal;
a first combining means responsive to the input signal and the noise-estimating signal for producing a composite signal;
said variable filter having parameters which are varied in response to the composite signal to change the operating characteristics thereof;
a second filter for filtering the noise estimating signal to produce a filtered noise-estimating signal;
means for delaying the input signal to produce a delayed signal;
second combining means for combining the delayed signal and the filtered noise-estimating signal to attenuate noise components in the delayed signal and for producing a noise-reduced output signal; and a transducer for producing sound with a reduced level of noise components as a function of the noise-reduced output signal.

11. The system of claim 10 wherein the variable filter comprises means for sampling a percentage of the input signal to produce the noise-estimating signal which is a function of the noise component during said time intervals.

12. The system of claim 10 or 11 wherein the input signal is a digital signal; wherein the delaying means comprises means for delaying the input signal by an integer number of samples N to produce the delayed signal; and wherein the second filter comprises a symmetric FIR filter having a tap length of 2N+1 samples.

13. The system of claim 10 or 11 further comprising means for adjusting the amplitude of the filtered noise-estimating signal to produce an amplitude adjusted signal, and wherein the second combining means is responsive to the delayed input signal and the amplitude adjusted signal.

14. The system of claim 13 wherein the input signal is a digital signal and wherein the system further comprises means for delaying the input signal by one sample to produce a predetermined delayed signal; and wherein the variable filter is responsive to the predetermined delayed signal to produce the noise-estimating signal.

15. The system of claim 10 or 11 wherein the first combining means comprises means for taking the difference between the input signal and the noise-estimating signal and wherein the second combining means comprises means for taking the difference between the delayed input signal and the filtered noise-estimating signal.

16. The system of claim 10 or 11 wherein the input signal is a digital and wherein the system further comprises means for delaying the input signal by one sample to produce a predetermined delayed signal; and wherein the variable filter is responsive to the predetermined delayed signal to produce the noise-estimating signal.

17. The system of claim 10 or 11 wherein the sound reproduction system is a hearing aid for use by the hearing impaired and wherein the second filter has filter parameters which are selected as a function of a user's hearing impairment.

18. The system of claim 10 or 11 wherein the second filter has filter parameters which are selected as a function of expected noise components.

19. A method of reducing noise components present in an input signal in the audible frequency range comprising the steps of:
filtering the input signal with a variable filter to produce a noise-estimating signal;
combining the input signal and the noise-estimating signal to produce a composite signal;
varying the parameters of the variable filter in response to the composite signal;
filtering the noise-estimating signal according to predetermined parameters to produce a filtered noise-estimating signal;
delaying the input signal to produce a delayed signal;
and combining the delayed signal and the filtered noise-estimating signal to attenuate noise components in the delayed signal to produce a noise-reduced output signal.

20. The method of claim 19 wherein the filter parameter varying step comprises the step of continually sampling the input signal and varying the parameters of said variable filter during predetermined time intervals, whereby said variable filter produces the noise-estimating signal which is a function of the noise components during said time intervals.

21. The method of claim 19 or 20 wherein the input signal is a digital signal; wherein the delaying step comprises delaying the input signal by an integer number of samples N to produce the delayed signal; and wherein the noise-estimating signal filtering step comprises filtering the noise-estimating signal with a symmetric FIR filter having a tap length of 2N+1 samples.

22. The method of claim 19 or 20 further comprising the step of selectively adjusting the amplitude of the filtered noise-estimating signal to produce an amplitude-adjusted signal, and wherein the second stated combining step comprises combining the delayed signal and the amplitude-adjusted signal.

23. The method of claim 22 wherein the input signal is a digital signal and wherein the method further comprises the step of delaying the input signal by a predetermined number of samples to produce a predetermined delayed signal; and wherein the first stated filtering step comprises filtering the predetermined delayed signal to produce the noise-estimating signal.

24. The method of claim 19 or 20 wherein the first stated combining step comprises taking the difference between the input signal and the noise-estimating signal and wherein the second stated combining step comprises taking the difference between the delayed input signal and the filtered noise-estimating signal.

25. The method of claim 19 or 20 wherein the input signal is a digital signal and wherein the method further comprises the step of delaying the input signal by a predetermined number of samples to produce a predetermined delayed signal; and wherein the first stated filtering step comprises filtering the predetermined delayed signal to produce the noise-estimating signal.

26. The method of claim 19 or 20 as utilized in a sound reproduction system for use by the hearing impaired and wherein the noise-estimating signal filtering step comprises selecting the predetermined filter parameters as a function of a user's hearing impairment.

27. The method of claim 19 or 20 wherein the noise-estimating signal filtering step comprises selecting the predetermined filter parameters as a function of expected noise components.

28. The method of claim 22 wherein the step of adjusting the amplitude of the filtered noise-estimating signal comprises the step of making the adjustment as a function of the amplitude of the input signal.

29. The system of claim 10 or 11 further comprising a headband for a user's head and wherein the transducer is positioned on the headband adjacent the user's ear.

30. A hearing aid comprising:
a microphone for producing an input signal in response to sound in which noise components are present;
a variable filter responsive to the input signal to produce a noise-estimating signal;
a first combining means responsive to the input signal and the noise-estimating signal for producing a composite signal;
said variable filter having parameters which are varied in response to the composite signal to change the operating characteristics thereof;
a second filter for filtering the noise-estimating signal to produce a filtered noise-estimating signal;
means for delaying the input signal to produce a delayed signal;
second combining means for combining the delayed signal and the filtered noise-estimating signal to attenuate noise components in the delayed signal and for producing a noise-reduced output signal; and a transducer for producing sound with a reduced level of noise components as a function of the noise-reduced output signal.

31. The hearing aid of claim 30 wherein the variable filter comprises means for sampling a percentage of the input signal to produce the noise-estimating signal which is a function of the noise components during said time intervals.

32. The hearing aid of claim 30 or 31 wherein the input signal is a digital signal; wherein the delaying means comprises means for delaying the input signal by an integer number of samples N to produce the delayed signal; and wherein the second filter comprises a symmetric FIR filter having a tap length of 2N+1 samples.

33. The hearing aid of claim 30 or 31 further comprising means for adjusting the amplitude of the filtered noise-estimating signal to produce an amplitude adjusted signal, and wherein the second combining means is responsive to the delayed input signal and the amplitude adjusted signal.

34. The hearing aid of claim 33 wherein the input signal is a digital signal and wherein the hearing aid further comprises means for delaying the input signal by one sample to produce a predetermined delayed signal; and wherein the variable filter is responsive to the predetermined delayed signal to produce the noise-estimating signal.

35. The hearing aid of claim 30 or 31 wherein the first combining means comprises means for taking the difference between the input signal and the noise-estimating signal and wherein the second combining means comprises means for taking the difference between the delayed input signal and the filtered noise-estimating signal.

36. The hearing aid of claim 30 or 31 Wherein the input signal is a digital signal and wherein the hearing aid further comprises means for delaying the input signal by one sample to produce a predetermined delayed signal; and wherein the variable filter is responsive to the predetermined delayed signal to produce the noise-estimating signal.

37. The hearing aid of claim 30 or 31 for use by the hearing impaired and wherein the second filter has filter parameters which are selected as a function of a user's hearing impairment.

38. The hearing aid of claim 30 or 31 wherein the second filter has filter parameters which are selected as a function of expected noise components.

39. A noise reduction circuit for a sound reproduction system having a microphone for producing an input signal in response to sound in which a noise component is present, said circuit comprising:
an adaptive filter including a variable filter responsive to the input signal for producing a noise-estimating signal and further including a first combining means responsive to the input signal and the noise estimating signal for producing a composite signal;
said variable filter having parameters which are varied in response to the composite signal to change the operating characteristics thereof;
means for adjusting the amplitude of the noise-estimating signal to produce an amplitude adjusted signal; and second combining means for combining the input signal and the amplitude adjusted signal to attenuate noise components in the input signal and for producing a noise-reduced output signal.