CA2091087A1 - Communications system to boundary-scan logic interface - Google Patents

Communications system to boundary-scan logic interface

Info

Publication number
CA2091087A1
CA2091087A1 CA2091087A CA2091087A CA2091087A1 CA 2091087 A1 CA2091087 A1 CA 2091087A1 CA 2091087 A CA2091087 A CA 2091087A CA 2091087 A CA2091087 A CA 2091087A CA 2091087 A1 CA2091087 A1 CA 2091087A1
Authority
CA
Canada
Prior art keywords
boundary
messages
scan
scan logic
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2091087A
Other languages
French (fr)
Other versions
CA2091087C (en
Inventor
Frederick W. Ryan, Jr.
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pitney Bowes Inc
Original Assignee
Frederick W. Ryan, Jr.
Pitney Bowes Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Frederick W. Ryan, Jr., Pitney Bowes Inc. filed Critical Frederick W. Ryan, Jr.
Publication of CA2091087A1 publication Critical patent/CA2091087A1/en
Application granted granted Critical
Publication of CA2091087C publication Critical patent/CA2091087C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/50—Testing arrangements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555—Control logic
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces

Abstract

A control node for controlling a predetermined function in response to messages transmitted over a communications bus and for responding to a second class of such messages to exercise boundary-scan logic to test the control node. The boundary-scan logic is implemented in accordance with ANSI/IEEE Standard 1149.1. The second class of messages include Scan Command messages which contain data for controlling the state of the Test Access Port of the boundary-scan logic, Scan Test Data messages which transmit data to be loaded into the instruction registers or the test data registers of the boundary-scan logic, and Scan Results Request messages which control the node to return the test results over the communications bus.
CA002091087A 1992-03-06 1993-03-05 Communications system to boundary-scan logic interface Expired - Fee Related CA2091087C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/847,516 US5400345A (en) 1992-03-06 1992-03-06 Communications system to boundary-scan logic interface
US847,516 1992-03-06

Publications (2)

Publication Number Publication Date
CA2091087A1 true CA2091087A1 (en) 1993-09-07
CA2091087C CA2091087C (en) 1999-11-16

Family

ID=25300824

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002091087A Expired - Fee Related CA2091087C (en) 1992-03-06 1993-03-05 Communications system to boundary-scan logic interface

Country Status (4)

Country Link
US (1) US5400345A (en)
EP (1) EP0559209B1 (en)
CA (1) CA2091087C (en)
DE (1) DE69332051T2 (en)

Families Citing this family (38)

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EP0636976B1 (en) * 1993-07-28 1998-12-30 Koninklijke Philips Electronics N.V. Microcontroller provided with hardware for supporting debugging as based on boundary scan standard-type extensions
US5535222A (en) * 1993-12-23 1996-07-09 At&T Corp. Method and apparatus for controlling a plurality of systems via a boundary-scan port during testing
JP3333036B2 (en) * 1994-03-17 2002-10-07 富士通株式会社 Test apparatus, system including test apparatus, and test method
US7137107B1 (en) 2003-04-29 2006-11-14 Roy-G-Biv Corporation Motion control systems and methods
US20060206219A1 (en) * 1995-05-30 2006-09-14 Brown David W Motion control systems and methods
US5691897A (en) * 1995-05-30 1997-11-25 Roy-G-Biv Corporation Motion control systems
US7139843B1 (en) 1995-05-30 2006-11-21 Roy-G-Biv Corporation System and methods for generating and communicating motion data through a distributed network
US20100131081A1 (en) * 1995-05-30 2010-05-27 Brown David W Systems and methods for motion control
US5859657A (en) * 1995-12-28 1999-01-12 Eastman Kodak Company Led printhead and driver chip for use therewith having boundary scan test architecture
US5887003A (en) * 1996-09-10 1999-03-23 Hewlett-Packard Company Apparatus and method for comparing a group of binary fields with an expected pattern to generate match results
US5867644A (en) * 1996-09-10 1999-02-02 Hewlett Packard Company System and method for on-chip debug support and performance monitoring in a microprocessor
US5881224A (en) * 1996-09-10 1999-03-09 Hewlett-Packard Company Apparatus and method for tracking events in a microprocessor that can retire more than one instruction during a clock cycle
US6003107A (en) * 1996-09-10 1999-12-14 Hewlett-Packard Company Circuitry for providing external access to signals that are internal to an integrated circuit chip package
US5956476A (en) * 1996-10-31 1999-09-21 Hewlett Packard Company Circuitry and method for detecting signal patterns on a bus using dynamically changing expected patterns
US5880671A (en) * 1996-10-31 1999-03-09 Hewlett-Packard Company Flexible circuitry and method for detecting signal patterns on a bus
US5956477A (en) * 1996-11-25 1999-09-21 Hewlett-Packard Company Method for processing information in a microprocessor to facilitate debug and performance monitoring
US5881217A (en) * 1996-11-27 1999-03-09 Hewlett-Packard Company Input comparison circuitry and method for a programmable state machine
US6009539A (en) * 1996-11-27 1999-12-28 Hewlett-Packard Company Cross-triggering CPUs for enhanced test operations in a multi-CPU computer system
WO1998055926A1 (en) 1997-06-02 1998-12-10 Koken Co., Ltd. Boundary scan element and communication device made by using the same
DE69831866T2 (en) 1997-06-02 2006-07-13 Duaxes Corp. Kommunikationssysstem
US20010032278A1 (en) * 1997-10-07 2001-10-18 Brown Stephen J. Remote generation and distribution of command programs for programmable devices
US6374370B1 (en) 1998-10-30 2002-04-16 Hewlett-Packard Company Method and system for flexible control of BIST registers based upon on-chip events
US6158034A (en) * 1998-12-03 2000-12-05 Atmel Corporation Boundary scan method for terminating or modifying integrated circuit operating modes
US6885898B1 (en) * 2001-05-18 2005-04-26 Roy-G-Biv Corporation Event driven motion systems
US20100131078A1 (en) * 1999-10-27 2010-05-27 Brown David W Event driven motion systems
US8032605B2 (en) * 1999-10-27 2011-10-04 Roy-G-Biv Corporation Generation and distribution of motion commands over a distributed network
WO2002054184A2 (en) * 2001-01-04 2002-07-11 Roy-G-Biv Corporation Systems and methods for transmitting motion control data
US7904194B2 (en) 2001-02-09 2011-03-08 Roy-G-Biv Corporation Event management systems and methods for motion control systems
WO2004034641A1 (en) * 2002-10-09 2004-04-22 Xyratex Technology Limited Connection apparatus and method for network testers and analysers
US20070022194A1 (en) * 2003-09-25 2007-01-25 Brown David W Database event driven motion systems
US20060064503A1 (en) * 2003-09-25 2006-03-23 Brown David W Data routing systems and methods
US8027349B2 (en) * 2003-09-25 2011-09-27 Roy-G-Biv Corporation Database event driven motion systems
EP1690173A4 (en) * 2003-11-17 2010-04-21 Roy G Biv Corp Command processing systems and methods
US20100131077A1 (en) * 2004-02-25 2010-05-27 Brown David W Data Collection Systems and Methods for Motion Control
WO2007047986A1 (en) * 2005-10-21 2007-04-26 Wisconsin Alumni Research Foundation Method and system for delivering nucleic acid into a target cell
GB0712373D0 (en) * 2007-06-26 2007-08-01 Astrium Ltd Embedded test system and method
US8060453B2 (en) * 2008-12-31 2011-11-15 Pitney Bowes Inc. System and method for funds recovery from an integrated postal security device
US8055936B2 (en) * 2008-12-31 2011-11-08 Pitney Bowes Inc. System and method for data recovery in a disabled integrated circuit

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4365293A (en) * 1980-03-28 1982-12-21 Pitney Bowes Inc. Serial communications bus for remote terminals
US4398264A (en) * 1980-08-12 1983-08-09 Pitney Bowes Inc. Circuit to enable foreground and background processing in a word processing system with circuits for performing a plurality of independently controlled functions
JPS5868109A (en) * 1981-10-17 1983-04-22 Toshiba Mach Co Ltd Programmable sequential controller with function expansibility
US5103450A (en) * 1989-02-08 1992-04-07 Texas Instruments Incorporated Event qualified testing protocols for integrated circuits
US5056093A (en) * 1989-08-09 1991-10-08 Texas Instruments Incorporated System scan path architecture
US5115435A (en) * 1989-10-19 1992-05-19 Ncr Corporation Method and apparatus for bus executed boundary scanning

Also Published As

Publication number Publication date
DE69332051T2 (en) 2002-12-19
EP0559209B1 (en) 2002-06-26
EP0559209A2 (en) 1993-09-08
EP0559209A3 (en) 1997-09-10
CA2091087C (en) 1999-11-16
DE69332051D1 (en) 2002-08-01
US5400345A (en) 1995-03-21

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed