CA2099322C - Data demodulator of a receiving apparatus for spread spectrum communication - Google Patents
Data demodulator of a receiving apparatus for spread spectrum communicationInfo
- Publication number
- CA2099322C CA2099322C CA002099322A CA2099322A CA2099322C CA 2099322 C CA2099322 C CA 2099322C CA 002099322 A CA002099322 A CA 002099322A CA 2099322 A CA2099322 A CA 2099322A CA 2099322 C CA2099322 C CA 2099322C
- Authority
- CA
- Canada
- Prior art keywords
- axis
- phase
- signal
- phase difference
- quadrature axis
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
Abstract
A data demodulator of a receiving apparatus for spread spectrum communication for removing the phase difference remaining after detection for improving reception quality.
In-phase and quadrature axis received signals are multiplied by pseudonoise codes, PNI(t) and PNQ(t) and the results are averaged aged by averaging sections for calculating the correlation.
By performing correlation processing, pkO cos ~ , -pO sin ~, pkO sin ~, and pkO cos ~ are output when the amplitude of receive path signal is assumed to be p, the phase difference to be ~, and a proportional constant to be kO. These signals are multiplied by in-phase and quadrature axis received signals and the results are added by adders, thereby removing the effect of the phase difference ~. The signal is used for data demodulation and data recovery circuit.
In-phase and quadrature axis received signals are multiplied by pseudonoise codes, PNI(t) and PNQ(t) and the results are averaged aged by averaging sections for calculating the correlation.
By performing correlation processing, pkO cos ~ , -pO sin ~, pkO sin ~, and pkO cos ~ are output when the amplitude of receive path signal is assumed to be p, the phase difference to be ~, and a proportional constant to be kO. These signals are multiplied by in-phase and quadrature axis received signals and the results are added by adders, thereby removing the effect of the phase difference ~. The signal is used for data demodulation and data recovery circuit.
Description
2 ~ 2 ~
DATA DEMODULATOR OF A REC~lvl~G APPARATUS FOR SPREAD
SPECTRUM Col~lJNlcATIoN
BACKGROUND OF THE INVENTION
1. Field of the Invention This invention relates to a data demodulator of a receiv-- ing apparatus for spread spectrum communication and more particularly to a data demodulator which removes a phase difference remaining after detection by using pilot signals not data-modulated transmitted from a base station or cell-site for improving signal quality.
2. Description o~ the Related Art A spread spectrum communication system of direct-sequence technique, which has advantages such as good resistance to inter-ference and a property hard to give interference, is developed as one of communication systems for small capacity communica-tion using com.~unication satellite and mobile communication such as mobile phones, portable phones, or cordless phones.
Figure 11 shows the schematic configuration of a receiv-ing apparatus of a CDMA (code division multiple access) cellu-lar telephone system disclosed in US Pat. No.5,103,459. The mobile unit CDMA telephone system contains an antenna 1 for connection through a duplexer 2 to an analog receiver 3. The antenna 1 receives spread spectrum corm~ln;cation signals from k: base stations or cell-sites and feeds the received signals via the duplexer 2 into the analog receiver 3. The analog receiv-2Q993~2 er 3, which contains a down converter and analog-to-digital converter, converts (or detects) the fed signals into base band signals by the down converter and further converts the base band signals to digital signals by the analog-to-digital converter. The base band signals converted to the digital signals are fed into a searcher receiver 5 and digital data receivers (data demodulators) 6 and 7.
When spread spectrum communication signal arrive at the receiving apparatus through a plurality of paths, a difference occurs in the reception time for each signal of paths. The data demodulators 6 and 7 can select which signal of paths is to be received and tracked on respectively. If two data demodulators are installed as shown in Figure 11, two inde-pendent paths can be tracked in parallel.
On the other hand, in response to a control signal from a control processor 8, the searcher receiver 5 scans the time domain around the nominal time of received pilot signals to detect pilot signals contained in each received multipath signals from cell-sites. The searcher receiver 5 compares the strength of one received pilot signal with that of another, and outputs the strength signal to the control processor 8 to indicate the strongest signal.
The control processor 8 provides control signals to the data demodulators 6 and 7 for each to process a different one of the strongest signals.
The function of each of the data demodulators 6 and 7 is to correlate received signals with PN codes used in transmit-ting part at cell-sites. Figure 12 shows the details of data demodulator disclosed in US Pat. No.5,103,459. Each of the data demodulators 6 and 7 contains PN generators 516 and 518 which generate PN codes PNI(t) and PNQ(t) for the in-phase axis and quadrature axis respectively correspond;~g to re-ce~ved path signals. The data demodulator 6, 7 also contains a Walsh function generator 520 generating the Walsh function appropriate for the cell-site to communicate with the mobile unit. The Walsh function generator 520 generates a code sequence corresponding to a Walsh function assigned in re-sponse to a select signal from the control processor 8. The select signal is transmitted by the cell-site to the mobile unit as a part of a call setup message. Outputs of the PN
generators 516 and 518, PN codes PNI(t) and PNQ(t), are input to exclusive-OR gates 522 and 524 respectively. The Walsh function generator 520 supplies its output to the exclusive-OR
gates 522 and 524 where the signals are then exclusive-OR'ed together to generate sequences PNI'(t) and PNQ'(t).
The seqllen~ PNI'(t) and PNQ'(t) are input to a PN QPSK
correlator 526 for processing, and outputs of the PN QPSK
correlator 526, I and Q, are fed into accumulators 528 and 530 respectively. The accumulators 528 and 530 integrate (accu-mulate and add) the input signals over the 1-symbol time. As 3 ~ ~
a result, the correlation between PNI-'(t) and in-phase axis received signal and that between PNQ'(t) and quadrature axis received signal are calculated by the PN QPSK correlators 526 and the accumulators. The accumulator outputs are input to a phase rotator 532. The phase rotator 532 also receives a pilot phase signal from the control processor 8. The phase of receive symbol data is rotated according to the phase of the pilot signal. The pilot signal phase is deterrine~ by the searcher receiver and the control processor. The output of the phase rotator 532, data on in-phase axis, is supplied to a combiner and decoder circuit.
With the conventional receiving apparatus, the analog receiver which down converts (or detects) received signals into base band signals and further converts into digital signals processes the signals passed through all paths in common, as described above. However, the received signals passed through the paths have carrier phases independent of each other. If the receive signals are passed through a single path, the phase of the received signal can be con-trolled by a carrier recovery circuit, but if the received signals are passed through a plurality of paths, their phases cannot be controlled because of plurality of independent carrier phases- Therefore, inevitably the input signals to each ~igital data receiver includes the carrier phase dif-ference between a received path signal and recovered carrier ~' ~ ~3 ~ ~ ~ 2 ~
using for down converting (so called phase difference remain-ing after detection). When the phase differences exist, received signal components of in-phase axis and quadrature axis mixes with each other.
As with the communication system disclosed in US Pat.
No.5,103,459, assume that data modulation and Walsh function modulation for user identification are bi-phase shift keying (BPSK) and spread modulation is quadrature phase shift keying (QPSK). Complex envelope of transmitted signal, S(t), is S(t) = W(t)[PNI(t) + jPNQ(t)]
where W(t) is a multiplex signal of the transmit signals and pilot signals to each user. Assuming that modulation data to the ith user is di(t), the Walsh function is Wi(t), and the number of multiplexed signals is N, W(t) = ~di(t) Wi(t) where i = 1 to N.
Next, assume that the reception amplitude (envelope) of a received path signal is p and the phase difference between the carrier of the received path signal and the recovered carrier multiplied at the analog receiver for down converting (carrier phase difference ~ ~;ning after detection) is ~. The complex envelope of the received path signal component to be demodu-lated including in the output of analog receiver is Rx(t) = pS(t) * exp(j~) = pW(t) [PNI (t) ~ j PNQ (t)] [cos ~ j sin ~]
2~9932~.
= pW(t) [{PNI(t) cos ~ - PNQ (t) sin ~}
+ j {PNI (t) sin ~ + PNQ (t) cos ~}].
That is, the in-phase axis received signal is pW(t) {PNI(t) cos ~- PNQ (t) sin ~}, and the quadrature axis received signal is pW(t) {PNI(t) sin ~+ PNQ(t) cos ~}. Thus, the in-phase axis received signal and quadrature axis received signal include a different signal component with each other (a com-ponent related to PNQ(t) in the in-phase axis and a component related to PNI(t) in the quadrature axis). Therefore, compen-sation processing is required. Formerly, for example, a PN
QPSK correlator as shown in Figure 13 is provided with multi-pliers which multiply in-phase axis and quadrature axis re-ceived signals by PN codes of both in-phase and quadrature axes, and the multiplier outputs are added in a predetermined combination.
At the PN QPSK correlator in Figure 13, each of the in-phase axis and quadrature axis received signals is multiplied by the PN code PNI(t) for the in-phase axis and the PN code PNQ(t) for the quadrature axis, and the results are added together in combinations shown in Figure 13. That is, output I is I = pW(t) tPNI'(t) {PNI(t) cos ~- PNQ (t) sin + PNQ'(t) {PNI (t) sin ~ + PNQ (t) cos ~}]
Output Q is Q = pW(t) [-PNQ'(t) {PNI(t) cos ~ - PNQ (t) sin + PNI'(t) {PNI (t) sin ~ + PNQ (t) cos ~}]
The outputs I and Q are integrated by the accumulators 528 and 530 respectively over the symbol time. Of the integration results, only the component of di(t) multiplied by Wi(t) contained in PNI', PNQ' in the multiplexed signals re~;n~ due to orthogonality of the Walsh function. For example, assuming that the symbol time is T, the following relationship b~ccme~
true:
5 PNI'(t) PNI(t) W(t) dt = ¦ tPNI(t) Wi(t)] PNI(t) W(t) dt = S [PNI(t) Wi(t)] PNI(t) [~di(t) Wi(t)]dt = J PNI2(t) Wi(t) [~di(t) Wi(t)]dt = S Wi(t) [~di(t) Wi(t)]dt = Tki ~ di(t) where ki is a ratio constant related to the power allocation percentage of the multiplex signal. Therefore, the outputs of the accumulators 528 and 530 become 2pki ~ di(t) cos ~ and 2pki ~ di(t) sin ~ respectively. This assumes that the corre-lation processing timing is given by a timing recovery circuit and that the cross-correlation value between PNI(t) and PNQ(t) is sufficiently small due to one of the PN code characteristics and may be ignored by correlation processing. Now in-phase axis and quadrature axis received signals are separated effi-ciently, but the effect of cos ~ r~m~; n~ in the output of the accumulator 528 and that of sin ~ remains in the output of the accumulator 530. To remove these effects, for example, calcu-lation of ~ = tan~l (Q/I) is executed and phase rotation operation is performed in response to the resultant ~, thereby providing 2p ki ~ di(t). However, complicated steps of calcu-lation of tan~l to estimate ~ and the phase rotation operation are required.
The data demodulator requires a timing recovery circuit (not shown in the conventional example) to provide timing to correlation processing. Generally the timing recovery circuit is constructed with DLL (delay-locked loop), etc.,; the correlation pulse level correspond1ng to the correlation processing timing must be obt~e~ at the DLL. To obtain the correlation pulse level from the clrcuit configuration in Figure 13, the square sum of the outputs of the accumulators 528 and 530 is required for removing uncertainties of phase difference e and data di~t). With such operation, 8p2ki2 ~ di2(t) [cos2~ + sin2~] = 8p2ki2 ~ di2(t) is obtained, and by integrating over the data demodulation interval time, a component corresponding to the power of correlation pulse is obtained. However, in this method, noise contained separately in both the in-phase axis and quadrature axis received signals mix with each other by the square operation and the noise effect becomes greater and it degrades the timing recovery characteristic. In order to avoid square sum operation, correlation pulses of pilot sign-3 ~ 2 als which are not data-modulated may be used after the effect of phase difference is removed.
However, in the conventional configuration, complicated processing of calculation of tan~l to estimate ~ and phase rotation operation is required. To use the correlation pulses of pilot signals at the DLL, the sequences PNI'(t) and PNQ'(t) used at the PN QPSK correlator must be generated from the Walsh function corresponding to pilot signal and PN code;
another PN QPSK correlator for the DLL is required in addition to the PN QPSK correlator for data demodulation. Further, since correlation processing must be performed at the timings slightly shifted before and after from the data demodulation timing at the DLL, additional two systems for such complicated processing are required in addition to the data demodulation system; an enormous amount of operations must be performed.
Thus, the data demodulator of the conventional receiving apparatus for spread spectrum communication has a problem of complicated processing required to 1~ ~ve the effect of the phase difference rem~;ning after detection. Timing reproduc-tion also requires either the processing o~ the square sum of PN QPSK correlator output or the processing of phase correc-tion; if the square sum is processed, the noise effect de-grades the timing recovery characteristic or if phase correc-tion is processed, complicated operation is required.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a data demodulator of a receiving apparatus for spread spectrum communication which can adopt a simple configuration for removing a phase difference to perform data demodulation and timing recovery circuit for improvement of reception quality.
To the end, according to one embodiment of the invention, there is provided a data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and an quadra-ture axis by direct-sequence te~-hni que with in-phase axis and quadrature axis ps~ onoise codes and recovers data from the received signal. The data demodulator comprises a correlation calculation means which multiplies an in-phase axis or quadra-ture axis received signal by a pseudonoise code correspon~; ng to a pilot signal transmitted from a base station and averages the multiplication results for calGulating a correlation contain;ng an information of phase difference remaining after detection, and phase difference compensation means using the phase difference information provided by the correlation calculation ~~~n~ for compensating the effect of the phase difference cont~;ne~ in-in-phase axis and quadrature axis received signals.
To the end, according to another embodiment of the inven-tion, there is provided a data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and demodulates data from the received signal. The data demodulator comprises a correlation calculation means which multiplies in-phase axis and quadrature axis received signals by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages the multi-plication results for calculating a correlation cont~i~;ng an information of phase difference rer~;n;ng after detection, and phase difference compensation means using the phase difference information provided by the correlation calculation means for compensating the effect of the phase difference cont~ine~ in in-phase axis and quadrature axis received signals.
To the end, according to a further embodiment of the invention, there is provided a data demodulator cf a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and recovers data from the received signal. The data demodulator comprises a corre-lation calculation means which multiplies an in-phase axis received signal by in-phase axis and quadrature axis pseudo-noise codes corresponding to a pilot signal transmitted from a base station and averages the multiplication results for ~, 3 ~ ~
calculating a correlation containing an information of phase difference rem~i ni ng after detection, and phase difference compensation means using the phase difference information provided by the correlation calculation means for compensating the effect of the phase difference contained in in-phase axis and quadrature axis received signals.
To the end, according to another embodiment of the inven-tion, there is provided a data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence ter-hn;que with in-phase axis and quadrature axis pseudonoise codes and demodulates data from the received signal. The data demodulator comprise~ a correlation calculation means which multiplies a quadrature axis received signal by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal tr~nsmitted from a base station and averages the multiplication results for calculating a correlation containing an information of phase difference remaining after detection, and phase dif-ference compensation means using the phase difference informa-tion provided by the correlation calculation means for compen-sating the effect of the phase difference contained in in-phase axis and quadrature axis received signals.
Thus, the data demodulator of the receiving apparatus for spread spectrum communication according to the invention contains the phase compensation circuit which removes the effect of the phase difference contained in in-phase axis and quadrature axis received signals, and uses the receive signal from which the phase difference effect is removed for data demodulation. At timing recovery, the correlation pulse component of pilot signal is also provided by a simple config-uration without increasing the noise effect.
BRIEF DESCRIPTION OF THE DRAWINGS
In the accompanying drawings:
Figure 1 is a block diagram of a phase difference c~mpP.n-sation circuit according to a first embodiment of the inven-tion;
Figure 2 is a block diagram of a phase difference compen-sation circuit according to a second embodiment of the inven-tion;
Figure 3 is a block diagram of a phase difference compen-sation circuit according to a third embodiment of the inven-tion;
Figure 4 is a block diagram of a phase difference compen-sation circuit according to a fourth embodiment of the inven-tion;
Figure 5 is a block diagram of a phase difference compen-sation circuit according to a fifth embodiment of the inven-tion;
Figure 6 is a block diagram of each averaging section in 2Q9~322 the first to fifth embodiments of the invention;
Figure 7 is a block diagram of a DLL according to the first embodiment of the invention;
Figure 8 is a block diagram of a DLL according to another embodiment of the invention;
Figure 9 is a block diagram of a data demodulation sec-tion according to the first embodiment;
Figure 10 is a block diagram of a data demodulation section according to another embodiment:
Figure 11 is a block diagram of a conventional receiving apparatus;
Figure 12 is a block diagram of a data demodulator in the conventional receiving apparatus; and Figure 13 is an illustration showing data demodulation principle in the conventional receiving apparatus.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now to the accompanying drawings, there are shown preferred embodiments of a data demodulator of a receiving apparatus for spread spectrum communication according to the invention.
Figure 1 shows the configuration of a phase difference compensation circuit according to a first embodiment of the invention. The received signal converted into a digital signal by an A/D converter of analog receiver 3 is fed into the phase difference compensation circuit according to the embodiment. The phase difference compensation circuit is provided with a correlation calculation section which calcu-lates the correlation between an in-phase axis received signal and in-phase axis PN code and that between a quadrature axis received signal and quadrature axis PN code. That is, an in-phase axis received signal given from an in-phase axis A/D
converter is multiplied by in-phase axis PN code PNI(t) and averaged by an averaging section meanA 20 for calculating the correlation. The result is then multiplied by in-phase axis received signal given from the in-phase axis A/D converter.
In-phase axis received signal given from the in-phase axis A/D
converter is multiplied by quadrature axis PN code PNQ(t) and averaged by an averaging section meanA 22, then is multiplied by in-phase axis received signal given from the in-phase axis A/D converter. On the other hand, a quadrature axis received signal given from a quadrature axis A/D converter, like the in-phase axis signal described above, is multiplied by PNI(t), PNQ(t) and averaged by averaging section meanA 24, 26, then is multiplied by the original quadrature axis received signal for output. The output of the multiplier 21 and the output of the multiplier 30 are added together by an adder 32 for output.
The output of the multiplier 23 and the output of the multi-plier 28 are added together by an adder 34 for output. Then, phase difference compensation is executed.
The phase difference compensation circuit according to the em~odiment has the configuration described above. The operation of the phase difference compensation circuit is as follows. The received path signal component supplied from the analog receiver 3 is pW(t) (PNI(t) cos ~ - PNQ(t) sin ~) + jpW(t) (PNQ(t) cos ~ ~ PNI(t) sin ~) where in-phase axis received signal is the first term on the right-hand side of the equation and quadrature axis received signal is the second term on the right-hand side of the equa-tion. Therefore, when the in-phase axis received signal pW(t) (PNI(t) cos ~ - PNQ(t) sin ~) is multiplied by PNI(t) and further averaged by the averaging section meanA 20, output is (1/T) ¦ W(t) (PNI(t) ~ PNI(t) cos ~ - PNI(t) PNQ(t) sin ~) dt =pkOcos n because of orthogonality of the Walsh function, in which (l/T) S (PNI(t) PNI(t)) dt = 1, and (l/T) S (PNI(t) PNQ(t)) dt may be sufficiently small by averaging processing. Although the analog receiver output often contains another received path signal component, the PN codes multiplied them have different timing, thus it may be sufficiently small by averaging processing. kO is a proportional constant corre-sponding to the power allocation percentage to the pilot channel (WO(t): All 1).
When in-phase axis received signal is multiplied by PNQ(t) and further averaged by the averaging section meanA 22, ~Q99322 the resultant signal is (1/T) ~ p W(t) (PNQ(t) PNI(t) cos ~ - PNQ(t) PNQ(t) sin ~) dt =-pkO sin ~
where (l/T) S (PNQ(t) PNQ(t)) dt=1. Likewise, for the quadra-ture axis received signal, output from the averaging section meanA 24 is (1/T) S P W(t) (PNI(t) PNQ(t) cos ~ + PNI(t) PNI(t) sin ~) dt = pkO sin ~
Output from the averaging section meanA 26 is (1/T) S P W(t) (PNQ(t) PNQ(t) cos ~ + PNQ(t) PNI(t) sin ~) dt = pkO cos ~
In-phase and quadrature axis received signals are multiplied by the pkO cos ~, -pkO sin ~, pkO sin ~, and pkO cos ~ by the multipliers 21, 28, 30, and 23 respectively. As described above, if phase difference ~ exists, receive signal is pW(t) [PNI(t) + j PNQ(t)] exp [j ~]. Thus, this signal may be multiplied by exp [-j ~] to remove the phase difference. That is, pW(t) t(PNI(t) cos ~ - PNQ(t) sin ~) + j (PNQ(t) cos ~+
PNI(t) sin ~)] (cos ~ -j sin ~) = pW(t) [cos ~ (PNI(t) cos ~ - PNQ(t) sin ~) + sin ~ (PNQ(t) cos ~ + PNI(t) sin ~)]
2 ~ ~
+ j pW(t~ t(-sin ~ (PNI(t) cos ~ - PNQ(t) sin ~) + cos (PNQ(t) cos ~ ~ PNI(t) sin ~)]
= pW(t) PNI(t) + jpW(t) PNQ(t) Considering the right-hand side of the equation, the first term is the sum of the term of multiplying in-phase axis received signal by cos ~ and the term of multiplying quadra-ture axis received signal by sin ~, and the second term is the sum of the term of multiplying in-phase axis received signal by -sin~ and the term of multiplying quadrature axis received signal by cos ~. On the other hand, as described above, meanA
20, 22, 24, and 26 output pkO cos ~, -pkO sin 0, pkO sin 0, and pkO cos ~ respectively. Therefore, in-phase and quadra-ture axis received signals are multiplied by the outputs from ~ the averaging sections meanA 20, 22, 24, and 26, and then added appropriately so as to satisfy the above-mentioned equation, thereby removing the phase difference 0.
That is, in-phase axis received signal is multiplied by the output pkO cos ~ from meanA 20 by the multiplier 21 and quadrature axis received signal is multiplied by the output pkO sin O from meanA 24 by the multiplier 30, then the outputs of the multipliers 21 and 30 are added together by the adder 32, thereby enabling signal processing equivalent to the first term on the right of the equation.
Likewise, quadrature axis received signal is multiplied by the output pkO cos ~ from meanA 26 by the multiplier 23 and in-phase axis received signal is multiplied by the output -pkO sin ~ from meanA 22 by the multiplier 28, then the out-puts of the multipliers 23 and 28 are added together by the adder 34, thereby enabling signal processing equivalent to the second term on the right of the equation. Thus, the in-phase and quadrature axis signals with no phase difference, pkO -pW(t) PNI(t) and pkO ~ pW(t) PNQ(t), can be obt~1ned from the in-phase and quadrature axis received signals.
Each of this is the value multiplied by pko to the each of desired value, where kO is constant and p is useful for maximal ratio combining at the combiner and decoder.
Figures 2 to 6 show phase compensation circuits according to other embodiments of the invention. Each of outputs of the averaging sections 20 and 26 of the phase compensation circuit shown in Figure 1 contains pkO cos e. On the other hand, outputs of the averaging sections 22 and 24 contain -pkO sin e and pkO sin e. Therefore, the phase compensation function is provided by one system which finds the cos e comro~ent and one system which finds the sin ~ component considering the polari-ty.
Figure 2 shows a configuration in which cos ~ and sin e components are found from an in-phase axis received signal and phase compensation is executed. Figure 3 shows a configura-tion in which cos e and sin e components are found from a quadrature axis received signal and phase compensation is 2~99322 executed. Figure 4 shows a configuration in which the cos ~
component is found from an in-phase axis received signal and the sin ~ component is found from a quadrature axis received signal. Figure 5 shows a configuration in which the cos ~
component is found from a quadrature axis received signal and the sin ~ component is found from an in-phase axis received signal. To consider the polarity of the sin ~ component, one input to the adder 32 has the negative polarity in Figures 2 and 5 and one input to the adder 34 has the negative polarity in Figures 3 and 4.
Figure 6 shows a preferred example of the averaging sections 20, 22, 24, and 26 in Figures 1 to 5. An input is first fed into an accumulator 201 and integrated (accumulated and added) over the 1-symbol time, then the integration result is output every 1-symbol time. The accumulator output is fed into a recursive adding section which consists of multipliers 202 and 205, an adder 203, and a delay circuit 204 where recursive addition (accumulative addition with weighting) is performed to remove the noise effect. The delay time of the delay circuit is the 1-symbol time T and r input to the multi-plier 205 (O<r<1), which is a weight, indicates the averaging degree by recursive addition and is set properly depending on the link condition. 1-r input to the multiplier 202 is a normalization constant used to keep the same power between input and output of the recursive adding section.
2 ~
Figure 7 shows the configuration of a DLL (delay-locked loop) according to the first embodiment of the invention.
Both in-phase and quadrature axis received signals from which the phase difference is removed by the phase difference com-pensation circuit described above are fed into the DLL. The in-phase axis received signal is multiplied by codes provided with timing shift of PNI(t) before and after by ~, PNI (t - ~) and PNI (t + ~). Likewise, the quadrature axis received signal is multiplied by codes provided with timing shift of PNQ(t) before and after by ~, PNQ (t - ~) and PNQ (t ~
Then, the multiplication results are added together with the polarities shown in Figure 7 and further averaged by an aver-aging section meanB, then input to a timing controller. Where averaging section meanB is constructed by Fig. 6 or some kind of loop filter. The t; ;ng controller outputs a timing signal so that the signal from the averaging section meanB b~c- es zero. The timing signal is used for the generation t; m; ~ of PN codes in Figure 1 and for a symbol clock of a data demodu-lator (described below) via a divider, etc. In addition, this timing signal is also supplied to the control processor 8 for comparison with the timing of a strength signal given from the searcher receiver 5 for control of a plurality of data demodu-lators always executing demodulation to the optimum path (strong signal path); it is also used for the diversity com-bining timing at the combiner and deco~ circuit 9.
L ~
Figure 8 shows a ~LL accordins to another embodiment of the invention. This DLL differs from-the DLL shown in Figure 7 in that it has a multiplier between an adder and averaging section meanB. The phase difference effect is removed from the in-phase and quadrature axis components by the phase compensa-tion circuit and at the same time, the amplitude is multiplied by pkO, and further is multiplied by pkO by the averaging operation of the averaging section B. Thus, the multiplier multiplies an adder output by l/(pkO)2, thereby compensating fluctuation of the input level of the DLL due to fluctuation of the amplitude p of a reception path caused by fading.
Since the input level fluctuation of the DLL becomes fluctua-tion of loop gains, stable operation is enabled by compensa-tion of the input level fluctuation by the multiplier.
The factor of (pkO)2 is a coefficient correspo~ing to reception power of pilot signal, and can be provided by the data demodulation section described below.
Figure 9 shows the configuration of a data demodulation section according to the first embodiment of the invention.
The received base band signals from which the phase difference is removed by the phase difference compensation circuit de-scribed above are fed into the data demodulation section. The supplied in-phase and ~uadrature axis signals pkO ~ pW(t) PNI(t) and pkO ~ pW(t) PNQ(t) are sent to multipliers 40 and 42 respectively for multiplication by PNI (t) and PNQ (t) 2099~2'~
respectively, and the effect of PN codes are removed, then both becomes to be pkOpW(t). That is, since they are multi-plied at the same timing, the PN code effeot is removed. The subsequent data demodulation circuit operation is to solve Walsh functions for data demodulation. Outputs from the multipliers 40 and 42 are sent to an adder 44 for addition of the in-phase and quadrature axis signals and output of the result. This step is performed to combine the same signals appearing on both channels when the effect of PN codes are removed. To improve the DLL resolution, the signals from the analog receiver may be oversampled to the chip rate. That is, a single chip may be transmitted consecutively a given number of times, such as four. To deal with such oversampling, the data demodulation section according to the embodiment is provided with a 1/4 serial-parallel converter 46 and an adder 48 for restoring the overlapping chip samples to the original one chip symbol which is then sent to a 1/64 serial-parallel converter 50 at the following stage. Here, the method of adding a sample value for oversampling, but a method of ex-tracting only one sample every four samples is also possible.
The 1/64 serial-parallel converter 50 converts the input signal into parallel data of 64 chip symbols in response to symbol clock and sends the results to an FHT processor 52.
The FHT processor 52 fast Hadamard transforms the received 64 chip symbol data for channel separation, then outputs correla-tion signals for Walsh codes WO to W63 to a selector 54. Theselector 54 selects correlation signal 2p2kOkidi(t) related to desired Walsh code Wi in response to the select signal sup-plied from the control processor 3, and sends the correlation signal to the diversity circuit, etc., for data demodulation.
In the data demodulation section, synchronous tracking is performed by the pilot signal as described above, and the FHT
processor 52 can be operated separately from the synchronous tracking system. Thus, it needs to be operated only at the data t~m~ng, and consumption power can be reduced. While the FHT processor 52 is outputting the correlation signals, the correlation signal for WO becomes 2p2kO2 which can be used as an input to the multiplier in Figure 8.
Without using the FHT processor 52 at the data demodula-tion section according to the embodiment, data demodulation can also be executed by using a correlator which uses Walsh function generated by a Walsh function generator according to a select signal supplied from the control processor as a reference sequence as shown in Figure 10. An output from an adder 48 is fed into a multiplier 58 for multiplication by Walsh code Wi (t) assigned at the Walsh function generator.
The result is accumulated and added by an accumulator 60 to provide 2p2kOkidi(t) which is then fed into the diversity circuit. This configuration enables power to be less consumed as compared with the use of the FHT processor 52.
An output of an accumulator 56 becomes the correlation signal for WO, 2p2kO2, which can be used as an input to the multiplier in Figure 8.
The data demodulator of the receiving apparatus for spread spectrum communication can adopt a simple configuration to remove the phase difference effect for improvement of reception S/N ratio and low power comsumption.
DATA DEMODULATOR OF A REC~lvl~G APPARATUS FOR SPREAD
SPECTRUM Col~lJNlcATIoN
BACKGROUND OF THE INVENTION
1. Field of the Invention This invention relates to a data demodulator of a receiv-- ing apparatus for spread spectrum communication and more particularly to a data demodulator which removes a phase difference remaining after detection by using pilot signals not data-modulated transmitted from a base station or cell-site for improving signal quality.
2. Description o~ the Related Art A spread spectrum communication system of direct-sequence technique, which has advantages such as good resistance to inter-ference and a property hard to give interference, is developed as one of communication systems for small capacity communica-tion using com.~unication satellite and mobile communication such as mobile phones, portable phones, or cordless phones.
Figure 11 shows the schematic configuration of a receiv-ing apparatus of a CDMA (code division multiple access) cellu-lar telephone system disclosed in US Pat. No.5,103,459. The mobile unit CDMA telephone system contains an antenna 1 for connection through a duplexer 2 to an analog receiver 3. The antenna 1 receives spread spectrum corm~ln;cation signals from k: base stations or cell-sites and feeds the received signals via the duplexer 2 into the analog receiver 3. The analog receiv-2Q993~2 er 3, which contains a down converter and analog-to-digital converter, converts (or detects) the fed signals into base band signals by the down converter and further converts the base band signals to digital signals by the analog-to-digital converter. The base band signals converted to the digital signals are fed into a searcher receiver 5 and digital data receivers (data demodulators) 6 and 7.
When spread spectrum communication signal arrive at the receiving apparatus through a plurality of paths, a difference occurs in the reception time for each signal of paths. The data demodulators 6 and 7 can select which signal of paths is to be received and tracked on respectively. If two data demodulators are installed as shown in Figure 11, two inde-pendent paths can be tracked in parallel.
On the other hand, in response to a control signal from a control processor 8, the searcher receiver 5 scans the time domain around the nominal time of received pilot signals to detect pilot signals contained in each received multipath signals from cell-sites. The searcher receiver 5 compares the strength of one received pilot signal with that of another, and outputs the strength signal to the control processor 8 to indicate the strongest signal.
The control processor 8 provides control signals to the data demodulators 6 and 7 for each to process a different one of the strongest signals.
The function of each of the data demodulators 6 and 7 is to correlate received signals with PN codes used in transmit-ting part at cell-sites. Figure 12 shows the details of data demodulator disclosed in US Pat. No.5,103,459. Each of the data demodulators 6 and 7 contains PN generators 516 and 518 which generate PN codes PNI(t) and PNQ(t) for the in-phase axis and quadrature axis respectively correspond;~g to re-ce~ved path signals. The data demodulator 6, 7 also contains a Walsh function generator 520 generating the Walsh function appropriate for the cell-site to communicate with the mobile unit. The Walsh function generator 520 generates a code sequence corresponding to a Walsh function assigned in re-sponse to a select signal from the control processor 8. The select signal is transmitted by the cell-site to the mobile unit as a part of a call setup message. Outputs of the PN
generators 516 and 518, PN codes PNI(t) and PNQ(t), are input to exclusive-OR gates 522 and 524 respectively. The Walsh function generator 520 supplies its output to the exclusive-OR
gates 522 and 524 where the signals are then exclusive-OR'ed together to generate sequences PNI'(t) and PNQ'(t).
The seqllen~ PNI'(t) and PNQ'(t) are input to a PN QPSK
correlator 526 for processing, and outputs of the PN QPSK
correlator 526, I and Q, are fed into accumulators 528 and 530 respectively. The accumulators 528 and 530 integrate (accu-mulate and add) the input signals over the 1-symbol time. As 3 ~ ~
a result, the correlation between PNI-'(t) and in-phase axis received signal and that between PNQ'(t) and quadrature axis received signal are calculated by the PN QPSK correlators 526 and the accumulators. The accumulator outputs are input to a phase rotator 532. The phase rotator 532 also receives a pilot phase signal from the control processor 8. The phase of receive symbol data is rotated according to the phase of the pilot signal. The pilot signal phase is deterrine~ by the searcher receiver and the control processor. The output of the phase rotator 532, data on in-phase axis, is supplied to a combiner and decoder circuit.
With the conventional receiving apparatus, the analog receiver which down converts (or detects) received signals into base band signals and further converts into digital signals processes the signals passed through all paths in common, as described above. However, the received signals passed through the paths have carrier phases independent of each other. If the receive signals are passed through a single path, the phase of the received signal can be con-trolled by a carrier recovery circuit, but if the received signals are passed through a plurality of paths, their phases cannot be controlled because of plurality of independent carrier phases- Therefore, inevitably the input signals to each ~igital data receiver includes the carrier phase dif-ference between a received path signal and recovered carrier ~' ~ ~3 ~ ~ ~ 2 ~
using for down converting (so called phase difference remain-ing after detection). When the phase differences exist, received signal components of in-phase axis and quadrature axis mixes with each other.
As with the communication system disclosed in US Pat.
No.5,103,459, assume that data modulation and Walsh function modulation for user identification are bi-phase shift keying (BPSK) and spread modulation is quadrature phase shift keying (QPSK). Complex envelope of transmitted signal, S(t), is S(t) = W(t)[PNI(t) + jPNQ(t)]
where W(t) is a multiplex signal of the transmit signals and pilot signals to each user. Assuming that modulation data to the ith user is di(t), the Walsh function is Wi(t), and the number of multiplexed signals is N, W(t) = ~di(t) Wi(t) where i = 1 to N.
Next, assume that the reception amplitude (envelope) of a received path signal is p and the phase difference between the carrier of the received path signal and the recovered carrier multiplied at the analog receiver for down converting (carrier phase difference ~ ~;ning after detection) is ~. The complex envelope of the received path signal component to be demodu-lated including in the output of analog receiver is Rx(t) = pS(t) * exp(j~) = pW(t) [PNI (t) ~ j PNQ (t)] [cos ~ j sin ~]
2~9932~.
= pW(t) [{PNI(t) cos ~ - PNQ (t) sin ~}
+ j {PNI (t) sin ~ + PNQ (t) cos ~}].
That is, the in-phase axis received signal is pW(t) {PNI(t) cos ~- PNQ (t) sin ~}, and the quadrature axis received signal is pW(t) {PNI(t) sin ~+ PNQ(t) cos ~}. Thus, the in-phase axis received signal and quadrature axis received signal include a different signal component with each other (a com-ponent related to PNQ(t) in the in-phase axis and a component related to PNI(t) in the quadrature axis). Therefore, compen-sation processing is required. Formerly, for example, a PN
QPSK correlator as shown in Figure 13 is provided with multi-pliers which multiply in-phase axis and quadrature axis re-ceived signals by PN codes of both in-phase and quadrature axes, and the multiplier outputs are added in a predetermined combination.
At the PN QPSK correlator in Figure 13, each of the in-phase axis and quadrature axis received signals is multiplied by the PN code PNI(t) for the in-phase axis and the PN code PNQ(t) for the quadrature axis, and the results are added together in combinations shown in Figure 13. That is, output I is I = pW(t) tPNI'(t) {PNI(t) cos ~- PNQ (t) sin + PNQ'(t) {PNI (t) sin ~ + PNQ (t) cos ~}]
Output Q is Q = pW(t) [-PNQ'(t) {PNI(t) cos ~ - PNQ (t) sin + PNI'(t) {PNI (t) sin ~ + PNQ (t) cos ~}]
The outputs I and Q are integrated by the accumulators 528 and 530 respectively over the symbol time. Of the integration results, only the component of di(t) multiplied by Wi(t) contained in PNI', PNQ' in the multiplexed signals re~;n~ due to orthogonality of the Walsh function. For example, assuming that the symbol time is T, the following relationship b~ccme~
true:
5 PNI'(t) PNI(t) W(t) dt = ¦ tPNI(t) Wi(t)] PNI(t) W(t) dt = S [PNI(t) Wi(t)] PNI(t) [~di(t) Wi(t)]dt = J PNI2(t) Wi(t) [~di(t) Wi(t)]dt = S Wi(t) [~di(t) Wi(t)]dt = Tki ~ di(t) where ki is a ratio constant related to the power allocation percentage of the multiplex signal. Therefore, the outputs of the accumulators 528 and 530 become 2pki ~ di(t) cos ~ and 2pki ~ di(t) sin ~ respectively. This assumes that the corre-lation processing timing is given by a timing recovery circuit and that the cross-correlation value between PNI(t) and PNQ(t) is sufficiently small due to one of the PN code characteristics and may be ignored by correlation processing. Now in-phase axis and quadrature axis received signals are separated effi-ciently, but the effect of cos ~ r~m~; n~ in the output of the accumulator 528 and that of sin ~ remains in the output of the accumulator 530. To remove these effects, for example, calcu-lation of ~ = tan~l (Q/I) is executed and phase rotation operation is performed in response to the resultant ~, thereby providing 2p ki ~ di(t). However, complicated steps of calcu-lation of tan~l to estimate ~ and the phase rotation operation are required.
The data demodulator requires a timing recovery circuit (not shown in the conventional example) to provide timing to correlation processing. Generally the timing recovery circuit is constructed with DLL (delay-locked loop), etc.,; the correlation pulse level correspond1ng to the correlation processing timing must be obt~e~ at the DLL. To obtain the correlation pulse level from the clrcuit configuration in Figure 13, the square sum of the outputs of the accumulators 528 and 530 is required for removing uncertainties of phase difference e and data di~t). With such operation, 8p2ki2 ~ di2(t) [cos2~ + sin2~] = 8p2ki2 ~ di2(t) is obtained, and by integrating over the data demodulation interval time, a component corresponding to the power of correlation pulse is obtained. However, in this method, noise contained separately in both the in-phase axis and quadrature axis received signals mix with each other by the square operation and the noise effect becomes greater and it degrades the timing recovery characteristic. In order to avoid square sum operation, correlation pulses of pilot sign-3 ~ 2 als which are not data-modulated may be used after the effect of phase difference is removed.
However, in the conventional configuration, complicated processing of calculation of tan~l to estimate ~ and phase rotation operation is required. To use the correlation pulses of pilot signals at the DLL, the sequences PNI'(t) and PNQ'(t) used at the PN QPSK correlator must be generated from the Walsh function corresponding to pilot signal and PN code;
another PN QPSK correlator for the DLL is required in addition to the PN QPSK correlator for data demodulation. Further, since correlation processing must be performed at the timings slightly shifted before and after from the data demodulation timing at the DLL, additional two systems for such complicated processing are required in addition to the data demodulation system; an enormous amount of operations must be performed.
Thus, the data demodulator of the conventional receiving apparatus for spread spectrum communication has a problem of complicated processing required to 1~ ~ve the effect of the phase difference rem~;ning after detection. Timing reproduc-tion also requires either the processing o~ the square sum of PN QPSK correlator output or the processing of phase correc-tion; if the square sum is processed, the noise effect de-grades the timing recovery characteristic or if phase correc-tion is processed, complicated operation is required.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a data demodulator of a receiving apparatus for spread spectrum communication which can adopt a simple configuration for removing a phase difference to perform data demodulation and timing recovery circuit for improvement of reception quality.
To the end, according to one embodiment of the invention, there is provided a data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and an quadra-ture axis by direct-sequence te~-hni que with in-phase axis and quadrature axis ps~ onoise codes and recovers data from the received signal. The data demodulator comprises a correlation calculation means which multiplies an in-phase axis or quadra-ture axis received signal by a pseudonoise code correspon~; ng to a pilot signal transmitted from a base station and averages the multiplication results for calGulating a correlation contain;ng an information of phase difference remaining after detection, and phase difference compensation means using the phase difference information provided by the correlation calculation ~~~n~ for compensating the effect of the phase difference cont~;ne~ in-in-phase axis and quadrature axis received signals.
To the end, according to another embodiment of the inven-tion, there is provided a data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and demodulates data from the received signal. The data demodulator comprises a correlation calculation means which multiplies in-phase axis and quadrature axis received signals by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages the multi-plication results for calculating a correlation cont~i~;ng an information of phase difference rer~;n;ng after detection, and phase difference compensation means using the phase difference information provided by the correlation calculation means for compensating the effect of the phase difference cont~ine~ in in-phase axis and quadrature axis received signals.
To the end, according to a further embodiment of the invention, there is provided a data demodulator cf a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and recovers data from the received signal. The data demodulator comprises a corre-lation calculation means which multiplies an in-phase axis received signal by in-phase axis and quadrature axis pseudo-noise codes corresponding to a pilot signal transmitted from a base station and averages the multiplication results for ~, 3 ~ ~
calculating a correlation containing an information of phase difference rem~i ni ng after detection, and phase difference compensation means using the phase difference information provided by the correlation calculation means for compensating the effect of the phase difference contained in in-phase axis and quadrature axis received signals.
To the end, according to another embodiment of the inven-tion, there is provided a data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence ter-hn;que with in-phase axis and quadrature axis pseudonoise codes and demodulates data from the received signal. The data demodulator comprise~ a correlation calculation means which multiplies a quadrature axis received signal by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal tr~nsmitted from a base station and averages the multiplication results for calculating a correlation containing an information of phase difference remaining after detection, and phase dif-ference compensation means using the phase difference informa-tion provided by the correlation calculation means for compen-sating the effect of the phase difference contained in in-phase axis and quadrature axis received signals.
Thus, the data demodulator of the receiving apparatus for spread spectrum communication according to the invention contains the phase compensation circuit which removes the effect of the phase difference contained in in-phase axis and quadrature axis received signals, and uses the receive signal from which the phase difference effect is removed for data demodulation. At timing recovery, the correlation pulse component of pilot signal is also provided by a simple config-uration without increasing the noise effect.
BRIEF DESCRIPTION OF THE DRAWINGS
In the accompanying drawings:
Figure 1 is a block diagram of a phase difference c~mpP.n-sation circuit according to a first embodiment of the inven-tion;
Figure 2 is a block diagram of a phase difference compen-sation circuit according to a second embodiment of the inven-tion;
Figure 3 is a block diagram of a phase difference compen-sation circuit according to a third embodiment of the inven-tion;
Figure 4 is a block diagram of a phase difference compen-sation circuit according to a fourth embodiment of the inven-tion;
Figure 5 is a block diagram of a phase difference compen-sation circuit according to a fifth embodiment of the inven-tion;
Figure 6 is a block diagram of each averaging section in 2Q9~322 the first to fifth embodiments of the invention;
Figure 7 is a block diagram of a DLL according to the first embodiment of the invention;
Figure 8 is a block diagram of a DLL according to another embodiment of the invention;
Figure 9 is a block diagram of a data demodulation sec-tion according to the first embodiment;
Figure 10 is a block diagram of a data demodulation section according to another embodiment:
Figure 11 is a block diagram of a conventional receiving apparatus;
Figure 12 is a block diagram of a data demodulator in the conventional receiving apparatus; and Figure 13 is an illustration showing data demodulation principle in the conventional receiving apparatus.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now to the accompanying drawings, there are shown preferred embodiments of a data demodulator of a receiving apparatus for spread spectrum communication according to the invention.
Figure 1 shows the configuration of a phase difference compensation circuit according to a first embodiment of the invention. The received signal converted into a digital signal by an A/D converter of analog receiver 3 is fed into the phase difference compensation circuit according to the embodiment. The phase difference compensation circuit is provided with a correlation calculation section which calcu-lates the correlation between an in-phase axis received signal and in-phase axis PN code and that between a quadrature axis received signal and quadrature axis PN code. That is, an in-phase axis received signal given from an in-phase axis A/D
converter is multiplied by in-phase axis PN code PNI(t) and averaged by an averaging section meanA 20 for calculating the correlation. The result is then multiplied by in-phase axis received signal given from the in-phase axis A/D converter.
In-phase axis received signal given from the in-phase axis A/D
converter is multiplied by quadrature axis PN code PNQ(t) and averaged by an averaging section meanA 22, then is multiplied by in-phase axis received signal given from the in-phase axis A/D converter. On the other hand, a quadrature axis received signal given from a quadrature axis A/D converter, like the in-phase axis signal described above, is multiplied by PNI(t), PNQ(t) and averaged by averaging section meanA 24, 26, then is multiplied by the original quadrature axis received signal for output. The output of the multiplier 21 and the output of the multiplier 30 are added together by an adder 32 for output.
The output of the multiplier 23 and the output of the multi-plier 28 are added together by an adder 34 for output. Then, phase difference compensation is executed.
The phase difference compensation circuit according to the em~odiment has the configuration described above. The operation of the phase difference compensation circuit is as follows. The received path signal component supplied from the analog receiver 3 is pW(t) (PNI(t) cos ~ - PNQ(t) sin ~) + jpW(t) (PNQ(t) cos ~ ~ PNI(t) sin ~) where in-phase axis received signal is the first term on the right-hand side of the equation and quadrature axis received signal is the second term on the right-hand side of the equa-tion. Therefore, when the in-phase axis received signal pW(t) (PNI(t) cos ~ - PNQ(t) sin ~) is multiplied by PNI(t) and further averaged by the averaging section meanA 20, output is (1/T) ¦ W(t) (PNI(t) ~ PNI(t) cos ~ - PNI(t) PNQ(t) sin ~) dt =pkOcos n because of orthogonality of the Walsh function, in which (l/T) S (PNI(t) PNI(t)) dt = 1, and (l/T) S (PNI(t) PNQ(t)) dt may be sufficiently small by averaging processing. Although the analog receiver output often contains another received path signal component, the PN codes multiplied them have different timing, thus it may be sufficiently small by averaging processing. kO is a proportional constant corre-sponding to the power allocation percentage to the pilot channel (WO(t): All 1).
When in-phase axis received signal is multiplied by PNQ(t) and further averaged by the averaging section meanA 22, ~Q99322 the resultant signal is (1/T) ~ p W(t) (PNQ(t) PNI(t) cos ~ - PNQ(t) PNQ(t) sin ~) dt =-pkO sin ~
where (l/T) S (PNQ(t) PNQ(t)) dt=1. Likewise, for the quadra-ture axis received signal, output from the averaging section meanA 24 is (1/T) S P W(t) (PNI(t) PNQ(t) cos ~ + PNI(t) PNI(t) sin ~) dt = pkO sin ~
Output from the averaging section meanA 26 is (1/T) S P W(t) (PNQ(t) PNQ(t) cos ~ + PNQ(t) PNI(t) sin ~) dt = pkO cos ~
In-phase and quadrature axis received signals are multiplied by the pkO cos ~, -pkO sin ~, pkO sin ~, and pkO cos ~ by the multipliers 21, 28, 30, and 23 respectively. As described above, if phase difference ~ exists, receive signal is pW(t) [PNI(t) + j PNQ(t)] exp [j ~]. Thus, this signal may be multiplied by exp [-j ~] to remove the phase difference. That is, pW(t) t(PNI(t) cos ~ - PNQ(t) sin ~) + j (PNQ(t) cos ~+
PNI(t) sin ~)] (cos ~ -j sin ~) = pW(t) [cos ~ (PNI(t) cos ~ - PNQ(t) sin ~) + sin ~ (PNQ(t) cos ~ + PNI(t) sin ~)]
2 ~ ~
+ j pW(t~ t(-sin ~ (PNI(t) cos ~ - PNQ(t) sin ~) + cos (PNQ(t) cos ~ ~ PNI(t) sin ~)]
= pW(t) PNI(t) + jpW(t) PNQ(t) Considering the right-hand side of the equation, the first term is the sum of the term of multiplying in-phase axis received signal by cos ~ and the term of multiplying quadra-ture axis received signal by sin ~, and the second term is the sum of the term of multiplying in-phase axis received signal by -sin~ and the term of multiplying quadrature axis received signal by cos ~. On the other hand, as described above, meanA
20, 22, 24, and 26 output pkO cos ~, -pkO sin 0, pkO sin 0, and pkO cos ~ respectively. Therefore, in-phase and quadra-ture axis received signals are multiplied by the outputs from ~ the averaging sections meanA 20, 22, 24, and 26, and then added appropriately so as to satisfy the above-mentioned equation, thereby removing the phase difference 0.
That is, in-phase axis received signal is multiplied by the output pkO cos ~ from meanA 20 by the multiplier 21 and quadrature axis received signal is multiplied by the output pkO sin O from meanA 24 by the multiplier 30, then the outputs of the multipliers 21 and 30 are added together by the adder 32, thereby enabling signal processing equivalent to the first term on the right of the equation.
Likewise, quadrature axis received signal is multiplied by the output pkO cos ~ from meanA 26 by the multiplier 23 and in-phase axis received signal is multiplied by the output -pkO sin ~ from meanA 22 by the multiplier 28, then the out-puts of the multipliers 23 and 28 are added together by the adder 34, thereby enabling signal processing equivalent to the second term on the right of the equation. Thus, the in-phase and quadrature axis signals with no phase difference, pkO -pW(t) PNI(t) and pkO ~ pW(t) PNQ(t), can be obt~1ned from the in-phase and quadrature axis received signals.
Each of this is the value multiplied by pko to the each of desired value, where kO is constant and p is useful for maximal ratio combining at the combiner and decoder.
Figures 2 to 6 show phase compensation circuits according to other embodiments of the invention. Each of outputs of the averaging sections 20 and 26 of the phase compensation circuit shown in Figure 1 contains pkO cos e. On the other hand, outputs of the averaging sections 22 and 24 contain -pkO sin e and pkO sin e. Therefore, the phase compensation function is provided by one system which finds the cos e comro~ent and one system which finds the sin ~ component considering the polari-ty.
Figure 2 shows a configuration in which cos ~ and sin e components are found from an in-phase axis received signal and phase compensation is executed. Figure 3 shows a configura-tion in which cos e and sin e components are found from a quadrature axis received signal and phase compensation is 2~99322 executed. Figure 4 shows a configuration in which the cos ~
component is found from an in-phase axis received signal and the sin ~ component is found from a quadrature axis received signal. Figure 5 shows a configuration in which the cos ~
component is found from a quadrature axis received signal and the sin ~ component is found from an in-phase axis received signal. To consider the polarity of the sin ~ component, one input to the adder 32 has the negative polarity in Figures 2 and 5 and one input to the adder 34 has the negative polarity in Figures 3 and 4.
Figure 6 shows a preferred example of the averaging sections 20, 22, 24, and 26 in Figures 1 to 5. An input is first fed into an accumulator 201 and integrated (accumulated and added) over the 1-symbol time, then the integration result is output every 1-symbol time. The accumulator output is fed into a recursive adding section which consists of multipliers 202 and 205, an adder 203, and a delay circuit 204 where recursive addition (accumulative addition with weighting) is performed to remove the noise effect. The delay time of the delay circuit is the 1-symbol time T and r input to the multi-plier 205 (O<r<1), which is a weight, indicates the averaging degree by recursive addition and is set properly depending on the link condition. 1-r input to the multiplier 202 is a normalization constant used to keep the same power between input and output of the recursive adding section.
2 ~
Figure 7 shows the configuration of a DLL (delay-locked loop) according to the first embodiment of the invention.
Both in-phase and quadrature axis received signals from which the phase difference is removed by the phase difference com-pensation circuit described above are fed into the DLL. The in-phase axis received signal is multiplied by codes provided with timing shift of PNI(t) before and after by ~, PNI (t - ~) and PNI (t + ~). Likewise, the quadrature axis received signal is multiplied by codes provided with timing shift of PNQ(t) before and after by ~, PNQ (t - ~) and PNQ (t ~
Then, the multiplication results are added together with the polarities shown in Figure 7 and further averaged by an aver-aging section meanB, then input to a timing controller. Where averaging section meanB is constructed by Fig. 6 or some kind of loop filter. The t; ;ng controller outputs a timing signal so that the signal from the averaging section meanB b~c- es zero. The timing signal is used for the generation t; m; ~ of PN codes in Figure 1 and for a symbol clock of a data demodu-lator (described below) via a divider, etc. In addition, this timing signal is also supplied to the control processor 8 for comparison with the timing of a strength signal given from the searcher receiver 5 for control of a plurality of data demodu-lators always executing demodulation to the optimum path (strong signal path); it is also used for the diversity com-bining timing at the combiner and deco~ circuit 9.
L ~
Figure 8 shows a ~LL accordins to another embodiment of the invention. This DLL differs from-the DLL shown in Figure 7 in that it has a multiplier between an adder and averaging section meanB. The phase difference effect is removed from the in-phase and quadrature axis components by the phase compensa-tion circuit and at the same time, the amplitude is multiplied by pkO, and further is multiplied by pkO by the averaging operation of the averaging section B. Thus, the multiplier multiplies an adder output by l/(pkO)2, thereby compensating fluctuation of the input level of the DLL due to fluctuation of the amplitude p of a reception path caused by fading.
Since the input level fluctuation of the DLL becomes fluctua-tion of loop gains, stable operation is enabled by compensa-tion of the input level fluctuation by the multiplier.
The factor of (pkO)2 is a coefficient correspo~ing to reception power of pilot signal, and can be provided by the data demodulation section described below.
Figure 9 shows the configuration of a data demodulation section according to the first embodiment of the invention.
The received base band signals from which the phase difference is removed by the phase difference compensation circuit de-scribed above are fed into the data demodulation section. The supplied in-phase and ~uadrature axis signals pkO ~ pW(t) PNI(t) and pkO ~ pW(t) PNQ(t) are sent to multipliers 40 and 42 respectively for multiplication by PNI (t) and PNQ (t) 2099~2'~
respectively, and the effect of PN codes are removed, then both becomes to be pkOpW(t). That is, since they are multi-plied at the same timing, the PN code effeot is removed. The subsequent data demodulation circuit operation is to solve Walsh functions for data demodulation. Outputs from the multipliers 40 and 42 are sent to an adder 44 for addition of the in-phase and quadrature axis signals and output of the result. This step is performed to combine the same signals appearing on both channels when the effect of PN codes are removed. To improve the DLL resolution, the signals from the analog receiver may be oversampled to the chip rate. That is, a single chip may be transmitted consecutively a given number of times, such as four. To deal with such oversampling, the data demodulation section according to the embodiment is provided with a 1/4 serial-parallel converter 46 and an adder 48 for restoring the overlapping chip samples to the original one chip symbol which is then sent to a 1/64 serial-parallel converter 50 at the following stage. Here, the method of adding a sample value for oversampling, but a method of ex-tracting only one sample every four samples is also possible.
The 1/64 serial-parallel converter 50 converts the input signal into parallel data of 64 chip symbols in response to symbol clock and sends the results to an FHT processor 52.
The FHT processor 52 fast Hadamard transforms the received 64 chip symbol data for channel separation, then outputs correla-tion signals for Walsh codes WO to W63 to a selector 54. Theselector 54 selects correlation signal 2p2kOkidi(t) related to desired Walsh code Wi in response to the select signal sup-plied from the control processor 3, and sends the correlation signal to the diversity circuit, etc., for data demodulation.
In the data demodulation section, synchronous tracking is performed by the pilot signal as described above, and the FHT
processor 52 can be operated separately from the synchronous tracking system. Thus, it needs to be operated only at the data t~m~ng, and consumption power can be reduced. While the FHT processor 52 is outputting the correlation signals, the correlation signal for WO becomes 2p2kO2 which can be used as an input to the multiplier in Figure 8.
Without using the FHT processor 52 at the data demodula-tion section according to the embodiment, data demodulation can also be executed by using a correlator which uses Walsh function generated by a Walsh function generator according to a select signal supplied from the control processor as a reference sequence as shown in Figure 10. An output from an adder 48 is fed into a multiplier 58 for multiplication by Walsh code Wi (t) assigned at the Walsh function generator.
The result is accumulated and added by an accumulator 60 to provide 2p2kOkidi(t) which is then fed into the diversity circuit. This configuration enables power to be less consumed as compared with the use of the FHT processor 52.
An output of an accumulator 56 becomes the correlation signal for WO, 2p2kO2, which can be used as an input to the multiplier in Figure 8.
The data demodulator of the receiving apparatus for spread spectrum communication can adopt a simple configuration to remove the phase difference effect for improvement of reception S/N ratio and low power comsumption.
Claims (45)
1. A data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and recovers data from the received signal, said data demodulator comprising:
a correlation calculation means which multiplies an in-phase axis or quadrature axis received signal by a pseudonoise code corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection; and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals
a correlation calculation means which multiplies an in-phase axis or quadrature axis received signal by a pseudonoise code corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection; and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals
2. The data demodulator as claimed in claim 1 further including :
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
3. The data demodulator as claimed in claim 2 wherein said data demodulation means uses signal processing by fast Hadamard transform (FHT) to demodulate the signal.
4. The data demodulator as claimed in claim 1 further including :
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
5. The data demodulator as claimed in claim 4 further including :
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
6. The data demodulator as claimed in claim 4 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
7. The data demodulator as claimed in claim 5 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
8. The data demodulator as claimed in claim 4 further including:
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
9. The data demodulator as claimed in claim 5 further including:
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
10. A data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and recovers data from the received signal, said data demodulator comprising:
a correlation calculation means which multiplies in-phase axis and quadrature axis received signals by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection; and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals.
a correlation calculation means which multiplies in-phase axis and quadrature axis received signals by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection; and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals.
11. The data demodulator as claimed in claim 10 further including :
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
12. The data demodulator as claimed in claim 11 wherein said data demodulation means uses signal processing by fast Hadamard transform (FHT) to demodulate the signal.
13. The data demodulator as claimed in claim 10 further including:
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
14. The data demodulator as claimed in claim 13 further including :
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
15. The data demodulator as claimed in claim 13 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
16. The data demodulator as claimed in claim 14 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
17. The data demodulator as claimed in claim 13 further including :
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
18. The data demodulator as claimed in claim 14 further including :
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
19. A data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and recovers data from the received signal, said data demodulator comprising:
a correlation calculation means which multiplies an inphase axis received signal by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection; and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals.
a correlation calculation means which multiplies an inphase axis received signal by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection; and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals.
20. The data demodulator as claimed in claim 19 further including :
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
i
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
i
21. The data demodulator as claimed in claim 20 wherein said data demodulation means uses signal processing by fast Hadamard transform (FHT) to demodulate the signal.
22. The data demodulator as claimed in claim 19 further including :
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
23. The data demodulator as claimed in claim 22 further including :
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
24. The data demodulator as claimed in claim 22 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
25. The data demodulator as claimed in claim 23 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
26. The data demodulator as claimed in claim 22 further including :
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
27. The data demodulator as claimed in claim 23 further including:
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
28. A data demodulator of a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by direct-sequence technique with in-phase axis and quadrature axis pseudonoise codes and recovers data from the received signal, said data demodulator comprising:
a correlation calculation means which multiplies a quadrature axis received signal by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection: and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals.
a correlation calculation means which multiplies a quadrature axis received signal by in-phase axis and quadrature axis pseudonoise codes corresponding to a pilot signal transmitted from a base station and averages multiplication results for calculating a correlation containing an information of phase difference remaining after detection: and phase difference compensation means using the phase difference information provided by said correlation calculation means for compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals.
29. The data demodulator as claimed in claim 28 further including :
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
data demodulation means for multiplying the in-phase axis and quadrature axis received signals for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station and for demodulating a signal provided by adding the multiplication results together.
30. The data demodulator as claimed in claim 29 wherein said data demodulation means uses signal processing by fast Hadamard transform (FHT) to demodulate the signal.
31. The data demodulator as claimed in claim 28 further including:
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
first multiplication means for multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by in-phase axis pseudonoise codes provided by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
second multiplication means for multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said phase difference compensation means by quadrature axis pseudonoise codes provided by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
addition means for adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes by said first and second multiplication means;
means for averaging the added signals; and timing control means being responsive to the operation result of said averaging means for outputting a timing signal.
32. The data demodulator as claimed in claim 31 further including :
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
third multiplication means being disposed between said addition means and said averaging means for multiplying the resultant signal output by said addition means by a coefficient equivalent to a reciprocal of reception power of received pilot correlation signal and outputting the multiplication result to said averaging means.
33. The data demodulator as claimed in claim 31 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
34. The data demodulator as claimed in claim 32 further including :
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
pseudonoise code generation means being responsive to the timing signal fed from said timing control means for generating in-phase axis and quadrature axis pseudonoise codes.
35. The data demodulator as claimed in claim 31 further including :
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
36. The data demodulator as claimed in claim 32 further including :
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
demodulation means being responsive to the timing signal fed from said timing control means for demodulating received signal.
37. A method for data demodulation in a receiving apparatus for spread spectrum communication which receives a spread spectrum modulated signal for an in-phase axis and a quadrature axis by a direct spread system with in-phase axis and quadrature axis pseudonoise codes and recovers data from the received signal, said method comprising the steps of:
multiplying at least one of an in-phase axis or quadrature axis received signal by at least one of a pseudonoise code, an in-phase axis pseudonoise code and a quadrature axis pseudonoise code corresponding to a pilot signal transmitted from a base station;
averaging the multiplication results to calculate a correlation containing an information of phase difference remaining after detection; and compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals using said phase difference information.
multiplying at least one of an in-phase axis or quadrature axis received signal by at least one of a pseudonoise code, an in-phase axis pseudonoise code and a quadrature axis pseudonoise code corresponding to a pilot signal transmitted from a base station;
averaging the multiplication results to calculate a correlation containing an information of phase difference remaining after detection; and compensating an effect of a phase difference contained in in-phase axis and quadrature axis received signals using said phase difference information.
38. The method of data demodulation of claim 37, further comprising the steps of:
multiplying the in-phase and quadrature axis received signals for which the effect of the phase difference is compensated by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station;
adding together the results of multiplying the received signals by the pseudonoise codes to produce a added signal;
demodulating said added signal.
multiplying the in-phase and quadrature axis received signals for which the effect of the phase difference is compensated by in-phase axis and quadrature axis pseudonoise codes, respectively, corresponding to the pilot signal transmitted from the base station;
adding together the results of multiplying the received signals by the pseudonoise codes to produce a added signal;
demodulating said added signal.
39. The method of data demodulation of claim 38, wherein said demodulating step uses signal processing by fast Hadamard transform (FHT).
40. The method of data demodulation of claim 37, further including the steps of:producing a plurality of in-phase axis pseudonoise codes by shifting the timing of an in-phase axis pseudonoise code slightly before and after;
multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said plurality of in-phase pseudonoise codes;
producing a plurality of quadrature axis pseudonoise codes by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said plurality of quadrature pseudonoise codes;
adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes;
averaging the added signals; and outputting a timing signal responsive to the average of the added signals.
multiplying the in-phase axis received signal for which the effect of the phase difference is compensated by said plurality of in-phase pseudonoise codes;
producing a plurality of quadrature axis pseudonoise codes by shifting the timing of a quadrature axis pseudonoise code slightly before and after;
multiplying the quadrature axis received signal for which the effect of the phase difference is compensated by said plurality of quadrature pseudonoise codes;
adding the in-phase axis and quadrature axis received signals multiplied by the pseudonoise codes;
averaging the added signals; and outputting a timing signal responsive to the average of the added signals.
41. The method for data demodulation of claim 40, further comprising before saidaveraging step, the step of:
multiplying said added signals by a coefficient equivalent to a reciprocal of reception power of a received pilot correlation signal; and wherein said averaging step averages the product of said added signals and said coefficient.
multiplying said added signals by a coefficient equivalent to a reciprocal of reception power of a received pilot correlation signal; and wherein said averaging step averages the product of said added signals and said coefficient.
42. The method for data demodulation of claim 40, further comprising the step of:
generating in-phase axis and quadrature axis pseudonoise codes in response to said timing signal.
generating in-phase axis and quadrature axis pseudonoise codes in response to said timing signal.
43. The method for data demodulation of claim 41, further comprising the step of:
generating in-phase axis and quadrature axis pseudonoise codes in response to said timing signal.
generating in-phase axis and quadrature axis pseudonoise codes in response to said timing signal.
44. The method for data demodulation of claim 40, further comprising the step ofdemodulating the received signal in response to said timing signal.
45. The method for data demodulation of claim 41, further comprising the step ofdemodulating the received signal in response to said timing signal.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPHEI4-170946 | 1992-06-29 | ||
| JP17094692 | 1992-06-29 | ||
| JPHEI5-149369 | 1993-06-21 | ||
| JP14936993A JP2771757B2 (en) | 1992-06-29 | 1993-06-21 | Data demodulation circuit of receiver for spread spectrum communication |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2099322A1 CA2099322A1 (en) | 1993-12-30 |
| CA2099322C true CA2099322C (en) | 1998-08-11 |
Family
ID=26479278
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002099322A Expired - Fee Related CA2099322C (en) | 1992-06-29 | 1993-06-28 | Data demodulator of a receiving apparatus for spread spectrum communication |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5383220A (en) |
| EP (1) | EP0577044B9 (en) |
| JP (1) | JP2771757B2 (en) |
| CA (1) | CA2099322C (en) |
| DE (1) | DE69327988T2 (en) |
| FI (1) | FI110730B (en) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2605615B2 (en) * | 1993-12-30 | 1997-04-30 | 日本電気株式会社 | Spread spectrum receiver |
| US5559789A (en) * | 1994-01-31 | 1996-09-24 | Matsushita Electric Industrial Co., Ltd. | CDMA/TDD Radio Communication System |
| JP2938337B2 (en) * | 1994-03-09 | 1999-08-23 | 三菱電機株式会社 | Data demodulation circuit for spread spectrum communication |
| GB2290010B (en) * | 1994-05-28 | 1998-09-09 | Roke Manor Research | Ambiguity resolution in direct sequence spread spectrum modulation systems |
| CN1065093C (en) * | 1994-06-23 | 2001-04-25 | Ntt移动通信网株式会社 | CDMA demodulation circuit and demodulating method |
| JP3444444B2 (en) * | 1994-09-30 | 2003-09-08 | ソニー株式会社 | Communication terminal device |
| KR970011690B1 (en) * | 1994-11-22 | 1997-07-14 | 삼성전자 주식회사 | Data receiver & transmitter of spread spectrum using pilot channel |
| JP2605648B2 (en) * | 1994-12-22 | 1997-04-30 | 日本電気株式会社 | Despreading code phase detector for SS receiver |
| US5691974A (en) * | 1995-01-04 | 1997-11-25 | Qualcomm Incorporated | Method and apparatus for using full spectrum transmitted power in a spread spectrum communication system for tracking individual recipient phase, time and energy |
| US5793821A (en) * | 1995-06-07 | 1998-08-11 | 3Com Corporation | Timing Recovery using group delay compensation |
| JP3200547B2 (en) * | 1995-09-11 | 2001-08-20 | 株式会社日立製作所 | CDMA mobile communication system |
| US5784366A (en) * | 1996-08-27 | 1998-07-21 | Transsky Corp. | Wideband code-division-multiple access system and method |
| JP3796870B2 (en) * | 1997-01-21 | 2006-07-12 | ソニー株式会社 | Receiving device, receiving method, and terminal device of mobile phone system |
| US6094450A (en) * | 1997-06-20 | 2000-07-25 | Cincinnati Electronics Corporation | Spread spectrum chip shift keying modulation/demodulation system and method |
| US6263009B1 (en) * | 1997-06-23 | 2001-07-17 | Cellnet Data Systems, Inc. | Acquiring a spread spectrum signal |
| US6047016A (en) * | 1997-06-23 | 2000-04-04 | Cellnet Data Systems, Inc. | Processing a spread spectrum signal in a frequency adjustable system |
| US6178197B1 (en) | 1997-06-23 | 2001-01-23 | Cellnet Data Systems, Inc. | Frequency discrimination in a spread spectrum signal processing system |
| US6741638B2 (en) | 1997-06-23 | 2004-05-25 | Schlumbergersema Inc. | Bandpass processing of a spread spectrum signal |
| US6456644B1 (en) * | 1997-06-23 | 2002-09-24 | Cellnet Data Systems, Inc. | Bandpass correlation of a spread spectrum signal |
| US6628699B2 (en) * | 1997-06-23 | 2003-09-30 | Schlumberger Resource Management Systems, Inc. | Receiving a spread spectrum signal |
| EP0899893A1 (en) * | 1997-09-01 | 1999-03-03 | Kabushiki Kaisha Toshiba | Spread spectrum communications receiver |
| US6175587B1 (en) | 1997-12-30 | 2001-01-16 | Motorola, Inc. | Communication device and method for interference suppression in a DS-CDMA system |
| US6175588B1 (en) | 1997-12-30 | 2001-01-16 | Motorola, Inc. | Communication device and method for interference suppression using adaptive equalization in a spread spectrum communication system |
| US6618431B1 (en) * | 1998-12-31 | 2003-09-09 | Texas Instruments Incorporated | Processor-based method for the acquisition and despreading of spread-spectrum/CDMA signals |
| JP2001016135A (en) | 1999-06-29 | 2001-01-19 | Nec Corp | Method and system for automatically controlling frequency and cdma receiver |
| US6765974B1 (en) * | 2000-07-19 | 2004-07-20 | Radwin Ltd. | Rach starting time vicinity estimation |
| JP3695316B2 (en) * | 2000-11-24 | 2005-09-14 | 株式会社日本自動車部品総合研究所 | Spread spectrum receiver correlation detector |
| JP4429533B2 (en) * | 2001-01-29 | 2010-03-10 | 三星電子株式会社 | Frequency converter |
| DE10108413A1 (en) * | 2001-02-21 | 2002-09-19 | Philips Corp Intellectual Pty | Reception procedure for a mobile phone with multiple code reception and mobile phone |
| US7088965B1 (en) * | 2002-01-08 | 2006-08-08 | Sprint Spectrum L.P. | Fractal antenna system and method for improved wireless telecommunications |
| US7292624B2 (en) * | 2002-08-27 | 2007-11-06 | Itt Manufacturing, Inc. | Method and apparatus for robust acquisition of spread spectrum signals |
| KR20050015119A (en) * | 2003-08-04 | 2005-02-21 | 삼성전자주식회사 | Apparatus for modulation ranging signals in broadband wireless access communication system and method thereof |
| CN102521080B (en) * | 2011-12-07 | 2013-11-20 | 国家电网公司 | Computer data recovery method for electricity-consumption information collecting system for power consumers |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3601576A1 (en) * | 1986-01-21 | 1987-07-23 | Standard Elektrik Lorenz Ag | RECEIVER FOR BAND-SPREADED SIGNALS |
| US4901307A (en) * | 1986-10-17 | 1990-02-13 | Qualcomm, Inc. | Spread spectrum multiple access communication system using satellite or terrestrial repeaters |
| JPH0748674B2 (en) * | 1988-09-02 | 1995-05-24 | クラリオン株式会社 | Spread spectrum receiver |
| GB2240240A (en) * | 1990-01-19 | 1991-07-24 | Philips Electronic Associated | Radio receiver for direct sequence spread spectrum signals |
| DE4020191C2 (en) * | 1990-06-25 | 1998-09-10 | Siemens Ag | Method for compensating for phase and frequency errors of a quadrature phase-modulated carrier signal and arrangement for carrying out the method |
| US5103459B1 (en) * | 1990-06-25 | 1999-07-06 | Qualcomm Inc | System and method for generating signal waveforms in a cdma cellular telephone system |
| US5099494A (en) * | 1990-07-26 | 1992-03-24 | Unisys Corporation | Six channel digital demodulator |
| US5267260A (en) * | 1992-11-19 | 1993-11-30 | Samsung Electronics Co., Ltd. | Spread spectrum receiver using the code division multiple access mode |
-
1993
- 1993-06-21 JP JP14936993A patent/JP2771757B2/en not_active Expired - Fee Related
- 1993-06-28 DE DE1993627988 patent/DE69327988T2/en not_active Expired - Fee Related
- 1993-06-28 CA CA002099322A patent/CA2099322C/en not_active Expired - Fee Related
- 1993-06-28 EP EP19930110282 patent/EP0577044B9/en not_active Expired - Lifetime
- 1993-06-29 FI FI932995A patent/FI110730B/en active
-
1994
- 1994-04-13 US US08/227,197 patent/US5383220A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| FI932995A0 (en) | 1993-06-29 |
| EP0577044B1 (en) | 2000-03-08 |
| FI110730B (en) | 2003-03-14 |
| CA2099322A1 (en) | 1993-12-30 |
| FI932995A (en) | 1993-12-30 |
| DE69327988D1 (en) | 2000-04-13 |
| DE69327988T2 (en) | 2000-10-19 |
| JP2771757B2 (en) | 1998-07-02 |
| EP0577044A1 (en) | 1994-01-05 |
| JPH0690219A (en) | 1994-03-29 |
| US5383220A (en) | 1995-01-17 |
| EP0577044B9 (en) | 2003-08-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA2099322C (en) | Data demodulator of a receiving apparatus for spread spectrum communication | |
| CA2151737C (en) | Correlation detector and communication apparatus | |
| US6404759B1 (en) | CDMA multi-user receiving apparatus including interference canceller with optimal receiving state | |
| US6459883B2 (en) | Generic finger architecture for spread spectrum applications | |
| US6377613B1 (en) | Communication apparatus for code division multiple accessing mobile communications system | |
| US6154487A (en) | Spread-spectrum signal receiving method and spread-spectrum signal receiving apparatus | |
| US5790537A (en) | Interference suppression in DS-CDMA systems | |
| EP0886385B1 (en) | Reception apparatus for CDMA communication system | |
| EP0671820A2 (en) | Spread spectrum data demodulation with phase correction | |
| CA2195176C (en) | Signal demodulation and diversity combining in a communications system using orthogonal modulation | |
| JP2728034B2 (en) | Spread spectrum signal receiver | |
| US6707788B1 (en) | Channel spreading device and method in CDMA communication system | |
| KR100393647B1 (en) | Spectrum spread communication synchronization establishing method and apparatus using frequency offset and receiver with the same | |
| JP2003198500A (en) | System and method for spread spectrum communication | |
| JPH06244820A (en) | Signal processing circuit | |
| JP3030230B2 (en) | Receiver for spread communication system | |
| KR100313926B1 (en) | Coherent or Noncoherent Demodulator | |
| JP2952305B2 (en) | Correlation detector and communication device | |
| JP3253560B2 (en) | Signal receiving apparatus and spread spectrum communication system | |
| KR950011080B1 (en) | The asynchronic digital receving system of spread-spectrum communication method | |
| JP2724949B2 (en) | Spread spectrum communication system | |
| KR20010025817A (en) | Channel persumption apparatus of reverse direction link in the CDMA system | |
| CA2276200A1 (en) | Correlation detector and communication apparatus | |
| JP2003188768A (en) | Receiving apparatus and receiving method using cdma system | |
| JP2000252860A (en) | Interference canceller and its processing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| MKLA | Lapsed | ||
| MKLA | Lapsed |
Effective date: 20110628 |