CA2113330C

CA2113330C - Multicarrier modulation transmission system with variable delay

Info

Publication number: CA2113330C
Application number: CA002113330A
Authority: CA
Inventors: John M. Cioffi; Po Tong; James T. Aslanis; Antoinette H. Gooch
Original assignee: Amati Communications Corp
Current assignee: Texas Instruments Inc
Priority date: 1993-08-17
Filing date: 1994-01-12
Publication date: 1998-06-16
Anticipated expiration: 2014-01-12
Also published as: CA2113330A1; US5596604A

Abstract

A transmission system using multicarrier modulation applies FECC (forward error correcting code) coding and codeword interleaving differently to input signals from a plurality of different data channels to produce encoded data signals having different reliabilities and different coding delays. Bits of encoded data signals having relatively less delay are allocated to carriers that are subject to relatively more attenuation and/or channel noise, and hence that are allocated fewer bits for transmission in each symbol period, to reduce the effects of impulse noise. The data channels can comprise video, data, and control channels transmitted on an ADSL (asymmetric digital subscriber line) two-wire telephone line.

Description

~11333~

MULTICARRIER MODULATION TRANSMISSION SYSTEM
WlTH VARIABLE DELAY
This invention relates to tr~n~mi~ion systems using mllltic~rrier modulation, also known as discrete multitone (DMT) modulation where, as is desirable, the modulation is effected using a discrete Fourier Transform.
Background of the Invention The principles of multicarrier modulation are described for example in "Multicarrier Modulation For Data Tr~nsmi~sion: An Idea Whose Time Has Come" by John A. C. Bingham, EEE Commllnications Magazine, Vol. 28, No. 5, pages 5-14, May 1990. As is known, in a tr~n~mi~ion system using multicarrier modulation, FDM
(frequency division multiplex) carriers spaced within a usable frequency band of a tr~n~mic~ion channel, forming a set of subchannels, are modlll~ted at a block or symbol tr~n~mi.csion rate of the system. The bits of input data for tr~ncmi~ion within each block or symbol period are allocated to the carriers or subchannels so that the bit error rates of the subchannels as monitored at the receiver, are subst~nti~lly equal. As a result, the different subchannels carry different numbers of bits in each symbol period. With an appro~liate allocation of bits and transmit powers to the carriers or subchannels, such a system provides a desirable p~,lrollllance.
The characteristics and pelrollllance of one such system, for comm~lnicating data at a rate of 1.6 Mb/s over a twisted pair channel using 256 subchannels, is described in "A Discrete Multitone Transceiver System For HDSL Applications" by J. S. Chow et al., IEEE Journal On Selected Areas In Collllllunications, Vol. 9, No. 6, pages 895-908, August 1991. A companion paper by P. S. Chow et al. entitled "Performance Evaluation Of A Multichannel Transceiver System For ADSL and VHDSL Services", at pages 909-919 of the same publication, addresses a similar system applied to an asymmetric digital subscriber line (ADSL).
An article by S. Fleming et al. entitled "ADSL: The on-ramp to the information highway", Telephony, July 12, 1993, pages 20-26 describes one example of an ADSLarrangement applied to a two-wire telephone subscriber line, in which four asyn~llell;c 1.5 Mb/s channels are provided for tr~nsmi~sion in a downstream direction from atelephone CO (central office) to a subscriber, in addition to various data channels and POTS (plain ordinary telephone service) carried symmetrically (i.e. bidirectionally) on the line. The data channels for example comprise an ISDN (integrated services digital network) H0 channel at 384 kb/s or an ISDN basic access channel at 144 kb/s, and a control channel for example at a bit rate of 16 kb/s. The four aSymmp~tric channels provide a total bandwidth of 6 Mb/s that can be used for digital video signals.
A well known problem in the art of tr~n~mii~ion systems is that of impulse noise, which can produce bursts of errors on transmission channels. In order to address thi ~3'1333~

problem, it is known to apply forward error correction coding (FECC) and interleaving techniques in which a block of input data to be tr~n~mitte~1 is augmented with parity data that enables one or more errors in the block to be detected and corrected, the input data and parity data con~tihlting a codeword, and over time parts of dirre~ codewords are 5 interleaved for tr;~n~mi~sion to reduce the effect of error bursts on individual codewords.
For example, Currie et al. United States Patent No. 4,394,642 issued July 19, 1983 and entitled "App~d~us For Interleaving and De-Interleaving Data" describes one sucharrangement. The interleaving can instead be convolutional interleaving, for example as described in Section 8.3.1.2 of "Error-Correction Coding for Digital Communications" by George C. Clark, Jr. and J. Bibb Cain, Plenum Press, pages 347-349.
The use of FECC increases the bit rate required of the actual tr~n~mi~ion system in dependence upon the parity overhead, i.e. the size of the parity data relative to the codeword size, and increases complexity. The interleaving process increases i~ y to error bursts due to impulse noise, but adds tr~n~mi~ion delay. Longer periods over 15 which the interleaving is effected result in greater i"""...-ily to impulse noise, but greater tr~n~mi~sion delays. Thus there is a trade-off between high reliability (requiring effective error correction and immlmity to impulse noise) and short tr~n~mis~ion delay.
Different types of signals, which may be required to be tr~n~mitt~d via a singletr~n~mi~ion system, may have different ~ uil e~llellts for reliability and tr~n~mi~sion 20 delay. For example, digital video signals that are highly compressed require a high reliability for their tr~n~mi~sion, and ISDN voice signals must meet strict tr~n~mi~ion delay re~lui~ ents. In known tr~n~mi~ion systems, it has been necessary to provide a co"lpl~u"~ise between high reliability and tr~n~mi~ion delay for dirr~,~nt types of signals.
It is also known to apply trellis code modulation (TCM) techniques to a system 25 using multicarrier modulation in order to improve the performance of the system through the coding gain provided by the trellis coding. For example, Decker et al. United States Patent No. 4,980,897 issued December 25, 1990 and entitled "Multi-Channel Trellis Encoder/Decoder" discloses such a system in which the encoding and decoding processes operate on all of the subchannels sequentially in order to reduce delay. As is well known, 30 TCM results in sequences of tr~n~mitted signal constellation points that have a greatly increased separation, hence the improved perform~nce, and necessitates more complex decoding involving maximum likelihood sequence estimation, usually implemented using the Viterbi algorithm.
The p~;lrolmallce i,llprovt;lllents that are provided by TCM and by FECC as 35 described above are largely independent of one another, so that TCM and FECC can be used together in a tr~ncmission system.
In Betts et al. United States Patent No. 4,677,625 issued June 30, 1987 and entitled "Distributed Trellis Encoder" there is described an FECC arrangement in which ~nterleaving is effected by switching among a plurality of trellis coders with delay units, with collesponding switching among a plurality of trellis decoders at a receiver. The use of a plurality of encoders and decoders in such a manner undesirably adds to the costs and complexity of the arr~ng~-ment The Betts et al. patent relates to a tr~nsmission system 5 using QAM (quadrature amplitude mo~ tion) of a single ca~rier, and not to a transmission system using multicarrier moA~ tion.
An object of this invention is to provide an improved ~ sion system using multicarrier mod~ tion.
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A ~

2i 1333i' 3a -According to an object of an aspect of the present invention a data tr~ncmic.sion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving al)pdl~lus arranged for dirrele,llly encoding a~ plurality of data signals to provide a plurality of encoded data signals with different s delays through the coding and interleaving a~p&ldlus, the coding and interleaving al~pa~dlus comprises a plurality of data paths providing the encoded data signals with different delays, and a switch for switching different data signals to different data paths;
and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers ofthe tr~ncmiccion system, different numbers of bits in each tr~n.cmiccion o symbol period being allocated to different carriers.
According to another object of an aspect of the present invention a data tr~ncmi.ccion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving a~palalus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with 5 different delays through the coding and interleaving a~p~dlus, the coding and interleaving apparatus comprises a first store for storing the plurality of data signals, a second store, an FECC coder coupled between an output of the first store and an input of the second store, and a control unit for controlling the supply of data signals from the first store to the coder and for controlling storage of FECC codewords from the coder 20 into the second store to provide codeword interleaving; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~ncmi.ccion sys-tem, different numbers of bits in each tr~n.cmi.c.cion symbol period being allocated to different carriers.
According to yet another object of an aspect of the present invention a data 25 tr~n.cmi.ccion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving apparatus arranged for dirrelelllly encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving al)pal~lus, and a modulatorarranged to modulate bits of the encoded data signals onto multiple carriers of the 30 tr~n.cmiccion system, different numbers of bits in each tr~ncmi.c.cion symbol period being allocated to different carriers, the modulator comprises a~a~dlus for providing an Inverse Fast Fourier Tl~l~ro~

A~

3b 2 i 1 3 3 3 0 According to an object of an aspect of the present invention a data tr~n~mi~ion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving app~dlus arranged for di~elelllly encoding a plurality of data signals to provide a plurality of encoded data signals with different 5 delays through the coding and interleaving app~dlus, the coding and interleaving apparatus comprises a plurality of data paths providing the encoded data signals with different delays, and a switch for switching di~lelll data signals to different data paths;
and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~n~mi~ion system, different llulllbel~ of bits in each tr~n.~mi.c~ion o symbol period being allocated to different carriers.
According to another object of an aspect ofthe present invention a data tr~n~mi~ion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving a~ lus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus, the coding and interleaving apparatus comprises a first store for storing the plurality of data signals, a second store, an FECC coder coupled between an output of the first store and an input of the second store, and a control unit for controlling the supply of data signals from the first store to the coder and for controlling storage of FECC codewords from the coder 20 into the second store to provide codeword interleaving; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~n~mi~ion sys-tem, different numbers of bits in each tran~mi~ion symbol period being allocated to different carriers.
According to yet another object of an aspect of the present invention a data 25 tr~n~mi~c~ion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving a~pal~lus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving a~p~lus, and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the 30 tr~n~mi~.sion system, different numbers of bits in each tr~n~mi~ion symbol period being allocated to different carriers, the modulator comprises a~)paldlus for providing an Inverse Fast Fourier Tl~ls~llll.

'2 i 1 3330 3c According to an object of an aspect of the present invention a data tr~n~mi.c~ion system using mlllhc~rrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving a~p~dlus arranged for di~erel~lly encoding a plurality of data signals to provide a plurality of encoded data signals with different 5 delays through the coding and interleaving a~aldlus, the coding and interleaving a~p~dl~ls comprises a plurality of data paths providing the encoded data signals with different delays, and a switch for ~wil~;lfulg dirrelelll data signals to different data paths;
and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers ofthe tr~n~mi.c~ion system, different numbers of bits in each tr~n~mi~ion o symbol period being allocated to different carriers.
According to another object of an aspect of the present invention a data tr~n~mi~sion system using multicarrier modulation, comprises FECC (forward errorcorrection code) coding and codeword interleaving al~p~dlus arranged for dirrelenlly encoding a plurality of data signals to provide a plurality of encoded data signals with 5 different delays through the coding and interleaving al,paldlus, the coding and interleaving apparatus comprises a first store for storing the plurality of data signals, a second store, an FECC coder coupled between an output of the first store and an input of the second store, and a control unit for controlling the supply of data signals from the first store to the coder and for controlling storage of FECC codewords from the coder 20 into the second store to provide codeword interleaving; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~n~mi~ion sys-tem, different numbers of bits in each tr~n~mi~ion symbol period being allocated to different carriers.
According to yet another object of an aspect of the present invention a data 25 tr~n.cmi~ion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving al~p~lus, and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the 30 tr~n~ .cion system, different numbers of bits in each tr~n~mi~ion symbol period being allocated to different carriers, the modulator comprises appaldlus for providing an Inverse Fast Fourier Tld~l~rollll.

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3 d According to yet another object of an aspect of the present invention a data tr~ncmiccion system using multicarrier modulation, comprises FECC (forward errorcorrection code) coding and codeword interleaving al)p~dlus arranged for dirrelcl~lly encoding a plurality of data signals to provide a plurality of encoded data signals with s different delays through the coding and interleaving a~dlus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~ncmic.sion system, dirreltlll numbers of bits in each tr~ncmic.cion symbol period being allocated to different carriers, the modulator comprices a trellis coder.
According to yet another object of an aspect of the present invention a data o tr~ncmiccion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving appdlalus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving a~dlus, the coding and interleaving apparatus comprises a plurality of data paths providing the encoded data 5 signals with different delays, and a switch for switching different data signals to different data paths; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~ncmi.c.cion system, different numbers of bits in each tr~n-cmiccion symbol period being allocated to different carriers, and the modulator is arranged to allocate bits of encoded data signals having relatively less interleaving to 20 carriers carrying relatively fewer bits in each symbol period.
According to yet another object of an aspect of the present invention a data tr~n.cmiccion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving a~alalus arranged for dirrerenlly encoding a plurality of data signals to provide a plurality of encoded data signals with 25 different delays through the coding and interleaving al)p~dlus the coding andinterleaving a~)p~udlus comprises a first store for storing the plurality of data signals, a second store, an FECC coder coupled between an output of the first store and an input of the second store, and a control unit for controlling the supply of data signals from the first store to the coder and for controlling storage of FECC codewords from the coder 30 into the second store to provide codeword interleaving; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~ncmicsion sys-tem, different numbers of bits in each tr~ncmic.cion symbol period being allocated to Al 3e 2 ~ 1 S330 different carriers, and the modulator is arranged to allocate bits of encoded data signals having relatively less interleaving to carriers carrying relatively fewer bits in each symbol period.
According to yet another object of an aspect of the present invention a data tr~n~mi.~sion system using multicarriermodulation,comprisesFECC(forwarderror correction code) coding and codeword interleaving app~dlus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving app~dlus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the o tr~n~mi~ion system, different numbers of bits in each tr~n~mi.c.cion symbol period being allocated to different carriers, and the modulator being arranged to allocate bits of encoded data signals having relatively less interleaving to carriers carrying relatively fewer bits in each symbol period, the modulator comprises app~dlus for providing an Inverse Fast Fourier Transform.
According to yet another object of an aspect of the present invention a data tr~n.cmi.c~ion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving app~dlus arranged for dirr~l~lllly encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving a~aldlus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~n.cmi~ion system, different numbers of bits in each tr~n~mi~ion symbol period being allocated to different carriers, and the modulator being arranged to allocate bits of encoded data signals having relatively less interleaving to carriers carrying relatively fewer bits in each symbol period, the modulator comprises a trellis coder.
2s According to another object of an aspect of the present invention a data tr~n~mi~ion system using multicarrier modulation, comprises FECC (forward error correction code) coding and codeword interleaving apparatus arranged for dirr~,relllly encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving appalalus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the tr~n.cmi~ion system, different numbers of bits in each tr~n~mi.csion symbol period being allocated to different carriers, wherein the modulator comprises a table for 4 21 Ij)30 storing a value corresponding to the number of bits allocated to the carriers; and a sorter for sorting the carriers in accordance with the stored values.
According to yet another object of an aspect of the present invention a method of mod~ ting multiple carriers with signals of a plurality of data ch~nnel~, comprises the s steps of applying FECC (forward error collc~ g code) coding and codeword interleaving di~lallly to signals of different data ch~nnel~ to produce encoded data signals having different delays; and modlll~ting different numbers of bits of the encoded data signals onto di~l~lll carriers, wherein the step of applying FECC coding and codeword interleaving comprises the steps of storing signals of the different data lo channels; sequentially FECC coding the stored signals to produce FECC codewords;
and storing the FECC codewords in an interleaved manner, the interleaving being different for the codewords of the different data channels.
According to yet another object of an aspect of the present invention a method for ll~lsllli~ g data signals to at least one receiver using multiple carriers, comprises 5 receiving data signals to be transmitted from a plurality of input data charmels; applying error correcting coding and interleaving such that the degree of interleaving differs depending on the input data ch~nnel, thereby producing encoded data signals having different delays; modlll~tin~ different numbers of bits of the encoded data signals onto different carriers based on the susceptibility of the different channels to noise, thereby 20 producing modulated data signals, the smaller the delay of the encoded data signals the fewer the number of bits said modlll~ting uses when producing the modulated datasignals for the different carriers; and ll~l~ll~illillg the modulated data signals to the at least one receiver using the different carriers.
According to another object of an aspect of the present invention a method for 2s transmitting data signals to at least one receiver using multiple carriers, comprises receiving data signals to be transmitted from a plurality of input data channels;
applying error correcting coding and interleaving such that the degree of interleaving differs depending on the input data channel, thereby producing encoded data signals having different delays; modlll~ting different numbers of bits of the encoded data signals 30 onto different carriers based on the susceptibility of the different channels to noise, thereby producing modulated data signals; ll~lsmillillg the modulated data signals to the at least one receiver using the different carriers; storing, for each of the carriers, a value 2 i;3) corresponding to the number of bits allocated to the carrier; and sorting the carriers in accordance with the stored values.
Brief Dçscription of the Drawin~pc - The invention will be further underctood from the following description with 5 lGfe.e,1ce to the accompanying dra~ings, in which:
Fig. 1 illustrates a block diagram of an ADSL tr~ncmiccion system using multicarrier modulation in accordance with an e.llbo l;n~ .l of this invention;
Fig. 2 illustrates a functional block diagram of a dowlls~ &n llr~nc.~ , provided at a telephone CO, and a downstream receiver, provided at a subscriber's premises, of the system of Fig. l;
Fig. 3 illustrares a block diagram of an embodi,l,~,nt of parts of the do~lls tr~n.crninPr, and Fig. 4 is a diagram illustrating the operation of parts of the downstream t~nsmitter.
Detailed Description Referring to Fig. 1, an ADSL transmission system comprises a telephone central office (CO) transceiver 10 and remote taminal (RT) transceiver 12, linked via a channel 14 providing a downstream tr~n.cmicsion path 16, from a downstream tr~n.cmitter (Tx) 18 in the CO to a downstream receiver (Rx) 20 in the RT, and an up~ l tr~ncmiccion path 22 from an upstream transmitter 24 in the RT to an Up~lu~ l receiva 26 in the CO.
Signals transmitted in the do~--sllc~ll direction are in-lic~t,oA by way of exarnple as comprising digital video, lSDN, control, and POTS signals, and signals transmitted in 20 the u~sllea~.. direction are in~icated by way of example as comprising ISDN, control, and POTS signals; other types of data may be Ll~sllliLb~d in a similar manner. The system is asymmetric in that the video signals, which require a large bandwidth of for example 6 Mb/s as already discussed, are tr~nc."i~ 1 only in the downstream direction. The other signals, transmitted in both directions, require a much smaller bandwidth. In addition to these signals, an operations control channel (OPC) provides for transmission in bo~
~5 /

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directions on the channel 14 between the transceivers 10 and 12 of control signals required for operation of the transceivers as described below.
The channel 14 is for example a two-wire telephone subscriber line on which the POTS signals are tr~n~mitted in a low frequency band below about 10 kHz and on which the other signals are tr~n~mit~ed by mlllti~rrier modulation at higher frequencies. The d~ wn~ l and ups~ alll signals can be separated by frequency division multiplexing or using echo cancellation techniques.
Referring to Fig. 2, the downstream tr~n~mitter 18 functionally compri~es a switch 30, one or more FECC (forward error correcting code) coders 32 two of which are illustrated, data buffers 34, a trellis coder 36 having an associated bit and energy allocation table 38 and a carrier index table 40, a sorter 42, an Inverse Fast Fourier Transform (IFFT) a~pd~a~us 44 including a buffer at its input and a prefix adder at its output, and a digital-to-analog converter, analog filter, and line interface block 46.
Conversely, the downstream receiver 20 comprises a line interf~ce analog filter, and analog-to-digital converter block 48 that is a~s~ 1 also to include a digital filter, an ~ l a~al~lus 50 including a prefix remover at its input and frequency domain equalizers (FEQ) and a buffer at its output, a sorter 52, a trellis decoder 54, operating in accordance with the Viterbi algorithm to perform maximum likelihood sequence estimation in known manner, having an associated bit allocation table 56 and carrier index table 58, data buffers 60, one or more FECC decoders 62 complelllel-~y to the coders 32, and a switch 64.
The components 44 to 50 form a multicarrier modulation or DMT tr~n~mi~ion system of generally known form, to which system the components 36, 38, 54, and 56 add trellis coding and decoding in generally known manner. In this system data signals, constituted by the video, ISDN, control, and OPC signals l~p~sellted in Fig. 1, are frequency division multiplexed at frequencies above about 10 kHz, i.e. above thefrequencies of POTS telephone signals that are supplied to and derived from the blocks 46 and 48 and are separated by the analog filters within these blocks.
By way of example, the DMT system may have 256 carriers with a frequency spacing of 4 kHz, the discrete Fourier transform accordingly having a length of N=512, with a symbol period of 250 ~s and about 1700 bits per symbol to provide a total tr~n~mi~ion rate of about 6.8 Mb/s, with each carrier or subchannel carrying a number of bits in each symbol period that depends on the ch~;lelistics (e.g. signal to noise ratio, or SNR) of the subchannel. The number of bits carried by each subchannel in each symbol period can be zero (i.e. the subchannel is not being used) or can vary from a minimllm number, for example 1 or 2 bits, to a maximum number, for example in a range from 10 to 16 bits. Because the subchannels carry variable numbers of bits, the total tr~n~mi~sion 2 ~ 3 ~

rate of the system is not fixed but can be increased or decreased to meet particular ~ui~nlents.
Signals from a plurality of input data channels, for example information and control channels as discussed above, are supplied to inputs of the switch 30, which 5 switches these signals to one of a plurality of outputs each coupled to a respective one of the plurality of FECC coders 32. Although two FECC coders 32 are shown in Fig. 2, a dirr~ " number of such coders may ~ ;vely be provided. Each FECC coder 32 provides a respective degree of FECC coding and hlle.lcaving, and hence reliability of the data signals that it encodes, and a corresponding tr~nsmicsion delay. The switch 30 10 switches the data signals to the respective outputs and hence FECC coders in accordance with latency (i.e. tr~nsmission delay) and reliability re lui~ enls for the respective signals. As already indicated, such re lu..~lllel,l~ can vary for different types of signals, and for signals on a single channel at different times.
The particular char~ct~ri~tirs of the individual FECC coders 32 are not important 15 to the invention, but the dirrelent coders have different degrees of interleaving so that the transmitted data signals have different susceptibilities to impulse noise as discussed further below. For example, one of the FECC coders 32 may provide coding with relatively short term or no interleaving, or even may be omitted entirely, thus prop~ting data signals with little or no delay but with a relatively high susceptibility to impulse 20 noise, and the other of the coders 32 may provide coding with interleaving over relatively long periods, thereby prop~g~ting data signals with a high ;"-n~ ity to impulse noise but with a relatively long delay.
The data signal codewords output from the FECC coders 32 are burr~,.~l in the buffers 34, which are represented in Fig. 2 as being divided into relatively fast, i.e. short 25 delay, buffers and relatively slow, or long delay, buffers, corresponding to the respective interleaving periods associated with the respective FECCs 32. In practice, as described below, the storage in the buffers 34 is used in implementing the FECC interleaving. The units 36 to 42 serve to read bits of the codewords from the buffers 34, implement trellis coding, and supply the resulting amplitudes to the IFFT appal~Lus 44 in each tr~ncmi.c~i~ n 30 symbol period for tr:~n~mis~ion via the multicarrier subchannels. The operation of the units 36 to 42 is described further below.
Conversely, in the receiver 20 amplitudes produced by the ~ l app~us 50 are converted by the units 52 and 54 to codeword bits that are supplied to the buffers 60, the codewords being de-interleaved and decoded by the FECC decoders 62, each of which 35 ope~tes in a complementary manner to a respective one of the FECC coders 32. From the FECC decoders 62 the decoded data signals are supplied to respective output data channels via the switch 64.

~1 13~ 3 ., Although details of the units 44 to 50 are not significant to the present invention, it is noted here that the prefix added at the output of the IFFT apparatus 44 consists of a repetition of information from the end of a data block in order to provide a guard space to elimin~tr in~elrel~llce from one tr~n~mitted symbol to the next. The digital filter in the S block 48 is a time domain equalizer in the form of a finite impulse response filter that limits such interference to less than the length of the prefix, the prefix then being removed or subtracted at the input of the ~1 apparatus 50 thereby çlimin~ting the inl~lrerellce.
The frequency domain equalization (FEQ) at the output of the ~1 a~pal~tus 50 operates individually on each subchannel and adaptively adjusts for the attenuation and delay of 10 each carrier.
In addition it is observed that, while ple~lled, the use of trellis coded modulation is not essential to the invention. Accordingly the trellis coder 36, which converts data bits from the buffers 34 into scaled amplitudes for the IFFT app~lus 36 as well as implementing the trellis coding, may be replaced by simpler app~lus for convt;llil g data 15 bits into scaled amplitudes without any trellis coding, with a compl~",t ~ repl~rement of the trellis decoder 54.
As is well known and discussed above, in each symbol period of a system using multicarrier modulation dirr~,lellt subchannels carry dirrelclll nulllb~l~ of bits, in accordance with the SNR of the respective subch~nnel~ Typically, it may be desired for 20 all of the subchannels to have substantially the same SNR as monitored at the receiver, and this is assumed by way of example in the rem~inder of this description, but other distributions of SNR among subchannels may be desirable and can ~1 le. . ,~l ively be provided. The SNR of each subchannel is dependent upon the atlel~u~lion and the noise level of the subchannel. Accordingly, subchannels with a relatively high attenuation or 25 noise level are allocated relatively fewer bits, and hence a greater signal point spacing at the tr~n~mitter, than subchannels with a relatively low ~ttenu~tion or noise level. Due to the dirrerelll subchannel attenuations, the signal point spacing at the receiver (and the bit error rate) is approximately the same for all of the subchannels. Thus the characteristics of the subchannels are substantially compensated for by an applopliate distribution of the 30 number of bits carried by each subchannel.
The invention recognizes that impulse noise can be coupled onto the tran~mis~ionpath at any point along its length, and from its coupling point to the receiver 20 is subjected to the same frequency-dependent attenuation as the data signals. (Impulse noise may also be introduced in the ll~lsll~il~l 10 as a result of clipping in digital logic or at the 35 digital-to-analog converter, this possibly being introduced deliberately in order to reduce implementation costs.) Consequently, impulse noise that appears on the relatively more attenuating subchannels, which carry relatively fewer bits in each symbol period, is relatively more attenuated at the receiver. It follows that subchannels carrying relatively 3 ~ ~ ~

fewer bits in each symbol period are less susceptible to impulse noise (because of the greater attenuation) than subchannels carrying relatively more bits in each symbol period.
In order to provide the best possible overall performance, corresponding to all of the data signals having subs~nti:~lly the same i~ iLy to impulse noise, the invention S matches those data signals that are the most susceptible to impulse noise, by virtue of interleaving of the FECC codewords over relatively shorter periods, with the subchannels that have the most attenuation (and hence carry the fewest number of bits in each symbol period) and hence on which the impulse noise is most attenuated so that it has the least effect at the receiver.
To this end, in the tr~n.cmittçr 18, the index table 40 is arranged to store the index, or number, i of each subchannel sorted in order of increasing number of bits bi (from the minimllm llulllbel to the md~ lll number as discussed above) per symbol period allocated to the subch:~nnel.c. In each symbol period, the sorted indices i are read in turn from the index table 40 and used to address the table 38, and are supplied to the sorter 42.
The allocated number of bits to be used for the respective subchannel, and an energy scale factor for the subchannel, are accordingly read from the table 38 and supplied to the trellis coder 36, which reads the allocated number of bits from the buffers 34 starting with the fastest (least interleaving and delay) buffer and progressing gradually through all of the bits to be read and tr~nsmittecl in the symbol period, ending with the slowest (most interleaving and delay) buffer. For each subchannel index i the trellis coder 36 produces amplitudes, representing a signal point in a constellation of 2bi signal points and scaled in accordance with the energy scale factor for the subch~nnel, which are written by the sorter 42 into a position i in the buffer at the input of the l~ l appalalus 44.
In the receiver 20, the index table 58 is the same as the index table 40, and the bit allocation table 56 stores the same allocations of number of bits for each subchannel as the table 38. As in the tr~ncmitt~.r, in each symbol period the sorted indices i are read in turn from the index table 58, are supplied to the sorter 52, and are used to address the table 56.
The allocated number of bits used for the r~ecli~e subchannel i are read from the table 56 and supplied to the trellis decoder 54, which reads the amplitudes from the position i in the output buffer of the ~ l al)p~us 50 as identified by the sorter 52 and supplies the relevant number of bits to the buffers 60, starting in each symbol period with the fastest (least interleaving and delay) buffer and progressing gradually to the slowest (most interleaving and delay) buffer. The operation of the FECC decoders 62 and the switch 64 is the inverse of the coders 32 and switch 30.
The various units in the transceivers 10 and 12 can be implemented in various ways, using arrangements of hardwale and/or software. Fig. 3 illustrates by way of example a block diagram of one embodiment of the units 30 to 42, and the buffer at the input of the I~ l apparatus 44, of the downstream tr~nc~ 18.

3 e~

Referring to Fig. 3, a microprocessor control unit 68, which may comprise one ormore microprocessors such as digital signal processors for carrying out respective functions, is coupled via various control paths to a RAM (random access memory) 70 that operates as the switch 30 in Fig. 2, a prog-an~ able FECC coder 72 that c-~n~titlltes the plurality of FECC coders 32 in Fig. 2, a RAM 74 that corresponds to the buffers 34, a trellis coder 76 corresponding to the trellis coder 36, and a RAM 78 that co~ es the buffer at the input of the IFFT appal~tus 44 in Fig. 2. The RAM 70, shown with multiple inputs for simplicity, is supplied at its input with the input data channels and OPC data from the control unit 68 via a path 80, and the control unit 68 is supplied with information 10 from the control channel (e.g. for selecting between high reliability and short delay for the tr~n~mitte-l data channels) via a path 82 and with OPC data from the receiver 26 (Fig. 1) via a path 84.
The RAM 70 is controlled by the control unit 68 to operate as a plurality of ~Os(first-in, first-out buffers) or elastic stores in which data from the various input data 15 channels is stored and from which the data is read to the coder 72. The control unit 68 monitors the difference between input and output pointers for each FIFO and uses known stuffing techniques to synchronize the input data channel signals to a common multicarrier tr~n~mi~sion clock.
The pro~lllllable FECC coder 72 is a conventional Reed-Solomon FECC coder 20 using the polynomial generator (Z + ai) where R is the number of red-ln-l~nt FECC

check bytes, a is a root of the primitive polynomial x8+x4+x3+x2+1, and Z is thepolynomial variable. The coder 72 is programmed by the control unit 68 to perform sequentially the functions of the plurality of FECC coders 32 in Fig. 2, and R can be dirr~lcnt for dirr~lcnt FIFOs of the RAM 70.
The resulting FECC codewords are stored in the RAM 74 under the control of the control unit 68, which also implements convolutional interleaving of at least some of the codewords in storing them in the part of the RAM identified as "slow". The codewords stored in the part of the RAM 74 identified as "fast" are relatively undelayed, either not being interleaved or being interleaved over short periods. Thus the design~tion of the fast 30 and slow parts of the RAM 74 refer to the time required for the FECC coded data to become available at the output of the RAM 74 after the FECC codeword interleaving that is implemented on that data. In the interleaving process, the k-th byte in each FECC
codeword is delayed by 1 + (d - l)k bytes, where d is an integer referred to as the depth of interleaving. Obviously, the greater the depth d of interleaving, the longer is the 35 tr~n~mi~ion delay before the input data can be read from the RAM 74, and the control unit 68 can ~letermin.o an individual value of d as desired for the dirr~llt input data channels.

2~ 1333;3 The control unit 68 also implements the index table 40 and the bit and energy allocation table 38 represented in Fig. 2, and m~int~ins this information current through co" " "" ~-ications via the OPC (which colllnlul~ications also pass through the FECC coder 72). The control unit 68 reads data bits from the RAM 74 to the trellis coder 76, and 5 stores the resulting amplitudes in the appr~pliate locations in the ~ 1 RAM 78, in accordance with the data in these tables and in the manner already described.
A complem~nt~ry arrangement can be provided in the receiver 20, it being noted that in this case the de-interleaving is carried out in a manner that leaves the codeword boundaries for the interleaved codewords intact to facilitate decoding of the different 10 codewords using a common decoder.
Fig. 4 dia~."--"~al;cally further illustrates the operation of the arrangement described above for transferring data bits from the RAM 74 to the trellis coder 76 and for transferring the consequent amplitudes from the trellis coder 76 into the RAM 78, in accordance with information stored in the tables 38 and 40.
As inclicated in Fig. 4, the table 40 has 256 locations, hexadecimal 00 to FF, which store the subchannel indices i in order of increasing numbers of bits allocated to the subchannels. Likewise, the table 38 has 256 locations 00 to FF each of which stores for the r~eclive subchannel the number of bits allocated to the subchannel (and the energy scale factor, not represented in Fig. 4), and the RAM 78 has 256 locations 00 to FF for storing the amplitudes supplied by the trellis coder 76 for the respective subchannel~ For example, location 59 in the index table 40 stores the channel index 75, for which 4 bits are allocated in the table 38. The next (in sequential order) location SA in the table 40 contains the channel index 84, for which a higher nulllb~r (S) bits are allocated in the table 38. The next location SB in the table 40 stores the channel index 76, for which S bits are allocated in the table 40, and so on.
In each symbol period, the locations of the table 38 are addressed sequentially from 00 to FF to read out the respective subchannel indices, and these are used to address the table 38 and the RAM 78. The number of bits identified for each channel index by the table 40 are read from the RAM 74, a read address pointer for this RAM being incre n~nted by this number of bits in a direction from the "fast" (least delayed data) to the "slow" (most delayed data) end of this RAM 74 as indicated by a dowllwal lly pointing arrow in Fig. 4. The trellis coder 76 produces the coded and energy scaled amplitudes from these bits, and these are stored in the RAM 78 at the address of the subchannel supplied from the index table 40.
It can be seen that the embodiment of the invention described above provides twosignificant improvements over known transmi~sion systems using mlllti~rrier modulation.

~ 13~

Firstly, it provides dirrt;lcl~t levels of FECC coding and, especially, ih~lleaving that can be used for ~lirr~lel~t types of data signals. Thus a digital video signal, which may be highly compressed and therefore which is particularly vulnerable to errors, can be tr~n~mittetl in a very reliable manner with a high degree of FECC coding and interleaving 5 over relatively long time periods, and hence with a relatively long tr~n~mission delay, which is not a significant factor for video signals. In contrast, a voice signal, which may for example be included within an ISDN data stream, and which is relatively insen~itive to errors but for which long transmission delays are not tolerable, can be tr~n~mitted with little or no FECC coding and interleaving, and hence little tr~n~mi~sion delay, but with a 10 reduced i""-~."~ily to impulse noise due to the interleaving being omitted or carried out over short time periods. With appropliate selection of the values of R and d under the control of the control unit 68 as described above, each type of data signal can be ed with the best co"lp~o"-ise, individually for that type of signal, be~wee reliability and tr~n~mi~ion delay.
Secondly, having compensated for the dirr~.~;.. characteristics of the subchannels by allocating dirr~ t numbers of bits for tr~n~mi~ion in dirrelent subchannels, the system then allocates the data signals that are the most vulnerable to errors due to impulse noise, i.e. the data signals that are to be tr~n~mit~.od with the least delay and hence with no interleaving or with interleaving over the shortest time periods, to the subchannels that carry the fewest bits, and hence are the least susceptible to impulse noise because of their relatively higher ~IIPnl~lion.
Although a particular embodiment of the invention has been described in detail, it should be appreciated that numerous modifications, variations, and adaptations may be made without departing from the scope of the invention as defined in the claims.For example, the nul~ of bits allocated to the dirrerell~ subchannels may be det~rmined also to take into account factors other than the SNR monitored at the receiver, for example subchannels at low frequencies may be assigned relatively fewer bits to reduce the effects of intt;lrele,lce with POTS signals, and the allocation of nulllb~ of bits to subchannels may also be weighted in accordance with other factors such as sources of inlelrel~nce. Accordingly, the sorting of subchannels in the index tables 40 and 58 may be modified to suit particular re~lui~ en~; for eY~mrle it may be in accordance with actual subchannel attenuations or SNl~s monitored at the receiver 20, rather than in accordance with the number of bits allocated to the subchannels. In any event, the index tables 40 and 58 sort the subchannels into a generally non-sequential order which is determined to be desirable to reduce the effects of impulse noise on those data signals which, due to their ~uile~lellts for the least tr~n~mi~sion delays, are the least interleaved and hence are the most susceptible to impulse noise.

Claims

1. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus, the coding and interleaving apparatus comprises a plurality of data paths providing the encoded data signals with different delays, and a switch for switching different data signals to different data paths; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers.

2. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus, the coding and interleaving apparatus comprises a first store for storing the plurality of data signals, a second store, an FECC coder coupled between an output of the first store and an input of the second store, and a control unit for controlling the supply of data signals from the first store to the coder and for controlling storage of FECC
codewords from the coder into the second store to provide codeword interleaving; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers.

3. A data transmission system as claimed in claim 2 wherein the coder is a programmable FECC coder arranged to be programmed by the control unit to provide different coding for different data signals.

4. A data transmission system as claimed in claim 2 wherein the control unit provides different depths of interleaving for the FECC codewords of different data signals.

5. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus, and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers, the modulator comprises apparatus for providing an Inverse Fast Fourier Transform.

6. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers, the modulator comprises a trellis coder.

7. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus, the coding and interleaving apparatus comprises a plurality of data paths providing the encoded data signals with different delays, and a switch for switching different data signals to different data paths; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers, and the modulator is arranged to allocate bits of encoded data signals having relatively less interleaving to carriers carrying relatively fewer bits in each symbol period.

8. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus the coding and interleaving apparatus comprises a first store for storing the plurality of data signals, a second store, an FECC coder coupled between an output of the first store and an input of the second store, and a control unit for controlling the supply of data signals from the first store to the coder and for controlling storage of FECC
codewords from the coder into the second store to provide codeword interleaving; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers, and the modulator is arranged to allocate bits of encoded data signals having relatively less interleaving to carriers carrying relatively fewer bits in each symbol period.

9. A data transmission system as claimed in claim 8 wherein the coder is a programmable FECC coder arranged to be programmed by the control unit to provide different coding for different data signals.

10. A data transmission system as claimed in claim 8 wherein the control unit provides different depths of interleaving for the FECC codewords of different data signals.

11. A data transmission system as claimed in claim 8 wherein the modulator comprises a table for providing indices of the carriers in order of the number of bits in each transmission symbol period allocated to the carriers, means for reading the respective number of bits for each carrier from the second store in order of the different delays through the coding and interleaving apparatus, and sorting means for supplying the respective bits for modulation onto the respective carriers.

12. A data transmission system as claimed in claim 8 wherein the modulator comprises a trellis coder, apparatus for providing an Inverse Fast Fourier Transform (IFFT), a table for providing indices of the carriers in order of the number of bits in each transmission symbol period allocated to the carriers, means for reading the respective number of bits for each carrier from the second store to the trellis coder in order of the different delays through the coding and interleaving apparatus, and a sorter for supplying signal amplitudes supplied by the trellis coder to storage locations of the IFFT apparatus identified by the respective carrier indices.

13. A data transmission system using multicarrier modulation, comprising:

FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers, and the modulator being arranged to allocate bits of encoded data signals having relatively less interleaving to carriers carrying relatively fewer bits in each symbol period, the modulator comprises apparatus for providing an Inverse Fast Fourier Transform.

14. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and code-word interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers, and the modulator being arranged to allocate bits of encoded data signals having relatively less interleaving to carriers carrying relatively fewer bits in each symbol period, the modulator comprises a trellis coder.

15. A method of modulating multiple carriers with signals of a plurality of data channels, comprising the steps of:
applying FECC (forward error correcting code) coding and codeword interleaving differently to signals of different data channels to produce encoded data signals having different delays; and modulating different numbers of bits of the encoded data signals onto different carriers, wherein the step of applying FECC coding and codeword interleaving comprises the steps of:
storing signals of the different data channels;
sequentially FECC coding the stored signals to produce FECC codewords; and storing the FECC codewords in an interleaved manner, the interleaving being different for the codewords of the different data channels.

16. A method as claimed in claim 15 wherein the modulating step includes the step of trellis coding the bits of the encoded data signals.

17. A method as claimed in claim 15 wherein the modulating step includes the step of allocating bits of the encoded data signals having relatively less delay to carriers carrying relatively fewer bits.

18. A method as claimed in claim 17 wherein the modulating step includes the step of trellis coding the bits of the encoded data signals.

19. A method for transmitting data signals to at least one receiver using multiple carriers, comprising:
receiving data signals to be transmitted from a plurality of input data channels;
applying error correcting coding and interleaving such that the degree of interleaving differs depending on the input data channel, thereby producing encoded data signals having different delays;
modulating different numbers of bits of the encoded data signals onto different carriers based on the susceptibility of the different channels to noise, thereby producing modulated data signals, the smaller the delay of the encoded data signals the fewer the number of bits said modulating uses when producing the modulated data signals for the different carriers; and transmitting the modulated data signals to the at least one receiver using the different carriers.

20. A method as claimed in claim 19 wherein the data signals received are digital signals, and the modulated data signals are converted to analog signals before they are transmitted.

21. A method for transmitting data signals to at least one receiver using multiple carriers, comprising:
receiving data signals to be transmitted from a plurality of input data channels;
applying error correcting coding and interleaving such that the degree of interleaving differs depending on the input data channel, thereby producing encoded data signals having different delays;
modulating different numbers of bits of the encoded data signals onto different carriers based on the susceptibility of the different channels to noise, thereby producing modulated data signals;
transmitting the modulated data signals to the at least one receiver using the different carriers;
storing, for each of the carriers, a value corresponding to the number of bits allocated to the carrier; and sorting the carriers in accordance with the stored values.

22. A data transmission system using multicarrier modulation, comprising:
FECC (forward error correction code) coding and codeword interleaving apparatus arranged for differently encoding a plurality of data signals to provide a plurality of encoded data signals with different delays through the coding and interleaving apparatus; and a modulator arranged to modulate bits of the encoded data signals onto multiple carriers of the transmission system, different numbers of bits in each transmission symbol period being allocated to different carriers, wherein the modulator comprises:

a table for storing a value corresponding to the number of bits allocated to the carriers, and a sorter for sorting the carriers in accordance with the stored values.