CA2135970A1

CA2135970A1 - Ofdm synchronization demodulation circuit

Info

Publication number: CA2135970A1
Application number: CA002135970A
Authority: CA
Inventors: Tatsuya Ishikawa; Takashi Seki; Yasushi Sugita
Original assignee: Individual
Current assignee: Toshiba Corp
Priority date: 1993-11-16
Filing date: 1994-11-16
Publication date: 1995-05-17
Also published as: DE69434243T2; DE69434243D1; JP3074103B2; JPH07143097A; US5602835A; EP0653858A3; EP0653858A2; EP0653858B1

Abstract

ABSTRACT OF THE DISCLOSURE
The invention provides an OFDM synchronization demodulation circuit which includes a receiving circuit for receiving an orthogonal modulated wave of an orthogonal frequency division multiplex (OFDM) modulated signal having an available symbol period and a guard period in waveform which coincides with a part of the available symbol period.
an orthogonal axes demodulation circuit for demodulating an in-phase axis detection signal and an orthogonal axis detection signal through orthogonal detection for the OFDM
modulated wave from the receiving circuit. a first delay circuit for delaying the in-phase axis detection signal by the available symbol period, a second delay circuit for delaying the orthogonal axis detection signal by the available symbol period, a correlation calculation circuit for calculating coefficients of the correlations of the in-phase axis detection signal and the orthogonal axis detection signal from the orthogonal demodulation circuit with the output of the first or the second delay circuits. a guard timing detection circuit for detecting a timing of the guard period in the demodulation outputs from the orthogonal demodulation circuit. and an OFDM signal demodulation circuit for demodulating the OFDM modulated signal by extracting the available symbol period signal only from the demodulated output of the orthogonal demodulation circuit using the timing signal.

Description

13~970 .
,: .

T I ~ Ol~ THE~ 1 I`IYE;NTI O~

UPDM 6~a~0P~ Io~t bEMoDU~ o~ cI~CLJI~
' Tha pre~ent inv~ntlon ~el~e~ ~o ~n OFD~I ayn~hronl~ation ~am~u~tlon ~l~buft~ ~nd nlor~e~ pEIrt;cula~ly to, ~ OFD~I
sy~hronigation ds~nodulAtion circ:uit which obt~in~ 6y~01 ~syn~hroni2ation and c;arrior ~ hronization rrom in~ormation ~i~nal~.
. ' ~A~RC)~N~ OP THB INV~NTION
,' With tho di~iti~ution in tho bro~dcao~in~ or nobil~ rudi~
~om3lunl~tlon, D. di~ital modulati~n sllyst~m h~s: bla~n d~v~lopo~
~n r~aant ~e~ar~. In partiaul~n. in th~ mohll~ r~dic~
aommunloatibn~ ortho~on~l ~roau~noY~ dlvl~ion ~ulti~l~x Ih~s~eina~tor r~rr~d to a6 OF~M tc~rthager~ re~uena~
divi-~ion ~ultipl~æ) ~odul~tion wbich i8 turablo ~ inot : :;
: . .:
multipa~s in~e~r~oron~o h~s boon undor tho ox~mn~tion ~or udo~ptiun. ~h0 ~POM mc~dul~ti~ a ~ystem ~c~ dl~tri~ut~
tran~mlttod dl~ital dAtDI in laultiplo ~arriers ~h~rGina~ter r~rr~3d t~ a~ sub~c~3rri~r~) wbic~h ~r~ mul,u~l ly ~r~hcl~n~
~nd ~:o ~odulnt~ ~h Or th~ h~ OPDM h~ t~ch ~n~rit~ th~t ~roquon~r u~lliz~tl~n ~;tor i~ hi~h ~nd it hnrdly ~llppl i~

13~970 ~.

di~turbanc:~ tb oth~r~ 1rl ~Lddition to ~ ~e~ture that it io h~rdly subje~cJt tl~ th~ ct o~ multiple path inter~erence.
~ iUKl~ a I~IOOK alagr~m ~no~lng a ce~ven~1onP~ LIM
modul ~tor~de~odul~tDa~, Tr~n~n; itt~d data whi~oh is input throu6~h an inp~lt tt3r~in~1 ~ c . ~or ino~anr:l . 8 Qr~K m~dul~ or QAM D~o~ d ~isn~l .
Ti~ tr~n~ i t t~d dat a i ~ ~upp 1 i ~d t~ a s~r i a 1 ~'para 1 1 e 1 ~onv~rter ~ o~ ~n OFl~M D~odul~r 2. wh~r~ th~ d~t~ ~
~on~r~rt~d lnto low ~ rall~l ~at~ ~o~risln8 mu~ti~le sYmbols. Ths nu~ber o~ s~bol~ l~sr ~rlllel data aolnaldeQ
with tho nu~r ~ sub-~arri~r~ Q inv~r~e ;r~t Fourier trans~orm ~her~ina~t~r re~erred to ao IP'~T) olrouit ~ ~
~o~ul~t~ p~ e~ r~l hu~re~ through aev~ral thou~ncl tu~llY c~rthcl~nal ~u~-carrler~ l~y p~r~llel dat~. ~he num~r o~ ~ub--carri~rs is 60t ~ccardi~i51 to ths nuDIb~r o~
unin~ polntd o~ th~ T olroult ~. Tho tr~n~itte~d de~t~
whiah h~u b~e~n ~FDM mod~lc~l;vd by t,hu IFYq! ~ir-ouit 4 io lluppli~d t<:~ A p~rull~1f~rial ~on~er~r ~. wh-3r~ it iR
aonverted into o~ !latA ~d ~uD~l1e~ ~o a ~:uard Deriod sddin~ airauit OE. ~h~ uart3 p~riod ~ddir~ cir~uit ~ ~dd~
~l~rd p~ric~d to the ~ri ~ t~ I n nrrlF~r t~ ~r~ ht thF~
n~ultl~lo ~ath lnt~r~r~ncs ~nd OU~DU~S ~he d~a to a trElAsDli~sicn l lne (not ~hownl .
FI~ 2 1~ A typio~l w~v~orm dls~aD~ ~howing the tt~ns~itted d~t~ ea ~tn a ~uar~ p~rlod.
A~ th~ tranw3itted d~t~ 1~ modul~ted ~t~r di~trl~uted ` ~ ':

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3~970 ~i .

lnt~ severA,~ undreds or thou~and~ ~ Rub-c~rrL~r~ ln L
VE:l~M ~od~llRtlon ffy$~c~m, mo~ tlc~n ~y~nbol r~t~ 02' ~-~h Gr~rrl rr bo~omo~ ror~ly low a~d tho pbrLc~d p~r os~o sy~ol h~c~0~6~ oxtreploly long. Iil0a~0 a~ th63 ~ t~
tranisrul~tt~3d d~t~ i~ hRrdly ~ll~oje~t to th~ e~ y tim~ by ret~ tino W8~tF)i~. Furthhr. tha b~aCt oi~ multiDle ~th int~r~er~nce cs~n bs re~aY~ ooti~ly when ~ ~uRr~
peri~d li~ a~t In ~ont o~ the ~rellebl~ 8~'0~1 pari~d, A
E~uard p~riod ~ddi;~ lrau~t B pro~idei~ ~ gu~rd period whloh tter hal~ o~ th~ ~v~ ymbol pe~ c~plç~d c~ ~, ai$i 811own Ln FI~uR~ 2. I~ the aelay tlme o~
multipI~ path lnter~er~nc13 i~ within ~he .~u~rd p~riod~ It 1 paæ~lble to pr~Y~nt inte~sy~b~l inl~r-~r~lL~b ~y d~ d ~ad j~ur~t ~ymb~1u ~y ~lbl~lo~ ~t$n~2 th~ D.V~ ~ 8ylll~0l p~riod ~1 onl~ At ~ho tltn~ o:r d~modu1~tlon.
on .~ne oth~r h~nd. in the OFPM d,a~dul~tic~n ~ircuit '7 d:llta r~siv~d ~rom ~ ~r~n~ n I 1ne tn~t ~ho~
pl if~rl t~ A ~u~Lrd p6~ricld reraoviDg c~lrou~t ~. Tho ~u~rd Psriad romovln~ ~lrauit B oxtrn~t ~ n the R~r~llhble o~hol E:)oriod ~rom th~ receivcd dat~ ~d ~uppl ie~ ~he~ to ~
~rl~lJp~r~llsl oanverter 9. ~hG ~3rial~p~rallel c:on~r~rter 9 aonv~rt~ Q~r1al d2~ta lnto par~ll4I data r~r ~Y~ry ~3u~ rri~
and ~Utpll~ th~m tb ~ fa~t Four~er tran~l'orm therelnE~t~r re~rr~d to ~ FPT) ~lreult 10. Th0 Flr~ alrcult 1 ~3mo~ul~t~ ~ub-cllr~ loro thr~u~h th~ F~T ~p~r~ L
d~m~lul~tt~ output ~r~ thc FF"P c:ir~uit 10 1 ~ 3 - :

` .`~ ` ~35970 . ~

c:on~rted into ~rial d~ta by ~ p~rallel~orial ~nvertYr 11 ~nd i~ outp~t a~ r~a~lv~ t~.
~ y tne w~y, ln oraer tn~t tno ~"L' ClrC!Ult lU ~x~cu~e~ tne noour~e demodulR~lon. lt 1~ ~e~ ry ~o ob~aln a ~l~ln~
ayl~chron1z~ h~r~~ t~r r~r r ~c3 t(~ ~x th~ sylubol c~nohrc~r~iz~io~ ~ thc~ a~r~llablo aymb4i pcric~. Fu~thor. ~o trar~ ion ds.t:~ i E tran~:~ittacl ~t~r c~rthcl~n~l 1 moclul~t~d. i~ lso ne~b~ y t~ obt~ih ~ car~
ni~Al:ic,n at ~ rec~lv~r ~ tion ~r t~ ro~er ortho~on~l demodule~ti~n. Ao the OFDM m~dulated w~v~ la Q :
wavo~r~ 3imilar to r~ndo~ nois~ own in PIGURE 2. it i di~cult to ~bt~ln the 3ymbol ~y~chronization and the Q~rrier synahroni~tion b~sed o~ the OF~M ~odul~ted w~ve. -So, ln a ~onv~ntlon~l OP~ ~yncbronl~atlon demodulatlon alr~uit, ~ re~r~nae ~n~ ep~r~tely Qd~ed to ~tt~ln th~
~y~bol ~ynahronizatlon, as deuorl~ed ln CCIR Re~. ~74. :~
PI~IURB 3 ia a~ axp~anAtor~ dia~rAm i~or ~3~cplE~inirl~ 3u-~h ~ -; ~:
con~ntion~l sy~b~l ~yn~hr~nisin~ ~thod. ;~
~ o d~ooribod nbo~ u~d po~od h~ b~h ~ddod to tho t~n~nitt~d d~t~. Th~t 1~ shcwn ln ~IGUR~ ~. t~nnm~t~d dAtn o~ on~ ~mhol h~ th~ av~ hJ~ hnl ~rin~ ~ ~nd th~
qu~rd Perl~d G. ~urth~r, a ~on~ nal ~riod ~h~r01n~rter r~rr~d to a$ the null ~Ymbol Pe~i~d) ~vr ~Ymbol ~Ynahroniz~tion i8 ~dd~d ~or ~v~ry s~Yer~l t~n~ o~ symb~] ;~
p~rlod~. ~y d~te~tln~ the nul1 ~ymbol perlod cont~ln~ ~n tran~itted dAt~. it 1~ po~ le to ob~n1n the ~ym~ol 13~i~70 ~ynahronlz~tlon at ths d~odulator ~otlon. Th~t is. bY
det~ctir~g a d~mDIrcat~n timlng b~tw~n the~ n~ ymbcl poriod ~cl tho g~rd p~riod s'ro~ ~ modull~b~d ~ lrQ ~n~lo~o. ~ho L~v~ le ~ol peri~d timln~ obtained b~e~ed on the d~t~3Gted t L~in~ .
~ ?IC3UP~E 4 is a ~ra~h ~or ~xPlainin~ a ~rrier eYn~hroni~tion sletho~ oi anot~er conv~ntion~l O~DM
synchroni~ation demo~ulatiora clr~u~t, ~hic~h ha~ been desarib~d i~ PSu~ur~ o~ OF~M E~peri~e~ts dcJrl13 by the P~TCr'.
Irl PI~;UE~13 4. ~roquen~y i~ ~lotted ~n tho X~ An~ itude p~r~trum plott~d on th~ Y-~xl~, Qnd th~ c~n~ral ~roquency band indie~to~ ~ub-GArriers: modula~ed by I,r~n~Ymi l, L~d d4 ~u . Su~ r r i ~s ~ n ~ b~ tl~ 1~b c~ th~
~s~ u~ ,..y b~l.d a~ not ~o~ul~t~d ~d u~od 8Y~ pl lot cærrl~r~
S ~nd lU. ~t tho d~odul~t~r ~tiQn~ t~e~ G~rri~r eyn~ ni~s~tic,n l~ a~t~ned b~ deteatin~ the pilot c~rr1er~.
Howov~r. in ~ ~thod ~or ~x-~cutina th~ ol rnnty.~ n ~ C3 on nlll l symb~lss which ar~ cycl ic3al ly tran~itt~d. nu11 3Ymbc~18 inay be dis~urbed and ~rroneouelY
dot~t~d. So. thoro w~s ~uc:h ~ Pro~lem th~t the nor~
d~odul~ing opHr~tion was n~t o~rrL~d out ~or ~ lon~ ti~
un~ll next null s~bol ~as cletected In thls ~:ars~ null ~bol~ ar~ ~erlt ~'requent1Y t~ ~ol~re th~ pro~lem, tr~n~m1~1.on ~ 1olenay drops. ~urth~r, ln a msehod ~or o~cccutln3 thc ourrio~ ~nohroniss~tLon u~n~; pi1O~ rri~
tbs carJ-i~r ~ynch~o1lizatic~n c~nnot b0 ~ttLaih~d lî PLlot S ~:
~ ' ~' '' ~" ;" ' "' . .'.`. ,` ii I

~13597~
, i....
, '"`'';'''`' carrier~ are disturbed.
In case of a conventional OFDM s~nchroniæ~tion demoduls~tior~ circuit ~ doecri.bed ~bovo. thoro w~ uc~h problem that the normal demodulating operation cannot be carried out as no symbol synchronl~ation i8 attai~ed i~
null symbol added to trans~itt0d data is disturbed. In additlon, there wa~ also ~uch a problem th~t no c~rrier ~ynchronization is attained i~ pilot carrisr~ are disturbed.

SUMMARY OF ~HE INVENTION

It i~. there~ore, an objeat o~ the present invention to -~
pro~ide an OFDM synchronization demodulation circuit which i~ ~ :
cspable o~ exeautin~ the 6ymbol l3yr~ahroni~tion ~nd tho ~;
carrier synchronization ~rom transmitted in~ormation signals only.
In order to aohi eve th~ abo~e obiect. a~ OFDM ~-sy~chroniz~ti~n dsmodulation circuit according to one aspect o~ the preæent invention includes a receivin~ cir~ or receivin8 an ortho~onal modulated wave o~ an orthogonal ~re~uency division ~ultiplex ~OFDM) modulated 3i~nal having v~ bl~ symb~l p~riod and a guard period in wave~orm which coincide~ with a part o~ the available ~ymbol period.
an orthogonal axes demodulatio~ circuit for de~odul~ting an in-phase a~i~ deteotios~ si~n~l ~d an ortho6onal a~
detection signal thro~gh orthogonal detection for the O~DM

7 ~

modulated wave irom the re~eivin~ circuit. a ~irst delay circuit ~or delaying the in-pha~e ~xis detection signal by the av~ ble syDlbol p~3riod. ~ socond dol~y circuit ~or dalaying the orthogonal axis detection signal by the available ~ymbol pariod. a correlation calculation ~ircuit ~or c~lsulating coe~ficie~ts o~ the correIations o~ the in-pha3e axi~ detection si~nal ~nd th~ orthogonal axi~
detection ~i~nal ~rom the ortho~onal de~odulstion circuit with t~e output o~ the ~irst or the 6econd delay circuit~. a 8uard timing detection circuit ior detecting a timing o~ the ~uar~ p~riod ill the ~odulation out~t~ ~om tl~ oI~tho~o~
demodulation aircuit. and an OFDM ~ignal demodulation circuit ~or demodulating the O~DM modulated si~nal by extracting the avai lable sycbol period si~nal only ~rom the demodulated output o~ the orthogonal demodulation circuit using the timing signal. : .
Further, an O~DM synchroniz~tlon demodul~tion circuit aocording to another aspect o~ the present inventiPn include~
a receivin@ oircuit ~or receivin~ sn orthogonal modulated wave o~ an orthoeonal ~requency divi~lon multiplex ~OFDM) modulated ~ignal ha~in~ an available sy~bol period snd guard period in wAv~l'or~ ~hich coincide~ with a psrt ol' tho :
available ~y~bol period. an orthogonal ~xe~ demodulatio~
circuit ~or demodulating an in-phase aXi~ detection ~lgnal ~nd an ortho~onnl ~xis d0t~ction ~i~n~l throu8h ortho~on~l d~tection ior the OFDM modulated wa~e ~rom the receivin8 '.. ,~ ,1 3r;970 mean~, a ~irst delay cir~uit ior delayin8 the in-phase axis detection ~ignal by th~ available ~ymbol perlod, a ~econd d~31ay circuit ~or dF~l.sying thF~ ~rt.h~)e~nf~l ~xi~ t.~ )n ~ignal by the available s~mbol perlod. ~ correl~tion calc~lation circuit ior calculating coei~icient~ o~ the correlations o~ the in-vhase axis detection signal and the or~hogon~l axis detection ~i~nal iro~ the orthogonal d~modulation circuit with the ou~put or tne ~lr~t or tne ~econd delay circuit. ~n OFDM ~i~nal demodulation cir~uit ~or demodul~ting the OFDM modulated ei8nal by extracting the ~
~vailable aymbol period si~nal onl~ ~ro~ th~ demodul~t~d ~ :
output o~ the ortho~onal demodulation circuit. a frequencY
devi~tion detection circuit ~or detectin~ frequency de~i~tion :
o~ the orthoeonAl demodulation circuit based on the aorrelation coe~icient ~rom the ~orrclation calculation circuit, a~d a detection ~requencY control circuit ~or controllin~ detection irequency o~ the orthogonal ~;
demodulation cirauit based on the detection ~requency deviation. :~ :
In the OFDM syn~hroni2ation demodulation circuit according to the present invention. a3 the ~uard period o~
tho orthogon~l ~ro~uency divi~io~ ~ultiplex ~odul~ted aign~l is identical to a part oi the ~vsil~ble symbol period ~ign~
when de 1 ay i ng amount~ o~ the ~irst and the ~econd dela~ing means are sat based on the available sYmbol ~eriod. the in-phase axis detection signal and tha ortho~onal axi~
- ~3 -~1: :` ~ ~:' ' ` ~` . . i .i'`, `,:~: ';' ` .,.,., ', ' '^.i.~.":

~ ,Sil359~3 _~ .
detection signal irom the orthogonal demodulating means arecorrelative with the outputs o~ the ~irst and the second delayine mo~n~. rospQctivoly, isq a dete~ted lreql~ency is ~ .
proper. ~urth~r, even when the detectsd irequen~y i~
deviated. the in-phs~e ~xie dete~tion signal and the orthogonal axis dete~tion ~ignal are correlative with the outputs o~ ths second and the ~ir~t delaYing means.
ra~pectively. In the OFDM 6ynchronizatio~ demodul~tion circuit as claimed in claim 1. the ~uard timing detection mean6 dete~ts the 8uard poriod timing based on ths r~uit o~
correlatio~ and the ~m~ul~Li~l~ w~n9 ~errorm~ th~
demodulation b~ extracting t~e symbol period si~nal based on the timing signal. I~ the OFDM ~ynchronization demodulation circuit as clni~ed in clai~ 4. th~ ~requ~nc~ devi~ti~n detection ~ean~ detects a detection ~requ~ncy de~iation o~
the orthogonal demodul~ting means ba~ed on the result o~ ::
correlation~ The carrier s~nchronization ia attainsd by controlling detection ~re~uencY u~ing the detection ~re~uenGY
de~iation.
Additional object~ and advantaees o~ the pre~ent invention wi 11 be apparent to por~on6 skilled in the art ~rom a s~udy ~ L~ ll~win~ d~ription ~nd tho ~Cco~p~nyine drawing-~, which are hereby incorporated in ~nd con~titute a part o~ thi~ ~peci~ication.

~RIEF DESCRIP~ION OF THE D~AWINGS
. _ g _ A more co~plete appreciation o~ the pre3ent invention and m~ny o~ the attendant adva~t~ges thereo~ will be readily obt~in~d a~ th~ ~m~ beoo~e~ b0tt~r und~r~tood by r~r4n~e to the ~ollowing detailed description when considered in connection ~ith the accompanyi~g drawings. wherein:
FIGURE 1 i~ a block diagram ~howing the OFDM
modulator/demodulator:
FIGURE 2 is a w~ve~or~ di~gram showin~ the O~DM ~odulatod signal;
PIGURE 3 i3 an ~xplanatorY diagram ~or explaining the s~mbol ~Ynalll~onization in ~ c~nv~nLi~ nm~ r FIGVR~ 4 is a graph ~or explaining the carrier ~Ynchronization in ~ conventiona1 example;
~ IGU~E 5 i~ 8 block disRra~ ~howin~ on~ ~b~di~e~t O~ tho OFDM ~YnchroniYation demodulation circ~it aGcording to the pro~ent invention;
FIGVR8S 6ta) through 6(o) are timing charts ~or explaining the ~ymbol synchronization detection block shown in PIGUR8 5:
FIGUR~S q(a) snd 7tb) are eraPhs for explaining the ~ymbol ~ynchronization detection block shown in FIGUR~ 5:
~ IGU~5 ~a) and ~(b) ~ro eraPhs ior o~pl~ining tho s~mbol synchronizstion detection block ~hown in FIGURE 5:
FIGURES 9(a) a~d 9(b) ~re graph~ ~or e~plaining the mbol ~Yn~hr~nizfltion detection block shown in FIGURE 5:
EIGURE lO is a graph for expl~ining the symbol ~3~970 ,.,".~
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synchronization detection block ~hown in FIGURE 5;
FIGURE 11 i~ a block diagrs~ showing the de~inite oon~truotion o~ the ~u~rd ti~in~ detsotion oirauit:
FIGURE 12 is a block diagra~ sihowing another exampl~ o~
the guard timin~ detection circuit;
FIGUR~ 13 i~ a block diagram ~how~g the de~in~te con~truction o~ the carrier ~requency deviation detection circuit ~hown in FI~UR~ 5;
: ~IGU~ES 14(a~. 14(b) and 14~c) are graph~ ~or explaining t~e aarrier ~ynchroniz~tion detectio~ block shown in FIGURE
~; and FIGURE 15 is a block diagram showing another example of :~
the carrier ~reQuenc~ deviation detectio~ circuit.

DESCRIPTION OF THE PREFERR8D ~MBODIM~NTS

The Dresent invention will be da~cribed in detail with re~erence to the FIGUR~S 5 through 15. Throughout the dra~in8~. lika or e~uiv~lent re~erence ~u~er~l~ or letter~
will be u~ed to desienate liks or equiv~la~t alements ~or simplicity o~ explan5tion.
Re~errin~ now to FI~URE 5. a tir~t ~mb~dim~nt ~* ~l~ OFDM
~Ynchroniæation demodulation crcuit according to the present in~ention will ba de~icribed i~ detail. FIGURE 5 18 ~ bloc~ ;
~iagr~ ~howin~ th~ Q~bodi~ent o~ the OFDM ~ynchroniz~tion demodulation circuit.

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An OFDM modul~ted ~ignal ~hich was received by ~ tuner (not shown) ~nd converted into intermediate ~requency band ~ien~l (herein~t~r re~rr~d to a~ IF ~ign~l) is input to sn input terminal 31. The OFDM modulated Qignal input to the input terminal 31 i~. ~or instance, a ~AM ~ignal which wa~
O~DM modulated and orthogonal modulated by speciric carrier~ :
at a tran~mitt~r ~ection and then transmitted. Further. the ~-UAM signal is capable o~ expras~ing ~y~bol~ by an I-data corre~ponding to the real part o~ a complex ~orm aienal and a ~-dAta corr~pondin~ to the imaginary part o~ the complex ~orm ~ignal. The transmitt~d OPDM ~ul~ o~
have the null symbol p~riod. as ~hown in FIGUR~ 3. and also it does not have the pilot carrier, as shown in FIGUR~ 4.
T~e IP si~nal is ~uppli~.~ t.~ ~ h~n~ ilt~r ~r~in~t~r reierred to ~s BPF) 3~, which in turn removes noi~e outside tho pa~sing band and outputs the IF signal to multiplier~ 33.
34.
O~cillation oUtput ~requancY trestored csrrier) o~ a loaal oscillator 35 is controlled by a control sig~al ~rom a D/A converter 105 which will be described later and is outp~t to the multiplier 33 and alæo, to the multiPlier 34 via a pl~a~o :~hi~t,~r 3G~ Th~ ph~o ~hi~ter S~3 obtai~s Q-axi~ loc~l ~:
09cillation output by shi~ting the lo~al oscillation output ~I-axis local osaillation output) b~ 90' . The mUltiPliers 39 An~ :~4 ~r~orm th~ or~hc)~nna~ liet.~otion bY multiplYin~ tho I-axi~ or Q-axis local oscillation output by the IF signal.

~ 2~35970 $he in-p~ase axis datection output (I-~ienal) ~rom th~
multiplier 33 is applied to ~n A/D converter ~a ~ia a low--pa~ i lt~r (hereina~ter ~e~e~rrod to QO LPF) 37.
~urther, tha or~hogon~l axl~ detection output (Q-~ignal) ~rom the multiplier 34 is applied to an A/D co~v~rter 40 via an LP~ ~3. These LPFs 37. 39 re~ove h~rmonic co~ponent~
o~ ths I-~ignal or Q-signal, re6pectiv~1y. The A/D
converterQ 38. 40 are supplled with operational C100~8 ~rom a local 06ci 1 lator 109. which will be de~cribed l~ter. and convertlng input signal into digital signal. oUtput it to a guard period removing circuit 41 compri~ing an O~I~M
demodulator ~ection 45.
The OFDM demodulator ~ection 45 has a ~imilar structure ar~ OFDM deD~od~ tor 7. ~ ehown in FIGURB 1. ~nd i6 co~pri~ed o~ a ~uard period removing circuit 41. a ~erial/parallel conversion circuit 42. an ~FT ~ircuit 43 and a ParallelJ~rial conversion cirouit 44. The eu~rd ~eriod removing cirouit 41 i8 supplied with a guard ti~ing signal ~ -~rom a guard timin~ detection circuit 55. which will be de~cribed l~ter. removine the 8uard period o~ OFD~ ~odulated si~nal3 (I-signal. a-si~nal) and extracting sn av~ilAble symbol period signal. outputs the OFDM modulated sign~l to the ~erialJpsrallel conversion cir~uit 42. ~he serial~parallel conversion circuit 42 convert~ serial dat~
into par~llel d~t~ ~nd outputs th~ p~r~ l d~t~ to th~ FFT
circuit 43. :

- 13 - :~
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=~}¢~

3~970 ~ .
The FFT circuit. regardin8 the I-sign~l and the a-signal as ~he real part and the imaginary part oî the complex ~orm slgr~E~l, r6~stpectively, perPorn~s th~ FF~ pro~ . 8y th~ FPT ~:
process~ the synchronization demodulation o~ e~ch ~ub-c~rrie~
i~ executed. T~at i~. the re~l part and the imagi~arY part o~ th~ complex ~orm ~ignsl output which has been FFT
processed by the FFT circuit 43 become the I-data and the Q-data w~ich are demodulated ~ymbols o~ each sub-carrier, respectively. T~ese I-data and ~-data are suppli0d to the parallel/serial con~ersion circuit 44, which in turn oU~pU~3 these data a~t~r conv~rting them into s~rial data.
In the present in~ention, the outputs o~ the A/D
convertsrs 38. 40 ~re ~lso 9Uppl ied to a symbol nchroniz~ti~n detection hloc~k 50. PIGURES 6(a) throueh 6(e) are timing chart~ ~or explaining the symbol ~ynchronization detection block 50. as ehow~ in FIGURE 5.
FIGURE 6(a) shows the output o~ the A~D oonverter 3~. ~IGURE
~b) show~ the output o~ a delay circuit Sl. PIGURE 6tc) shows the output o~ a correlator 53. PIGURE 6(d) ~how~ the guard timing. And ~IGURB 8(e) show~ the ~uard removing gate pulse.
Tho ~ymbol ~:~chroniz~tion dot~ction blocl~ 50 i~
co~prised o~ the delay circuit~ 5~, 52. the correlators 53.
54 and the guard timing detection circuit 55. The delay cir~ it~ ~1. 52 output th~3 T~ n~l ~n~i thf~ iPn~l tc~ th~
correlators 53 . 54 by delaying them by an avai lable symbol ` .' ~ .

~ 213597U. .......................... ..

period tx. tha I-signRl irom the A~D converter 3a is also input to the correlator~ 53, 54. The correlator 53 obtains a ~orrelation coe~icient o~ tho I~ nal with th~ dolayod I-signal at a gate width o~ the ~uard period and the correlator 54 obtain~ a correlakion coe~icient o~ the ignal with th~ delayed Q-si~nal.
As described above, tho OFDM modul~ted signal i9 added wit~ th0 guard periods 51. G2. ... at the leading section o~
the available symbol periods S1. S2, ... ~See PIGVRE 6(a)).
The guard periods G1, G2, ... are copied terminal period~
Gl', G2', ... o~ t~lb ~ail~ m~ol ~ri~ S1, S2. ...
~herefore. i~ the I-si~nal ~rom ~he A/D converter 38 is delaYed by the av~ilable s~mbol period, the timin~ o~ tha ~u~rd periods G1. C2. ... ~oincid~ with th~ timine~ n~ the terminatin8 periods G1'. G2'. .... A~ tho guard period ~ignal ~:~
is a aopied ter~inal end si8nal, durin~ the period. the I-si~nal and its delaYed ~ignal are highlY correlated.
During other periods. aæ th~ I-signal i8 ~ noisy signal. 8s shown i~ ~IGURB 2, the correlation o~ the I-signal with its `::~
dela~ signal is small. ~herefore. a correlation coe~icient rrom the corr~lator 53 becomes gradu~llY high ~rom the ~tart ~.
timin~ o~ the terminatine periods G1. G2, ... ~nd roach~3 th~
peak at the end t imin~ o~ the terminat in~ period.
A correl~tio~ coe~icient from the correlator 53 is ~:~
suppli~d to th~ e~l~rd timine ~etection circ~ 55. Th~ rd timing detection circuit 55 detect~ the pea~ timin~. as shown o9 ~ ~13597~
.
in FIGUR~ 6(c), an~ outputs the pesk timing to the guard period removing circuit 41 as the guard tlmin~ ~ienal (FIGURE
~(d)). ~he ~uard Period removin~ circuit 41 ee~erates a ~uard removing gate pul~e (FIGUR~ 6(e)) based on the euard timing si~nal and removes ths guard period based on the ~ate pul~s.
By the way. the correlation coe~icient, as shown in FIGURE 6(c), i~ that at an l~eal demodulatlon when the carrier ~Ynchronization has been attained. On the other hand, ii no carrier ~ynchronization is attained. the ph~se o~
the dsmodu1EIted output in tho orthogonul do~odul~tion rotrlto~
and a correlation coe~icient may not become hlgh even during the terminatin~ period. FIGURES q(a). q~b) through 10 are graph~ showing correlation coe~icient~ obtained ~rom the .
correlators 53. 54 through the simulation with time~ plotted at the X-axis and normalized correlation coe~fici~nt at ~he Y-axis. FIGUR~S 7(a). 8(a) and 9(a) ~how ~he correlation coe~ficient SI between the I-signal ~nd it~ delayed ~i8n~1.
while FIG~R~S 7(b), 8~b) and 9~b) ~how t~e correlatlon ~
coe~icient S~ between the I-signal and the delayed 9 i 8nal o~ ~:
Q-~ignal.
FIGUR13S q~) and 7(b) ~how An examp1e in a cE~s~e wh~re the carrier synchronization is attained. that is. ~requency d~viation ~ between the local os~illation ~requency (restored carrier ~reQuencY) ~ro~ the loca1 oscillator 35 and carrier ~re~uency is zero (O). I~ this ca~e, the correlation :~

~ ',..

-~ 213~97(~
.
, .

coe~icient SI reache~ the peak at the end timing o~ the ter~in~ting period Gl ', G2 ' . ..., a~ shown in FIGUR~ 7(a).
The I-signal an~ th~ Q-si~nal ar~ ~ig~al~ o~ which pha6~ are deviated by 90 on the co~plex plane ~nd haven't been correlated with e~ch other and there~ore, the correlation n~ Q h~.w~ .h~ T~ n~l ~nd ~h~ d~l~y~d ai~nal o~
the Q~ nal become~ a value near z~ro (O), as shown in FIGURE 7(bj.
FIGURES 8~a) and 8(b) show an example in a case where the carrier ~requency deviation ~ is ~s/8 (~s i6 a ~requencY
dif~erence between adjacent ~ub-carrier6). In this ca~a. as the phase rotates by 45' in a time t%. the phase o~ ~ignal G' advances by 45' more than si~nsl G~ There~ore. the pesk :~
v~luo o~ th~ corr~lation coo~iciont will bo~om~ ~mall~r than thQt when the carrier 9ynchroniz~tion is attai~ed. as shown in FIGURE 8(a). Further, the correlation i8 generated ;
b~tween th~ I-Qi~n~l and the del~yed ~ignal o~ th~ Q-6i~nal.
and the oorrelation aoe~iioier~t SQ ~rops to ~ lower level :~
~rom the terminating period and reaches the negative peak at the end timin8 o~ the terminatlng period~ as shown in FIGUR~
8(b).
FIGURES 9(a) and 9(b) show an example o~ A case w~ere a carrier ~requency deviation Q~ is ~/4. In this aase, as `~
the pha~e rotates by 90~ at a time t~. the phase oi xignal G' ad~nc~s 90~ more than ~ignal G. Th~ro~or~. th~ corr~lation coe~icient SI ~ill become ~ value neAr zero (O). ~9 ~hown in :..

~ o~

~ 13~970 .

FIGURE 9(a), and the e~icient o~ correlation S~ reaches t~e negative peak at the end timing o~ the tsrminating period. as shown in FIGURE 9(b).
A~ clesr ~rom FIGUR~S 7(a). 7(b) throu~h 9(a). 9(b). th~
snd timing o-~ the terminating period can be 3een ~rom the correlation coe~icients SI. S~ even when no carrier synchronlzation wa~ attainsd. Por this rea~on. the ~orr~lator 34 obtalns the correl~tlon coe~lclent s~ o~ tne I-signal with th~ delayed ~i~nal o~ the Q-~ignal and outputs it to the guard timin~ detection circuit 55.
FIGURI~ a block dia6ram ~howin~ th~ de~ir it~
structure o~ the ~uard timing detection circuit 55. as ~hown in FIGURE 5. In FIGURE 11. the correlation coe~icients SI, SQ are supplied to ~quare circuits 81. 82, resDecti~elY~ ~he square circuit~ 81. 82 square the correla~ion coe~icients SI. SQ, re~pectively and output the results to an ~ddor a~
The adder 83 add~ up the outputs of the square circuits 81. ~-82 ~nd ~upplie~i the re~ult to an LPF 84.
FI&URE lO ls graph showlng tne ar~thmet1c operatlng ra3ult and show~ an exa~ple o~ a ca~e where no c~rrier synchronization wi~ sttained. As ~hown in FIGURE 10. i~ the ~:
correl~tion co~ nt~ SI, sa ~re squsred ~d sdd~d. th~
added result will raach a pe~k value at the end ti~ing o~ the terminating pariod without depen~ing on a ~requencY deviation a~ The LPF i~4 ~moothe~ the output o~ the addar 83 and ~upplie~i it to a peak extraction circuit 85. The peak ..

I ~ ",.",i,S~
I ~"

~ 3 5 9 7 0 extractiorl circuit 85 extracts ~ignal in amplitude abovie a specii~ic lev01 and ol~tputs to a judgin~ ci2~cuit B6. The jud6in~; oirouit 86 d~t~3oto ~ ~o~k po~i~ion ~rom tho ro~ult o~
extraction oS the pe~k extr~ction circuit and output~ a timing signal at the pealc position. The timing signsl is supDli0d to a i~l~wheel circuit 87. The ~lYwheel circuit 87 i~ re6et by the timing signal ~rom the jud ing circuit 8~ and outputs a guard timing ~i8nal o~ a ~ixed cycl~ ba~ed on tha timing ~ignal cycle.
FIGURB 12 is a block dia~ram showing arlother example o~
the guard t~mlng det~ctlon clr~ult. In FIGURE 12. the component elements identic~l to tho~e, a~ shown in E7IGURE
ll. are a~signe~ with the ~ame re~erence numeral~ and the explan~tion will b~ omitted, In FIGURE l2. ~bsolute value cirauits 89. 90 have been a~opted instead o~ the square aircuits 81, 82. It is a~Darent that the Deak ~osition i8 detectable ~rom the result o~ a~dinB absolute values of the ~orrolation coe~icient6 SI.
SQ and the guard timin~ nal can be obtained even whsn the euard ti~in8 detection circuit $8 in ~IGUR~ 12 ~8~ is used.
Further, in thi~ embodiment, the correlation coe~icient~
" , SI, SQ ~s ~ }~ s ~ 53, 54 ~ t~
aarrier synchronization dotection block ~0. The carrier ~ynchronization detection block 60 i~ compri~ed o~ a carrier i?r0qu~n~y devi~tion dc~t~ction ~irc~it 61 ~nd a carrier ~.
~requenoy control circui t 62.

~ A
~i?; ~

.~, 2~3~970 ¦ FIGURE 13 i~ a blo~k dia~ram showing the ~e~inite structure o~ the carrier ~requency deviation detection circuit. ~s 9110W~1 in FIGUR~ urther, FIGURF~S 14ta). 14(b) and 14(c) are grsph~ Por explaining the carrier ~requencY
deviation detection circuit, as ~hown in FIGURE 13. ~IGUR~
14(~. 14~b) ~nd 14tc) ~how th~ r~lation o~ th~ corr~latio~
coe~icients SI and S~ at the ~u;~r~ ti~ing by plotting , carrier ~requ~ncy ~eviation ~i at tho X-axi~ and normalized : correlatio~ coe~icient~ SI and S~. rospectively or an arc tangent SQ/Sl at the Y-axis.
.In ~IGU~E 13. the correlation coa~icient~ SI and sa ar~ ~:
input to gate~ 91 and 92 oP the carrier ~requency devi~tion detection cirauit 61, and the gates 91 ad 92 output the :
corrblation ~errici~nt~ SI ~nd SQ tv ~ c~lculati~l~ Ullit 93 at the ti~ing o~ the guard timing eignal. The calculation unit 93 obtains an arc tangent o~ the correlation coe~icient S~/SI snd outputs i~ to a ~roquency doviation si8 generation circuit ~4. The correlation co0~icient~ SI. SQ
will chan~e accor~in8 to the carrier ~requency deviation ~::
~s de~cribed above. ~IQW~Ver. ~he change in the ~orrelation ~ .
coe~icients SI. SQ at the gu~rd timing has regularity, as ~hown in FIGURES 14(a) ~nd 14(b)~ and become~ a ~unction oi the carrier ~requencY deviation ~. And i~ the aalculation unit 93 obtains an arc tsngent o~ the correlation ~o~icient S~/SI, cro~ nals at the carri~r ~r~qusncY deviation ~
~s. ~2~s, ~.. are obtained. as shown in ~IGUR~ 14(c). The - gO - .

~ ~ ; ~ ~ ~

''~``'`i`- ~l3597b ~reQuenc~ deviation 8 i gnal ~enerating circuit 94 use~ a ~i~nal, a~ shown in FIGUR~ 14(c). as the carrier ~requency devi~tion ~ignsl in order to control ~slrri~r ~requencs~.
Thu~. it beco~e~ po~sible to pull in carrier ~requency to 8uc~ 8 level that the carrier ~requency ~eviation ~ become~
integer multiple. The carrier ~requency deviation signal i8 ~upplied to a carrier ~requency control aircuit 62.
FIGURE 15 is a block diagram showing another exampla o~ ~
the carrier ~requency deviation detection circuit. ~:
The correlation coe~icient SQ is input to a gate 98 o~ a ~rli~r ~r~u~ y ~vi~tion ~t~tion ~ircuit 97. Tll~ gat~
9~ outputs tho corr~lation coe~icient SQ to 6 ~requencY
deviation ~ignal ~eneration circuit 99 at the timing e~ gu~rd ;~
timin~ n~l. As show in ~IGUR~ 14(b). the ~orrel~tion coe~icient SQ at the guard timing will become zer~ tO) ig the carrier Prequency deviation a~ i3 inte~er multiple o~
~. There~ore, the sa~e e~eat. as shown in FIGURE 13~ can be obtained when the ~requencY deviation æiBnal gener~tion cir~uit ~9 u~es a signal, as shown in FIGURR 14(b). a~ a carrier ~requencY deviation 3 i gnal.
While a signal ~or m~king the carrier ~requency deviation ~r to into~r n~ultipl~ o~ ~9 i3 ~bt~inod ~ro~ t~o c~rrier ~requency de~iation detectio~ circuit 61 a~ de~cribed above.
a siginal ~or controlling ~requency de~iation in unit o~ is i~
obtained ~rom tho output ~ t.h~ ~r~ ri~l conversion circuit 44. The output o~ the p~r~llel/~er~&l con~er3ion 135~7~

circuit 44 i~ supplied to a carrier ~requenCY deviationdetection circuit 101 and a carrier pha~e deviation detection circuit 102. The oarri~r ~re~ue~cy d~iation dotQction circuit 101 detect~ ~r~quency deviation o~ restored carr~er by analyzing ~requency o~ each sub-carrier power. In ~e~eral, maxi~um and minimum ~requency sub-carriers out o~
OFDM modulated signal sub-cQrriars are made as ~uard ba~ds and thQre~ore, ~re not uæed (zero ~arrier). The carrier ~requency deviation detection circuit 101 detact~ deviation :-~
o~ re~tored carrier~ by obtaining the zero carrier po~ition ;
-~ro~ the r~sult o~ ~ow~r ~ ly~ ub-~rri~r~. For -~
in~tance, i~ re~tored ~arrier (local oscillation output) ~requency i9 deviated by ~ (carrier ~requenCY de~iation aP :~
= ~ uh-carrier pow~r of minimum ~requency b~comes ~xtromely small. It i~ there~ore po~sible to brin~ restored ~:~
carrier ~requency in coircidence with carrier ~requencY at unit o~ ~8 by detecting ~requency deviation at unit og ~ by in~esti8~tin~ powsr o~ ~ub-carrieræ 8~ both enda.
The output o~ the carrier ~r~quency deviation detection circuit 101 i~ supplied to the carrier ~requency control circuit 62. The carrier ~requency control circuit 62 , eo~r~tos ~ control si~n~l ~or controlling o~cill~tion ~requency o~ the local oscillator 35 ~rom the output o~ the carrier ~requency deviation detectio~ circuit 101 and a carrier ~requency d~iation ~i~n~l tro~ ~h~ ~rri~r tr~qtl~n~y deviation detection circuit 61 and out~ut~ the generated :
. ' ~' ~:

`' ` ~135970 control ~ignal to an adder 104.
The c~rrier phase deviation detection circuit 102 detects ~h~ de~iation o~ restor~d c~rriers ~rom out o~ ~ha9e ~ub-a~rriers and outputs ~ phaso deviatior~ ~ignal to carrier phase control circuit 103. The carrier phase control circ~it 103 g0nerates a control si~nal ~or controlling oscillation phase o~ the local o~cillator 35 u~lng the pha~e ~eviation ~lgnal an~ outputs the control sign~l ~v tl~n ~dd~r 104. The add~r 10~ ~dd~ up the output o~ the carrier ~re~uenc~ oontrol circuit ~2 and the output o~ the carrier ;~ ;~
phaso control circuit lO~ ~nd o~tput~ the ~ddod r~sult ~o ~
D/A con~erter 105. Tho D/A converter 105 converts ths output o~ the adder 104 into ~n ~n~log signal and output9 the analog sie~al as a control si~nal ~or the local oscillator 3g. The oscilla~ion ~re~uencY o~ the local oscill~tor 35 is controlle~ based on the output o~ tbe D~A converter 105 ~nd the carrler synchronization is thu~ attained.
Further. th0 outPut o~ the parallel/serial conversion circuit 44 i8 sUpplled to a clock devl2tlon detectlon circuit 10~. The clock devi~tion detectlon circuit 106 detects a clock devistion ~rom a di~erenc9 o~ phase deviation8 among aub-oarrioro ~nd outPut~ a clock devi~tion si~al tc 8 clo~k control circuit 107. The clock control aircuit 107 ~enerate~
a clock control signal ba~ed on the clock deviat~on si~nal and oUtDut~ it to ~ D/A convert~r 108. The D/A convert3r lOB
convert~ the clock control 8ignal into an analo~ ~ignal and ~ 23 -~ 35970 outputs it to a loc~l oscillRtor 109. The oscillation ~re~uency of tha local o~cillator 1~9 i~ control led by the output o~ the D/A converter 108. Thu , the clock synchronization i~ attained. Furth~r. the oscillation clock o~ the local o~cillator 109 is ~upplied to a timing c~rcuit ~.
110 which in turn generate~ variou~ timing ~ign~
Next, the operation o~ the embodiment in ths structure a~
described above will be explained. ~:
The OFDM modul~ted signal transmitted through a trans~is~ion line ~not shown) is received by a tuner (no~
shown) and a~ter conv~rl~d in~o ~he IF 4i~sl~l. iL iY ~u~ d to the BPF 32 via the input terminal 31. The BPF 32 o~tput~ -the IP signal to the multipliers 33. 34 a~ter re~oving noi~e.
The multipliers ~. 34 are ~upplied with the I-~xis restor~d carrier~ or the Q-axis restored carriers and orthogonallY
demodulate t~em, respectively. The I-signal from the multiPlier 33 is suPplied to the A/D converter 38 via the LPF
37 and the Q-si~n~l ~rom the multiplier 34 i8 supplied to the A/D converter 40 via the LPF 3~. The A/D converters 38. 40 convert the I-s i gnal ~nd the Q-signal into di~it~l signa 18 usin8 cloc~s ~rom the local oscillator 109 and outPuts them to th~ E~uard period r~mo~ring circ~lit 41 oî th~ OFDM
d~modulation block ~5.

In this embodiment. the ~ymbol ~ynchro~iæation ~or r~mo~Jin~, t~e eu~rd ~er~ t~3in~ rnm th~ OFDM m~dulated Yignal. That is. the I-signal and the Q-~ignal ~rom the A~D

- 2~ - ::

..~.
' ::,:

~ ~13~7~ ~
.....

con~erters 38. 40 are supplied to the delayin~ circuit~ 51.
52. respectively an~ delayed by the available symbol period.
Then, ~8 ~hown in FIGURES 6(8) and 8(b), th~ gu~rd period G1, G2, ... o~ the delayed ~i~n~l o~ the I-si~nal and the : Q-signal coincide with the timing~ o~ th~ ter~inating period~
G1', G2', ... oi the I-signsl and i~ the carrier synchronization has been attained. the I-signal and its delaysd ~i~nal are mutu~llY related to each other durin8 the p~riod. The correlator 53 obtai~s a correlation coe~icient SI between the I-~i~nal and it~ delayed ~i8nal ~nd outputs it to ~he guard tlming detection circult ~
~ urther. even when no carrier synchronization is ~ttained~ there i~ a correlation between th~ ignal and its delaYed ~i~nf~l or the I-si~r~l and the delay~d sign~l o~ the ~-si~nal during the terminatin~ period, as shown in FIGUR~S
q~a). 7(b) through 9(a). ~(b). The correlator 4~ obt~i~æ a ~ :
correlation cae~icient SQ between the I-~ig~al ~nd the delQyed sign~l oi the Q-signal and outputs it to the guard timing detection circuit 55. The guard timing deteation ~ircuit 55 adds up squQre~ o~ the correl~tion coe~icients SI
and SQ, and 8enerating a guard ti~ing signal at the peak ' ~1ti~n er the add~d r~sult and outputs it. A~ ~ho~n in : FIGUR~ 10. the peak position is ~enerated.at the end ti~ing o~ each terminating period. Th~ gu~rd period removin8 ;:
airouit 41 remov~ th0 guard perlod u~ing th~3 ~u~rd timine signal. Thus. the 6Ymbol synchronization i~ attalned.
- 25 ~
. ..

- ~ 35~7~

~ he OFDM modulatsd sisnal with the guard period removed and the available sy~bol period only e~tracted i~ 6upplied to tho 80ri~1~p~r~ 1 conver~iol~ circuit 4a wh{tre it ic ~:
converted into ~arallel data. The FFT cirouit 43 per~orms the FFT proc0s o~ th~ parallel conversio~ signals o~ the I-~ignal a~d the Q-signal regardine them a~ the re~l pArt and the im~inary part o~ the comp1ex ~orm signal. respectiv0ly.
As a result. the I-data and t~e Q-data which aro de~odulat0d symbol~ o~ sub-carriers are output ~ro~ the FFT circuit 43. ..
These demodulated symbol data are converted into 6erial data in the parallel~serial converter 44 and output.
The correlation coe~icients SI. SQ ~ro~ the corralators 53. 54 aro ~upplied to the c~rrier ~requenc~ d~vi~tion dot~ction oircuit 61. The c~rrier ~r~quen~y dsviation detection circuit 61 t~kes i~ the corrslation ¢oe~icients SI, SQ at the guard ti~ing and obtains an arc tangen~ o~
5Q/SI~ As show~ in PIGU~ES 14~a). 14(b) and 14(c). the correlation coe~iaients SI. SQ at the guard timirg are ~unctions oP the carrier trequenoy devia~ion ~ an~ arc tangents o~ SQ/SI become si~nals which 0 cro~ at the integer multiple positi~n o~ ~s. Using the ~ienal, it is pos~ible to control r~tor~d ~arri~r ~r~qu~ncy ~o thAt tho carrier ~requ~cy devi~tion ~ beco~es integer ~ultiple oS $s. Th~
carrier ~reqUency deviation detection circUit 61 oUtput~ the ~;
~ignfil t~ t.h~ aArri~r ~r~ql~ncy annt.rol aircl~it ~2 a~ a ~ ~:
carrier ~requency deviation si~nal.

- 26 ~
' ,,~

3~97 The carrier ~requencY control circuit 51 generates a .
control signal for controlling o~cillPtion ~requency o~ the locsl 081~ tor ~5 ba~ed on tho output o~ tho o~rrior requency deviatien detection circuit 101 and the carrier ~requenc~ de~iation si~nal and outputs it to the adder 104.
Further. the carrier Dh~a deviation detection circuit 102 detectæ an ph~se deviation o~ restored carrier based on the pha~e deviation o~ sub-carrier, and ths carrier pha~e control circuit 103 generate~ a control ~i~nal ~or controlling the local o~cillator ~5 based on the phase deviation and ~upplie~
it to the aa~er 104. ~he output o~ the carrier frequency control circuit 62 and that o~ the cQrrier phase control circuit 103 are added up by the adder 104. converted into an ;
~n~log oign~l b~ the D/A conv~rt~r 105 ~nd 8uppl iod to tho local oscillator 35. Thu~. the 03cillation o~ the looal .:~
oscillator 35 is controlled Rnd the ¢arrisr synchronization is attsined.
Further. the output o~ the parallel~serial con~ersion ~-:
circuit 44 is also ~upplied to the carrier ~requencY
deviation detection circuit 101 and the carrier phase ~ :
deviation detection circuit 102. FrequencY o~ sub-carrier power ls analyzed by ~h~ carr i ~s ~ 4U~IlCy ~ t i on detection circuit 101 and a signal ~or controllln8 restored carrier ~requency in unit o~ ~8 i~ supplied to the carrier ~`
~requency control circ~it 62. `
The clock synchronization and the carri~r synchroniz~tion ~ :
- 2q - , `....
'`

~ ~'~

-. ~13~970 are attained using the output o~ the para1lel~serial con~ersion circuit 44. That i~. the output o~ the parallel/~erlal convar~lon c~rcu~t 44 i~ ~upplied to the clock devi~tion detection circuit 106 to obtain a clock deviation signal based on a di~ierence o~ phase deviation~ o~
sub-o~rrier~O ~he clo~ control ~irauit 107 6ener~te0 a ~lock control signal bas0d on the clock deviation signal and ~:
corltrol8 09cillation of an imaginary part o~cillator 109.
The clock ~Ynchronization i9 thus attained.
A~ desoribed above. in this e~bodimsnt the symbol synchronization is attained by obtaining a guard ti~ing ~ro~
the result o~ corr~l~tion betwsen the orthogonal demodulated output and its delayed sign~l utilizing the ~sct that a slgnal ln the 8uard period i~ a copied signal o~ th~t in the end period o~ the available sYmbol period. In addition. ~rom the ~a~t that the relation between the result o~ correl~tion o~ tho ort~O~onAl de~o~ul~ted output with it~ d~l~yed 8i~n~i and the carrier ~requency deviation changes at the cYcle o~
carrier interval ~, restored c~rrier ~requoncy e~cur~tely coincide~ with car~ier ~re~uencY b~ controlling restored ~
.:::
carrier ~requencY baQed on the re~ult o~ correl~tion. and `~:
~urthermore. by controlling deviation in unit o~ ~ b~sed on ~ub-carrier power o~ the ~T de~odulated output ~nd thus, the symbol ~ynchronization and the carrier sYnchronization are .
attalned b~ed on in~ormation ~i~nal only. and it is p~s~ibl~
to ~ttain the positive symbol and the carrier - 2~
:
.
.

- ~ ~135~70 I ~'` ' .
.~ .

synchronizations without using a speci~l reierence signal or a pilot carrier and to achieve the OPDM demodulation durable ag~inst di ~turban~o .
Further. althou@h the correlation coe~icients SI. SQ
repre~ent the correlation bet~een the I-~ignal ~nd its delayed sienal and that between the I-signal and tho delaYed si~nal o~ the Q-~ignal. re-Qpeetively. in the above embodiment. the correlatio~ between the Q-~ignal and i~s delayed signal maY ~e used a~ tha co~relation coef~icient SI.
In addition. the corralation between the Q~ nal and the delayed signal o~ the I-sig~a 1 ma~ be U8 ed as the correlation coe~icient sa. Further. tho ~orrelation coe~icients SI and SQ can be combin0d ~reelY a3 de~ired.
A~ d~scribed abo~re. the pre~ont invontion o~n provide an sxtremely preferable OFDM ~nchroniz~tion demodulation circuit.
While there have been illustrated and des~ribed what ~re at present con~idered to ~e pre~erred embodimenta o~ the present inventio~. it will be under~tood by thos~ ~killed in the art that various chan~es and mo~i~ioation~ maY be ~a~e.
and equivalents may be substituted ior elements`thereo~
without dapartlng from the true ~cope o~ the pre3ent inve~
tion. In addition. many modi~ication~ may be made to adapt ~ .;
partieular situation or material to the tosohin~ o~ the present invontion without dep~rtin6 ~ro~ the centrsl ~copo thereo~. There~or. it i8 intended that the pre~ent inventio~
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`~`i~` ` 213~970 not be limited to the particular embodiment disclosed as the best mode contemplated ~or carryin~ out the present lnventlon. ~ut that the present lnventlon in~ludes all embodi~ents ~allin~ within the 9cope O~ the appendad cl~imæ.
The ~oregoing de~cription and the drawings are regarded by th0 ~pplic~nt a~ includin~ a vari~ty o~ individuAlly inventive concepts. soms oS which may lie p~rtially or wholly out~ide the 9COp0 O~ so~e or all o~ the ~ollowi~g claims.
The ~act that the a~plicant has chosen at the time o~ ~iline o~ the pra3ent application to restrict the cl~imed scope o~
protection in accordance with the iollowing claims is not to be taken as a disclaimer or alternative inventi~e conoepts that are included in the content~ o~ the application and could be de~in~ by ul~ rering il~ scope ~rom th~
~ollowing olaims. which di~erent claim~ m~y be ~dopted sub~equently during prosecution, for example. ~or the purpoe~ o~ a diYision~l ~ppl ic~s~tion.

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Claims

1. An OFDM synchronization demodulation circuit comprising:
receiving means for receiving an orthogonal modulated wave of an orthogonal frequency division multiplex (OFDM) modulated signal having an available symbol period and a guard period in waveform which coincides with a part of the available symbol period;
orthogonal axes demodulation means for demodulating an in-phase axis detection signal and an orthogonal axis detection signal through orthogonal detection for the OFDM
modulated wave from the receiving means;
first delaying means for delaying the in-phase axis detection signal by the available symbol period;
second delaying means for delaying the orthogonal axis detection signal by the available symbol period;
correlation calculation means for calculating coefficients of the correlations of the in-phase axis detection signal and the orthogonal axis detection signal from the orthogonal demodulation means with the output of the first or the second delay means;
guard timing detection means for detecting a timing of the guard period in the demodulation outputs from the orthogonal demodulation means; and OFDM signal demodulation means for demodulating the OFDM
modulated signal by extracting the available symbol period signal only from the demodulated output of the orthogonal demodulating means using the timing signal.

2. An OFDM synchronization demodulation circuit as claimed in claim 1. characterized in that the guard timing detection means detects the timing signal by adding the square of the correlation coefficient of the in-phase axis detection signal with the output of the first delay means or the correlation coefficient of the orthogonal axis detection signal with the output of the second delaying means and the square of the correlation coefficient of the in-phase axis detection signal with the the output of the second delaying means or the correlation coefficient of the orthogonal axis detection signal with the output of the first delaying means.

3. An OFDM synchronization demodulation circuit as claimed in claim 1. characterized in that the guard timing detection means detects a timing signal by calculating an absolute value of the correlation coefficient of the in-phase axis detection signal with the output of the first delaying means or the correlation coefficient of the orthogonal axis detection signal and the output of the second delaying means and an absolute value of the in-phase axis detection signal with the output of the second delaying means or the correlation coefficient of the orthogonal detection axial signal with the output of the first delaying means. and the.

by adding up the absolute values.

4. An OFDM synchronization demodulation circuit comprising:
receiving means for receiving an orthogonal modulated wave of an orthogonal frequency division multiplex (OFDM) modulated signal having an available symbol period and a guard period in waveform which coincides with a part of the available symbol period;
orthogonal axes demodulation means for demodulating an in-phase axis detection signal and an orthogonal axis detection signal through orthogonal detection for the OFDM
modulated wave from the receiving means;
first delaying means for delaying the in-phase axis detection signal by the available symbol period;
second delaying means for delaying the orthogonal axis detection signal by the available symbol period;
correlation calculation means for calculating coefficients of the correlations of the in-phase axis detection signal and the orthogonal axis detection signal from the orthogonal demodulation means with the output of the first or the second delay means;
OFDM signal demodulation means for demodulating the OFDM
modulated signal by extracting the available symbol period signal only form the demodulated output of the orthogonal demodulating means;
frequency deviation detection means for detecting frequency deviation of the orthogonal demodulating means based on the correlation coefficient from the correlation calculation means; and detection frequency control means for controlling detection frequency of the orthogonal demodulating means based on the detection frequency deviation.

5. A method for demodulating an OFDM synchronization.
comprising the steps of:
receiving an orthogonal modulated wave of an orthogonal frequency division multiplex (OFDM) modulated signal having an available symbol period and a guard period in waveform which coincides with a part of the available symbol period;
demodulating an in-phase axis detection signal and an orthogonal axis detection signal through orthogonal detection for the received OFDM modulated wave;
delaying the in-phase axis detection signal by the available symbol period;
delaying means for delaying the orthogonal axis detection signal by the available symbol period;
calculating coefficients of the correlations of the demodulated in-phase axis detection signal and the orthogonal axis detection signal;
detecting a timing of the guard period in the demodulated output?; and demodulating the OFDM modulated signal by extracting the available symbol period signal only from the demodulated output using the timing signal.

6. A method as claimed in claim 5. wherein the guard timing is detected by adding the square of the correlation coefficient of the in-phase axis detection signal with the output of the first delay means or the correlation coefficient of the orthogonal axis detection signal with the output of the second delaying means and the square of the correlation coefficient of the in-phase axis detection signal with the the output of the second delaying means or the correlation coefficient of the orthogonal axis detection signal with the output of the first delaying means.

7. A method as claimed in claim 5. wherein the guard timing is detected by calculating an absolute value of the correlation coefficient of the in-phase axis detection signal with the output of the first delaying means or the correlation coefficient of the orthogonal axis detection signal and the output of the second delaying means and an absolute value of the in-phase axis detection signal with the output of the second delaying means or the correlation coefficient of the orthogonal detection axial signal with the output of the first delaying means. and then. by adding up the absolute values.

8. A method for demodulating an OFDM synchronization.
comprising the steps of:
receiving an orthogonal modulated wave of an orthogonal frequency division multiplex (OFDM) modulated signal having an available symbol period and a guard period in waveform which coincides with a part of the available symbol period:
demodulating an in-phase axis detection signal and an orthogonal axis detection signal through orthogonal detection for the received OFDM modulated wave;
delaying the in-phase axis detection signal by the available symbol period;
delaying means for delaying the orthogonal axis detection signal by the available symbol period;
calculating coefficients of the correlations of the demodulated in-phase axis detection signal and the orthogonal axis detection signal:
demodulating the OFDM modulated signal by extracting the available symbol period signal only from the demodulated output:
detecting frequency deviation of the orthogonal demodulating means based on the calculated correlation coefficient;
providing a reference frequency for the OFDM
demodulated signal; and controlling the reference frequency based on the detected frequency deviation.