CA2135995A1 - TFT with Reduced Parasitic Capacitance - Google Patents

TFT with Reduced Parasitic Capacitance

Info

Publication number
CA2135995A1
CA2135995A1 CA2135995A CA2135995A CA2135995A1 CA 2135995 A1 CA2135995 A1 CA 2135995A1 CA 2135995 A CA2135995 A CA 2135995A CA 2135995 A CA2135995 A CA 2135995A CA 2135995 A1 CA2135995 A1 CA 2135995A1
Authority
CA
Canada
Prior art keywords
tft
electrode
parasitic capacitance
reduced parasitic
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2135995A
Other languages
French (fr)
Other versions
CA2135995C (en
Inventor
Willem Den Boer
Mohshi Yang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
OIS Optical Imaging Systems Inc
Original Assignee
Willem Den Boer
Mohshi Yang
Ois Optical Imaging Systems, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Willem Den Boer, Mohshi Yang, Ois Optical Imaging Systems, Inc. filed Critical Willem Den Boer
Publication of CA2135995A1 publication Critical patent/CA2135995A1/en
Application granted granted Critical
Publication of CA2135995C publication Critical patent/CA2135995C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor

Abstract

The drain electrode (39) is annular surrounding a round source electrode (40). Pref. both electrodes have a passivation insulating layer and the pixel electrode (50) connected to the source is transparent and is bonded to and crosses over the passivation layer and drain electrode. Gate insulation is located between gate electrode (30) and semiconductor film substrate.
CA002135995A 1993-11-19 1994-11-16 Tft with reduced parasitic capacitance Expired - Fee Related CA2135995C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/154,713 1993-11-19
US08/154,713 US5414283A (en) 1993-11-19 1993-11-19 TFT with reduced parasitic capacitance

Publications (2)

Publication Number Publication Date
CA2135995A1 true CA2135995A1 (en) 1995-05-20
CA2135995C CA2135995C (en) 2000-05-30

Family

ID=22552458

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002135995A Expired - Fee Related CA2135995C (en) 1993-11-19 1994-11-16 Tft with reduced parasitic capacitance

Country Status (5)

Country Link
US (2) US5414283A (en)
EP (1) EP0654828B1 (en)
AT (1) ATE179832T1 (en)
CA (1) CA2135995C (en)
DE (1) DE69418283T2 (en)

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DE69418283D1 (en) 1999-06-10
DE69418283T2 (en) 1999-12-23
EP0654828A2 (en) 1995-05-24
CA2135995C (en) 2000-05-30
ATE179832T1 (en) 1999-05-15
EP0654828B1 (en) 1999-05-06
US5614427A (en) 1997-03-25
EP0654828A3 (en) 1995-08-30
US5414283A (en) 1995-05-09

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