CA2139755A1 - High impedance fault detector - Google Patents

High impedance fault detector

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Publication number
CA2139755A1
CA2139755A1 CA002139755A CA2139755A CA2139755A1 CA 2139755 A1 CA2139755 A1 CA 2139755A1 CA 002139755 A CA002139755 A CA 002139755A CA 2139755 A CA2139755 A CA 2139755A CA 2139755 A1 CA2139755 A1 CA 2139755A1
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CA
Canada
Prior art keywords
data acquisition
fault
pattern
frequency components
acquisition period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002139755A
Other languages
French (fr)
Inventor
Majid Al-Dabbagh
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Technisearch Ltd
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Individual
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Publication date
Application filed by Individual filed Critical Individual
Publication of CA2139755A1 publication Critical patent/CA2139755A1/en
Abandoned legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00Details of emergency protective circuit arrangements
    • H02H1/0007Details of emergency protective circuit arrangements concerning the detecting means
    • H02H1/0015Using arc detectors
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00Details of emergency protective circuit arrangements
    • H02H1/0092Details of emergency protective circuit arrangements concerning the data processing means, e.g. expert systems, neural networks

Abstract

A method and apparatus for detecting high impedance faults and other arcing phenomena in an electrical distribution sys-tem. Electrical signals on the distribution system are monitored and a number of frequency components isolated, such as zero-se-quence current and voltage, second harmonic voltage, third harmonic current, eighth harmonic voltage and current, and a mea-sure of magnitude of the components are taken over successive data acquisition periods. The measures of the component magnitudes are formed into a pattern for each data acquisition period, and the difference between patterns for successive periods are compared against a pattern threshold which is set to suit the characteristics of the distribution system. A pattern difference greater than the pattern threshold indicates the possibility of an arcing fault, which can then be confirmed by determining wheth-er the frequency components are modulated at twice the fundamental frequency of the distribution system.

Description

~ WO 94/01910 7 5 5 PCr/AU93/00342 , ~
HIGH IMPEDANCE FAULT Dh~ECTOR

This invention relates to a method and means for detectin~ a high imperl~nce 5 fault or arcing ph~ -o...- ~Oll in an ~ll~..,.~l;,~g current elrctrir~l distribution system.

For thc pul~ose of su~lyillg ---;..I .u~t~d power to c~ , protection ~y~ s must isolate any type of clc~-;r~l fault which may occur in thc electricaldistribution system under various con-litinnc. In ...~e-.. distribution systems,10 protective relay means have been developed to c;ope with most Cil~ -.r~s, andthese systems are able to l.,s~olld rapidly to sudden and so...el;...es violent changes in current and voltage caused by short circuits. However, the problem of high hllpccl -.r~ faults pl~.sellls a major C41~ since many relay sy~ ls are unable to l~s~olld quickly and ~r~lr~tely under such c~n~liti~ nc. A high i...pe~ eG fault is a 15 type of electri~l fault which cl~mm5)nly occurs in a clictributi~ n feeder when the fault current flows through an equivalent high i...peA~-~r~ which is caused by an electric arc. ne~se high ;...llc~ faults are o%en ~cori~ted with electric arcs they are sometimes called an "arcing fault".

A typical single phase high i.. pcA .. ~ fault occurs when a plant such as a tree branch ct~nt~t ts a high voltage tiictrihutinn power line, which often results in an arc b~lv~ ll the plant and thc power line. From the point of view of a protective relay situ~ted at the di~llibulion point for the power line the arc b~ n the plant and the power linc will present a high ;",l~r~ Further, if the plol- ~ive relay is not able 25 to detect thc fault the result may be quitc c~,t~llo~ic, for ç~mrle resl~ltin~ in a bush fire.

PloL ~live relay ~y~lt~s are often not able to detect such high hllpedallcc faults because fault cull~,~lls are often far too small to be l~co~d by cGllvcl lior~l relay 30 systems. There are often no rapid nor amplc rh~nges in voltage or current w~vefolllls when high hllpedancc faults occur be~ e the ;...~eA- .rc from the power line to ground is quite high.

¦ SU~S~ JTE SHEET ¦

21~9755 WO 94/01910 PCr/AU93/00342 ~

It is common for low current, high i~ r~ faults to occur on distribution feeders and other relatively low voltage power lines. A high ;...l cA~.-e~e fault usually occurs when a distribution line con~ ctor is cont~rted by a high illlpeddl~ce grounded object, such æ a tree, or when a con~luctor breaks and falls onto a poorly con~ cting S earth s~rf~ce A great deal of 1~ sealcll in the pæt hæ co.-e~ ,~-dted on creating more seusilivG ground fault detecti-)n devices, since many l~seal.;l~ls believed that high impe~l~nre faults were often not detected bceduse the protective relays were nots~usilive en-~uph Conse~lu~ ly, much l-,sea~ch hæ gone into the design of very sc;usilivG over current relays, in particular zero sequenre over current relays for 10 distribution ll~lwol~s. Although this 1~ seal- h hæ hull lvV~ d grounded fault protection ~y~lcllls, the problem of low current faults rcln~ining ~ c;d hæ ~ d, the reæon for this being that these devices may not lictin~ h fault cUllGllls belownormal load levels.

Recent 1~ sealell hæ invçsti~tecl the "h .. ~ ;cs of high hllped~lec faults and the use of signals other than fi-n-lA...e.l;.l ~ ueney signals to detect high hllpedaulce faults. It wæ found that one of the most hll~Ollalll cll~a~;lcli~lics observed during arcing faults is that h~rmonic signals illClcdsc to a ...e~ kle value which may be detecte~l during O~;U1~ 1CC of a fault. For er~mplç, l~sealch at Texas A & M
20 Uni~elsily has addressed the ch ~cl~ t;t~n of fault ;u~lGllts associated with downed con~ ctor~ From this ru~ of low eurrent fault ch~d ;lclislics a l~rh~ uc was developed which utilised high ~ U~.ll~ (two kilohertz to ten kilohertz) eurrent eolllpone.ll~ for fault ~etecti- n This te~ hniq~le is based on the obscl~dlion that arcing waS almost always ~soci~ted with downed Con~llctQrs 25 r~s~ltir~ in a m~vl~te~l current waveform rich in high ~e~luency components. The high ....llc~ C! fault dcteclol th~cforG utilised high frequency colupo~ to detect the occullG~lce of a high i~ ~l.e~ 1'4 fault, and ope.dted in a s, I ;~r~ y mdlmer under certain ope.dtiollal con-litionc. However, field tests have shown that these high L~luell~ signals can often not propagate past c~pa -ilQl banks which arc present in 30 electrical distribution Sy~ llS, and hence the system is unable to p~Çollll in many pr~ctic~l applic~ti-nc ¦ SU~S I l l lJTE SHEET ¦

21397~5 WO 94/01910 ~ PCI/AU93/00342 _ 3 _ Further lesealch on high impedance faults has shown that h~rmo~ic content during a high hnped~lce fault is slf pc .,~ ..t upon many p~ .f te.~. The h~rmonic content during a fault can be effected by many physical and ellvihol....~ .l variables such as feeder config~ ti~n, shape of fault point, the lll~er in which a fault s p. r.. ~, load type and level and the prevailing weather. Using a single ~letection pd.a.llett;~ such a high Ç ci.lucrl.;~r signal, a low frequency signal, or a third harmonic frequency signal has been shown to have f1iffir~lties in detectin~ high impedance faults under certain c~n~litifm~ The,~,role, the most recent l~ seal~ has co. .~ d on d~.t~ ;..g high i..~lle~ re faults using multiple dct~clion p..,....ctel~, however this 10 l~sealch has also inrlif~tffl that arcing faults are comrlic~ted phf..o...fn~ the behaviour of which is ;..llil~..rc~l by a large number of physical variables andell~ho~ clll~ ll.etl~ ~ which are difficult to ~lua~lliry. In this light, leading researchers CJ. Kim and V. Don Russell from Texas A & M Ul~iv~ l~ily, in a report entitled "A le~rning methf-~l for use in intçlligent co~ r relays for high illlpeda~ce 15 faults" (IEEE T~ -1 ;ons on Power Delivery, Volume 6, No. 1, January 1991 pages 109 to 115) stated that "the behaviour of the pal~ ,tels of high ;Illpe~lAllre faults is very r~n~lf m and, in most cases, unpredictable".

The present invention, in s~.. ~r, plovidcs a methf~ for d~te~l;.. g a high 20 hllpc~l~"rc fault or arcing phrnom~n-~n in an AC clecllieal ~ trih~ltiQI- system having a r.~ A.~,e~ l frequeney, co...p.;~;..~;
a. mo..;lo.;.~ çlr~ icAl signals in said electrir~ ;on system;
b. isolating a plurality of ~ .l frequeney componenls from the m~,.... ...;lol"~ elçctr;r~l Sigl~
c. scaling the m~ es of said prcdet~ d Lc.lucl~ colll~oncllls accol.lh~E; to selected scaling factors;
d. CQ~ ;..g said scalcd m~itu~ltos from a first data ~c~ on period with the scaled m~it~ es from a ~l~ cc~ g data ~ n period; and e. d~ tccl;..g the OCCU11C11C~ of a high ;...1~C-~ 4 fault or arcing 30 phc--o..-~ lol. on the basis of said COI..p~

The step of co~p ~ said scaled ~ g--;l.ldes may colll~liSe COlllpdlillg the ¦ SUt~ .JTE SHEET ¦

WO 94/01910 PCr/AU93/00342 ~1397~ 4_ sum of said scaled m~gnitu~es during said first data acquisition period with the sum of the scaled mztgnit~lcles during said l.l"c~-l;"g data ac ~ n period.

Further, the step of scaling the m~itu-le of a given ~l.dGte- ",;..f ~1 frequency 5 co,n~oll~,lt may co..-pl;~e ~çte-...i~-i.-g and s~ i..g the ml.l,bff of sub- periods of a data ~ l ;on period during which the given L~ ~lu. ll~ co.llpone.ll is greater than a selected value, and multiplying the res1~lting sum by a scaling factor coll~,s~on.lillg to said given frequency co...po~

F~GfGlably the detection of the possibility of a high hllpc~c~ fault is ~el~-...i.-~d by a CQI..l. .;~on of the scaled m~itudes during first, second and third seque~ti ~I data ~ ;(m periods.

Preferably one of said ~ledet~ ...i..fd frequency coll,pollellls is twice said 15 fitn~l~ment~l frequency.

Preferably said plurality of pre~lçte ...ii~rA L~ ~luell~;y co~polle~ co...~ es eight voltage and/or current signals.

The plurality of pl~- t~ .. i.~rd frequency c~.-.po-.- .1~ may include zero sc.luc~c4 current and voltage signals, and these zero se~lu ~.~c current and voltage signals may be utilised to detect solid ground faults, particularly in the case that the electrical feeder line co...l.. ;~5 a three phæe, four wire line.

In order, for example, to prevent ~l.. ~ge oc~---.;.~ as a result of the high i.~.pcrlA..~ fault, the mçth~l may also include a step of issuing a trip signal when the possibility of a high ;.~l.e-lA.~ fault is detc~ l, to cause said at leæt one electrical feeder line to be i~QI~ted from the source of said AC elç.~ y.

In accolda~cc with the invention there is also provided a method for ~çtecting an arcing ph~ o,)~ in an elertric~l .lisl~ ulion system co~ g the steps of:
mo-.;l~..;..~ n selected ~ u~ll~ co...po~ s C" of the voltage and culTent at ¦ SUtsS ~ JTE SHEET ¦

WO 94/01910 PCI`/AU93/00342 ~97~5 ` --a point on thc distribution system;
gcll~,ldling a first pattern M, (C,~ lcpr~s~ tive of the m~gni~ldes of the selecte.l frequcncy colllpo~lcllls during a first data ~ ion period;
coln~.;.,g the first pattern with a previously stored pattern M, l ~C,~ to S det~ c whether the di~clcnce thclcb~ ç~fee~lc a pattern threshold Mt (C") such that /Mf (C,~ - Ml_l (C,J / > M, (C~ for all n; and del~ iu~ thc OCCUllCllCC of an arcing rh~ ,-o--~ -- in thc system on the basis of the COI~ ll ;COll The present invention also provides a metholl for ~ctcCI;..g the possible r~ ;lç..~c of a high ;~ e~ fault in an çlectrir~l rlictrihution system COll~c~illg AC
electricity of a rl.. l.~,.. l~i.l L~ ucll~;y~ c4ll.l~ ;.. g lllol~;lol;i~g electrical signals in said electrical lictlibution system;
15 icol~ting a plurality of pl~rt~ .. ;.. r,d frequency compone~ from the mollilol~,d clc~llical c,i~lc;
~mrling the frequency compo.. - .~ during at least one data ~cq~licition period;forming and storing a first pattern coll~ sL,o~ to the samples during said at least one data ~ ;on period;
C4l~ said first pattern with a previously stored tç~nrl~te p~ lll, and detç....;..;ug the po~sible ~ tc~e of a high i...l ec~ e fault on the basis of said c~ . ico~

The tçmrl~tc pattern may C4~ e a c~ ted threshold pattern or may 25 colll~lisc a pattern formed and stored from sa,llples of said frequency components during a sc~lu~lllially pl~,C~.li..f~ data ~c~llicition period. Where the tlomrl~te pattern colll~lises a previously s~mrlçA and stored pattcrn, a step may be provided of forming a second pattern from s~mrline the ~ ucn~ com~o~ s during a further data ~cy.~;~;l;rnperiod,andc~...l,..;.~saidtçmrl~tcpatternwithbothsaidfirstandsecond p,.l(~.. c to ~,tl .. i.\c the possiblc ç~ e of a high hll~c~ e fault.

A step of cn..r;....;..e the Ç~ c'~'4 of a high ;...~e~ e fault may also be ¦ SUBSTITUTE SHEET ¦

WO 94/01910 ;~13~ l~SiS PCI/AU93/00342 inrluderl, eo~ lising analysing a sequenee of ehronologically s~mpls~t data from at least one of said plurality of frequeney co~ o~e.~Is to dcte....;..r whether them~ituAes of the at least one frequeney co.n~oncilt is mort~ teA at twice said fi~ntl~mental frequeney.
The present invention also provides a high ;...I c~ r4 fault or arcing ph~nomPn~n detector for use in an çleetrir~l distribution system inrluAing at Ieast one eleetrieal feeder line for C~llv~illg AC ele~1licily of a r.. ~ t frequeney, said Aetector eo~ `g-a. mnii;I~.;.. g means for mO.,;IQ~ g eleetrical signals on said at least one electrical feeder line;
b. filtPrin~ means for i~ol~ting a plurality of ~I~Att~-~...;..rrt frequency components from the monitored electri~l signals;
e. wei&hting means for scaling the ..~g~ udes of said plurality of 15 pre~ct~ ...;..td L~ ~u~ --c;y co--.po-lcI-ls aeeording to seleeted sealing faetors;
d. co...I...;~o.l means for e~...I...l.~g said sealed m~itudes from a first data ~c~ ;on period with the sealed m~nitucles from a ~I~ ef. li.~g data acquisition period; and e. deteeting means for detce~ g the oc~;ull~LlcG of a high i...peA~. If'4 fault 20 or areing phf ~oI~-el~o~ on said eleetrieal feeder line on the basis of said CQIllp~ Oll An Plectri~ ol~tioTI switeh is also provided by the present invention for use in an elec~ l di~Ilibulion system in~ ting at least one electr~ l feeder line for co..vc;~mg AC ele~ ;Iy of a r~ A ....P.nt~l L~lu~ , er....l~ g:
25 a. mo..;~ g mcans for mol~;lol;l~g electri~l signals on said at least one eleetrieal feeder line;
b. filtering means for i~ ting a plurality of pred- l A L~ ~luel~ eo~poneI~ts from the mo~ o~ clc~-;c~l signals;
c. weighting means for scaling the m~itude~s of said plurality of pI~ lcl~ --in~tl 30 frequency CO.~ f .ts according to selec~ed scaling factors;
d. COl--~ Qi- means for Comp~il~g said scaled m~itudes from a first data ~cqui~ition period with the scaled m~nit~lAPs from a pI"c~li"g data acquisition ¦ S~ JTE SHEET ¦

W O 94/01910 21 3 9 7 5 5 PC~r/A U93/00342 period;
e. cl l~,c~;..g means to detect the possibility of a high impedance fault on said electrical feeder line on the basis of said co...~ o.~ and to geL~ te a trip signal if the possibility of a high i...pc~ 4 fault is so dçtectç~l and 5 f. ~wil~,Ling means to çlectrir~lly isolate said at least one electrical feeder line from the source of said AC electricity upon g~ lioll of said trip signal.

~ e present invention also el~....pA~scs an rlc~ trihlltil)n system C~ IJ~
a source of AC elecllicily of a fim~l~m~nt~l frequency;
at least one electrical fceder line coupled to said source by way of switching means capable of elect~ir~lly i~ol~ting said at least one çlectrir~l feeder line from said source upon receipt of a trip signal;
mo..;lo.;.~g means for mo~ o~ g electric~l signals on said at least one 15 electrical feeder line;
filtPring means for icol~tin~ a plurality of pre~i~ t~ .--;ncd frequency COInpOllC,lllS
from the mollilol.,d electrical ~
weightin~ means for scaling the ~ g..;~ ~,des of said plurality of predçtPrmin~dfrequency compol~ ls accordi.l~, to sele~1~ ;1 scaling factors; and co.. p~ means for c~.. l.~.;.. ~ said scaled ma~itur1~s from a first data ilion period with the scaled m~it~ldes from a pl~.C~ g data acy-lisiLion period, and to issue a said trip signal to said :iwil~llillg means if said c~ ...p,.. ;~Oll inrlir~tPs the possibility of a high ;...pe~lAi-cG fault on said at least one electrical feeder line.
In order to more easily f~cilit~te the c4...~ 0.. of thc scaled m~nitudes during sequential data ~r~lnicition periods the scaled m~itlldçs of the plurality of pl~,det~llli..f~cl frequency colll~onc~ during each data aç~ ;on period are preferably :,--------e~l, and the sums of said scaled m~ ;lucies are comparcd by said 30 co...l.~..~.- means.

The ~l~P~ provided by the present invention preferably incl~ s a sample ¦ SUBSTITUTE SHEE~ ¦

WO94/019lO 213!~ 7 5 5 ` PCr/AU93/00342 --and hold device, a threshold device, and a s~, ...;..g means, wl~ b~ the scaling of the m~gnit~lde of a given pre~1et~ . ~;.\fd frequency colllponellt may be collvcniently achieved by det~ i -; g and ~IIIIIIIIillg the number of times during a data acquisition period in which the sampled magnitude of the given fi~lucll~ colllpoll~llt exceeds a S selected threshold, and multiplying the res--lting sum by a scaling factor COll~ spollding to said given frequency colll~ollc,-l. The S~ i..g and scaling of the predetY ...;..rd frequency colllpon~ s may be collv~ni~ ly carried out accordillg to the following f~rmnl:~

X = ~ Wi (~ (SV ~ T~!) Where: X is the weighted sum of the fi. .lu~ll~ colll~on~.lls, n is the number of frequency colnpon~ s, Wf is the scaling factor for the frequency C4l~.pO~
m is the total llulllber of samples during a data ~cqni~itio~ period, Si~ is the sample m~itucle for the L~.lu.,-l~ C4...pO.~ , and Ti is the individual threshold for each L~luell~ co.llpol~

To enable a better nn~ of the w~nhillg of the present invention a preferred embodiment thereof is desc~rihecl in detail h~e~ rl~ by way of exampleonly, with lcftlcllce to the alcQl..p ~yhlg dla~illgs, wh~,cm:
Figure 1 shows a tli~gr~mm~tic ~le,s~ ;on of a typical high i.,.l e~
arcing fault;
Figure 2 ill,i~;l. .~. s a cl- - t~ ;~lic of high i~ c~ .rG arcing faults;
Figure 3 ;I1~J~ S sen~ing circuits of the plc~.l~ embodiment of the present invention;
Figure 4 shows a block diagram of the appaldlus of the p,cf.,,l~d embo-lim~nt;
Figure 5 shows a more clet~ilP~ block ~ " of the cil-;uill~ of the preferred embodiment;
Figure 6 ill~ . 5 an rY~mple of a filt~ circuit of thc preferred embodiment;

¦ SUBSmUTE S~IEET ¦

W O 94/01910 2 1 3 ~ 7 S 5 PC~r/A U93/00342 Figure 7 ill..~l.,.t~s sampling and digital collv~ ion cL.;uib;
Figure 8 illustrates a digital m~mrric proce-ssing ~rr~ngem~nt for use in the p,cf~ d embodiment;
Figure 9 is a block diagram of output circuits of the plcrell~ d embodiment;
Figures 10 and 11 illustrate the use of pattern recognition in the preferred emborlim~nt;
Figure 12 shows an ~ s~mple of sampled wa~cfOlllls during an arcing fault;
Figure 13 is a cimplified flow chart illu~llalhlg the ~locess~ utilised by the plcfcll~,d embodiment;
Figure 14 is a more detailed flow chart of the process flow chart illu~llatcd inFigure 13; and Figures 15a to 15f illustrate an esr.npl~rily ~ ic pattern COI..p~ ;~
process for thc fault sit~tion ill~ cl in Figurc 12.

Figure 1 is a srhem~tic fli~gr~rn of a typical çlertrir~l distribution system 1 which may be arr~ d by high ;---1~c~ r4 arcing faults. A source of AC electricity 2 is coupled through a t. .i~ro~ 4 and protectio~ ch.;uill~ 3 to an electrical feeder line 6 which 1. . Illill~tl,S at an f le~ . ;r,.l load 9. The feeder line 6 may typically be a three phase, three or four wire distribution feeder, or may co~ ise a single phase two 20 or one wirc line. As illu~hahd in Figurc 1, at some point along its length, the feeder line 6 is so close to a ~o~ ed high ;Il.l,e.'lAl-r~ object, such as a tree 10, that at least one wire of the feeder line 6 may to come into contact with the tree 10. This isintlir~ted in Figure 1 at a fault point 8, c~ a high in~l.ccl~ .re fault bc~ n the feeder line 6 and the high i...l.ccl~..r~. object 10, by virtue of an electrical arc 25 thereb~ Cll. nG-~ se the arc CUllClltS in such faults are often quite small, such faults often escape t.;p~i..g over current prol~,~ion devices of thc protection cil~;uilr~ 3.
However, cven relatively small arcing cull~ s can ~.~ tC a large amount of lor~ e(l heat build up, which may in turn result in an . .l~lc~;.<.blc b~sllrilc.

Detailed analysis of the çle~ic~l les~ e of çlectrie~l distribution systems to arcs has revealed that signals of many di~lcllt freq~lenries other than the f~m~l~mental frequency of the electrical system are ~,. ne,~ d during arcing. Tests have revealed ¦ SUI:~5~ ITE Sl-IEET ¦

?1~9755 WO 94/0l910 PCr/AU93/00342 that h~rmonie signals gpner~lly hlclcase during the occLllcilcc of a high hnpcd~ulcc fault, and that the amount of hlclcase of h~rmonie frequeneies varies under dirrclclll power system and fault eonditions. For example, the harmonies g~ neldlcd by a high hllped~lcc arcing fault have been shown to be affeeted by physieal and envilo.""ent~l 5 variables such as feeder er~nfi~lr~tion, shapes of objeets at the fault point, fault nature, load type and level, and prevailing weather.

The shape of objeets at the fault point, such as tree or eollclete road, is an hllpolldlll faetor which affects harmonie contfnt If the fault point is sharp, it may 10 result in point to point areing, however if the shape is flat then areing may result over a large surfaee area. These .li~clclll types of areing eonfi~lration~ have been shown to gene~ate dir~clclll levels of L~u~ll~ signals.

C~p~ ol banks (not shown) whieh may be co~ at one end of a feeder 15 line ean also affeet the r, ~ ~luel,.;y signals cletectable at the point of plol~lion circuilly 3. High frequeney signals, for example, ean be shllnte(l eæily by r~p~cilor banks, whieh present very low illlpe~ re to sueh high frequeney ~ le. On the other hand, low frequeney signals ean pass ~pae;lo- banks mueh more easily.

It has also been found that the fi~ ~luen~ cl~.. po~ e whieh appear ae a result of an are appear only ;..~ ly, mod--l~tecl at twiee the r..~ l AC
frequeney. The eause for the i..t~ nature of L~.luc,l~ eonlpon~llls res--lting from an eleetrieal are ean be co.lv~niently deserihe~ with ~cÇc~cllcc to Figure 2. The wdv~fo~lll 12 illu~hdl~d in Figure 2 shows a shlusoidal souree voltage waveform 25 whieh may be found in an eleetrieal distribution system under normal opcldling eon-litio~ The eurve 14 shows the voltage wdvGfo~lll whieh oeeurs as a result of an areing fault. As shown in Figure 2, areing begins at points A1 and A2 near the voltage peaks of the sin--~oi-l~l wdvcollll, and eease at points B1 and B2 l~s~eelively, when the voltage beenmes too low to sustain the are. This results in two arcing 30 periods 16 during whieh areing eurrent flows to ground, e~ ing the feeder voltage to notie~hly drop as can be seen in Figure 2 where the curve 14 is lower than the collcs~o..lli..g eurve 12. Areing oeeurs twice for every single eleetrieal cycle, ¦ SUtsS l l l UTE SHEET ¦

WO 94/01910 213 9 ~ S S PCI/AU93/00342 res-lltinp in a chal~c~ ;c hArmlmic frcquency which is twice the ftln-lAme~
f requency.

In consideration of the above, the preferred embo-liment of the present S invention pl~sellls a system for detectin~ the pl~sence of an arcing fault by ut~ in~
the electric~l Ç1~A ~ 1 ;rc of such high ;III1-e-1AI~I~4 faults, namely the ~- sence of a range of frequency Co~o.~ tS other than the r~ Al L~,~uen-;y, and the nature of the ~l-scllce of such frequency co...l,o..r.l~i during a high illl~e~cc fault. A group of frequency components for use by the preferred 10 embo-liment has been found in which the combination of detc~l~d co~ ontllls can realise a high acculd-;~r of fault detection, in spite of the fact that each component when c~n~idered alone has dldwbd._l~s for ~letectin~ faults. ~n particular, the preferred embodiment det~ s the possibility of a high ;...~e~1A .re arcing fault on the basis of eight sign~l~, namely:
Vo zero - se.lucllce (SOHz) voltage, V2: second harmonic (lOOHz) voltage, V,: eight harmonic (400Hz) voltage, V~: high frequcncy (2KHz - 10KHz) voltage, Io: æro - sequenre (SOHz) current, Il: low L~ ucll;y (120Hz - 130Hz) current, I3 third hAnnoni~ (lSOHz) current, and L: eight h~mlonic (400Hz) current, In order to ~ tin~ h bel~ signals present during normal system operation 25 and those r~slllting from arcing faults, the selected signals are based on frequency coln~o~ which have been found to show a ~igr if i~nt illcl-,ase when arcing faults occur under a wide range of di~clll system c~n~litit nc Four voltage signals andfour current signals are used as the detecti-m criteria in the preferred embodiment.

Zero sc~l~,r ~ voltage and zero sequen~ current signals have tr~litionAlly been used as ~A~..elr-.s to detect nnbAlAn-~ed faults. It has been found that these signals are not sl~ffl~i~nt alone for det~;.g arcing faults, but can add valuable ¦ SU~S ~ JTE SHEET ¦

WO 94/Ol9lO ~ ~ 3 9 7 5 5 PCr/AU93/00342 inform~tion to assist the final detection of an arcing fault in a four wire feeder. In a well b~l~nre~l power system, zero sc.luenc. voltage and current may increase when arcing faults occur. ~ litinn~lly, zero sequenre voltage and current may be used to detect the direction or position of a fault by co.~ the angle b~ two phases.
s Low frequency signals r~nging from 120Hz to 130Hz have also been found to be of significant i~pGll~nce in ~ietecting arcing faults. The relative h clease in the m~gnitl)de of signal frequrrlriPs in this range is large enough to be easily ~letecte~l under arcing fault c~n.liti- n~, since these signal frequenries should be zero under 10 normal op~ Lllg contlititm~. Another advantage is that signals at these low frequencies will exhibit little ~ ion from ~l a~ r banks present in the di~llil~ulion system.

A third h~rmonic current colllpoll~ ,ll is useful and a ~letection rriteri~, 15 particularly if the ~ trib~tion loads are CQlll~ i in delta eonfigl~r~tion and for three wire distribution circuits. ~Ith~ gh the third h~rmonic current can exist in relatively high ~mplit~ Ps even under normal system op. ~ h.g contlitionc, it has been found that the h.clcase of the amplitude during an arcing fault is s~fflciçnt to assist ~lPtection.

Eighth h~rm()nic voltage and current signals have also been found to illcl~ase reln~rk~bly during arcing faults. Tr~lition~lly~ odd h~rml~nirs (t_ird, fifth and so on) have been considered to be the best intlir~tors for arc riçt~ .., since they arepl~ do...;.-~-lt in ~mplitude during arcing. However, tests leading to the construction of the ~JlC~C~lC;I embo~iimp-nt have ~ e~ ily shown that the relative amplitude 25 hlclcase of even hallllonics, çspeei~lly the eighth h~rmonic can be larger than the relative ~mplitude illcl~,ase of many odd h~ ol~irs This results in the eighth h~rmonic being one of the best inrlir~tc)r~ of arcing faults under all system conditions.

High frequency current colllpol~ inrlll~es all signals in the range of 30 appl..x;...~ ly 2kHz to about 10kHz whieh exists in the protected power system. It has long becn known that high ~quell~ current ~ lc, particularly abovc 2kHz i,lc~ases significantly under arcing con~lition~ A disadvantage of such high ¦ SUt~ lulTE SHEET ¦

WO 94/01910 7 ~ PCI`/AU93/00342 frequency signals is that they cannot ~en-or~lly propagate long '~ `GS (greater than about 20 miles), particularly through feeders provided with filtrring ~ ol banks.

The eight sPlecte~l frequency components each ~ ru. .~ di~-e,llly during an S arcing fault, although in general all of them exist and inc~ ase during an arcing fault.
Furthermore, some frequency components may i~lCl~ ase more in a first power system c~n~litinn, whilst others illclease more in a second system c~ ;n.. For eY~mple in a rli~trihution power line provided with fil~çring c~p~cilor banks, the amplitude of the second h~rmonic signal may be detecte(l to hlclease relatively higher than the high 10 h~rmonic signals which get easily ~ lcl to ground through the c~ c;l~l banks. The plcr~ 1 embo-limrnt, thc.cfolc, employs scaling or weight factors for each signal, which may be altered (lepe~ "g upon the system cQ~-lition~ prevalent at the particular distribution feeder.

For example, in a feeder provided with ~hlmting ç~r~ritQr banks the weight or scaling value for the second h~rmnnic signal should be set higher than the weight value of the high ~ ucn~y ci~l~, since the second harmonic signal will increase relatively greater during an arcing fault. The ability to change weights for theindividual signals allows the high i-..pe~ fault ~tcc~nr to be adjusted according 20 to the ~ tributinn system upon which it is to be employed. The adjustable weighting values in the plcr~.,d embo~... r- .~ also enables the fault dct.cto~ to be easily readjusted after in~t~ tion, to adjust for ~ ;O~ in the ~ . ;hill ;nn system, or to provide an o~ollullily to hll~ ve the ~cc--~cy of detc~;o.. by Iç~rning from theresults of previous arcing faults.
Figure 3 illu~llatcs a typical three wire three phase di~llibulion feeder 18, and the preferred ~rr~ng, - -.- ..-~ for mn. .;~.~. ;..g the voltage and current frequency co",po,~ ts utilised by the plcrc.l~l fault detector. A voltage ...o..;~o. ;..p: circuit 20 cn~ g a three phase r~pac;lol voltage llallsÇolll~ 21 senses voltage signals V"
30 Vb and Vv whilst a current ...o~ .;..g circuit 22 co~ g a three phase current ro~ 22 senses current signals in the three phasc wires.

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WO 94/01910 ~ 13 9 7 5 ~ PCI/AU93/00342 ---- 14_ Figure 4 shows a block diagram of the preferred high impe~l~nre fault detector 34, which co~ ;ccs five main colllpoll~ s: input circuits 24, active filter system 26, digital processing cilcuill~ 28, a micro processor control unit 30 and output circuits 32. The ~lnrtion of the fault cletector 34 is to detect the pl.,sellcc of high i-l-~ed~.ce S faults bæed on procrccing of l~ c~iv- d voltage and current input si~lc. ~n S~mm~ry, signals are derived from the di~lfil)ulion feeder 18 by way of the voltage rn~ ol;ll~
circuit 20 and current mo,~ circuit 22, and are reduced to a level which is suitable for lllcasulcl..~ c. Frequency Cf~ pQ~ C are selecte~1 from the derivedsignals by individual filters of the active filter system 26, and are passed to the 10 microprocessor control unit 30 after being s~mrLP(l and digitally collv~,l.d by the digital processing ch-~uill~ 28. Analysis of the input signals takes place in the miclo~loccssor control unit 30, following a detection scheme which is explained in detail he~ei.laflci. The results of the analysis is then utilised to operate a control system such as isolating relays by way of the output circuits 32.
The input circuits 24 of the detector 34 receive the voltage and current signalssensed by the voltage mo..;lo.;.~p circuits 20, 22, and act to reduce the voltage and current signals to levels which can be comfolldbly handled by low voltage cilcuilly.
The level of re~ ction may be 7cc~",plished by any collv~ni-llt method, and in the 20 preferred embodiment c~ es step down ~ ro~ el~ (not shown) and l.~ ,ls (not shown) for the voltage sigJl~lc, and for the current signals CQ~ f S a step down lldll~îo~ r (not shown) and an op-amp (not shown) co~rled to convert current signals to more coll~ ient voltage signals.

FiguN S shows a more detailed block .li~.,.. of the fault ~letector 34, illu~lldlhlg the colnpolle.l~s of the active filter system 26. Each signal component, except the zero se.lu~llcc co...l~o.~ c which are at the ru"~ l frequency, are - selected by individual filters 36. Figure 6 shows an ç~mple of a band pass filter 36 which is utilised in the ~lcfcll~d emborlimpnt The filter illu~llat~d in Figure 6 is a 30 fourth-order band-pass Chebyshev e~cc~decl biquad filter, which c~hibils ~Ycelle~t tuning features, and is capable of ol,l~hling Q factors of up to 100 or more. The individually filtered frequency co~npon~ s are then put through an amplitude ~ SU~S l l l I JTE SHEET ¦

WO 94/01910 2 1 3 9 7 ~ 5 PCI /AU93/00342 a.lj~ cl.l stage 38, before passing to thc digital ploce~ stage 28. ~lthol~gh the analog filters utilised in the desçribe~ embodiment pclrd.uu well, digital filters may vcly be used if required.

S Figure 7 illu~llalcs a block ~ gr~m of the digital processor 28 selected for the preferred embodiment, which is based on products ADC0808 or ADC0809 of the National .~mic~uctor Corpor~ti tn Thc eight analog frequency component signals from the active filters are i..pult~d to an eight-to-one analog ml~ltirl~çr 50 which is ~lorl~(l by signals from the miclo~loccssol controller 30. The signal output of the 10 multiple~er 50 is passed to a sample-and-hold circuit 52, which s~mpl~s the analog input signal and passes the sampled m~nitucle to an analog-to-digital coll~clsion stage 54. The sampled analog signal m~gnit--de is there collvG.hd to a digital number, which is passed to the mic~o~loccssor controller 30 for further plocess;~g and analysis.
The miclo~locessor controller 30 is based upon a Motorola M6802 microprocessor 56 and a block diagram of the main con~ol.clll~ of the controller 30 is illu~llat~d in Figure 8. Briefly, the llliclo~lvcessor 56 is coupled to non-volatile memory 58 and read/writè RAM ll~elllGl~ 60, and also to a progr~mm~ble input output 20 port device 62. The digital plocessillg and analysis ~locedu~s which are carried out on the fiigiti~ LG~1U~.U~ coll.po~ t signal data by the miclo~l~cssol are stored as instructions in the non-volatilc memory 58, whilst the RAM UI~l~Ol,y 60 is used for storing y.~ intljc~tive of the operational history of the ~ tributinn system. The plo~ulllablc input output port 62 is used both to receive the ~ ti~ecl frequency25 colllponc.lt signals from the digital processor 28, and also to issue instructions to the output Cil~uilly 32.

After the input data have been analysed by the microprocessor, instructions may be issued to thc output ~;hcuill~ 32. The filnction of the output chcuilly 32 is 30 to link thc ~uiclo~loccsjor control system 30 with the control system in the electrical distribution sub-station, such as icol~ting relays for i~ol~tin.~. faults on the relevant distribution heders. A block diagram of the output cilcuill ~ 32 is illl~llal~ in Figure ¦ Sut~s~ ITE SltEET ¦

WO 94/Ol9lO i i 3:9 7 5 5 PCI/AU93/00342 9, which COlll~liScS deco~ling circuits 64, relay driver chcuilly 66, and message indication circuits 70. The instructions from the microploccssol controller 30 are tr~n~l~terl by the ~leco-ling circuits, which may provide m~C~,es to the op- ~to-~; of the distribution system by way of the mçs~ge indication eircuits 70 whieh may S inelude indicator lights inrlir~ting nor nal or abnormal operation of the feeder line.
When analysis of the input data in~lir~ttos a high hllpeA~ areing fault, the fault deteetor 34 is also able to trip the ~;hcuill~ breaker or relay of the feeder by way of the relay driver eircuits 66, in order to isolate the fault. The types of ..~ess~
indicators 72 which may be available include in~ir~tinn~ of: di~lulb~lce on the 10 feeder; arcing di~Lull~allc~, on the feeder; high hl,pe;l~..r4 fault; solid ground fault; and relay tripped.

The ~etçction methodology of the preferred embodiment relies to a large extent upon the data processing which takes place in the microprocessor controller 30. The 15 eight signals, VO~ V2, V8, Vh, Il, I3, I8, and Io~ are seql~enti~lly selected using the eight rh~nnel multiplexer 50, following isolation by the active filter portion 26. The overall speed of the analog-to-digital collv~.sion in the preferred embodiment is 10kHz,which equates to 1.25 k~ for eaeh of the eight signals. Further, a data ac~u;~iL,on period of 20 milli~eer-n~ls is seleeted, which is equivalent to one period of the 20 hm~mental frequency (50Hz) of the power system. The.erole, after the digital collvc.~ion, the micro~l~,cessor l~.CciiV~s 200 samples (25 samples for each signal) during a given data ac~uisilion period.

The data procç~cing earried out in the mieroprocessor controller 30 follows a 25 process of pattern fnrming, pattern reeognition, and pattern analysis to detect a high hllped~ce fault. This is ill,.~l ",tecl in Figure 10, which shows data inputs 76 resulting in pattern formations 78, which leads to pattern recognition 80 and pattern analysis 82 to enable a final decicion at stage 84. The pattern f~nn~tion stage 78 eo~ es scaling the individual samples accordillg to the wei~hting factor co~l.,sponding to the 30 frequency coll,pone"l signal from whieh the s~mplçs have been taken, and ~rr~nging the scaled samples of each signal in a les~eclivc chronologic formation. The ~rr~nged scaled samples co",~ e a pattern, and the formed pattern may then be stored in ¦ Sut~ 111 UTE SHEET ¦

W O 94/01910 2 1 3 9 7 5 5 PC~r/A U93/00342 memory, and infnrmAti~m about the distribution feeder can be up-lated by up-l~ting the pAtternc stored in memory. Each pattern CO. jl A j. .C information about the feeder during the COll~ sponding data acquisition period. By continl~o~cly sampling the frequency component signals and forming and stoAng pAI~ c cha~ ic thereof, the S mi.ro~loccssor controller 30 is able to cn ~ A1ly update available information about the o~claLing status of the feeder line. Since only a limited number of pAttçrnc can be stored in memory at any one time, pæt history ~AIlr~c may be Ovcl~lillcll by more recent ~ -c.

Figure 11 ill-.cl.~,tcs a block rliAgrAm of a pattern storage memory, accessibleby a CPU 98, and cn~lA;~ four pattern storage areæ 86, 88, 90 and 92, labelledpattern No. 1 to pattern No. 4. The pattern recognition stage 80 involves the cn.~-pA. ;co.~ of ~t~. ..c stored in one or more of storage sectionc 86 to 92 contAining sequential ~Atl~...c, to detr...~ e the extent of change of the frequency component 15 signals over a peAod of time.

The pattern analysis stage 82 of the ~etectinn methodology involves the analysis of each pattern by ç~ ~he~ r signals l~ e-.le~l exist interTnittently, which is indicative of arcing.
The process of detectiQn can be divided into several sub-processes, and a cimplifie(l flow chart 108 of the ~letectit)n process is ill~ ed in Figure 13.
RAcicAlly~ the cl~ tc~ system keeps ~ thc ;..r,.l...A~.O,. about the ~lotc~led feeder, by cQ...l-A~ newly acquired data with the pnccc~ data, as illustrated 25 se~ ir-lly in Figure 11. When an arcing fault occurs on the di~llibu~ion feeder the cletectiort scheme of the ~lcf~ d embodiment will detcct a di~lulballcc first, and then with further ~locecc;llg ~cte-..~ e whether the di~lulb~ulce is a fault.

Thc PrC~t11e~d dete~ion systcm can also ac~;ulalely detect solid ~ound faults, 30 such as line to ground faults and doublc line to ground faults, which are more serious in terms of the sc~clily of thc fault CU~1C11I~ and should be .1;cc~llllc~tcd immediately.
These type of faults are cnnciclered first, to enablc them to be ~1etected and cleared ¦ SU~ JTE SHEET ¦

WO 94/Ol9lO ~ 1 3 9 7 S 5 PCr/AU93/00342 quickly. High hllpCdal~CC faults have low levels of fault current, and can be tolerated by distribution ~y~t-lls for a few secon~ls.

To avoid micllnr~ , the term ~i~lu~b~lce is chosen to describe an 5 abnormal situation on a distribution feeder before the situation is col.ri....ed as a fault.
That is to say that a ground fault can be detected first as a di~lu,l~cc, and then can be co..r;....ed as either a solid ground fault or a high Llped~ce fault.

A key process in the detectif~n of a di~lull~ce by the plGfG~l~d embodiment 10 is to CO111P~G two P~ formed before and during the oc-;ullGncc of a high impe(l~n~ e fault. Data is sequenti~lly sampled in groups of 25 samples per signal, and formed in p~ttem~. During detection, first and second p~ttemc are sampled and formed in a sequence, and co..~p~ ;con of the second pattern with the first takes place.
The result of this co,..p .. ;col~ or pattern recognition d~ s whether the system has 15 been di~lu~lJed.

A pattern threshold is used for me~llring the di~treilCe. bGiWGen p~llt~ . If the difference b~ l thc two p~ is larger than the pattern threshold, a dislulbal~ce is in~ ted since the change of p~ll. -..~ is too large. If the diL~tlc-lce is 20 small, then this in~lic~tçs acceptable 11. ~ ;ons in the normal op~ g condition of the feeder. The first of the p~ is then erased and the second pattern will take the position of the first pattern. Then a new pattern will be sampled and placed at the position previously occu~icd by the second pattern. With lefclcllce to ~igure 11, the oldest stored pattern is referred to as pattern No. 1, with sequentially newer ~atl~
25 stored as p~tt~ Nos. 2 to 4. The same routine of cQI~ ;co" of pattern No. 1 with pattern No. 2 then again takes place.

The ~lct~ ;o~ of a value for the pattern threshold can be liffirult A
di~lulb~cc can happen at any time in a pattern forming process while the 30 microprocessor is sampling. If a ~ ullJaL~cc occurs in the middle of pattern No. 2 as shown in Figure 12, the diL~e.,ces l~c~. c~ pattern No. 2 and pattern No. 1 or pattern No. 3 and pattern No. 2 are all very small. To tell the di~-encc properly, the ~ SU~ l UTE SHEET ¦

~397~
WO 94/01910 ~ ~ PCr/AU93/00342 threshold should be very small. However, using such a small threshold can result in a false trip of the fault detector where the threshold is exceeded by detection of noise under normal op- ldlillg conditions without a di~lulballcc.

Figures 15a to 15f illustrate dia~.. ~ ti~lly an example of a pattern col..p1.icoll process for the citll~tion illuctr~tefl in Figure 12 where an arcing fault occurs during the data ~c~-~ic;linn period of pattern No. 2. For the p~ OScS of ill~-str7.tjon each pattern is formed from 4 frequency colllpoll~ s (C~, C2, C3, and C4) with the height of each co~ onel.l lc~l~se .~ g a measure of the m~gnih~de of the 10 COll~ spc)lldillg electrical signal frequency component in the distribution system during the data acq~ ition period for the pattern. Figures 15a, 15b and 15c illustrate respective p.ll~...c formed during the data acqnicition periods 100, 102 and 104 of Figure 12. Figure 15d illu~llatcs a threshold pattern for the particular distribution system. The threshold pattern is set to infli-~te a system di~lull~allce in the event that 15 two measu~d p~tlt. ..c differ by an amount greater than the threshold pattern. Figure 15e illusllatcs the dirrelcllce belv~ ~ ll p~ 2 and 1 as COlll~a~ d with the threshold pattern, which illu~llat~s that no di~lulb~lce would be found in this me~ul~ment.
Figure 15f, on the other hand, illu~hahs the dirr~ ce b~ en pattern 3 and 1 as colllpalcd with the threshold pattern which illu~llal~s that in this case a system 20 di~lulbance is in~lic~t~rl A suitable llleasulc; of the m~itucle of the electrical signal frequency colllpollcllls, for the purposes of forming the p .ll~ ..c, involves tallying the number of samples of a frequency component which e~cee~lc an individually set threshold for that ~ uCl~ ;y component, as described in greater detail hereinafter.
Clearly irl a pattern co...p~ o~ of the form ;11IJ~ C1 in Figure 15, the weighting or 25 scaling factors need not ..~c~ j~ .r;ly be applied to the mcasul. d pattern colllponents, since this scaling can be acco~nl~cd for in setting the threshold pattern.

To avoid mal-operation of the plot~ ~ion system, pattern No. 3 as shown in Figure 12 is also eY~min~cl by the microprocessor controller 30. This group of 30 samples helps the microprocessor to make sure wLelh~r or not a ~ lulballce has occurred. T},~lcfo~e two pattern thresholds, a Low Pattern Threshold and a High Pattern Threshold are required, and three groups of samples are used for finding a ~ SU~S~ JTE SHFET ¦

WO94/Ol910 21~9~ PCr/AU93/00342 --di~lullJ~lcc. With reference to Figure 12, the High Pattern Threshold is used inco...p..;..g the dirrc.~llce bclv~ pattern No. 3 and pattern No. 1, and the Low Pattern Threshold is used in co..~p~ g the dirr~lel~cc bcl~ pattern No. 2 and pattern No. 1.

The use of two pattern thresholds results in higher precision and reliability for the detectinn sc~-me. The value for the Low Pattern Threshold can be set low enough so as to not miss a small ~ lullJanc~ which may occur during a high impefl~nre fault.
The value for the High Pattern Threshold can be set high enough to make sure proper 10 reliability is achieved in not detectin~ non-fault related flnrtu~tionc Very small di~lullJdllccs which are not caused by a power system fault will not pass this stage.

The High Pattern Threshold is used to check a di~lulbal~ce detecte-i, by the Low Pattern Threshold. Pattern No.3 illustrated in Figure 12 is s~mpled totally during 15 a di~lulb~ce sit~l~tion~ which occurs during the time when pattern No. 2 is $ill in processing. The High Pattern Threshold which is used to lllea~ure the dirrtlence of Pattern No. 3 and Pattern No. 1 can be set relatively high and this high value is able to stop detection of very low levels and small ~ ti~n noise value (less than onecycle). Thefefole, the combination of the two thresholds give both high precision and 20 reliability for this first step of detec~ g a di~lulb~lc~.

In fact, the first step may be considered as two parts. A small noise which can ovclcollle the Low Pattern Threshold and cannot OVclcOlllc the High Pattern Threshold is named an event, and a large noise which can ovclcollle both thresholds, is called 25 a di~lulballcc. Event içtection and di:ilull~lcc ~iete~ n are the two parts of the first step of ~ietection utilised in the preferred embo~lim~nt The second step of ~letecti(m is the pattern analysis. As m~ntionecl above, the use of the analysis of the ;~ c.~t nature of an arc can hll~ lOVc the cletection of 30 an arc. In other words, the ~ of an arc can be co..r;....e~l after the pattern has been analysed.

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WO 94~01910 ~13 9 7 5 5 PCr/AU93/00342 The reason for this can be stated as follows. If the noise has been found as di~lull,~ce using multiple parameter ~letection and the arcing nature has been found using pattern analysis, the noise must have come from an arc. There is nothing but an arc that can create frequency colll~ollelll noisc with the periodic characteristic S where multiple frequency parameters are rletected to be on and off under a certain frequency rate (1OOHz), as is (1;~c~J~sed above.

A further ~liffi~-1ty ~ .cou..t~ ~- d in ~letecting high ;...ped~ arcing faults is that an arc which is cletected by the system is not always related to an arcing fault.
10 The two steps of ~etection explained above col~r;~ the ~ n~ of an arc in the protected feeder. However, the arc does not always occur as a result of a high ;---l e~ r~ fault, since other non-tlet im~nt~l con~itir)n~ exist which lead to arc g-,n~lalion in power systems. For çY~mple, operations in power ~ySlclllS such as~wilcllillg on or off of circuit breakers can also provide arcs which are detectakle in 15 the di~tributi()n system. This means that a letected arc needs to be confirmed as res-11ting from a fault, and this co..~ s the third step of the detection scheme. An arc in the power system is called an arcing dislull,ance before it is confirme-l by the detection system.

The meth~-l used to tell the di~l- ncc b~ n an arcing fault and an arcing di~lulb~lcG is based on LlloJI,c;l-~ a time delay. Normally, an arc caused by normal system operations lasts only a short time because modrrn circuit breakers in particular work very fast. For r~mple, an arc belv~cll two points in a circuit breaker may last less than 0.1 secontl ~n COIIlla~l, an arc from an arcing fault will last much longer 25 than that. Further, an arc on a high ;l-c~ r~ object may last more than several secor~ , even ...;.~-~1~ before it develops into a hazard such as bush fire. There is no need for protection action if an arcing fault is ablc to quickly self-clear without circuit breaking hllclv~.ltion. A short time delay in the detectio~ sch~llle can also betolerated by power ~y~lcllls because of the low ~ udes of arcing high impedance 30 fault cullclll~. Arcing faults cause low level current, which does not ordinarily affect power system stability. Finally, the fault can be detectecl by the ground fault detection relays if the arcing current is high.

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-WO 94/01910 ~,~3~ PCI/AU93/00342 The primary idea of co..r;""in~ a high imped~n~e fault is simple. By processing more samples and forming a new pattern after a time delay, the microprocessor can CO111PO1G the upd~ted pattern with pattern No. 1 which is the only one sampled before the fault. The previously ~liccllcsecl method of pattern recognition S is used for the COln~ icon, and pattern analysis is used to analyse the new pattern.
The result of these co...l .. ;col-c can answer whether the arcing fault still exists on the feeder after the introduced time delay. The trip instruction may be issued if the answer is co..r;...led.

However, the unstable nature of an arcing fault makes the co,.r;.. ~tion process ~iffl~-lt A large arcing current may change to small or even stop for several cycles because of the wind or the movement of arcing points. If samples are introduced at this time, the collr;l ,ll~tifon of the fault will fail. Of cour~se, for the situation where the arc can stop by itself and remain off penn~nPntly, no tripping is the right choice. For 15 the citu~tion where the arc persists with an unstable burning nature a failure of co,.r;,...~tion should be avoided.

Confinn~tion of a high hll~cf~ure fault becQl..f s colnrlete when two new p~tternc can be formed and used to cfJI.f;...~ the e~ c..~ of an arcing fault. They will 20 not take more time for the co..r;. ,.~tion be~use the microprocessor has to wait during the time delay. So the whole time delay can be divided into two, at the end of the first half of the delay the system ~.lrOlllls one co..r;...~tion operation, and another col ,f;., ,~tiQn operation is pel rO, . . .e~ after the whole time delay. A suitable total time delay is 2 seconds.
Solid ground faults such as line to ground and double line to ground faults have relatively large fault cullcllls coll~ cd to high hll~c~ cc fault cullcllls~ They can be detected easily since zero sc.luellce current Io will hl~ase high enough to be easily detectecl Solid ~ound faults can be detecte~l relatively quickly. In order to 30 achieve this, rl.ec~ the oc~ ncc of a solid ground fault has the highest priority in the detection scheme. In other words, in the miclo~ocessor procedures the ~etection of occu~ nce of a solid ground fault is ~ te~l just after each new ¦ SU~sS~ JTE SI~EET ¦

WO 94/01910 ~ 1 3 9 7 5 5 PCI/AU93/00342 pattern is formed. A solid ground fault the~cfole can be ~Ittected quickly. To produce each pattem, the microprocessor needs 0.02 seco~ll In a normal detection routine, the microprocessor samples cQTltinllously without a time delay except a very little time for p~lrol,lling the instructions. The time for p~lrolllling the instructions takes a few s milli~econd which can be neglected comparcd to 0.02 seco~ fort a solid ground fault can be noticed by the microprocessor in about 0.02 secor~ The time for the system to trip ~ p~.,fl~ on the ~1etection srheme used.

Solid ground faults which develop from arcing faults can also be detected 10 easily. In some cases, a fault starts with an arc which initially ~l~sellls a high hllped~lce fault and then it develops into a solid ground fault. By continl-o~sly çhecl~ing the most up to date p~ , this kind of fault can be detecte~l This is an additional feature incol~Glated in the preferred embodiment high imperl~nre fault detection srh~
The time to respond to a developing ground fault varies from 0.02 second ollw~ds. If the development of a fault has fini~hçd before the program starts the arcing fault co~r;~ ",~ti~n routine, the fault will be detecte~l in about 0.02 second. If the development fini~hPs after that, the fault will be dtt~c~l quicker, be~usc during 20 the col,ri",.~tion routinc thc micluplocessol has more free time to handle this.

I~ terms of time delay, the effect of solid ground fault detection on high impedance fault cletection can be neglected. During high ;.,.ped~..re faults, the final trip instruction will not be issued until four or five p~lle~ are sampled. After each 25 pattern is s~mple~l, a quick check for the solid ground fault takes place. It takes only several milli~ecollds for each quick çheck, and so has almost no effect on a high impedance fault ~letection in terms of time delay.

A simplified methodology for p~ lrO~ il.g the pattern recognition portion of the30 ~letection system involves combining thc weighted data fo~ning a pattern into a single weighted sum of frequency colllpoll~nts. Individual thresholds Tf may be set for each frequency component to isolate the signal samples which exceed the relevant ¦ SU~ l ulTE SHEET ¦

7~
WO 94/Ol9lO PCI~/AU93/00342 threshold. The number of samples of a particular L.,.lucll~ colllpolle.ll signal which exceed the given threshold during a data acquisition period may be utilised by the microprocessor controller 30 as a measul~; of the m~gnitucle of that frequency component. If the number of samples of each signal ç~cee~lin~ the individual S thresholds is then scaled by a weighting factor and combined with the weighteds, mples of the other frequency coll-pollents then a single ~uzullily is obtained which is ch~r~ctçri~ti~ of the weighted m~itu~les of the ~ ed frequency component ~ign~l~, This single quantity may be easily colll~ared with q~l~ntitirs o~l~hlcd during other data ac~uisilion periods to p~llll the pattern recognition function described 10 above. The s~mming and scaling of the precl~ cl L~ uell~ c~lllponellts may be conv~;niently carried out accorJ.ng to th following formul~

X = ~ W~ (~ (S~ > Tf)) Where: X is the weighted sum of the frequency colllp n is the number of L~lue~lcy components Wf is the scaling factor for the L.,.luell~ co.. lpollcllls m is the total mlmhrr of sAmples during a data ac~ k:i~;on period Sy is the samplc ~ ude for the L~ ucn~ co...po.. ~
Ti is the individual threshold for each ~equency compoll~,llL.

With reference then to flow chart 108 ill~ <,t~;l in Figure 13, the ~etection methl~-lok)gy carried out by the mic.op.~ccssor controller 30 begins at step 110, and at step 112 the frequency component signals are s~mplecl over a data ~cqui~itionperiod. 'l'he data obt~inr~t may then be stored in memory either as individual weighted frequency COlll~Oll..ll~ s~ or as a weighted sum of colll~ollelll~ as 25 desc~ibe~l above. A system di~lulbculce is detecte~l at step 114, eitber by COnlp~iSOl~
of the pattern data obl~il.ed at step 112 with pre-stored ~ dal.l pattern data, or by colllpcuison with pattern data obtained in the illlllledi~l~;ly pr~ce~ data acquisition period. If the .~-~g..;~(le of the zero sequence signals indicates a solid ground fault at step 116, then the procedure continues to step 118 where the solid ground fault may j SU~ JTE SHEET ¦

~13~75~
WO 94/0l910 PCr/AU93/00342 be collr;~ c~l and action taken to isolate the fault. If a solid ground fault is not indicated the procedure contin~Ps to step 120 where pattern analysis is carried out on the data obtained at step 112 to c:?llr;llll whether the system di~ b~-ce ~letected at step 114 is in fact ~ttribut~hlc to an electAcal arc. If an arc is collrillllcd at step 120 5 then data samples are again taken during a further data acquisition period (step 122).
A co,np~iso,l of the pattern of data obtained at step 112 and that obtained at step 122 may then c~llr;l 1ll an arcing fault (step 124) in which case a~plo~liate mrCc~ge signals and trip signals are issued at step 126.

Flc~wch~l 128 illustrated in Figure 14 l~plesc;llls a slightly more complex detection E~locedul~ which utilises the Low Pattern and High Pattern thresholds. Steps 130 and 132 l~,pr.sent the initi~lic~tion steps of the ~loccdul'~ where p~a,llet~;ls such as the individual signal thresholds are retrieved and weight or scaling factors for each signal are dPt~ r~l At step 134 it is d~ l~ Ill;l.e~l wL~ r an event has taken place 15 in the distribution system by colllp~ ol~ of two sequenti~l data ac4uisilion period p~ c with the low pattern threshold. If an event is dPtP~ninPd (step 136) the procedure colllll~lles to step 138, or else the ~loce.lure continues to monitor for an event at step 134. Once an event has been detected (step 136) the occ~ ce of a solid ground fault is rherl~P~ at step 138. In the event of a solid ground fault a time 20 delay is introduced (step 158) and the ground fault is con~ ed or denied at step 160.

If the detecte~l event (step 136) does not result from a solid ground fault thenfurther samples arc ol,l~illed (step 140) to enable ~etection of an arc dislull,~lce in steps 142 to 146. Having cnllr;ll.le~l that the di:ilulbance is due to an electrical arc a 25 fault condition is col~r;ll..ed at step 150, which results in the genc~ation of relevant trip signals to isolate the fault from the electrical distribution system (step 152).
In ~l-pe~ ;x A there is shown an ~mrle of weights, thresholds and amplitude adjustment scales which have been suc~essf ll in tests on a three wire three phase 30 distribution system. It must be bom in mind, however, that the weights indicated are by way of example only, and can be adjusted acco~-ling to ~srçr1en~e from the individual power system. Ranges of relative co,l.~ol,el,l weights which have proved ¦¦ Su~s l l l lJTE SHEET ¦

~ 3~7~5 suc~çccfi-l in practice are as follows:

VO IO I2 r3 I8 VZ VB VH

In addition, by h~ngin.~ the weight for each signal, the detection scheme has the ability of le~ . The weight values can be set for each ~lote~lion relay initially accoldillg to the previous e~perience of the utility i.-- ].I.l.,,g data collected during previous arcing faults, and can be readjusted perio~lir~lly. This ability of le~rning 10 provides an oppGllullily to hll~lovc the accuracy of the detectio~ The weight can be adjusted to suit a given utility condition without the need for ch~nging the h~dw~c, since such ch~nge5 can be implemented in software.

Tabulated and descrihed herein below are the results of a field test of arcing 15 fault detection a~paldl~ls utili~ing the simplified methodology of the preferred embodiment of the invention. The first step of the test involved mo~ g and sampling the prescribed eight signal componPntc on an electrical feeder line during normal opPr~ti~n An electrical fault condition was then in~iuced in the feeder line by severing a cable and laying the severed cable end on an asphalt s--rf~ce, this taking 20 place with the electr;-~l supply ~ co~...r~ Mo..;l~.;..g and s~mplin~ was again co.. ~ tl, and contim~ecl whilst the electrical supply was l,.c~ P~Içd to induce an arcing fault con-lition Monilolillg, sarnpling and procçccing of the signal colllpoll~,-lls colllhlL~ed during the arcing fault until an isolating relay was tripped following col.ri.."~tion of an arcing fault by the detection appdldlus.
Shown below are the m~ci",l~", voltage and current levels of the signal colllpol~llls before the fault con-litio~, and the samples thereof recorded during a cGll.,~olldillg data ac~uisilion period.

¦ SUBSTITUTE SHEET ¦

~ WO 94/01910 21 3 ~ 7 55 ~ PCr/AU93/00342 Maximum Values of Signal Components (Before Fault) VO ~0 IL ~3 I8 V2 V8 VH
(volts) (mA) (mA) (mA) (mA) (mV) (mV) (mV) o.o o 0 0.3 0 0.1 0 0 Di~ eA Samples Before Fault (Hex) VO IO IL I3 I8 V2 V8 V~ Sample No.

00 oo 00 00 00 oo 00 00 3 SlJ~ JTE SHEET I

W O 94/01910 ~13 9 7 5 ~ PC~r/A U93/00342 During the arcing fault, before the isolating relay was tripped, the milx;,..,~...
voltage and current levels of the signal components were rccol-led as follows:

Maximum Values of Signal ~olnrorents (During Fault) s VO ~ IL I3 I8 V2 V8 VH
(volts) (mA) (mA) (mA) (mA) (mV) (mV) (mV) 0.3 10 3 5 3 4 3 0.7 The s~mrles recorded during a data ac~ ;on period OCCullillg during the fault are shown below:

SlJtsSIll I ITE Sl~EET ¦

~3~7~ ` $
WO 94/01910 S - ~ P~/AU93/00342 D;~;Ce~ SamPleS DUring FaUlt oHeX) VO IO IL I3 I8 V2 V8 VH Sample No.

00 00 10 lA OE 12 OA 01 3 00 01 13 lB 04 19 02 01 18 The relation b.,l~,n the analog values of voltage and current for the signal components and the tiigitice~1 sample values are in accordallce with the tabulated collvtlsion values shown in Appendix A.

¦ SUt~S~ JTE SHEET ¦

2~ 5$ ..
WO 94/01910 PCr/AU93/00342 --30 ~

By way of example, if the individual threshold levels for the signal components are considered as zero, the pattern sums X for the above sample data may be easily calc~ te(l In effect the pattern sum X for sample data during a given data a~llisiLion S period may be ~letç~inP~l by: i) su~ g the number of samples for each signal component in which the sample value is greater than the CO~l~ spollding individual threshold; ii) multiplying each sum reslllfin~ from i) by its coll. sponding weight value; and iii) adding the weighted sums to ~lete ...;.,e the overall pattern sum X. This process is illustrated step-by-step below for the test data both before and during the 10 arcing fault, with zero individual thresholds.

Refore F~--lt i) Number of signal component samples greater than threshold (zero):

ii) Multiply by weight values:

VO IO k I3 I8 V2 V8 VH
(XO) (X1) (X3) (X2) (X2) (X3) (X2) (X1) iii) Pre-fault pattern sum: Y,b = 07 (Hex) nmir~ F~lllt i) Number of signal component samples ~eater than threshold (zero):
~ S~ SS~ TE SHEET ¦

WO 94/01910 2 ~ 3 ~ 7 5 5 PCr/AU93/00342 ii) Multiply by weight values:

(XO) (X1) (X3) (X2) (X2) (X3) (X2) (X1) iii) Pattern sum during fault: Xt = 80 (Hex) Clearly, using this strategy and the pattern sum threshold from Appendi~L A of 10 40 (Hex), a fault condition would be ~letecte~ since the di~tr~ ncc b~ Iw~ . n the pattern sums before and during the fault is greater than the threshold, ie:
Xd -- Xb = 79 (Hex) ~ 40 (Hex) (Pattern Sum threshold) In pr~ctic~ it has been found that a threshold level of 10 (Hex) for the individual signal co~ oll~n~s yields accurate fault ~letection whilst subst~nti~lly elimin~tin~ the effects of Oldillal~ voltage and current fluctuations on the detection scheme. It must be kept in mind, however, that the individual threshold levels for the signal componenl~ must be b~l~nre~l against the overall pattern sum threshold, since 20 each affects the S~llSilivily of the fault dcte~o,. This is clearly demon~lldLed by calc~ ting the pattern sums for the above sample data before and during a fault using an individual threshold level of 10 (Hex) for each coln~ollent, which yields:
Xb =
Xt = 23 (Hex) Thus, to detect this particular fault using an individual threshold level of 10 (Hex), it would be ..ec~ jc ..~ to have a pattern sum threshold which is less than 23 (Hex) (i.e. less than Xd-Xb).

.Al.~e ~.l;x B shows a listing of colll~ sorlwd~e program code in assembly l~n~ge suitable for a Motorola MC6802 rnicroprocessor, which has been developed to implement the fimrtionc of the described embo.lhllellt which are controllable by the SUB~ 111 UTE SH~Er WO 94/01910 1 3 ~ 7 ~ ~ PCI /AU93/00342 micloploccssor control unit 30.

Although the Çol~goillg description has been explained in relation to a single phase arcing fault, such æ a single phæe line CQ~ C~ g a tree or the like, the S technique and d~p~LLlS described herein is in fact applicable to a number of applications. For example, other arcing faults and ph~ ~o~ .A can be detected, such as partial discharge through high hll~ed~lcc m~fljtlm resnltin~: from leakage cull~ s in aging or failing insulation m~t-~.n~l Furthr,rmore, high energy faults such as two phæe and three phase line to line faults can be ietectecl where these result in arcing 10 bel~.", the conductors. Certain types of c.~ .."~-,l used on the electricAI distribution system can also be detected, such æ arc rl-. ..ArGs and arc welders, which can be useful for the l~,cordhlg pUl~oS~s of the electr1t~Al snrplier or for protecting s~lsilive electrical e.lu;l.."~--,t on the distribution system from any adverse effects of the arcing eqllipm~nt The foregoing has been put Çolvvdl~d by way of example only, and many mo~lifis~til ns will be app~elll to those skilled in the art without departing from the spirit and scope of the invention æ clçfined in the claims appended hereto.

¦ SU~!E~ UITE SHEET ¦

W O 94/U1910 ~ 1 ~ 9 7 ~ ~ PC~r/A U93/OU342 A PP E N DI~Y A
EXAMPLE WEIGHTS FOR SIGNAL COMPONENTS:

VO ~0 IL I3 I8 V2 V8 VH

EXAMPLE THRESHOLD FOR "PATrERN SUM" X: 40 (HEX~
CONVERSION RELATION BETWEEN MEASURE D (ANALOG) VALUE
AND SAMPLED DIGITAL VALUE

VO ~
ANALOGUE VALUE: 00 0.7 1.5 3.0 6.0 12 15 30 DIGITAL VALUE: 00 04 09 11 æ 44 88 FF
15 V2 (mV) ANALOGUE VALUE: 00 0.7 1.5 3.0 6.0 12 15 30 DIGITAL VALUE: 00 04 09 11 22 44 88 FF
Io (A) ANALOGUE VALUE: 00 .07 .15 .30 .63 1.2 2.5 5.0 20 DIGITAL VALUE: 00 04 09 11 æ 44 88 FF
IL (mA) ANALOGUE VALUE: 00 0.7 1.5 3.0 6.0 12 15 30 DIGITAL VALUE: 00 04 09 11 22 44 88 FF
I3 (mA) 25 ANALOGUE VALUE: 00 .7 1.5 3.0 6.0 12 15 30 DIGITAL VALUE: 00 04 09 11 æ 44 88 FF
Ig (mA) ANALOGUE VALUE: 00 .7 1.5 3.0 6.0 12 15 30 DIGITAL VALUE: 00 04 09 11 22 44 88 FF
30 V8 (mV) ANALOGUE VALUE: 00 0.7 15 3.0 6.0 12 15 30 DIGITAL VALUE: 00 04 09 11 æ 44 88 FF

ANALOGUE VALUE: 00 0.7 1.5 3.0 6.0 12 15 30 35 DIGl'rAL VALUE: 00 04 09 11 22 44 88 FF

~ SU~S~ ITE SHEET ¦

W094/01910 2~ 3~75~ PCT/AU93/00342 --APPENDIX B

¦ SU~S 111 ~JT~ SHEET ¦

WO 94/019l0 ~13 9 7 ~ 5 PC~r/AU93/00342 2500 A.D. 6800 Macro As~embler - Version 4.01b Input Filename : rr7.asm Output Filename~: rr7.obj ****************************
2 . * PROGRAM *
3 * FOR PO~ ~E RELAY *
4 * PART A FROM Ml000 *
* PART B FROM M
6 * PART C FROM M
7 * IRQ FROM M
8 *
9 * PART A
1080 ORG $1080 ll 0200 RAMSTART EQU $0200 12 lFFF RAMEND EQU SlFFF

14 *~:LllNGS
lS 1080 STC RMB l ;TTTT2~.CT~OT.n FOR CUT,CUTTER
16 1081 STCV0 RMB 1 ;CUTTER FOR V0 17 1082 STCI0 RMB 1 ;CUTTER FOR I0 18 1083 STCIl RMB 1 ;CUTTER
19 1084 STCI3 RMB 1 ;CUTTER
1085 STCI8 RMB 1 ;CUTTER
21 1086 STCV2 RMB l ;CUTTER
22 1087 STCV8 RMB l ;CUTTER
23 1088 STCVh RMB 1 ;CUTTER
24 1089 STCA RMB 2 ;ADDR OF CUTTERS
108B STUBL RMB 1 ;SETTING OF T~R~T~CE I0 26 108C GFIl RMB 1 ;SETTING FOR GROUND FAULT

29 108F STSU RM8 1 ;SETTING FOR T~RE~OLD OF
* REGISTERS
31 1090 MSUM RMB 1 ;MAX SUM
32 1091 RGF RMB 1 ;R FOR GF
33 1092 SUM12C RMB 1 ; SUM OF T~E DEF
34 1093 SUMl2 RMB 1 36 1095 SUMl3 RMB l 37 1096 SUMl4C RMB 1 38 1097 SUMl4 RMB 1 39 1098 SUMlSC RMB l 40 1099 SUMl5 RMB 1 41 109A SUMl6C RMB l 42 109B SUM16 RMB l *
46 109E STl RMB 1 ;.CMAT.T.FCT SIG YOU ALLOWED
47 * AD~u~ N'l' ~ SU~ JTE S~EET ¦

i PC~r/A U93/00342 ~
W O 94/01910 ~13~7~5 48 109F SET RMB 1 ;SETTING VALUE OF SIG.
49 10A0 LEDCO RMB 1 ;STORT LED CODE FOR INDIC
50 10Al ADDR RMB 2 ;FOR CHANGE CONTENT OF IX
51 10A3 NSl RMB 1 ;NUMBER OF SAMPLES WILL B
52 10A4 ADX RMB 1 ;VALUE WILL ADD TO INDEX, 53 10A5 C RMB 1 ;FOR SIG. ADJ. COUNT.
54 10A6 Cl RMB 1 55 10A7 MAX RMB 1 ;STORE MAX VALUE OF SIG.
56 * DETECTION
57 10A8 COUNTl RMB 1 ;FOR 8 58 lOA9 COUNT2 RMB 1 ;FOR 25 59 10AA COUNT3 RMB 1 ;FOR 200 10AB COUNT4 RMB 1 ;FOR 2 61 10AC TIME RMB 1 ; COUNT FOR DELAY
63 lOAD SAMPLE RMB 2 ;FIRST ADDR OF SAMPLE
64 10AF NUMBER RMB 2 ;ADDR OF NUMBER AFTER CUT
65 10Bl NBlA RMB 1 ;SHIFT MULTIPLICAND STORE
66 10B2 NBl RMB 1 ;MULTIPLICAND
67 10B3 NB2 RMB 1 ;MULTIPLIER
68 10B4 AN52 RMB 1 ;UPPER BYTE OF RESULT
69 10B5 ANSl RMB 1 ;LONER BYTE OF RESULT
70 10B6 Xl RMB 2 ;POINT ADDR OF SMAPLES
71 10B8 X2 RMB 2 ;POINT ADDR OF NUMBERS
72 10BA XP RMB Z ;POINT ADDR OF PRIORITY
73 10BC XD RMB 2 ;POINT ADDR OF DEFERENCE
74 10BE Xll RMB 2 ;FOR TRANSFER
75 10C0 X12 RMB 2 ;FOR TRANSFER
76 * direction 77 10C2 NSV RMB 1 ;NUMBER OF SAMPLE SCANED FOR V
78 10C3 NSI RMB 1 ;NUMBER OF SAMPLE SCANED FOR I
79 10C4 NST RMB 1 ;TEMP
80 10C5 MAXl RMB 1 ;MAX VALUE
81 10C6 DIR RNB 1 ;CODE FOR RESULT OF DIRECT~ON

83 8000 PIAlAD ECU ~8000 ; PIAl 84 8001 PIAlAC E~U ~8001 85 8002 PIAlBD ECU ~8002 86 8003 PIAlBC ECU ~8003 87 4000 PIA2AD EC~U ~4000 ; PIA2 88 4001 PIA2AC ECU ~4001 89 4002 PIA2BD ECU ~4002 4003 PIA2BC ECU ~4003 91 *
92 *PROGRAMS FOLLOWS
93 ***~ ****
94 * CON~.lON PROGRAM
0,200 ORG S0200 97 *PIA INITIAL
98 0203 7F 80 01 CLR PIAlAC ; PIAl INITIAL
99 0206 7F 80 00 CLR PIAlAD ; PIAlA AS INPUT
100 0209 86 27 LDAA ~%00100111 ;HANDSHARE MODE
101 020B B7 80 01 STAA PIAlAC
102 020E 7F 80 03 CLR PIAlBC
103 0211 86 FF LDAA #SFF
104 0213 B7 80 02 STAA PIAlBD ; PIAlB AS OUTPUT

~ SU~a~ JTE SlIEET ¦

WO 94/01910 ~ 13 9 7 S 5 PCr/AU93/00342 105 0216 86 04 LDAA #4 106 0218 B7 80 03 STAA PIAlBC
107 *
108 021B 7F 40 01 CLR PIA2AC ;PIA2 INITIAL

110 0221 86 07 LDAA #%00000111 111 0223 B7 40 00 STAA PIA2AD ;PIA2 PA FOR MD SELECTI
112 0226 86 04 LDAA #$4 114 *
115 022B 7F 40 03 CLR PIA2BC ;PIA2 PB AS OUTPUT
116 022E 7F 40 02 CLR PIA2BD ; FOR OUTPUT BORAD
117 0231 86 FF LDAA ~SFF

119 0236 86 04 LDAA #S4 121 *
122 023B 8E lF FF LDS #RAMEND ;POINT lFFF
123 023E CE OB OE LDX ~lh~AOUl 124 0241 DF 00 STX S0000 ; USER IRQ ADDR
125 *

127 0246 84 C0 ANDA #S11000000 ;ONLY CHECR PA7,PA6 128 0248 81 00 CMPA #0 130 024C 81 80 CMPA #%10000000 132 0250 81 40 CMPA #%01000000 134 *END AUTO START FOR NEXT TIME
135 0254 86 10 LDAA #slo ;NOT = SUM
136 0256 97 2C STAA 8002C ;CHANGE THE SUM FOR
137 * ; GET OUT

139 *
140 0259 7E 03 00 AA JMP ADJu~

142 025F 7E 08 00 CC JMP Dk~ lON
143 *****************************************
144 *AD~u~r~khL PROGRAM

146 0300 01 AD~U~ kh. NOP
147 *S ~ 1NGS

149 *******~***~*******
150 *ADD INDEX ~U~AO~1~1Nk 151 , *BEFORE: STORE VALUE IN X~ ADD VALUE IN ADX
152 *AFTER: ADDED VALUE STORED IN X
153 0302 FF 19 08 ADIX STX 51908 ;HIGH OF X IN M1908~ LOW IN
154 0305 B6 19 09 LDAA slgog 157 030E FE 19 08 LDX $1908 159 *

161 *GET MAX VALUE SUBROU

3 SlJ~ JT SHZ~ET ¦

WO 94/01910 PCI~/AU93/00342 ~3~55 162 *BEFORE PROGRAM:
163 * THE FIRST ADD. OF SIG. FOR SCAN SHOUL
164 * AND NUMBER OF.SAMPLES IN NSl.
165 *AFTER PROGRAM:
166 * THE MAX VALUE STORED IN MAX

168 0315 A6 00 GMAX LDAA S00,X

170 0318 46 RORA ;NO NEGTATIVE IN A

172 031A F6 10 A7 LDAB MAX ;MAX IS NUMBER WHICH IS M
173 031D 11 CBA ;A - B ->
174 031E 2B 03 BMI GMAXl ;A<B (N IS SET),BRANCH.
175 0320 B7 10 A7 STAA MAX ;GET NEW MAX IF A>-B
176 0323 FF 10 E0 GMAXl STX SlOE0 ;ADD 8 FOR EACH TIME.
177 0326 86 08 LDAA #$08 178 0328 BB 10 El ADDA S10El 179 032B B7 10 El STAA S10El 181 0331 7A 10 A3 DEC NSl 183 0336 39 RTS ;RETUNE IF FINISH.
184 ********
185 *LED FLASH SU~KUUh11N~

187 0338 C6 03 LDAB #$03 ; THE TIME OF FLASH

189 033D B7 80 02 STAA PIAlBD ;LIGHT ON
190 0340 BD 03 52 JSR ENABLE ;ENABLE LIGHT ON
191 0343 BD 03 5E JSR TDl ;TIME DELAY
192 0346 BD 03 58 JSR ENABLE ;LIGHT OFF
193 0349 BD 03 5E JSR TDl 195 034D Cl 00 CMPB ~$00 198 *~****~***
199 *ENABLE LIGHT ON
200 *THIS CAN BE DONE WHEN SWICH-l IN
201 * MD IS ON.
202 0352 86 C0 ENABLE LDAA #SC0 ;CODE IS %llOXXXXX.

205 ******
206 *NOT ENABLE LIGHT
207 0358 86 00 ENABLE LDAA ~$00 ;ANY CODE WHICH IS
208 * ; NOT %110XXXXX.

211 ********
212 *TIME DELAY FOR FLASH ~U~U'LlN~:
213 035E CE FF FF TDl LDX #SFFFF
214 0361 09 TDll DEX
215 0362 26 FD BNE TDll 217 ***************
218 *INDICATE AFTER EACH ADJU~--I~

~ SU~IlIUTE Sl-IEET ¦

WO 94/01910 213 9 7 ~ S PCr/AU93/00342 219 0365 B6 10 A0 INDICATE LDAA LEDCO ;FOR LD ON CB TOP-2 220 0368 B7 80 02 STAA PIAlBD ;INDICATE GREEN LIGHT

222 036E BD 0C 43 JSR DELAY ;DELAY 3 SECOND FOR INDIC

224 ****************************************
225 * TEST PROGRAM

227 0600 86 22 TEST LDAA ~$22 230 ***************~****
231 . *DETECTION

234 *CLEAR M1000 - MlFFF
235 0801 CE 10 00 LDX ~slooo 236 0804 86 00 LDAA #0 237 0806 A7 00 CLEAR STAA S00,X

239 0809 8C lF FF CPX ~SlFFF

242 *~jt. . ,lN~;
243 080F 86 10 LDAA tSlo 244 0811 B7 10 81 STAA STCV0 ;THRESHOLD FOR CUT AL
245 0814 86 10 LDAA #$10 246 0816 B7 10 82 STAA STCI0 ;THRESHOLD FOR CUT
247 0819 86 04 LDAA #S04 248 081B B7 10 84 STAA STCI3 ;THRESHOLD FOR CUT
249 081E 86 02 LDAA #502 250 0820 B7 10 83 STAA STCIl ;THRESHOLD FOR CUT
251 0823 86 04 LDAA #'`04 252 0825 B7 10 85 STAA STCI8 ;THRESHOLD FOR CUT
253 0828 86 04 LDAA #i:04 254 082A B7 10 86 STA~ S~CV2 ;THRESHOLD FOR CUT
255 082D 86 04 LDAA ~S04 256 082F B7 10 87 STAA STCV8 ;THRESHOLD FOR CUT
257 0832 86 10 LDAA #$10 258 0834 B7 10 88 STAA STCVh ;THRESHOLD FOR CUT
259 *
260 0837 86 08 LDAA #S08 261 0839 B7 10 8B STAA STUBL ; ~ lNG FOR UNRPT ~NCE I0 262 * ZERO ~;UKK~ SETTINGS FOR GROUND FAULT
263 083C 86 7F LDAA tS7F ;MAX S7F (EGUAL TO SSFF I
264 083E B7 10 8C STAA GFIl jSETTING FOR GROUND FAULT
265 0841 86 40 LDAA #S40 266 0843 B7 10 8D STAA GFI2 ; IN ZONE 2 5A
267 0846 86 30 LDAA #S30 268 0848 B7 10 8E STAA GFI3 ;IN ZONE 3 3A
269 * TRT~ROT n FOR CON~ lNG F (CAN BE CHANGED
270 084B 86 50 LDAA #S50 272 * INPUT PRIORITY TABLE . TOTAL I S 14 273 0850 86 00 LDAA #0 274 0852 B7 10 40 STAA S1040 ;V0 0%
275 0855 86 01 LDAA #l ~ SU~S~ .ITE SHEET ¦

WO 94/01910 PCI'/AU93/00342 97~S

276 0857 B7 10 41 STAA S1041 jI0 0%
277 085A 86 02 LDAA #2 278 085C B7 10 42 STAA S1042 ;I3 20 279 085F 86 03 LDAA ~3 280 0861 B7 10 43 STAA S1043 ;Il 25%
281 0864 86 02 LDAA #2 282 0866 B7 10 44 STAA "1044 ;I8 20%
283 0869 86 03 LDAA ~3 284 086B B7 10 45 STAA "1045 ;V2 25 285 086E 86 02 LDAA ~2 286 0870 B7 10 46 STAA $1046 ;V8 20%
287 0873 86 01 LDAA #l 288 0875 B7 10 47 STAA S1047 ;Vh 10%
289 *

291 0879 CE 11 00 PARTB LDX #Slloo ; ADDR OF GSl 293 * UNRAT~NCE TEST
294 087F 86 lD AGAIN LDAA #SlD ;29 SAMPLES
295 0881 B7 10 A3 STAA NSl 296 0884 CE 11 01 LDX #sllol ;POINT TO I0 302 0890 B6 10 8B LDAA STUBL ;SETTING MAX S7F

304 0894 2A 05 BPL GO ;N=O,BRA WHEN SETTING
305 0896 86 8E LDAA #S8E ;INDICATE UNRATANCE

307 *
308 089B CE 11 F0 GO LDX #SllF0 ; ADDR OF GS2 309 089E BD OA CA JSR G:TGS
310 08Al CE 11 00 LDX #~1100 ;ADDR OF GSl 311 08A4 FF 10 B6 STX X:
312 08A7 CE 10 00 LDX #~1000 ; NUMBER 1 313 08AA FF 10 B8 STX Xi;.

315 *
316 08B0 CE 11 F0 LDX #~llF0 ;ADDR OF GS2 317 08B3 FF 10 B6 STX X:
318 08B6 CE 10 08 LDX #~1008 ; NUMBER 2 319 08B9 FF 10 B8 STX X.' 321 *
322 08BF BD OB 78 JSR COMPl 323 *
324 08C2 CE 10 40 LDX #S1040 ;ADDR OF PRIORITY

326 08C8 CE 10 48 LDX #S1048 ;ADDR OF DEF12 329 *
330 08D1 86 BE LDAA ~SBE
331 08D3 B7 40 02 STAA PIA2BD ;DISPLAY GREEN LED
332 * ; WHEN NORMAL OR BACK NORMAL.

~ SU~3STITUTE S~IEET ¦

WO 94/01910 ~ 1 3 ~ 7 5 ~ PCI`/AU93/00342 333 08D6 BD 0C DF JSR MAXSUM ;STORE MAX SUM

338 08E5 81 00 CMPA #$00 ;IF CARRY>-l,GOON 1 339 08E7 2E OA BGT GOONl 340 08E9 59 ROLB ;MS BID TO CARRY
341 08EA 25 07 BCS GOONl ;BR WHEN CARRY SET

343 08ED 56 RORB ;BACK WHIT NO NEGATIVE

345 08EF Cl 03 CMPB ~S03 ;~R~.C~OLD FOR Tl 346 08F1 2D 7B BLT ONEEE ;IF NO DISTURBANCE
347 08F3 86 B8 GOONl LDAA #SB8 348 08F5 B7 40 02 STAA PIA28D ;DISPLAY GREEN AND RED
349 08F8 CE 11 Fl . LDX ~SllFl 350 08FB BD 0C FC JSR GFAULT ;DETECTION FOR GF
351 08FE CE 12 E0 LDX #S12E0 ;GET Z00 SAMPLE FOR GS

353 *
354 *
355 0904 CE 12 E0 LDX #$12E0 ;ADDR OF GS3 356 0907 FF 10 B6 STX Xl 357 090A CE 10 10 LDX #Slolo ;ADDR. OF NUMBER3 360 0913 CE 13 C8 LDX #"13C8 ;SECOND HALF

362 0919 CE 10 10 LDX #"1010 363 091C FF 10 B8 STX X'' 365 *

367 *
368 0925 CE 10 40 LDX #$1040 jADDR OF PRIORITY

370 092B CE 10 50 LDX #S1050 ;ADDR OF DEF13 373 *

378 0940 81 00 CMPA #S00 ;IF CARRY>=l GOON2 380 0,944 59 ROLB ;MS BID TO CARRY
381 0945 25 07 BCS GOON2 ;BR WHEN CARRY SET

383 0948 56 RORB ;BACK WHIT NO NEGATIVE

385 094A Cl 60 CMPB #S60 ;T~C~OLD FOR T2 388 0951 86 55 LDAA #$55 ;LD #Soo FOR DIR
389 0953 B7 10 C6 STAA DIR ;CLEAR THE CODE

¦ SU~ LITE SHEET ¦

WO 94/01910 ~,~3~ PCI'/AU93/00342 392 095C 81 55 CMPA #%01010101 ;CHECK THE CODE

394 0960 7E 09 99 JMP PARTC jGO TO.PART C IF CRREN
395 0963 86 10 WDIR LDAA #Slo 396 0965 B7 40 02 STAA PIA2BD ;INDICATE G,R3 FOR WRO
397 0968 BD 0C C0 JSR CLESU ;CLEAR SUM AND NUMBER
398 096B 7E 08 7F JMP AGAIN ;HAVING CHANGE TO CHEC
399 ; AND AGAIN UNTILL FAU
400 *
401 096E CE 11 00 ONEEE LDX #SllOO ;ADDR OF GSl 402 0971 FF 10 BE STX Xll 403 0974 CE 11 F0 LDX #SllF0 ;ADDR OF GS2 406 097D BD 0C C0 JSR CLESU ;CLEAR DEF & SUM

408 *
409 0983 CE 11 00 TWOOO LDX #Slloo ;ADDR OF GSl,ONLY TRAN
410 0986 FF 10 BE STX Xll 411 0989 CE 12 E0 LDX #S12E0 ;ADDR OF GS3 414 0992 BD 0C C0 JSR CLESU ;CLEAR DEF & SUM

417 *PRAT C:
418 *CUN~ FAULT

422 099B 86 B8 LDAA #SB8 423 099D B7 40 02 STAA PIA2BD ;DISPLAY GREEN AND Y2 424 * ; WHEN DISTU~
425 * CC.. rl~.l~G WITH GROUP OF SAMPLE 4 426 09A0 CE 14 C0 LDX ~S14C0 ;GET 2*232 SAMPLES FO

428 09A6 CE 14 C0 LDX ~el4C0 ;ADDR OF GS4 429 09A9 FF 10 B6 STX X:
430 09AC CE 10 18 LDX ~1018 ;ADDR. OF NUMBER4 433 09B5 CE 15 A8 LDX #S15A8 ;SECOND HALF
434 09B8 FF 10 B6 STX Xl 435 09BB CE 10 18 LDX #S1018 437 O9Cl BD OB 13 JSR CUTTT
438 *

440 *
441 09C7 CE 10 40 LDX ~S1040 ;ADDR OF PRIORITY

443 09CD CE 10 58 LDX #S1058 ;ADDR OF DEF14 446 *

~ SU~5 11 l UTE SI~EI~T ¦

WO 94/01910 2 13 9 7 5 ~ PCI'/AU93/00342 450 09DF 87 lo 96 STAA SUM14C
451 09E2 81 00 CMPA #$00 ;IF CARRY>=1 GOON3 453 09E6 59 ROLB ;MS BID T0 CARRY
454 09E7 25 07 BCS GOON3 ;BR WHEN CARRY SET

456 09EA 56 RORB ;BACR WHIT NO NEGATIVE

458 09EC Cl 40 CMPB #$40 ;TR~OLD FOR T3 459 09EE 2D 04 BLT TRYAG ;TRY ANOTHER GS IF N0 461 09F1 BD 0C EF JSR DECST ;DECREASE THREHOLD OF
462 * CON~1K~1NG AGAIN WITH GROUP OF SAMPLE 5 463 09F4 CE 16 A0 TRYAG LDX #$16A0 ;GET 2*232 SAMPLES FO

465 09FA CE 16 A0 LDX #~16A0 ;ADDR OF GS5 467 0A00 CE 10 20 LDX #'1020 ;ADDR. OF NUMBERS
468 0A03 FF 10 B8 STX X'' 470 0A09 CE 17 88 LDX #$1788 ;SECOND HALF
471 0A0C FF 10 B6 STX Xl 472 0A0F CE 10 20 LDX #$1020 475 *

477 *
478 OA1B CE 10 40 LDX #$1040 ;ADDR OF PRIORITY

480 OA21 CE 10 60 LDX #$1060 ;ADDR OF DEF15 483 *

488 0A36 81 00 CMPA #S00 ;IF CARRY>=1 GOON4 490 0A3A 59 ROLB ;MS BID TO CARRY
491 0A3B 25 07 BCS GOON4 ;BR WHEN CARRY SET

493 0A3E S6 RORB ;BACR WHIT NO NEGATIVE

495 0A40 Cl 40 CMPB #$40 ;T~ HOLD FOR T4 496 0A42 2D 04 BLT LASCON ;BR LAST CONFIRM

498 0A45 BD 0C EF JSR DECST ;DECREASE THREHOLD OF
499 *
500 * CON~1KM1NG BEFORE TRIP (THREHOLD MAY BE CHAN
501 0A48 CE 18 00 LASCON LDX #$1800 ;GET GS6 503 *

~ SUBSTITUTE SH~ET ¦

WO 94/01910 PCI`/AU93/00342 ~13~

504 OA4E CE 18 80 LDX ~S1880 ;ADDR OF GS4 505 OA51 FF 10 B6 STX Xl 506 OA54 CE 10 28 LDX #S1028 ;NUMBER 6 509 OA5D CE 19 68 LDX #S1968 ;SECOND HALF
510 OA60 FF 10 B6 STX Xl 511 OA63 CE 10 28 LDX #S1028 514 *

516 *
517 OA6F CE 10 40 LDX #$1040 ;ADDR OF PRIORITY

519 OA75 CE 10 68 LDX #S1068 ;ADDR OF DEF16 522 *

527 OA8A 81 00 Q A #SOO ;IF CARRY~l 529 OA8E 59 ROLB ;MS BID TO CARRY
530 OA8F 25 08 BCS TRIPP ;BR WHEN CARRY SET

532 OA92 56 RORB ;BACK WHIT NO NEGATIVE

534 OA94 Fl 10 8F Q B STSU

536 *
537 OA99 86 85 TRIPP LDAA ~S85 ;TRIP

540 OAAl BD OC 43 JSR DELAY

543 OAAA 86 76 LDAA #S76 544 OAAC B7 40 02 STAA PIA2BD ;DISPLAY Rl,R4 WHEN A

546 *
547 **
548 OABO 86 BE FIVE LDAA #SBE
549 OAB2 B7 80 02 STAA PIA18D ;DISPLAY 7 WHEN
550 * ; DISTURBANC GONE
551 OAB5 CE 11 00 LDX #Slloo ;ADDR OF GSl 552 OAB8 FF 10 BE STX Xll 553 OABB CE 18 80 LDX #S1880 ;ADDR OF GS6 555 OACl BD OC 26 JSR TRANS
556 OAC4 BD OC CO JSR CLESU ;CLEAR DEF ~ SUM

558 *************
559 *GETGS SUBROUTINE

~ SU~ JTE Sl-IEET ¦

r PCI/AU93/00342 WO 94/01910 ~ 1 3 9 7 5 ~

561 OACB 86 E8 LDAA #SE8 ;GET 29*8=232 SAMPLES

564 OADl OE CLI
565 OAD2 B6 80 00 LDAA PIAlAD
566 OAD5 F7 80 02 FEEDD STAB PIAlBD ;ADDR. TO ADC A2,Al,AO
567 OAD8 3E WAI ;NAITE FOR I~ K~urL
568 OAD9 B6 80 00 LDAA PIAlAD ;AFTER lN~ urr 569 OADC A7 00 STAA $00,X

573 OAEl 7A 10 AA DEC COUNT3 576 **
577 *GET TWO GS SUBROUTINE

579 OAE8 86 02 LDAA ~$2 582 OAEE B6 80 00 LDAA PIAlAD
583 OAFl 86 E8 FD2 LDAA ~$E8 ;GET 29~8~232 SAMPLES
58Ç OAF3 B7 10 AA STAA COUNT3 586 OAF7 F7 80 02 FEEDD2 STAB PIAlBD ;ADDR. TO ADC A2,Al,A
587 OAFA 3E WAI ;WAITE FOR lNl~KR~rT
588 OAFB B6 80 00 LDAA PIAlAD ;AFTER IN~r:KRDrT
589 OAFE A7 00 STAA SO,X

591 OBOl 08 INX

598 ***~*~**
599 ~DUMMY lh ~ I:;KKU~ ROU~1NI!;
600 OBOE 7D 80 00 lh.~O~T TST PIAlAD
601 OBll 01 NOP

603 *
604 ****
605 *CVTTT RVU'1'1N ~' 606 *SET BEFORE: Xl , X2 .
607 *THIS RO~1N~ CAN CUT 8 SIGNALS WITH
608 *DI~KP-~ CUTTER WHICH SHOVLD BE SET BEFORE.
609 *MlOEO TO MlOE4 USED IN THIS.
610 OB13 FE 10 B6 CUTTT LDX Xl 612 OBl9 FE 10 B8 LDX X2 613 OBlC FF 10 AF STX NUMBER ;STORE THE INITIAL
614 * ; ADDR OF NUMBER
615 OBlF 86 08 LDAA ~$08 616 OB21 B7 lO A8 STAA COVNTl ;8 SAMPLES
617 OB24 CE 10 80 LDX ~STC ;FIRST ADDR OF CU~TE

~ SU~S I I l`UTE SHEET ¦

W O 94/01910 PC~r/AU93/00342 2:l3g755 619 OB28 A6 00 LDAA O,X ;GET CUTTER /NEXT CU
620 OB2A B7 10 80 STAA STC ;CURRENT CUTTER
621 OB2D FF 10 89 STX STCA ;STORE ADDR OF CURRE
622 OB30 86 lD LDAA #SlD
623 OB32 B7 10 A9 STAA COUNT2 ; 29 SAMPLE

625 OB38 A6 00 SAMSIG LDAA O,X ;GET SAMPLES

627 OB3B 46 RORA ;KEEP VALUE POSITIVE

629 OB3D F6 10 80 LDAB STC ;CURRENT CUTTER

631 OB41 2B OB BMI FORGET ;SAMP - THRESHOLD <
632 OB43 FF 10 EO STX $10EO

634 OB49 6C 00 INC $00,X ;ADD UP IN M1000 - M

636 OB4E FF 10 E2 FORGET STX S10E2 ;X + 8 -> X
637 OB51 B6 10 E3 LDAA SlOE3 638 OB54 8B 08 ADDA ~S08 639 OB56 B7 10 E3 STAA $10E3 640 OB59 FE 10 E2 LDX $10E2 642 OB5F 26 D7 BNE SAMSIG ;TO NEXT SMPLE OF SA
643 OB61 FE 10 AD LDX SAMPLE ;SAMPLE + 1 -> SAMPL

646 OB68 FE 10 AF LDX NUMBER ;NUMBER + 1 -> NUMBE

649 OB6F FE 10 89 LDX STCA ;ADDR OF CURRENT CUT
650 OB72 7A 10 A8 DEC COUNTl 651 OB75 26 BO BNE NEXSIG ;TO NEXT SIGNAL

653 *~*~ ***~
654 *COMPAREl ROul lN~
655 OB78 86 08 COMPl LDAA #$08 657 OB7B B7 10 A8 STAA COUNTl 658 OB7E CE 10 00 LDX #$1000 659 *
660 OB81 E6 00 ALANl LDAB SOO,X ;NUMBERl 661 OB83 A6 08 LDAA 508,X ;NUMBER2 663 OB86 2F 09 BLE HRVED ;IF A<=O
664 OB88 A7 48 STAA $48,X
665 OB8A 08 GOODl INX
666 OB8B 7A 10 A8 DEC COUNTl 667 OB8E 26 Fl BNE ALANl 670 OB91 86 00 HRVED LDAA ~$00 671 OB93 A7 48 STAA S48,X
672 OB95 7E OB 8A JMP GOODl 673 *
674 **********

~ SUY5~ JTE SH~ET ¦

wo 94/olglo ~ 9 7 ~ 5 PCI/AU93/00342 675 *GETSUM ROUTINE
676 *SET BEFORE: XP , XD
677 OB98 C6 00 GETSU LDAB #$00 680 *
681 OBAO 86 08 LDAA ~S08 683 *

685 OBA8 E6 00 LDAB O,X
686 OBAA F7 10 B2 STAB NBl 689 OBBl FE 10 BC LDX XD
690 OBB4 A6 00 LDAA SOO,X

695 OBCO B6 10 B5 LDAA ANSl 698 OBC8 B7 10 9D BAC~K STAA SUM
699 OBCB 7A 10 A8 DEC COUNTl 702 *
703 OBDl 7C 10 9C CARRY INC SUMC

705 *
706 *
707 *MULTIPLIE ROD11N~:
708 *THE MULTIPLICAND IS STORED IN BYTE NBl -709 *THE MILTIPLIER IS STORED IN BYTE NB2 710 *THE RESULT IS STORED IN BYTES ANS2 (UPPER) AN
711 *ANSl tLOWER).
712 *

715 OBD9 B7 10 Bl STAA NBlA

720 *
721 OBE7 78 10 B2 LOOP2 ASL NBl 722 OBEA 79 10 Bl ROL NBLA
723 OBED 44 LOOPl LSRA

725 OBFO F6 10 B5 LDAB ANSl 726 OBF3 FB 10 B2 ADDB NBl 727 OBF6 F7 10 B5 STAB ANSl 729 OBFC F9 10 Bl ADCB NBlA

¦ SU~S~ ITE SI~EI~T ~

WO 94/01910 PCr/AU93/00342 ~139~5~

734 *
735 *
736 *COMPARE 2 ROD. lN ~:
737 *COMPARE THE NUMBER 3 WITH NUMBER1, 738 * PUT THE DEFERENCE INTO DEF13 739 0C06 86 08 COMP2 LDAA #$08 741 0C09 87 10 A8 STAA COUNTl 742 0C0C CE 10 00 LDX #$1000 ;NUMBERl 743 *
744 OCOF E6 00 ALAN2 LDAB S00,X ;NUMBERl 745 OCll A6 10 LDAA Slo,X ;NUMBER3 746 OC13 10 SBA ;A-B GOTO A
747 OC14 2F 09 BLE HRVE2 ;IF A<~0 748 *
749 OC16 A7 50 STAA S50,X

751 OCl9 7A 10 A8 DEC COUNTl 752 OClC 26 Fl BNE ALAN2 753 OClE 39 RTS
754 *
755 OClF 86 00 HRVE2 LDAA #S00 756 OC21 A7 50 STAA S50,X

758 *

760 *TRANSFER ROD~1N~
761 *SET BEFORE: Xll , X12 762 *X12 >~> Xll 763 0C26 86 E8 TRANS LDAA #$E8 766 OC2E A6 00 LDAA 0,X

769 0C34 FE 10 BE LDX Xll 770 0C37 A7 00 STAA 0,X

772 OC3A FF 10 BE STX Xll 776 *
777 *
778 *
779 *DELAY TIME RUU~1N~
780 * 3 SECONDS

782 0C44 C6 01 LDAB ~$01 784 0C49 86 FF LOOPA LDAA #5FF
785 OC4B C6 FF LOOPB LDAB #SFF

~ SU~S~ JTE SI~EET ¦

~ 1 3 ~ 7 5 ~
W O 94/01910 PC~r/A U93/00342 ?89 OC51 26 F8 8NE LOOPB
790 0C53 7A lO AC DEC TIME
791 0C56 26 Fl BNE LOOPA

793 ***********

~ SU~S~ JTE StlEET ¦

Claims (23)

CLAIMS:
1. A method for detecting a high impedance fault or arcing phenomenon in an AC
electrical distribution system having a fundamental frequency, comprising:
a. monitoring electrical signals (24, 134) in said electrical distribution system;
b. isolating a plurality of predetermined frequency components (26, 28, 134) from the monitored electrical signals;
c. scaling the magnitudes (30) of said predetermined frequency components according to selected scaling factors;
d. comparing said scaled magnitudes (30) from a first data acquisition period with the scaled magnitudes from a preceding data acquisition period; and e. detecting the occurrence of a high impedance fault or arcing phenomenon on the basis of said comparison.
2. The method as claimed in claim 1, wherein the step of scaling the magnitude of a said predetermined frequency component comprises determining and summing the number of sub-periods of a said data acquisition period during which the frequency component is greater than a selected value, and multiplying the resulting sum by a scaling factor corresponding to said frequency component.
3. The method as claimed in claim 1 or 2, wherein the step of comparing said scaled magnitudes comprises comparing the sum of said scaled magnitudes from said first data acquisition period (88) with the sum of the scaled magnitudes from said preceding data acquisition period (86).
4. The method as claimed in claim 1 wherein the isolated frequency components includes zero-sequence current and voltage signals, and wherein the method includes a step of detecting whether a solid ground fault occurs on the basis of the magnitudes of the zero-sequence current and voltage signals.
5. The method as claimed in claim 1 wherein the comparing step further includes comparing said scaled magnitudes from the first data acquisition period (88) and the preceding data acquisition period (86) with the sealed magnitudes from a second data acquisition period (90) subsequent to said first data acquisition period.
6. The method as claimed in claim 1 wherein one of said predetermined frequency components is twice said fundamental frequency.
7. The method as claimed in claim 1 wherein said plurality of frequency components comprises eight voltage and/or current signals.
8. The method as claimed in claim 7 wherein the plurality of frequency components includes a zero-sequence voltage, a second harmonic voltage, an eighth harmonic voltage, a high frequency voltage, a zero-sequence current, a low frequency current, a third harmonic current, and an eighth harmonic current.
9. The method as claimed in any preceding claim including a step of confirming occurrence of a high impedance fault (146) by analysing at least one of said predetermined frequency components to determine whether the magnitude of the at least one component is modulated at twice the fundamental frequency.
10. The method as claimed in any preceding claim including a step of issuing a trip signal (32, 152) when the possibility of a high impedance fault is detected, to cause said at least one electrical feeder line to be isolated from the source of said AC electricity.
11. A method for detecting the possible existence of a high impedance fault in an electrical distribution system conveying AC electricity of a fundamental frequency, comprising:
monitoring electrical signals (24, 134) in said electrical distribution system;
isolating a plurality of predetermined frequency components (26, 134) from the monitored electrical signals;
sampling the frequency components (28, 134) during at least one data acquisition period;
forming and storing a first pattern (30, 134) corresponding to the samples during said at least one data acquisition period;
comparing said first pattern with a previously stored template pattern (30, 136);
and determining the possible existence of a high impedance fault (30, 142) on the basis of said comparison.
12. The method as claimed in claim 11, wherein the template pattern comprises a pattern formed from samples of said frequency components during a sequentially preceding data acquisition period.
13. The method as claimed in claim 12, including a step of forming a second pattern from sampling the frequency during a further data acquisition period, and comparing said template pattern with both said first and second patterns to determine the possible existence of a high impedance fault.
14. The method as claimed in any one of claims 11 to 13, including a step of confirming the existence of a high impedance fault (146) by analysing a sequence of chronologically sampled data (140) from at least one of said plurality of frequency components to determine whether the magnitudes of the at least one frequency component is modulated at twice said fundamental frequency.
15. The method as claimed in claim 14 including a step of isolating the confirmed high impedance fault (152) from the source of said AC electricity.
16. A high impedance fault or arcing phenomenon detector for use in an electrical distribution system including at least one electrical feeder line for conveying AC
electricity of a fundamental frequency, said detector comprising:
a. monitoring means (24) for monitoring electrical signals on said at least one electrical feeder line;
b. filtering means (26) for isolating a plurality of predetermined frequency components from the monitored electrical signals;
c. weighting means (30) for scaling the magnitudes of said plurality of predetermined frequency components according to selected scaling factors;
d. comparison means (30) for comparing said scaled magnitudes from a first data acquisition period with the scaled magnitudes from a preceding data acquisition period; and e. detecting means (30) for detecting the occurrence of a high impedance fault or arcing phenomenon on said electrical feeder line on the basis of said comparison.
17. An electrical isolation switch for use in an electrical distribution system including at least one electrical feeder line for conveying AC electricity of a fundamental frequency, comprising:
a. monitoring means (24) for monitoring electrical signals on said at least one electrical feeder line;
b. filtering means (26) for isolating a plurality of predetermined frequency components from the monitored electrical signals;
c. weighting means (30) for scaling the magnitudes of said plurality of predetermined frequency components according to selected scaling factors;
d. comparison means (30) for comparing said scaled magnitudes from a first data acquisition period with the scaled magnitudes from a preceding data acquisition period;
e. detecting means (30) to detect the possibility of a high impedance fault on said electrical feeder line on the basis of said comparison and to generate a trip signal if the possibility of a high impedance fault is so detected; and f. means for actuating switching means (32) to electrically isolate said at least one electrical feeder line from the source of said AC electricity upon generation of said trip signal.
18. An electrical isolation switch as claimed in claim 17, further comprising sampling means (28) for sampling the frequency components, threshold means for determining if a sample is greater than a given threshold, and summing means (30), whereby the scaling of the magnitude of a given frequency component is achieved by sampling the frequency component during a said data acquisition period, and summing the number of occurrences during the data acquisition period in which the sampled magnitude exceeds a selected threshold and multiplying the resulting sum by the scaling factor corresponding to that frequency component.
19. An electrical isolation switch as claimed in claim 18 further comprising a means (30) to sum the scaled magnitudes of the plurality of frequency components from the first data acquisition period, such that the comparison means compares the sums of the scaled magnitudes.
20. An electrical isolation switch as claimed in claim 19 wherein the summing and scaling of the predetermined frequency components is carried out according to:

X = ? Wi (? (Sij > Ti)) Where: X is the weighted sum of the frequency components, n is the number of frequency components, Wi is the scaling factor for the frequency components, m is the total number of samples during a data acquisition period, Sij is the sample magnitude for the frequency components, and Ti is the individual threshold for each frequency component, and wherein the comparison means compares the weighted sum X for successive dataacquisition periods.
21. An electrical distribution system comprising:
a source (2, 4) of AC electricity of a fundamental frequency;
at least one electrical feeder line (6) coupled to said source by way of switching means (3) capable of electrically isolating said at least one electrical feeder line from said source upon receipt of a trip signal;
monitoring means (24) for monitoring electrical signals on said at least one electrical feeder line;

filtering means (26) for isolating a plurality of predetermined frequency components from the monitored electrical signals;
weighting means (30) for scaling the magnitudes of said plurality of predetermined frequency components according to selected scaling factors; and comparison means (30) for comparing said scaled magnitudes from a first data acquisition period with the scaled magnitudes from a preceding data acquisition period, and to issue a said trip signal to said switching means if said comparison indicates the possibility of a high impedance fault on said at least one electrical feeder line.
22. A method for detecting an arcing phenomenon in an electrical distribution system comprising the steps of:
monitoring n selected frequency components Cn of the voltage and current at a point on the distribution system;
generating a first pattern Mj(Cn) representative of the magnitudes of the selected frequency components during a first data acquisition period;
comparing the first pattern with a previously stored pattern Mj-1(Cn) to determine whether the difference therebetween exceeds a pattern threshold Mt(Cn) such that ?Mj(Cn)-Mj-1(Cn)?>Mt(Cn) for all n; and determining the occurrence of an arcing phenomenon in the system on the basis of the comparison.
23. The method as claimed in claim 22 including of zero-sequence current in the distribution system and determining the occurrence of a high-energy unbalanced fault on the basis of said zero-sequence current magnitude.
CA002139755A 1992-07-10 1993-07-09 High impedance fault detector Abandoned CA2139755A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AUPL345192 1992-07-10
AUPL3451/92 1992-07-10

Publications (1)

Publication Number Publication Date
CA2139755A1 true CA2139755A1 (en) 1994-01-20

Family

ID=3776281

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002139755A Abandoned CA2139755A1 (en) 1992-07-10 1993-07-09 High impedance fault detector

Country Status (5)

Country Link
US (1) US5602709A (en)
CA (1) CA2139755A1 (en)
NZ (1) NZ253977A (en)
TW (1) TW242663B (en)
WO (1) WO1994001910A1 (en)

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