CA2150656C - Circuit in cmos technology for high speed driving of optical sources - Google Patents
Circuit in cmos technology for high speed driving of optical sourcesInfo
- Publication number
- CA2150656C CA2150656C CA002150656A CA2150656A CA2150656C CA 2150656 C CA2150656 C CA 2150656C CA 002150656 A CA002150656 A CA 002150656A CA 2150656 A CA2150656 A CA 2150656A CA 2150656 C CA2150656 C CA 2150656C
- Authority
- CA
- Canada
- Prior art keywords
- terminal
- optical device
- cmos
- current generator
- bias current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0427—Electrical excitation ; Circuits therefor for applying modulation to the laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
- H01S5/062—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes
- H01S5/06209—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes in single-section lasers
- H01S5/06213—Amplitude modulation
Abstract
The circuit in CMOS technology allows high speed driving of optical sources, in particular laser diodes, operating efficiently at speeds that meet the requirements imposed by optical fibre communication on systems and avoiding interference between driving currents and biasing current in the optical source. The circuit comprises a bias current generator, a modulation current generator and a cascade of CMOS inverterstages that supplies a driving voltage to the modulation current generator and receives digital signals at its input. It is possible to independently adjust the bias current, so as to allow driving sources with different threshold currents, and to adjust the modulation current.
Description
The invention desc~ 1 herein relates to ~la~ s~ion devices for co.. ~ icætion systems using optical fibres and in particular it conc~n~ a circuit in CMOS t~hnology for high speed driving of optical sources.
The use of optical fibres in co.. ~ icAI;on systems nowadays is quite widespread and it allows to increase the speed of ~d~ s~ions and to reduce the size of the means used to carry the signals. However, at the current state of the art, a Large portion of the processing ~.ru~...~ on the ;~rc~ on transmitted is carried out on electri~æl signals.
There is, therefore, the need to create ;..l~. r~i.,g devices which allow to couple on one 20 side the i-~f ~ al;on sources and on the other the associated receivers with the optical fibre se~ments utilised for the connection In particular, the sources are provided with transducers that are capable of CcJ~ g the e~ l signals into optical r~di~tions to send into the fibre, while the ~ are provided with tr~n~lucers that are capable of converting the optical rarli~tion received into e~ c~l signals. In the former case, opto-25 elec~onic sources are used, such as laser diodes or LEDs, w}l~ ,as in the latter casephoto-detectors are typically used. The use of laser diodes is particularly widespread since the rP~i~tion emitted by these devices has advant~geous chara~teristi~ forl-; -.s,~-s~ n through optical fibre: in particular, the optical r~di~tion emitted is coherent and typically ~uollochlu~alic, with the additional advantage that the small wavelength of such a radiation allows the use of optical fibre cables with a smaller cross section colllpa,~d to that of the cables carrying the radiation emitted by other sources, such as LEDs. Once the optical source to be used has been chosen, the problem is how to drive it in such a way that, taking into account the source charactçr~tics, al)pl~liate optical 5 signals to send through the fibre will co,l~ond to the ele~rical signals emitted by the generator.
In laser diodes, the emi~ion of optical radiation occurs only when the current flowing through the directly pol~ri~ed device eYceeds a ~ l value, called threshold current and h~l~ih~te, in-licat~l as Is. Such threshold current in general depends on various 10 factors: first of all, by the level of technology and accuracy with which the laser diodes are ~.A~ ,d and, among the devices m~n~f~çtllred with the same process, by the inevitable di~ ion of the actual char~cteri~tics with respect to nominA1 ones. In any case, it is possible to set the variation of the threshold current of the most cn..~.~.m11y used laser diodes roughly between 5 mA and 30 mA.
15 Another characteri~t~ of laser diodes is the fact that the power of the optical r~ tinn emitted is directly plv~ol~ional to the in~ y of current flowing in the device in excess of the threshold current; such excess current is called mod~ tion current and hereinafter it is inrlic~ted with Im~ Typical values for Im vary roughly belween O mA and 30 mA.
When i.~rc.. ;~l;Qn is to be sent in digital form, it is cn~ nl~ p ~ctil~e to make a laser 20 current,only slightly higher than Is, coll~spond to a logic leveL This way, the device is always on and therefore when swilcl~g from a logic level to the other one, there is no delay due to the need to turn it on. A current given by the sum of Is and a certain value of Im is made to coll~spond to the other logic level; this value of Im is pl~ol~ional to the desired ~l~,nce bel~n the optical power associated to logic "l" and that 25 associated to logic "0". Such di~ ce is e-s~nti~lly chosen through a trade-off l~lv~en the need to increase the margin of noise i~ y (which cc~ ,.,~nds to high levels of Im) and the need for fast swilclling (which is ~cGomrlishYl by red~1cing Im)~ Tnc;cl~ont~lly~
k~eping the laser diode always above the threshold the ~bsence of input signal cc,ll~,*)ollds to one of the two logic levels and no i~d~ e conditinn~ can occur, which 30 could cause a strong di~iration `- 21~0~;~5 3 The laser diode is therefore a current-controlled device; typically, however, genc.~tol~
supply the signals as voltages at logic levels; thus, circuits are nece~s~ry which allow to impose current Is to the laser diode and to convert the voltages received by theinfc,."li1liQn generators into suitable mod~ tion cullenls Im to ~u~l~l~ose on said Is.
5 Moreover, the driving circuits must allow the conversion of signals having the highest possible frequency, typically of the order of hundreds of MHz, ~dllcing ~ ir~t~
powers to the ~ ... possible level.
Several driving circuits are known in the art; they are rnade using both GaAs teehnol--gy (where the basic COmpOl~e,-l~ iS the MESFET) and silicon teehnology (where the basic 10 co.n~ol~cnt is the BJT = Bipolar Junction Tr~n~i~tor). In the former case, fast circuits that can be integrated on the same chip with the laser diode are obt~ined, but the technology is very eA~.-si./e and does not allow the imple;..~ l;Qn of high co~ )onenl clen~ities. In the latter case, the bit rate and integration density can be high, but there is a high ~ iration of power.
15 As an ~ltçrn~tive to the two approaches m~ntioned above, another tç~hno1Ogy can be used; it uses silicon and its basic colllpollelll is the CMOS. Circuits in CMOS te~hnology assure a high integration density, low power ~lis~ al;oll and low costs, but on the other hand their o~.~lg ~equency is not very high and the power they di~ir~te is proportional to the square of the fl~llency. As an eY~mrle of applic~tiQn of CMOS
20 technolQgy to driving circuits for optical sources, one can mP.ntion what is des~ri~ by M. Steyaert et al. in the doc~lmPnt entitled "150 Mbit/s CMOS LED-driver and PIN-receiver IC for Optical C ~ tion"~ presented at the EEE 1992 Custom Integrated Circuits G.~ ce. This publi~tiol- presents a circuit, integrated in a single chip, for driving a LED at the frequency of 150 Mbitls. The circuit has at its input side a c~sc~le 25 of CMOS inverters whose fim~tiQn is to couple the CMOS or TIL circuits up~
with the LED driving stage. This driving stage c~n~ist~ ess~nt~ y of a current mi~r circuit, which makes a bias current flow through the LED, the value of the current being imposed once and for all by tlim~n~ioning an eYt~fn~l resistor, and of a tr~n~i~tnr that controls the modul~tion current, arranged in parallel to the current mirror. This circuit 30 has some drawbacks: in particular, it works poorly at high Ji~u~cies (>200 MHz), since in these c~n~litions there is an ~ccen~ t;on in the phenomenon of the prod~lction of ~ 215~6~6 4 disturbances that ongin~te on the ~wik;hillg fronts and propagate from the gate input of the transistor controlling the mod~ tion current, toward the branch of the current mirror circuit that sets the threshold current. This brings about a reduction in the signal-to-noise ratio of the output of the laser diode, since the current peaks caused by the aforesaid 6 di~ ballces reduce the dynamic range of the optical signal. Moreover, it is impossible to adjust the modulation current, whilst the nom;n~l bias culrent remains rigidly fixed by means of the e~rtern~l resistor.
The aforesaid drawbacks are obviated by the circuit provided by the present invention, which allows driving optical sources, in particular laser diodes. This circuit operates 10 effici..o.ntly at speeds that are well suited for the requirements imposed by optical fibre co....~-....icatic)n ~y~Lellls, preventing i,lt~lÇGl~,nce between the voltage and current driving signals in the optical source. It is possible to adjust the bias current, allowing to drive sources with dirrel~ threshold CU~ LS, as well as to adjust the mnd~ tion current.
Thanks to the use of CMOS technology, the circuit has low power ~ ratll)n and is1 5 cost-efficient.
The circuit in CMOS technology for high speed driving of optical sources acc~ lg to the present invention comrri~es - a bias current gene~t~r, - a mod~ tion current ge ~ o., 20 - a G~C?/de of CMOS ~ lt~,l stages which supplies a driving voltage to mod~ tion current gene~lor and receives digital signals at its input; and it is ch~r~teri~ed in that the bias current generator is a CMOS transi~tor, MP or MP', whose source is connecte-l to one of the power supply termin~l~, whose gate is conl-e~;led to a P t~rmin~l for controlling the bias current and whose drain is connected to one of the termin~l~ of the 25 optical source to be driven, w~ile the m~nl~ion current generator is a pair of CMOS
~n~i~torS, MM and MS or MS' and MM', ~ nge~ in series, one of which, MS or MS', has its drain connecte~ to said tçrmin~l of the optical source, its gate connectecl to the output of said ca~ca~le of inverter stages and its source conne~cted to the drain of the second tr~n~istrr of the pair, MM or MM', whose own source is connecte~l to said power 30 supply t~rmin~l and whose gate is con~ ;l~ to a termin~l M for modnlation control, the 2 1 ~ 0 6 5 6 5 values of said cullen~s depending only on the voltages imposed eYtern~lly on therespective control termin~
The characteristics of the present invention will be rendered more evident by the description that follows and by the enclosed drawings, related to a pl~;r~ d e~bodilllG.
5 thereof, where:
Fig. l and 2 represent two dual eY~mrles of integrated e.mbo-limPnt of the driving circuit according to the present invention;
Fig. 3 represents the eye di~m related to the schem~ti~ diagram represented in Fig. l.
In Fig. 1, a data source, not shown, supplies a driving voltage to input I of the first stage 10 of a cascade of d c. coupled CMOS inverters. Each stage of this c~c~le is composed of two CMOS tr~n~i~tors, one p-type and one n-type, with gates and drains connectedtogether and with sources connecte~ respectively to the positive power supply t~ormin~l Vdd and to ground. In static con-lition~, one tr~n~istor is saturated while the other one is cut off, so no current flows between Vdd and ground and no power di~siration occurs.
15 When there is a tr~n~itiQn from one logic level to the other, both tr~n~i~tors can contluct but the phenom~non is very rapid and th~,rolt; ~lissir~ted power is mo~lest The output of the last stage of this c~le is connected to the gate of a CMOS trfln~i~tor MS, of the p-type. This tran~istor drain is conn~cte~l to a temmin~l L, which can be connecte~ to the anode of an optical source to be driven, for eYamrl~ a laser diode with grounded20 cathode; the source of MS, in~te~ is co~n1ecled to the drain of a ~n~i~tor MM, whose gate is in turn connected to an eYt~m~l termin~l M which lcc~ives a voltage contr~lling the mo~lulation current, and whose source is connecte~1 to power supply terrninal Vdd.
Between Vdd and L there is also a p-type tr~n~i~tor MP, whose gate is conne,cted to the outside t~rmin~l P which receives the voltage controlling the bias current.
25 The (lim~.n~ion~ of the tr~nSistors used in the various stages of the cascade of inverters increase as the final stage is approached. The parasitic c~r~citi~s at the input of these inverter stages and the output ~ wll~ that they can supply or absorb are dir~c~yproportional to the surface areas of the tr~nSi~tors utilised. Procee~lin~ from the first to the last stage, therefore, the input capacity of the inverter stage increases, as well as the 30 available output current. In general, the charging and discl-algillg time of the input capacity of a driven stage, inversely p,~ ional to the Swikhillg speed of the input _ . ~ 21~0~6 6 voltage, decreases as the output current respectively supplied or absorbed by the driving stage increases.
Therefore the cascade of inverters having the transistor-~limensioning char~ctçri~tics described above allows to drive with sl1ffi~nt speed the input capacity of tran~istor MS, 5 whose area is relatively large precisely to allow it to provide fast enough current v~Ti~tion~ on the load. The problem of driving in an analogous way the gates of transistors MM and MP, both of which have an area that is co.--p~.~b1e to that of MS, need not be addressed, since they are subjected to voltages that remain collsklnt once they have been set at the desired value.
10 To ensure that the laser diode is under ...;n;...~.n~ optical emission ccn-liticns when at input I there is a s;gnal of low logic level, the nu~ of inverter stages is odd. Thus, when the voltage on I is at low logic level, the gate of MS is at high logic level and since the transistor is of the p-type, it is cut off, so that only the bias current supplied by MP
can flow toward termin~1 L; conversely, when voltage on I is at high logic leveL the gate 15 of MS is at low logic level and the tr~n~i~tor is saturated, i.e. it behaves like a switch swil~h~d on, and therefore the current that can flow toward t~min~l L is given by the sum of the bias current and of the mod~ tion current supplied by MM. These two CUllcllk. depend on the voltages to which t~rmin~1~ M and P are ..ubje~;led. These ~voltages are obt~in~l with eYtern~1 circuits, not shown in the Figure: in par~icular, both 20 the tension on M and that on P can be a~1jnst~d independently from each other, for instance connecting to each termin~l the cursor of a multi-turn pot~ntiom~ter connected between the power supply and ground and varying the positions of these cursors according to the voltages one desires to impose.
Fig. 2 ~ lcst~, a circuit similar to the one descri~ above, suitable for driving an 25 optical source whose t~rmin~ls are insul~t~1 from the case. The signal supplied by an i~Çn..n~lion source, not shown, is supplied to input I of a ca~c~le of inverters, which drives the ~ate of a n-type CMOS tr~n~ist )r, indicated as MS'. This tr~n~i~t~r, which acts as a switch for the mod~llation current, is connected through t~min~1 L to the cathode of an optical source. A n-type CMOS tr~n.~i~tor, inrlic~ted as MM', is arranged in series 30 with tr~nsi~tor MS' and its source is grounded while its gate is connpcteA to a termin~1 M. The voltage on M can be ~dj-1~ted eYt~rn~lly, for in~l .n-,e by rneans of a variable :'- l ZlS06~6 7 resistor, and on this voltage depends the ll~illlUm value of the modnl~tion current. A n-type CMOS transistor MP' has its gate connected to a termin~l P, its source connected to ground and its drain connected to termin~l L. Setting the voltage on termin~l p externally, it is possible to control the bias current flowing through the optical source.
5 Note that the voltage drop on the optical source has no influence on the values of the voltages Ixlweell gate and source of tran~i~tors MM', MP' and MS'.
In this case, an even nu~r of stages is used in the c~c~e of inverters: to a high logic level at the input of the cascade of inverters a high logic level colles~onds on the gate of MS', which is thus saturated and lets the m~lllation current supplied by MM' flow to 10 ground. In this operating contliti()n~ a current given by the sum of the mo~ tion and bias currents flows in the optical source. Conversely, when at the input of the cascade of inverters there is a low logic level, the gate of MS' is itself at low logic level and that tr~n~i~t~r is cut off, to that only the bias current is drained from the optical source.
Fig. 3 represents the eye (li~ram related to the schematic diagram in Fig. l for a flow of 15 data at 622 Mbit/s, where time (625 ps/division) is reported on the x-coordinates and the signal ~mplih1~le (l00 mV/division) is reported on the y-coor linates~ From this ~ ~m it is evident that noise is limited and inter-symbol error is practically absent. This means that the voltage that ~lete..~ es the value of the bias current and the voltage that clele~ es the value of the m~ul~tion current are not influence~l by the voltage 20 vari~ti~ n~ on the gate of the modu~ on switch transistor even for high bit rates.
It is evident that modifi~ation~ adaptations, integr~tion~ v;qri~tion~ and repl~.,ment~ of element~ with others functionally equivalent may be made to the eY~mp1e of embo~1im~ nt described above wilhoul departing from the scope of the cl~ims listed below; in par~cular, nothing pl~ellls ~alising the circuit described above with discrete 25 ~m~ollell~, rather than integrating it on a single chip.
The use of optical fibres in co.. ~ icAI;on systems nowadays is quite widespread and it allows to increase the speed of ~d~ s~ions and to reduce the size of the means used to carry the signals. However, at the current state of the art, a Large portion of the processing ~.ru~...~ on the ;~rc~ on transmitted is carried out on electri~æl signals.
There is, therefore, the need to create ;..l~. r~i.,g devices which allow to couple on one 20 side the i-~f ~ al;on sources and on the other the associated receivers with the optical fibre se~ments utilised for the connection In particular, the sources are provided with transducers that are capable of CcJ~ g the e~ l signals into optical r~di~tions to send into the fibre, while the ~ are provided with tr~n~lucers that are capable of converting the optical rarli~tion received into e~ c~l signals. In the former case, opto-25 elec~onic sources are used, such as laser diodes or LEDs, w}l~ ,as in the latter casephoto-detectors are typically used. The use of laser diodes is particularly widespread since the rP~i~tion emitted by these devices has advant~geous chara~teristi~ forl-; -.s,~-s~ n through optical fibre: in particular, the optical r~di~tion emitted is coherent and typically ~uollochlu~alic, with the additional advantage that the small wavelength of such a radiation allows the use of optical fibre cables with a smaller cross section colllpa,~d to that of the cables carrying the radiation emitted by other sources, such as LEDs. Once the optical source to be used has been chosen, the problem is how to drive it in such a way that, taking into account the source charactçr~tics, al)pl~liate optical 5 signals to send through the fibre will co,l~ond to the ele~rical signals emitted by the generator.
In laser diodes, the emi~ion of optical radiation occurs only when the current flowing through the directly pol~ri~ed device eYceeds a ~ l value, called threshold current and h~l~ih~te, in-licat~l as Is. Such threshold current in general depends on various 10 factors: first of all, by the level of technology and accuracy with which the laser diodes are ~.A~ ,d and, among the devices m~n~f~çtllred with the same process, by the inevitable di~ ion of the actual char~cteri~tics with respect to nominA1 ones. In any case, it is possible to set the variation of the threshold current of the most cn..~.~.m11y used laser diodes roughly between 5 mA and 30 mA.
15 Another characteri~t~ of laser diodes is the fact that the power of the optical r~ tinn emitted is directly plv~ol~ional to the in~ y of current flowing in the device in excess of the threshold current; such excess current is called mod~ tion current and hereinafter it is inrlic~ted with Im~ Typical values for Im vary roughly belween O mA and 30 mA.
When i.~rc.. ;~l;Qn is to be sent in digital form, it is cn~ nl~ p ~ctil~e to make a laser 20 current,only slightly higher than Is, coll~spond to a logic leveL This way, the device is always on and therefore when swilcl~g from a logic level to the other one, there is no delay due to the need to turn it on. A current given by the sum of Is and a certain value of Im is made to coll~spond to the other logic level; this value of Im is pl~ol~ional to the desired ~l~,nce bel~n the optical power associated to logic "l" and that 25 associated to logic "0". Such di~ ce is e-s~nti~lly chosen through a trade-off l~lv~en the need to increase the margin of noise i~ y (which cc~ ,.,~nds to high levels of Im) and the need for fast swilclling (which is ~cGomrlishYl by red~1cing Im)~ Tnc;cl~ont~lly~
k~eping the laser diode always above the threshold the ~bsence of input signal cc,ll~,*)ollds to one of the two logic levels and no i~d~ e conditinn~ can occur, which 30 could cause a strong di~iration `- 21~0~;~5 3 The laser diode is therefore a current-controlled device; typically, however, genc.~tol~
supply the signals as voltages at logic levels; thus, circuits are nece~s~ry which allow to impose current Is to the laser diode and to convert the voltages received by theinfc,."li1liQn generators into suitable mod~ tion cullenls Im to ~u~l~l~ose on said Is.
5 Moreover, the driving circuits must allow the conversion of signals having the highest possible frequency, typically of the order of hundreds of MHz, ~dllcing ~ ir~t~
powers to the ~ ... possible level.
Several driving circuits are known in the art; they are rnade using both GaAs teehnol--gy (where the basic COmpOl~e,-l~ iS the MESFET) and silicon teehnology (where the basic 10 co.n~ol~cnt is the BJT = Bipolar Junction Tr~n~i~tor). In the former case, fast circuits that can be integrated on the same chip with the laser diode are obt~ined, but the technology is very eA~.-si./e and does not allow the imple;..~ l;Qn of high co~ )onenl clen~ities. In the latter case, the bit rate and integration density can be high, but there is a high ~ iration of power.
15 As an ~ltçrn~tive to the two approaches m~ntioned above, another tç~hno1Ogy can be used; it uses silicon and its basic colllpollelll is the CMOS. Circuits in CMOS te~hnology assure a high integration density, low power ~lis~ al;oll and low costs, but on the other hand their o~.~lg ~equency is not very high and the power they di~ir~te is proportional to the square of the fl~llency. As an eY~mrle of applic~tiQn of CMOS
20 technolQgy to driving circuits for optical sources, one can mP.ntion what is des~ri~ by M. Steyaert et al. in the doc~lmPnt entitled "150 Mbit/s CMOS LED-driver and PIN-receiver IC for Optical C ~ tion"~ presented at the EEE 1992 Custom Integrated Circuits G.~ ce. This publi~tiol- presents a circuit, integrated in a single chip, for driving a LED at the frequency of 150 Mbitls. The circuit has at its input side a c~sc~le 25 of CMOS inverters whose fim~tiQn is to couple the CMOS or TIL circuits up~
with the LED driving stage. This driving stage c~n~ist~ ess~nt~ y of a current mi~r circuit, which makes a bias current flow through the LED, the value of the current being imposed once and for all by tlim~n~ioning an eYt~fn~l resistor, and of a tr~n~i~tnr that controls the modul~tion current, arranged in parallel to the current mirror. This circuit 30 has some drawbacks: in particular, it works poorly at high Ji~u~cies (>200 MHz), since in these c~n~litions there is an ~ccen~ t;on in the phenomenon of the prod~lction of ~ 215~6~6 4 disturbances that ongin~te on the ~wik;hillg fronts and propagate from the gate input of the transistor controlling the mod~ tion current, toward the branch of the current mirror circuit that sets the threshold current. This brings about a reduction in the signal-to-noise ratio of the output of the laser diode, since the current peaks caused by the aforesaid 6 di~ ballces reduce the dynamic range of the optical signal. Moreover, it is impossible to adjust the modulation current, whilst the nom;n~l bias culrent remains rigidly fixed by means of the e~rtern~l resistor.
The aforesaid drawbacks are obviated by the circuit provided by the present invention, which allows driving optical sources, in particular laser diodes. This circuit operates 10 effici..o.ntly at speeds that are well suited for the requirements imposed by optical fibre co....~-....icatic)n ~y~Lellls, preventing i,lt~lÇGl~,nce between the voltage and current driving signals in the optical source. It is possible to adjust the bias current, allowing to drive sources with dirrel~ threshold CU~ LS, as well as to adjust the mnd~ tion current.
Thanks to the use of CMOS technology, the circuit has low power ~ ratll)n and is1 5 cost-efficient.
The circuit in CMOS technology for high speed driving of optical sources acc~ lg to the present invention comrri~es - a bias current gene~t~r, - a mod~ tion current ge ~ o., 20 - a G~C?/de of CMOS ~ lt~,l stages which supplies a driving voltage to mod~ tion current gene~lor and receives digital signals at its input; and it is ch~r~teri~ed in that the bias current generator is a CMOS transi~tor, MP or MP', whose source is connecte-l to one of the power supply termin~l~, whose gate is conl-e~;led to a P t~rmin~l for controlling the bias current and whose drain is connected to one of the termin~l~ of the 25 optical source to be driven, w~ile the m~nl~ion current generator is a pair of CMOS
~n~i~torS, MM and MS or MS' and MM', ~ nge~ in series, one of which, MS or MS', has its drain connecte~ to said tçrmin~l of the optical source, its gate connectecl to the output of said ca~ca~le of inverter stages and its source conne~cted to the drain of the second tr~n~istrr of the pair, MM or MM', whose own source is connecte~l to said power 30 supply t~rmin~l and whose gate is con~ ;l~ to a termin~l M for modnlation control, the 2 1 ~ 0 6 5 6 5 values of said cullen~s depending only on the voltages imposed eYtern~lly on therespective control termin~
The characteristics of the present invention will be rendered more evident by the description that follows and by the enclosed drawings, related to a pl~;r~ d e~bodilllG.
5 thereof, where:
Fig. l and 2 represent two dual eY~mrles of integrated e.mbo-limPnt of the driving circuit according to the present invention;
Fig. 3 represents the eye di~m related to the schem~ti~ diagram represented in Fig. l.
In Fig. 1, a data source, not shown, supplies a driving voltage to input I of the first stage 10 of a cascade of d c. coupled CMOS inverters. Each stage of this c~c~le is composed of two CMOS tr~n~i~tors, one p-type and one n-type, with gates and drains connectedtogether and with sources connecte~ respectively to the positive power supply t~ormin~l Vdd and to ground. In static con-lition~, one tr~n~istor is saturated while the other one is cut off, so no current flows between Vdd and ground and no power di~siration occurs.
15 When there is a tr~n~itiQn from one logic level to the other, both tr~n~i~tors can contluct but the phenom~non is very rapid and th~,rolt; ~lissir~ted power is mo~lest The output of the last stage of this c~le is connected to the gate of a CMOS trfln~i~tor MS, of the p-type. This tran~istor drain is conn~cte~l to a temmin~l L, which can be connecte~ to the anode of an optical source to be driven, for eYamrl~ a laser diode with grounded20 cathode; the source of MS, in~te~ is co~n1ecled to the drain of a ~n~i~tor MM, whose gate is in turn connected to an eYt~m~l termin~l M which lcc~ives a voltage contr~lling the mo~lulation current, and whose source is connecte~1 to power supply terrninal Vdd.
Between Vdd and L there is also a p-type tr~n~i~tor MP, whose gate is conne,cted to the outside t~rmin~l P which receives the voltage controlling the bias current.
25 The (lim~.n~ion~ of the tr~nSistors used in the various stages of the cascade of inverters increase as the final stage is approached. The parasitic c~r~citi~s at the input of these inverter stages and the output ~ wll~ that they can supply or absorb are dir~c~yproportional to the surface areas of the tr~nSi~tors utilised. Procee~lin~ from the first to the last stage, therefore, the input capacity of the inverter stage increases, as well as the 30 available output current. In general, the charging and discl-algillg time of the input capacity of a driven stage, inversely p,~ ional to the Swikhillg speed of the input _ . ~ 21~0~6 6 voltage, decreases as the output current respectively supplied or absorbed by the driving stage increases.
Therefore the cascade of inverters having the transistor-~limensioning char~ctçri~tics described above allows to drive with sl1ffi~nt speed the input capacity of tran~istor MS, 5 whose area is relatively large precisely to allow it to provide fast enough current v~Ti~tion~ on the load. The problem of driving in an analogous way the gates of transistors MM and MP, both of which have an area that is co.--p~.~b1e to that of MS, need not be addressed, since they are subjected to voltages that remain collsklnt once they have been set at the desired value.
10 To ensure that the laser diode is under ...;n;...~.n~ optical emission ccn-liticns when at input I there is a s;gnal of low logic level, the nu~ of inverter stages is odd. Thus, when the voltage on I is at low logic level, the gate of MS is at high logic level and since the transistor is of the p-type, it is cut off, so that only the bias current supplied by MP
can flow toward termin~1 L; conversely, when voltage on I is at high logic leveL the gate 15 of MS is at low logic level and the tr~n~i~tor is saturated, i.e. it behaves like a switch swil~h~d on, and therefore the current that can flow toward t~min~l L is given by the sum of the bias current and of the mod~ tion current supplied by MM. These two CUllcllk. depend on the voltages to which t~rmin~1~ M and P are ..ubje~;led. These ~voltages are obt~in~l with eYtern~1 circuits, not shown in the Figure: in par~icular, both 20 the tension on M and that on P can be a~1jnst~d independently from each other, for instance connecting to each termin~l the cursor of a multi-turn pot~ntiom~ter connected between the power supply and ground and varying the positions of these cursors according to the voltages one desires to impose.
Fig. 2 ~ lcst~, a circuit similar to the one descri~ above, suitable for driving an 25 optical source whose t~rmin~ls are insul~t~1 from the case. The signal supplied by an i~Çn..n~lion source, not shown, is supplied to input I of a ca~c~le of inverters, which drives the ~ate of a n-type CMOS tr~n~ist )r, indicated as MS'. This tr~n~i~t~r, which acts as a switch for the mod~llation current, is connected through t~min~1 L to the cathode of an optical source. A n-type CMOS tr~n.~i~tor, inrlic~ted as MM', is arranged in series 30 with tr~nsi~tor MS' and its source is grounded while its gate is connpcteA to a termin~1 M. The voltage on M can be ~dj-1~ted eYt~rn~lly, for in~l .n-,e by rneans of a variable :'- l ZlS06~6 7 resistor, and on this voltage depends the ll~illlUm value of the modnl~tion current. A n-type CMOS transistor MP' has its gate connected to a termin~l P, its source connected to ground and its drain connected to termin~l L. Setting the voltage on termin~l p externally, it is possible to control the bias current flowing through the optical source.
5 Note that the voltage drop on the optical source has no influence on the values of the voltages Ixlweell gate and source of tran~i~tors MM', MP' and MS'.
In this case, an even nu~r of stages is used in the c~c~e of inverters: to a high logic level at the input of the cascade of inverters a high logic level colles~onds on the gate of MS', which is thus saturated and lets the m~lllation current supplied by MM' flow to 10 ground. In this operating contliti()n~ a current given by the sum of the mo~ tion and bias currents flows in the optical source. Conversely, when at the input of the cascade of inverters there is a low logic level, the gate of MS' is itself at low logic level and that tr~n~i~t~r is cut off, to that only the bias current is drained from the optical source.
Fig. 3 represents the eye (li~ram related to the schematic diagram in Fig. l for a flow of 15 data at 622 Mbit/s, where time (625 ps/division) is reported on the x-coordinates and the signal ~mplih1~le (l00 mV/division) is reported on the y-coor linates~ From this ~ ~m it is evident that noise is limited and inter-symbol error is practically absent. This means that the voltage that ~lete..~ es the value of the bias current and the voltage that clele~ es the value of the m~ul~tion current are not influence~l by the voltage 20 vari~ti~ n~ on the gate of the modu~ on switch transistor even for high bit rates.
It is evident that modifi~ation~ adaptations, integr~tion~ v;qri~tion~ and repl~.,ment~ of element~ with others functionally equivalent may be made to the eY~mp1e of embo~1im~ nt described above wilhoul departing from the scope of the cl~ims listed below; in par~cular, nothing pl~ellls ~alising the circuit described above with discrete 25 ~m~ollell~, rather than integrating it on a single chip.
Claims (6)
1. A CMOS driver for an optical device, comprising:
a bias current generator formed by a transistor having a source connected to a power supply terminal, a gate connected to a bias current control terminal, and a drain connected to a terminal of an optical device to be driven whereby a bias current is supplied to said optical device;
a modulation current generator for supplying a modulation current to said optical device and comprising a pair of series-connected transistors, a first transistor of said pair having a drain connected to said terminal of said optical device to be driven, a gate, and a source connected to a drain of a second transistor of said pair, said second transistor of said pair having a source connected to said power supply terminal, and a gate connected to a modulation current control terminal; and a cascade of CMOS inverter stages having an input terminal receiving digital signals and an output connected to said gate of said first transistor of said pair, said bias current and said modulation current having values depending only upon voltages applied to said bias current control terminal and applied to said modulation current control terminal and said input terminal, respectively.
a bias current generator formed by a transistor having a source connected to a power supply terminal, a gate connected to a bias current control terminal, and a drain connected to a terminal of an optical device to be driven whereby a bias current is supplied to said optical device;
a modulation current generator for supplying a modulation current to said optical device and comprising a pair of series-connected transistors, a first transistor of said pair having a drain connected to said terminal of said optical device to be driven, a gate, and a source connected to a drain of a second transistor of said pair, said second transistor of said pair having a source connected to said power supply terminal, and a gate connected to a modulation current control terminal; and a cascade of CMOS inverter stages having an input terminal receiving digital signals and an output connected to said gate of said first transistor of said pair, said bias current and said modulation current having values depending only upon voltages applied to said bias current control terminal and applied to said modulation current control terminal and said input terminal, respectively.
2. The CMOS driver defined in claim 1 wherein said cascade is composed of an odd number of said CMOS inverter stages, said transistor of said bias current generator and said transistors of said modulation current generator are p-type transistors, said power supply terminal is a positive terminal and said terminal of said optical device is an anode of said optical device.
3. The CMOS driver defined in claim 1 wherein said cascade is composed of an even number of said CMOS inverter stages, said transistor of said bias current generator and said transistors of said modulation current generator are n-type transistors, said power supply terminal is a ground terminal and said terminal of said optical device is a cathode of said optical device.
4. The CMOS driver defined in claim 1, further comprising a voltage source provided with said power supply terminal, and respective variable resistors connected between said bias current control terminal and said voltage source and between said modulation current control terminal and said voltage source.
5. The CMOS driver defined in claim 4 wherein said cascade is composed of an odd number of said inverter stages, said transistor of said bias current generator and said CMOS transistors of said modulation current generator are p-type transistors, said power supply terminal is a positive terminal and said terminal of said optical device is an anode of said optical device.
6. The CMOS driver defined in claim 4 wherein said cascade is composed of an even number of said CMOS inverter stages, said transistor of said bias current generator and said transistors of said modulation current generator are n-type transistors, said power supply terminal is a ground terminal and said terminal of said optical device is a cathode of said optical device.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT94TO000462A IT1268070B1 (en) | 1994-06-06 | 1994-06-06 | CIRCUIT IN CMOS TECHNOLOGY FOR HIGH SPEED PILOTING OF OPTICAL SOURCES. |
| ITTO94A000462 | 1994-06-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2150656A1 CA2150656A1 (en) | 1995-12-07 |
| CA2150656C true CA2150656C (en) | 1999-09-14 |
Family
ID=11412578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002150656A Expired - Fee Related CA2150656C (en) | 1994-06-06 | 1995-05-31 | Circuit in cmos technology for high speed driving of optical sources |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5589786A (en) |
| EP (1) | EP0687046B1 (en) |
| JP (1) | JP2640443B2 (en) |
| CA (1) | CA2150656C (en) |
| DE (2) | DE687046T1 (en) |
| IT (1) | IT1268070B1 (en) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6246278B1 (en) * | 1995-12-22 | 2001-06-12 | Lsi Logic Corporation | High speed single phase to dual phase clock divider |
| IT1285852B1 (en) * | 1996-04-24 | 1998-06-24 | Cselt Centro Studi Lab Telecom | HIGH SPEED PILOTING CIRCUIT OF OPTICAL SOURCES MADE IN CMOS TECHNOLOGY. |
| US5978393A (en) * | 1997-08-25 | 1999-11-02 | Digital Optics Corporation | Laser diode power output controller and method thereof |
| JP2001127366A (en) | 1999-10-25 | 2001-05-11 | Toshiba Corp | Solid-state laser device, method for controlling output thereof and power supply device for solid-state laser |
| US6211659B1 (en) * | 2000-03-14 | 2001-04-03 | Intel Corporation | Cascode circuits in dual-Vt, BICMOS and DTMOS technologies |
| JP2001326569A (en) * | 2000-05-16 | 2001-11-22 | Toshiba Corp | Led driving circuit and optical transmission module |
| US6493275B2 (en) | 2000-08-07 | 2002-12-10 | Matsushita Electric Industrial Co., Ltd. | Semiconductor integrated circuit device and electronic equipment |
| US7173551B2 (en) | 2000-12-21 | 2007-02-06 | Quellan, Inc. | Increasing data throughput in optical fiber transmission systems |
| US6590916B2 (en) * | 2001-02-08 | 2003-07-08 | Quantum Devices, Inc. | Method for fabricating a wave division laser array multiplexer |
| US7307569B2 (en) | 2001-03-29 | 2007-12-11 | Quellan, Inc. | Increasing data throughput in optical fiber transmission systems |
| US7149256B2 (en) | 2001-03-29 | 2006-12-12 | Quellan, Inc. | Multilevel pulse position modulation for efficient fiber optic communication |
| US7215721B2 (en) | 2001-04-04 | 2007-05-08 | Quellan, Inc. | Method and system for decoding multilevel signals |
| US7212580B2 (en) | 2002-02-15 | 2007-05-01 | Quellan, Inc. | Multi-level signal clock recovery technique |
| WO2003077423A2 (en) | 2002-03-08 | 2003-09-18 | Quellan, Inc. | High speed analog-to-digital converter using a unique gray code having minimal bit transitions |
| US7035361B2 (en) | 2002-07-15 | 2006-04-25 | Quellan, Inc. | Adaptive noise filtering and equalization for optimal high speed multilevel signal decoding |
| WO2004045078A2 (en) | 2002-11-12 | 2004-05-27 | Quellan, Inc. | High-speed analog-to-digital conversion with improved robustness to timing uncertainty |
| US7804760B2 (en) | 2003-08-07 | 2010-09-28 | Quellan, Inc. | Method and system for signal emulation |
| DE112004001455B4 (en) | 2003-08-07 | 2020-04-23 | Intersil Americas LLC | Cross-talk cancellation method and system |
| US7039258B2 (en) * | 2003-08-15 | 2006-05-02 | Luxtera, Inc. | Distributed amplifier optical modulators |
| US7515775B1 (en) * | 2003-08-15 | 2009-04-07 | Luxtera, Inc. | Distributed amplifier optical modulator |
| DE602004030032D1 (en) | 2003-11-17 | 2010-12-23 | Quellan Inc | METHOD AND SYSTEM FOR ERASING ANTENNA INTERFERENCE |
| US7616700B2 (en) | 2003-12-22 | 2009-11-10 | Quellan, Inc. | Method and system for slicing a communication signal |
| FR2872630B1 (en) * | 2004-07-01 | 2006-12-01 | St Microelectronics Sa | LOCKING PHENOMENON TOLERANT INTEGRATED CIRCUIT |
| US7522883B2 (en) | 2004-12-14 | 2009-04-21 | Quellan, Inc. | Method and system for reducing signal interference |
| US7725079B2 (en) | 2004-12-14 | 2010-05-25 | Quellan, Inc. | Method and system for automatic control in an interference cancellation device |
| JP5078991B2 (en) | 2006-04-26 | 2012-11-21 | ケラン エルエルシー | Method and system for reducing radioactive emissions from communication channels |
| US8840003B2 (en) | 2010-09-30 | 2014-09-23 | Ethicon Endo-Surgery, Inc. | Surgical stapling instrument with compact articulation control arrangement |
| JP6244674B2 (en) * | 2013-06-04 | 2017-12-13 | 富士通株式会社 | Optical communication apparatus and optical communication apparatus control method |
| US20200375483A1 (en) * | 2019-05-30 | 2020-12-03 | Welch Allyn, Inc. | Photoplethysmography device with a compensation current source |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4412140A (en) * | 1981-11-19 | 1983-10-25 | Motorola, Inc. | Circuit for reducing current to light emitting diode of optically coupled driver |
| US4819241A (en) * | 1985-08-16 | 1989-04-04 | Kabushiki Kaisha Toshiba | Laser diode driving circuit |
| SU1372612A1 (en) * | 1985-11-29 | 1988-02-07 | Предприятие П/Я М-5912 | Apparatus for transmitting digital signals with electrolytic separation |
| IT1201859B (en) * | 1986-12-10 | 1989-02-02 | Sgs Microelettronica Spa | LOGIC CIRCUIT CMOS |
| US5111065A (en) * | 1990-03-23 | 1992-05-05 | Massachusetts Institute Of Technology | Diode driver circuit utilizing discrete-value DC current source |
| US5089727A (en) * | 1990-04-02 | 1992-02-18 | Motorola, Inc. | Pulsed driver circuit |
| DE4227097A1 (en) * | 1992-08-17 | 1994-02-24 | Sel Alcatel Ag | Amplitude modulation circuit for laser drive signal - has first and third voltage-controlled current sources connected to first differential amplifier, and second current source connected to second |
-
1994
- 1994-06-06 IT IT94TO000462A patent/IT1268070B1/en active IP Right Grant
-
1995
- 1995-05-31 CA CA002150656A patent/CA2150656C/en not_active Expired - Fee Related
- 1995-06-01 US US08/456,712 patent/US5589786A/en not_active Expired - Fee Related
- 1995-06-05 DE DE0687046T patent/DE687046T1/en active Pending
- 1995-06-05 DE DE69500311T patent/DE69500311T2/en not_active Expired - Fee Related
- 1995-06-05 EP EP95108625A patent/EP0687046B1/en not_active Expired - Lifetime
- 1995-06-06 JP JP7161584A patent/JP2640443B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE69500311T2 (en) | 1997-10-02 |
| DE69500311D1 (en) | 1997-06-26 |
| JP2640443B2 (en) | 1997-08-13 |
| EP0687046A3 (en) | 1996-04-24 |
| US5589786A (en) | 1996-12-31 |
| ITTO940462A1 (en) | 1995-12-06 |
| DE687046T1 (en) | 1996-11-28 |
| JPH07335957A (en) | 1995-12-22 |
| IT1268070B1 (en) | 1997-02-20 |
| CA2150656A1 (en) | 1995-12-07 |
| EP0687046B1 (en) | 1997-05-21 |
| EP0687046A2 (en) | 1995-12-13 |
| ITTO940462A0 (en) | 1994-06-06 |
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