CA2152392A1 - Network adapter with host interrupt and indication management - Google Patents
Network adapter with host interrupt and indication managementInfo
- Publication number
- CA2152392A1 CA2152392A1 CA2152392A CA2152392A CA2152392A1 CA 2152392 A1 CA2152392 A1 CA 2152392A1 CA 2152392 A CA2152392 A CA 2152392A CA 2152392 A CA2152392 A CA 2152392A CA 2152392 A1 CA2152392 A1 CA 2152392A1
- Authority
- CA
- Canada
- Prior art keywords
- memory location
- host
- interrupt
- network adapter
- indication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
Abstract
Indication and interrupt signals generated by a network adapter (3) representing asynchronous events are managed by a host system (1). The network adapter (3) comprises a first mask logic (10) for selectively disabling the indication signals from being stored in a first memory location (10a-c) by the host writing to a first mask register (10).
A second mask logic which is coupled to the first memory location (l0a-c) also selectively disables the indication signals from being stored in the second memory location (10a-c) creating two levels of status information. The indication signals may also be disabled from being stored in the second memory location (10a-c) responsive to the host writing to a second mask register. The first memory location (10a-c) may be read from the host (1) in order to determine whether a network event' occurred during an interrupt service routine, while interrupt means (10) generates an interrupt signal to the host (1) responsive to the value in the second memory location (10a-c). A
third level of control is provided by an internal counter which allows for automatic enabling and/or disabling of a plurality of indications and interrupts with and without explicit commands in the host driver subroutines.
A second mask logic which is coupled to the first memory location (l0a-c) also selectively disables the indication signals from being stored in the second memory location (10a-c) creating two levels of status information. The indication signals may also be disabled from being stored in the second memory location (10a-c) responsive to the host writing to a second mask register. The first memory location (10a-c) may be read from the host (1) in order to determine whether a network event' occurred during an interrupt service routine, while interrupt means (10) generates an interrupt signal to the host (1) responsive to the value in the second memory location (10a-c). A
third level of control is provided by an internal counter which allows for automatic enabling and/or disabling of a plurality of indications and interrupts with and without explicit commands in the host driver subroutines.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/012,561 US5530874A (en) | 1993-02-02 | 1993-02-02 | Network adapter with an indication signal mask and an interrupt signal mask |
US08/012,561 | 1993-02-02 | ||
PCT/US1993/012652 WO1994018627A2 (en) | 1993-02-02 | 1993-12-28 | Network adapter with host interrupt and indication management |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2152392A1 true CA2152392A1 (en) | 1994-08-18 |
CA2152392C CA2152392C (en) | 2000-11-07 |
Family
ID=21755544
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002152392A Expired - Fee Related CA2152392C (en) | 1993-02-02 | 1993-12-28 | Network adapter with host interrupt and indication management |
Country Status (9)
Country | Link |
---|---|
US (1) | US5530874A (en) |
EP (1) | EP0682791B1 (en) |
JP (1) | JPH08506674A (en) |
KR (1) | KR0161101B1 (en) |
AT (1) | ATE372552T1 (en) |
AU (1) | AU675501B2 (en) |
CA (1) | CA2152392C (en) |
DE (1) | DE69334165T2 (en) |
WO (1) | WO1994018627A2 (en) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
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US5412782A (en) | 1992-07-02 | 1995-05-02 | 3Com Corporation | Programmed I/O ethernet adapter with early interrupts for accelerating data transfer |
AU706450B2 (en) * | 1993-07-06 | 1999-06-17 | Tandem Computers Incorporated | A processor interface circuit |
GB2298295B (en) * | 1995-02-23 | 2000-01-19 | Sony Uk Ltd | Data processing systems |
US5797037A (en) * | 1995-03-31 | 1998-08-18 | Cirrus Logic, Inc. | Interrupt request control logic reducing the number of interrupts required for I/O data transfer |
JP2625402B2 (en) * | 1995-05-24 | 1997-07-02 | 日本電気株式会社 | Microprocessor |
US5740448A (en) * | 1995-07-07 | 1998-04-14 | Sun Microsystems, Inc. | Method and apparatus for exclusive access to shared data structures through index referenced buffers |
US5909582A (en) * | 1996-04-26 | 1999-06-01 | Nec Corporation | Microcomputer having user mode interrupt function and supervisor mode interrupt function |
US5922046A (en) * | 1996-09-12 | 1999-07-13 | Cabletron Systems, Inc. | Method and apparatus for avoiding control reads in a network node |
US5999980A (en) * | 1996-09-12 | 1999-12-07 | Cabletron Systems, Inc. | Apparatus and method for setting a congestion indicate bit in an backwards RM cell on an ATM network |
US5966546A (en) * | 1996-09-12 | 1999-10-12 | Cabletron Systems, Inc. | Method and apparatus for performing TX raw cell status report frequency and interrupt frequency mitigation in a network node |
US5995995A (en) * | 1996-09-12 | 1999-11-30 | Cabletron Systems, Inc. | Apparatus and method for scheduling virtual circuit data for DMA from a host memory to a transmit buffer memory |
US5970229A (en) * | 1996-09-12 | 1999-10-19 | Cabletron Systems, Inc. | Apparatus and method for performing look-ahead scheduling of DMA transfers of data from a host memory to a transmit buffer memory |
US5941952A (en) * | 1996-09-12 | 1999-08-24 | Cabletron Systems, Inc. | Apparatus and method for transferring data from a transmit buffer memory at a particular rate |
US5881296A (en) * | 1996-10-02 | 1999-03-09 | Intel Corporation | Method for improved interrupt processing in a computer system |
US5854908A (en) * | 1996-10-15 | 1998-12-29 | International Business Machines Corporation | Computer system generating a processor interrupt in response to receiving an interrupt/data synchronizing signal over a data bus |
US6115776A (en) * | 1996-12-05 | 2000-09-05 | 3Com Corporation | Network and adaptor with time-based and packet number based interrupt combinations |
US6098105A (en) * | 1997-04-08 | 2000-08-01 | International Business Machines Corporation | Source and destination initiated interrupt method for message arrival notification |
US6012121A (en) * | 1997-04-08 | 2000-01-04 | International Business Machines Corporation | Apparatus for flexible control of interrupts in multiprocessor systems |
US6098104A (en) * | 1997-04-08 | 2000-08-01 | International Business Machines Corporation | Source and destination initiated interrupts for message arrival notification, and related data structures |
US6105071A (en) * | 1997-04-08 | 2000-08-15 | International Business Machines Corporation | Source and destination initiated interrupt system for message arrival notification |
US5875342A (en) * | 1997-06-03 | 1999-02-23 | International Business Machines Corporation | User programmable interrupt mask with timeout |
US6243785B1 (en) * | 1998-05-20 | 2001-06-05 | 3Com Corporation | Hardware assisted polling for software drivers |
US6189066B1 (en) * | 1999-01-26 | 2001-02-13 | 3Com Corporation | System and method for dynamically selecting interrupt time interval threshold parameters |
US6192440B1 (en) * | 1999-01-26 | 2001-02-20 | 3Com Corporation | System and method for dynamically selecting interrupt storage time threshold parameters |
US6189067B1 (en) * | 1999-01-26 | 2001-02-13 | 3Com Corporation | System and method for dynamically selecting interrupt quantity threshold parameters |
US6351785B1 (en) * | 1999-01-26 | 2002-02-26 | 3Com Corporation | Interrupt optimization using varying quantity threshold |
US6574694B1 (en) * | 1999-01-26 | 2003-06-03 | 3Com Corporation | Interrupt optimization using time between succeeding peripheral component events |
US6529986B1 (en) * | 1999-01-26 | 2003-03-04 | 3Com Corporation | Interrupt optimization using storage time for peripheral component events |
US6137734A (en) * | 1999-03-30 | 2000-10-24 | Lsi Logic Corporation | Computer memory interface having a memory controller that automatically adjusts the timing of memory interface signals |
US6526514B1 (en) * | 1999-10-11 | 2003-02-25 | Ati International Srl | Method and apparatus for power management interrupt processing in a computing system |
US6754755B1 (en) * | 2000-08-10 | 2004-06-22 | Hewlett-Packard Development Company, L.P. | Service request system using an activity indicator to reduce processing overhead |
US6889278B1 (en) * | 2001-04-04 | 2005-05-03 | Cisco Technology, Inc. | Method and apparatus for fast acknowledgement and efficient servicing of interrupt sources coupled to high latency paths |
MXPA03011599A (en) | 2001-07-02 | 2005-03-07 | Pfizer Prod Inc | One dose vaccination with <i>mycoplasma hyopneumoniae</i>. |
US20040128418A1 (en) * | 2002-12-30 | 2004-07-01 | Darren Abramson | Mechanism and apparatus for SMI generation |
US7389496B2 (en) * | 2003-07-02 | 2008-06-17 | Agere Systems Inc. | Condition management system and a method of operation thereof |
US7596779B2 (en) * | 2004-02-19 | 2009-09-29 | Agere Systems Inc. | Condition management callback system and method of operation thereof |
US20120166687A1 (en) * | 2010-12-22 | 2012-06-28 | Stmicroelectronics, Inc. | Computer Architecture Using Shadow Hardware |
US11476928B2 (en) | 2020-03-18 | 2022-10-18 | Mellanox Technologies, Ltd. | TDMA networking using commodity NIC/switch |
US11336383B2 (en) | 2020-06-24 | 2022-05-17 | Mellanox Technologies, Ltd. | Packet scheduling system with desired physical transmission time for packets |
US11388263B2 (en) | 2020-10-11 | 2022-07-12 | Mellanox Technologies, Ltd. | Packet transmission using scheduled prefetching |
US11711158B2 (en) | 2021-06-28 | 2023-07-25 | Mellanox Technologies, Ltd. | Accurate time-stamping of outbound packets |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
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GB1397438A (en) * | 1971-10-27 | 1975-06-11 | Ibm | Data processing system |
JPS55123736A (en) * | 1979-03-16 | 1980-09-24 | Hitachi Ltd | Interrupt control system |
GB2212291B (en) * | 1980-08-14 | 1989-11-29 | Marconi Co Ltd | Sighting system |
US4807117A (en) * | 1983-07-19 | 1989-02-21 | Nec Corporation | Interruption control apparatus |
US4631659A (en) * | 1984-03-08 | 1986-12-23 | Texas Instruments Incorporated | Memory interface with automatic delay state |
JPS619748A (en) * | 1984-06-25 | 1986-01-17 | Nec Corp | Input and output controller |
JPS6118059A (en) * | 1984-07-05 | 1986-01-25 | Nec Corp | Memory circuit |
US4768149A (en) * | 1985-08-29 | 1988-08-30 | International Business Machines Corporation | System for managing a plurality of shared interrupt handlers in a linked-list data structure |
US4933846A (en) * | 1987-04-24 | 1990-06-12 | Network Systems Corporation | Network communications adapter with dual interleaved memory banks servicing multiple processors |
JPH01126751A (en) * | 1987-11-11 | 1989-05-18 | Fujitsu Ltd | Grouping device |
JPH0769783B2 (en) * | 1987-11-16 | 1995-07-31 | 日本電気株式会社 | Exception handling method |
US5161228A (en) * | 1988-03-02 | 1992-11-03 | Ricoh Company, Ltd. | System with selectively exclusionary enablement for plural indirect address type interrupt control circuit |
JP2591181B2 (en) * | 1989-09-22 | 1997-03-19 | 日本電気株式会社 | Microcomputer |
JP2855298B2 (en) * | 1990-12-21 | 1999-02-10 | インテル・コーポレーション | Arbitration method of interrupt request and multiprocessor system |
US5179704A (en) * | 1991-03-13 | 1993-01-12 | Ncr Corporation | Method and apparatus for generating disk array interrupt signals |
EP0584257B1 (en) * | 1991-05-17 | 2004-08-04 | Packard Bell NEC, Inc. | Power management capability for a microprocessor having backward compatibility |
JP3176093B2 (en) * | 1991-09-05 | 2001-06-11 | 日本電気株式会社 | Microprocessor interrupt controller |
US5319752A (en) * | 1992-09-18 | 1994-06-07 | 3Com Corporation | Device with host indication combination |
-
1993
- 1993-02-02 US US08/012,561 patent/US5530874A/en not_active Expired - Lifetime
- 1993-12-28 EP EP94905972A patent/EP0682791B1/en not_active Expired - Lifetime
- 1993-12-28 WO PCT/US1993/012652 patent/WO1994018627A2/en active IP Right Grant
- 1993-12-28 JP JP6518024A patent/JPH08506674A/en active Pending
- 1993-12-28 DE DE69334165T patent/DE69334165T2/en not_active Expired - Lifetime
- 1993-12-28 CA CA002152392A patent/CA2152392C/en not_active Expired - Fee Related
- 1993-12-28 AT AT94905972T patent/ATE372552T1/en not_active IP Right Cessation
- 1993-12-28 KR KR1019950703189A patent/KR0161101B1/en not_active IP Right Cessation
- 1993-12-28 AU AU59873/94A patent/AU675501B2/en not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
EP0682791B1 (en) | 2007-09-05 |
AU675501B2 (en) | 1997-02-06 |
WO1994018627A2 (en) | 1994-08-18 |
WO1994018627A3 (en) | 1994-09-29 |
ATE372552T1 (en) | 2007-09-15 |
CA2152392C (en) | 2000-11-07 |
KR960700479A (en) | 1996-01-20 |
DE69334165T2 (en) | 2008-05-29 |
US5530874A (en) | 1996-06-25 |
AU5987394A (en) | 1994-08-29 |
JPH08506674A (en) | 1996-07-16 |
KR0161101B1 (en) | 1999-01-15 |
EP0682791A4 (en) | 1999-02-03 |
DE69334165D1 (en) | 2007-10-18 |
EP0682791A1 (en) | 1995-11-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |