CA2162015A1 - Multiplexed Synchronous/Asynchronous Data Bus and Method Therefor - Google Patents

Multiplexed Synchronous/Asynchronous Data Bus and Method Therefor

Info

Publication number
CA2162015A1
CA2162015A1 CA2162015A CA2162015A CA2162015A1 CA 2162015 A1 CA2162015 A1 CA 2162015A1 CA 2162015 A CA2162015 A CA 2162015A CA 2162015 A CA2162015 A CA 2162015A CA 2162015 A1 CA2162015 A1 CA 2162015A1
Authority
CA
Canada
Prior art keywords
data
data bus
communications lines
synchronous
asynchronous data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2162015A
Other languages
French (fr)
Other versions
CA2162015C (en
Inventor
Eric J. Overtoom
Manohar A. Joglekar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of CA2162015A1 publication Critical patent/CA2162015A1/en
Application granted granted Critical
Publication of CA2162015C publication Critical patent/CA2162015C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

Abstract

A multiplexed synchronous / asynchronous data bus (109) uses three communications lines (T, C, R) to convey bi-directional synchronous data between two data devices (115, 609) at a relatively low data transfer rate. The data bus is configured as a full-duplex asynchronous data bus by communicating a false address between the two data devices on two communications lines (T, C) using the synchronous data bus, holding the two communications lines (T, C) in a logic high state for a period of time, and continuing to hold one of the two communications lines (C) in the logic high state during full-duplex asynchronous communication. Full-duplex asynchronous data can then communicated between the two data devices (115, 609) at a higher data transfer rate on two of the three communications lines (T, R).
CA002162015A 1994-11-14 1995-11-02 Multiplexed synchronous/asynchronous data bus and method therefor Expired - Fee Related CA2162015C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/338,993 1994-11-14
US08/338,993 US5835785A (en) 1994-11-14 1994-11-14 Multiplexed three line synchronous/full-duplex asychronous data bus and method therefor

Publications (2)

Publication Number Publication Date
CA2162015A1 true CA2162015A1 (en) 1996-05-15
CA2162015C CA2162015C (en) 1999-09-07

Family

ID=23327000

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002162015A Expired - Fee Related CA2162015C (en) 1994-11-14 1995-11-02 Multiplexed synchronous/asynchronous data bus and method therefor

Country Status (4)

Country Link
US (1) US5835785A (en)
AR (1) AR000104A1 (en)
BR (1) BR9505156A (en)
CA (1) CA2162015C (en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100214624B1 (en) * 1996-12-03 1999-08-02 구자홍 Displaying device in ref.
US6324592B1 (en) 1997-02-25 2001-11-27 Keystone Aerospace Apparatus and method for a mobile computer architecture and input/output management system
KR100285956B1 (en) 1998-06-30 2001-04-16 윤종용 Apparatus and method for controlling synchronous and asynchronous devices connected to high speed serial bus
US6549917B1 (en) * 1999-04-29 2003-04-15 Waveware Communications, Inc. Synchronization of host computers and handheld remote computers
EP1050826A1 (en) * 1999-05-05 2000-11-08 Motorola, Inc. Method for operating a communication system on a serial bus
US6430624B1 (en) 1999-10-21 2002-08-06 Air2Web, Inc. Intelligent harvesting and navigation system and method
US6557062B1 (en) * 1999-12-09 2003-04-29 Trw Inc. System and method for low-noise control of radio frequency devices
US7076225B2 (en) * 2001-02-16 2006-07-11 Qualcomm Incorporated Variable gain selection in direct conversion receiver
US20050064835A1 (en) * 2003-09-18 2005-03-24 International Business Machines Corporation Audio system responsive to incoming phone calls
US7076237B2 (en) * 2004-08-05 2006-07-11 International Business Machines Corporation Traffic shaping of cellular service consumption through delaying of service completion according to geographical-based pricing advantages
US7328001B2 (en) * 2004-08-05 2008-02-05 International Business Machines Corporation Traffic shaping of cellular service consumption through modification of consumer behavior encouraged by cell-based pricing advantages
DE102007024737A1 (en) 2007-05-25 2008-11-27 Robert Bosch Gmbh Data transfer method between master and slave devices
US10312914B2 (en) * 2017-05-23 2019-06-04 Texas Instruments Incorporated Gate driver with serial communication
US11824658B2 (en) * 2018-07-25 2023-11-21 Ali Abedi Channel disruption wireless communication system
US20220190919A1 (en) * 2020-11-02 2022-06-16 Cisco Technology, Inc. Dispersing data rate to mitigate electromagnetic interference

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4654655A (en) * 1984-03-02 1987-03-31 Motorola, Inc. Multi-user serial data bus
US4803481A (en) * 1987-03-30 1989-02-07 Peaktronics, Inc. Asynchronous communications system
US5267263A (en) * 1987-04-23 1993-11-30 Cq Computer Communications, Inc. Method and apparatus for interfacing synchronous data devices over an asynchronous communications channel
US4972432A (en) * 1989-01-27 1990-11-20 Motorola, Inc. Multiplexed synchronous/asynchronous data bus
US5214774A (en) * 1990-07-30 1993-05-25 Motorola, Inc. Segmented memory transfer and message priority on synchronous/asynchronous data bus
US5150359A (en) * 1990-08-06 1992-09-22 Motorola, Inc. Multiplexed synchronous/asynchronous data bus
US5175820A (en) * 1990-08-31 1992-12-29 Advanced Micro Devices, Inc. Apparatus for use with a computing device controlling communications with a plurality of peripheral devices including a feedback bus to indicate operational modes
US5280623A (en) * 1992-03-04 1994-01-18 Sun Microsystems, Inc. Versatile peripheral bus
US5561821A (en) * 1993-10-29 1996-10-01 Advanced Micro Devices System for performing I/O access and memory access by driving address of DMA configuration registers and memory address stored therein respectively on local bus
JPH0844665A (en) * 1994-07-14 1996-02-16 Fujitsu Ltd Bus for supporting plural data transfer sizes and protocols

Also Published As

Publication number Publication date
CA2162015C (en) 1999-09-07
US5835785A (en) 1998-11-10
AR000104A1 (en) 1997-05-21
BR9505156A (en) 1997-10-21

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