CA2175970A1 - Information Processing System for Performing Mutual Control of Input/Output Devices Among a Plurality of Clusters - Google Patents

Information Processing System for Performing Mutual Control of Input/Output Devices Among a Plurality of Clusters

Info

Publication number
CA2175970A1
CA2175970A1 CA2175970A CA2175970A CA2175970A1 CA 2175970 A1 CA2175970 A1 CA 2175970A1 CA 2175970 A CA2175970 A CA 2175970A CA 2175970 A CA2175970 A CA 2175970A CA 2175970 A1 CA2175970 A1 CA 2175970A1
Authority
CA
Canada
Prior art keywords
cluster
transfer
input
control instruction
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2175970A
Other languages
French (fr)
Other versions
CA2175970C (en
Inventor
Michio Kitta
Akira Jippo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of CA2175970A1 publication Critical patent/CA2175970A1/en
Application granted granted Critical
Publication of CA2175970C publication Critical patent/CA2175970C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols

Abstract

In an information processing system including a first cluster which issues a control instruction for controlling an input/output device of another cluster and a second cluster which executes processing by the input/output device according to the control instruction, which are connected through a network interconnecting clusters, a processor mounted on the first cluster comprises a cluster discrimination unit for discriminating a cluster which executes the control instruction and an instruction transfer unit for transferring the control instruction to the corresponding second cluster depending on the judgment of the cluster discrimination unit, while a data transfer processing device mounted on the second cluster comprises a transfer buffer for temporarily storing the data to be transferred to another cluster, a transfer buffer control unit for controlling reading and writing of the data from and into the transfer data storage unit, and a transfer control unit for controlling the transfer buffer control unit according to the control instruction from the first cluster.
CA002175970A 1995-05-08 1996-05-07 Information processing system for performing mutual control of input/output devices among a plurality of clusters Expired - Fee Related CA2175970C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7109422A JP2766216B2 (en) 1995-05-08 1995-05-08 Information processing device
JP7-109422 1995-05-08

Publications (2)

Publication Number Publication Date
CA2175970A1 true CA2175970A1 (en) 1996-11-09
CA2175970C CA2175970C (en) 2000-02-08

Family

ID=14509847

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002175970A Expired - Fee Related CA2175970C (en) 1995-05-08 1996-05-07 Information processing system for performing mutual control of input/output devices among a plurality of clusters

Country Status (4)

Country Link
US (1) US5860026A (en)
EP (1) EP0742520A3 (en)
JP (1) JP2766216B2 (en)
CA (1) CA2175970C (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6154765A (en) 1998-03-18 2000-11-28 Pasocs Llc Distributed digital rule processor for single system image on a clustered network and method
JP3866426B2 (en) 1998-11-05 2007-01-10 日本電気株式会社 Memory fault processing method in cluster computer and cluster computer
US8225002B2 (en) 1999-01-22 2012-07-17 Network Disk, Inc. Data storage and data sharing in a network of heterogeneous computers
US6549988B1 (en) 1999-01-22 2003-04-15 Ilya Gertner Data storage system comprising a network of PCs and method using same
US6516343B1 (en) * 2000-04-24 2003-02-04 Fong Pong Computer system and method for enhancing memory-to-memory copy transactions by utilizing multiple system control units
JP2005149082A (en) * 2003-11-14 2005-06-09 Hitachi Ltd Storage controller and method for controlling it
JP2012256087A (en) * 2009-09-10 2012-12-27 Hitachi Ltd Data processing device and data processing method
WO2012137265A1 (en) * 2011-04-08 2012-10-11 Hitachi, Ltd. Computer, computer system, and data communication method

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4780808A (en) * 1981-11-27 1988-10-25 Storage Technology Corporation Control of cache buffer for memory subsystem
US4476526A (en) * 1981-11-27 1984-10-09 Storage Technology Corporation Cache buffered memory subsystem
US4607346A (en) * 1983-03-28 1986-08-19 International Business Machines Corporation Apparatus and method for placing data on a partitioned direct access storage device
US5212773A (en) * 1983-05-31 1993-05-18 Thinking Machines Corporation Wormhole communications arrangement for massively parallel processor
JPH07122868B2 (en) * 1988-11-29 1995-12-25 日本電気株式会社 Information processing equipment
US5218677A (en) * 1989-05-30 1993-06-08 International Business Machines Corporation Computer system high speed link method and means
US5133060A (en) * 1989-06-05 1992-07-21 Compuadd Corporation Disk controller includes cache memory and a local processor which limits data transfers from memory to cache in accordance with a maximum look ahead parameter
JP2780821B2 (en) * 1989-09-22 1998-07-30 株式会社日立製作所 Online dump method and disk subsystem
US5214768A (en) * 1989-11-01 1993-05-25 E-Systems, Inc. Mass data storage library
US5165038A (en) * 1989-12-29 1992-11-17 Supercomputer Systems Limited Partnership Global registers for a multiprocessor system
US5289470A (en) * 1992-12-14 1994-02-22 International Business Machines Corp. Flexible scheme for buffer space allocation in networking devices
WO1994027216A1 (en) * 1993-05-14 1994-11-24 Massachusetts Institute Of Technology Multiprocessor coupling system with integrated compile and run time scheduling for parallelism

Also Published As

Publication number Publication date
JPH08305677A (en) 1996-11-22
EP0742520A3 (en) 1999-09-01
JP2766216B2 (en) 1998-06-18
US5860026A (en) 1999-01-12
EP0742520A2 (en) 1996-11-13
CA2175970C (en) 2000-02-08

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