CA2177811A1 - Multiplexing digital signals for transmission to remote locations - Google Patents

Multiplexing digital signals for transmission to remote locations

Info

Publication number
CA2177811A1
CA2177811A1 CA002177811A CA2177811A CA2177811A1 CA 2177811 A1 CA2177811 A1 CA 2177811A1 CA 002177811 A CA002177811 A CA 002177811A CA 2177811 A CA2177811 A CA 2177811A CA 2177811 A1 CA2177811 A1 CA 2177811A1
Authority
CA
Canada
Prior art keywords
data
frame
packets
word
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002177811A
Other languages
French (fr)
Inventor
Christopher H. Birch
Christian V. Vanstaden
Walter R. Brooks
Paul D. Nicholas
Steven S. Lawrence
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Scientific Atlanta LLC
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2177811A1 publication Critical patent/CA2177811A1/en
Abandoned legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/16Analogue secrecy systems; Analogue subscription systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/007Unequal error protection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0072Error control for data other than payload data, e.g. control data
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0078Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083Formatting with frames or packets; Protocol or part of protocol for error control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/22Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/236Assembling of a multiplex stream, e.g. transport stream, by combining a video stream with other content or additional data, e.g. inserting a URL [Uniform Resource Locator] into a video stream, multiplexing software data into a video stream; Remultiplexing of multiplex streams; Insertion of stuffing bits into the multiplex stream, e.g. to obtain a constant bit-rate; Assembling of a packetised elementary stream
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/238Interfacing the downstream path of the transmission network, e.g. adapting the transmission rate of a video stream to network bandwidth; Processing of multiplex streams
    • H04N21/2383Channel coding or modulation of digital bit-stream, e.g. QPSK modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/238Interfacing the downstream path of the transmission network, e.g. adapting the transmission rate of a video stream to network bandwidth; Processing of multiplex streams
    • H04N21/2385Channel allocation; Bandwidth allocation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/242Synchronization processes, e.g. processing of PCR [Program Clock References]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41Structure of client; Structure of client peripherals
    • H04N21/426Internal components of the client ; Characteristics thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/4302Content synchronisation processes, e.g. decoder synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/4302Content synchronisation processes, e.g. decoder synchronisation
    • H04N21/4305Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/434Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving MPEG packets from an IP network
    • H04N21/4382Demodulation or channel decoding, e.g. QPSK demodulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/06Generation of synchronising signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/16Analogue secrecy systems; Analogue subscription systems
    • H04N7/167Systems rendering the television signal unintelligible and subsequently intelligible
    • H04N7/1675Providing digital key or authorisation information for generation or regeneration of the scrambling sequence
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/20Adaptations for transmission via a GHz frequency band, e.g. via satellite
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L2001/0098Unequal error protection

Abstract

A multiplex frame format for transmitting digital data in a data transmission system comprises a PACKETS portion comprising a highly error-protected region, a region having only Reed Solomon encoding as an error protection measure, and a portion including low speed data. The frame format also comprises portions for transmitting medium (AUDIO) and high speed (VIDEO) data streams following the PACKETS portion. Prior to transmission, the composed frame comprising the PACKETS, AUDIO and VIDEO portions is interleaved and the BLOCK SYNC and FRAME SYNC are added (110). A multiplex structure control packet word of the PACKETS
portion immediately follows FRAME SYNC. Thus, the FRAME SYNC word defines where interleaving begins. A demultiplexer (156) in concert with a microcontroller (158) of a decoder (154, 155) decodes the multiplex structure control word and related PACKETS and outputs digital data streams to related output peripheral processors (157).

Description

95/15655 , 2 1 7 7 8 1 1 PCI/US94/1366~
MULTIPLEXING DIGITAL SIGNALS FOR TRANSMISSION TO REMOTE LOCATIONS
This application is related by subject matter to U.S. application serial no. 08/160,828, entitled rsystem and Method for Transmitting a Plurality of Digital Services Including r ~ Imaging Services and Associated Ancillary Data Services" (44640-A-545), serial no. 08/160,841, entitled "Memory Efficient Method and Apparatus for Synch Detection~ (44641-A-546),serialno.08/161,159,entitled "AMulti-ServiceDataReceiverArchitecture" (44642-A-547), serial no. 08/160,830, entitled "System and Method for T ~ and Receiving Variable Length A~ Control for Digital Services" (44643-A-554), serial no.
08/160,827, entitled "System and Method for Providing Compressed Digital Teletext Services and Teletext Support Services" (44890-A-551), serial no. 08/160,848, entitled "System and Method for .~ Authori~ing Multiple Virtual Channels" (44891-A-550), and serial no. 08/160,839, entitled "Method and Apparatus for Locating and Tracking a QPSK Carrier"
(44852-A-549), all filed December 3, 1993.
I. r- ~ ~ of the lnvention A. ~ield of tbe l The present invention relates generally to digital signal i and more , to a system and method for ~ a plurality of digital services, including imaging services, for i to a plurality of remote locations.
B. r of the R ' Art With the growing trend toward a merger of the previously separate i ' O of ~- including voice and data i and television including satellite, broadcast and cable television, there has emerged an increased interest in developing adaptable t. systems capable of handling any one or more of a collection or plurality of such services. The primary media .. i~ for providing such services to date comprise, for example, coaxial cable, land-based microwave, so called cellular radio, broadcast FM, broadcast ~atdlite and optical fiber, to name a few.
Each media has its own . ~ For example, comparing cable and satellite for digital data i cable tends to have a medium error rate, but, when errors appear, the errors come in long bursts. Satellite as a media has a pretty poor error rate, primarily due to SUBSTITUI E SHEET ~RULE 26) -W09~115655 , 2 1 778 1 1 PCllllS94113664 the requisite weak signal power, and hence, low signal to noise ratio. In satellite, then, the poor error rate is specially corrected utilizing such techniques as ~,v..~uluvo..al error correctors, not required in a cable vl~V;I~ ' In copending U.S. application serial no. 07/968,846 filed October 30, 1992 and entitled "System and Mcthod for T ,, a Plurality of Digital Services," thcrc is described an encoder for generating a i, ' ' data stream carrying services to remote locations via, for example, a satellite or a cable .~ ' network. The generated data strea~n comprises a continuous sequencc of frames, each frame comprising two fields, and each field comprising a plurality of lines. A first group of lines of a field defines a transport layer and a second group of lines defines a service data rcgion. A fcature of the disclosed scheme is the ability to d~ lly vary the "i.' ' data stream from field to field. A further feature of thedisclosed scheme is that the data ~ rate of the . ' ' data stream is related to the frequency of known analog video formats, i.e. frame, field and horizontal line rates.
In copending U.S. application serial no. 07/970,918 filed November 2, 1992, entitled "System and Method for M~ irl~ v a Plurality of Digital Program Services for T
to Remote Locations," there is described another system, this for 'i, ' v a plurality of digital program services comprising a collection of, for example, video, audio, teletext, closed-captioning and "other data" services. According to the disclosed scheme, a plurality of subframe data streams are generated, each having a transport layer region and a program data region.
These subframe data streams are then ', ' ' together into . ' having a transportlayer region and a subframe data region.
While these disclosed i systems permit a variety of services to be transmitted over various media to remote locations, there remains a need to provide yet other altemative more ~;~,ulo~ly adapted to the wide variety of services that may be offered overvarious media and permit the end user at lhe remote location greater flexibility over the data content tbe user is ultimately enabled to receive. Moreover, such a system should be able to be easily adapted to transmit an increasing number of different serviccs in an ~1~, efficient manner, for example, utilizing the same or less bandwidth.
Since such services as high definition color television services, so-called "surround-sound~ digital audio services, interactive ~ l services for l- ~ g, l~l v~liOl.i"
first-run as well as classic movie ~ software delivery, interactive game, alarm services, energy and such all involve different bandwidths, data formats and such, there remains a need for flexibility in the overall structure provided for i ~ such SUBSTITLITE SHEET ~RULE 26) 2 1 7 7 8 1 1 PCT/US9411366~
services. Moreover, a user should not be presented with an u. ~ number of choices, but should be able, in a user-friendly manner, to select only those services which he is capable of receiving or wants to receive. Ideally, the user should be able to have access to an infinite variety of data services, selectable as he chooses, so that he may, for example, watch a first run movie in so-called high definition A ' ~ by a :IUII~ ~ sound" audio in the language of his choice and, at the same time, receive a facsimile or voice . over the same media. If the user is: ., ' 1, for example, to a standard resolution television and a telephone set, the user should be able to fashion the delivery of services to the equipment he owns.
n. ~ of the I
Briefiy stated, the present invention is directed to a system and method for ' i~ ' g a plurality of digital service data streams at varying data rates and ~ the services from an origination point to a plurality of remote locations. A digital service may comprise a collection selectable by the user from any-of a number of low data rate, medium data rate and high data rate services including, but not limited to, video (both standard and high resolution~, audio (from monaural to ~surround-sound~), and data (from ' , software to video games to high speed data-base ' ~ ) The present invention is described primarily in the conte~t of a pay television system such as a cable television or direct broadcast satellite system (DBS), that typicaUy distribute a variety of program services to for I on home terminal equipment which is the property of the end user or subscriber to the pay services. Such home terminal equipment may comprise video game apparatus, a television signal receiver (either standard or high ), a home computer, a printer ( eiti.er a facsimile or high resolution image printer), a stereo sound system, a telephone (including port~ble, mobile or stationary), a r' ' -1- , an energy system or alarm equipment interface, or any other knovin such apparatus or of apparatus. f~ , 'y, the present invention does not only envision the c... of the present invention to be so limited but may also include the i e..~
or other fi~ced or switched one-way or two-way program apparatus. It will be assumed, however, that such services be converted, if not already in digital form, to digital form for over the present system A method for i ~ a plurality of digital services including low speed data services, medium speed data services and high speed data services comprises the steps of removing parity, start and stop data from low speed digital data, x , ~i.;..~ medium and high S'llBSTlTUTE SHEET ~RULE 26) W095/15655 , 2 1 778 1 1 PCI/US94/13664 speed digital data streams, generating packets data comprising I ~ ' header data, the packets data including at least a multiplex structure control word and low speed data, fomming a data frame comprising rows and columns, the frame formed in: ' with the sequence of packets data including low speed data, medium speed data and high speed data, adding block-coded forward error correction data as necessary with the choice of medium, ' .h~g the frame by rows and columns and inserting hori20ntal row (block) and vertical colurnn (frame) -' words.
Moreover, the horizontal or block :1~ ' word, hereinafter referred to as BLOCK SYNC, may comprise from four to eight bits for ~ and substitute, therein, from zero to four bits of network signalling data at l!IC ' ' ' ' bit positions in the word For e%ample, if the horizontal ~ llu...L~lliull word is binary and comprises eight bits of altemating one and zero values, then, the network signalling data may comprise four bits at bit positions, for e~ample, the final four bit positions. In an altemative ....1,, " t,- the four bits of network signalling data may be located in a I
sequence of bit positions, for e%ample, at even or odd-numbered bit positions of the eight bit synch word A multiplex structure control (MSC) word precedes the packets data and comprisescounter data for a receiver according to the present invention Included within the MSC word are an end of packets marker, an end of medium speed dah marker and an end of high speed data marker The MSC word is the first word of the interleaved frame and " '~, follows the vertical or frame ~Il~,llloll;~lioll word, hereinafter referred to as Fl~AME SYNC.
C I ~y, the present invention permits the i of a plurality of services including ~ , .~~1 dah strearns such as per ISO 11171 or ISO 13818 M.P.E.G. , ~;U~I
standards and low speed data streams efficiently over limited bandwidth and in noisy, er-prone ~ Other features and advantages of the present invention will be more ly described in the following description of the present invention.
BRIEF DESCRII~lON OF llIE DRAWINGS
Figure I is a system block diagram showing a transmitter site 100 including an encoder and a receiver site 150 including a decoder according to the present invention for i 1, low data rate, medium data rate (audio) and high data rate (video) data . ' ' in a satellite system Figure 2a is a diagram showing a scalable multiplex frame, including ~, ' words BLOCK SYNC and FRAME SYNC, for i ~ a digital dah stream of low data SUBSTrrUTE SHEEr ~RULE 26) WO95/15655 2 1 7 7 8 1 1 PCTillSg4/13661 rate ~mcluded within PACKEIS), medium data rate (audio) and high data rate (video) data protected by Reed-Solomon encoding according to the present invention.
Figure 2b is a second diagram of the frame of Figure 2a wherein the PACKETS area is further broken down into first and second regions, the first region including packets with extra error protection and the second region including data protected only by Reed-Solomon encoding.
Figure 2c is a diagram showing that a sequence of frames in the form of Figures 2a or 2b are transmitted to a receiver according to the present invention.
Figures 2d(1) and 2d(2) provide alternative ' ' of a one byte horizontal h.~ (BLOCK SYNC) word which rnay include both ~ ' and network signaling data bits therein.
Figure 3 is an encoder block diagram for one preferred b~ ' of a portion of transmitter 100 of Figure I showing the comnection of audio and video . and low speed data fortnatters to a ~,' under control of a control computer for - ' bya modulator on to a carrier for i , for example, by satellite as shown in Figure 1.
Figure 4 is a detailed schematic block diagram of a "il '( 110 of Figures l or 3according to the present invention for outputing "i.' ' data according to the multiplex frame format of Figures 2a, 2b and 2c.
Figure S is a detailed block diagram of a portion of receiver 150 of Figure 1 showing tuner/d- - ' ' 154 and clock and data recovery 155 in greater detail.
Figure 6a is a detailed block diagram of a preferred l~ 'ti.' ~ t, the ' 'ti ' being responsive to synch and clock recovery a ~ ll' ' ' via Figure 5 and outputing data, clock and error flags on a bus 610 to data proccssors for low speed, medium speed and high speed data streams; figure 6b shows detail of low speed data processor 6æ of figure 6a; and figure 6c shows a typical low speed data packet.
Figure 7a shows a redundant ~ -O wherein the '~' ~ functions are duplicated such that if a particular ' i, ' fails for one reason or another, control may be transferred to the redundant 'i Figure 7b shows a -~ wherein there may exist a plurality of ' il ' ' serviceS for i via modulator of Figure 3 all under control of a single shared control computer wherein the modulator comprises a QPSK modulator and the data streams for the serviceS are combined as the I and Q inputs to the modulator for ., .~.;v.. to cable or satellite r...
s S~JBStlTUrE SHEET ~RIJLE 26) W09~ 6~5 2 1 778 1 1 PCT/US94/13664 Figure 8 is a graph of a ~ waveform signal for i~ apparatus, for exa~nple, ~ arranged according to Figures 7a or 7b.
Figure 9 is a schematic block diagram of a &gital waveform generator for generating the waveform graphically depicted in Figure ~.
Figure 10 is a table showing one example of a multiplex structure control word of PACKETS data according to the present invention which '~, follows vertical RAME SYNC) in a i ' frame of the present invention.
Figures lla and llb are tables showing examples of audio control and audio service descriptor words of PACKETS data for describing medium speed (audio) data services included within a particular transmitted fralne.
Figures 12a and 12b are tables showing examples of video control and video service descriptor words of PACKETS data for describing high speed (video) data services included within a particular transmitted frame.
DETAILED DESCRlPIION OF TEIE DRAWINGS
Referring now to Flgure 1, there is shown a transmitter site 100 including an encoder (and service ' - ) and a receiver site 150 including a decoder (and ~ "il' ) according to the present invention applied in the ~... of a satellite, system. Audio/video circuits 101(1) to 101(m) are shown for i..Ji~ , receiving audio service data and/or video service data, for e~ample, from a plurality of I "
providing such services. One such MPEG video known in the art is a National T ' , I td. (England) NTL 2000 video . , Similarly, a plurality of low data rate, for example, RS232 digital data services are received at low speed data formatters 105(1) . . 105(n). The ~ ;d~ ~ compress the received medium and high data rate data in accordance with known algorithms (for eJwnple, in accordance with currently known or proposed standards such as MPEG I or II, audio or video). The data formatters strip parity, start, and stop bits and other non r " payload data from the incoming formatted data and reforlnat the data into PACRETS data including a 3 byte header as will be further described herein in connection with a discussion of Figure 6c.
Control computer 120 controls ' ' 110 to time division multiplex the medium and high data rate streams output from 101(1) . . 101(m) and the low datarate stream~ output from formatters 105(1) to (n) into a serial data stream for output to modulator 130. The high speed data linlc connecting ii - 110 and modulator 130 may be coaxial cable, optical fiber or twisted pair, so long as the, is error free and at SUBST~TUTE SHE~T ~RULE 26) ~ W09S1156SS , 2 1 7 7 8 1 1 PCTiUSg4/13664 sufficient data rate. Modulator 130 then modulates the digital data stream on to a carrier and upconverts the carrier as necessary for via, for example, C, Ku or L band r,,.l .,. :. c through a satellite antenna 140. Modulator 130 may preferably comprise a quadrature phase shift key modulator known in the art for satellite ~ Satellite antetma 140 beams a signal including tbe modulated data to satellite 160 which may be functionally referred to as a I , ' . T , ' 160 simply repeats the received signal toward earth and satelIite receiver antenna 151.
Receiver site 150 typically includes a tuner/~ ~' ' 154 for selecting one of a plurality of channels to which satellite i 1,' ' ' 154 may be tuned. Tuner/!' ' ' 154 ~ b and outputs a ~ ' ' ' dah stream to clock and data recovery circuit 155.Clock and data recovery circuit 155 in turn outputs an error corrected data stream and D~ u.l;~io.. data to ~ 'i 156. D, `i 156, under control of display control processor 158, outputs ~ "i ' ' data streams to various output ports to subscriber equipment 159 via data processors 157. The data processors may, for example, include an MPEG ~' as will be further described herein in connection with Figure 6a.
A user may select one or more virtual or other channels by inputting, for example, channel numbers via a selector (K73D) 152 according to any known me7ns, e.g. remote control or front panel. The selection i~lfu~ liull is sent to display control processor (DCP) 158, which controls all aspects of the decoder's operation. A digital; , in-board security element (DISE) 153 is utilized for decrypting encrypted PACKE~TS or other data requiring decryption.
Further det~ils on DIS~ 153, may be found in U.S. 5,029,207, U.S. 5,237,610 and application Derial no., entitled ~Method and Apparatus for Uniquely Encrypting a Plulality of Services at a T - Site~ filed August 4, 1993 im the names of Gammie et al. and ~,' related to the present an~ 7ti~nJ all . ' herein by reference as to any subject matter deemed essential to tbe present invention.
The subscriber equipment 159 may comprise, for example, standard or high definition television reception e~uipment, digital audio reception ~,, t, digital data processors or computers, video game equipment, facsimile Ic~;~ energy , e~uipment and the like.
Tbe receiver site 150 may not only be a subscriber to services but may be a provider of senices such as a cable television system operator. In such a scenario, the receiver site 150 may not include typical subscriber equipment 159 but may imclude cable television system ~UBSTITUTE SHEET ~'RULE 26) Wo9s/1565s 2 1 7 7 8 1 1 PCTIUS94113664 ~
headend equipment known in the art including teleYision ' and digital audio ærvice providing equipment and the like.
ReferAing now to Figure 2a, there is shown a generic frame according to the present invention having highly flexible ~ The frame according to the present invention is lc ~ , arranged in rows and columns. The static or fixed elements of the depicted scalable multiplex frame according to the present invention are BLOCK SYNC (for example, one or two bytes of each horizontal row) and FRAME SYNC (which comprises part of the first row of the depicted frame). All other depicted elements of the frame are flexible and may change from medium to medium and from frame to frame. For example, Reed-Solomon error correction parity data may be provided for satellite i and omitted for less error prone forms of media. PACBTS data comprises control ' and low speed data services, as will be described in further detail herein.
~ loreover, the delineation between what is shown as PACKETS data and areas for medium speed (audio) and high specd (video) data portions are flexible, and the figure is not intended to show that the boundaries between such forms of data is fixed at any one point in the frame. A ~,.c l~ ' structure is provided to the frame in that FRAME SYNC follows the first byte of BLOCK SYNC in a frame according to the present invention. PACKETS data follows FRAME SYNCH, followed in turn by medium speed (audio) and high speed (video) data in that order. There will always be some PACE~ETS data for control purposes but, depending on the data services to be I l, there may not exist low speed data portions thereof, medium speed data sections or high speed data sections of a particular frame.
The depicted frame is irltended to show that each particular frame comprises a fixed number of bits in a horizontal direction which may for CO.I~ be defined as a ' number of bits of data. A practical maximum number of bytes (of eight bits each) in a horizontal direction is 256 includimg BLOCK SYNC, limited primarily by the 25~
byte capacity of Reed-Solomon decoding integrated circuits available in the market. This horizontal dimension measured in bits (256 bytes x 8 = 2048 bits), sometimes referred to herein in terms of columns of bytes, may vary depending on the 7rp~ ti.^n However, for a given segment (for example, a satellite segment portion of a system including cc,axial cable or optical fiber segments as well), the frame structAre in horizontal and vertical dimensions will remain const_nt; (see Figure 2c). Moreover, according to Figure 2c, i comprise a se~uence of frames transmitted at a frame rate Fr frames per second.

5~1TUTE SHEET ~WI 26 ~ W095/15655 2 1 7 7 8 1 1 PCT/US94113664 In a vertical dimension, a single frame may be defined as . . ~ a I l~ ' number of lines or rows of data, hereinafter referred to generaUy as blocks. Yet, the number of bytes in a block and the number of blocks vertically in a particular frame may vary.
3~egarding the first line or block, then, of the depicted frame, there is shown a first BLOCK SYNC word or block synch which is preferably one byte (8 bits) long. Of tbe 8 block sync bits, four to eight bits are set to a fixed pattern to achieve a robust ~ ' system.
The term "robust" is intended, for example, to . l, ~ h ; ~. the present system as one in which, at a receiver, and, even in a ~Li.,ul~l~ data error-prone media, horizontal and vertical u.u~tiull can be recovered, as necessary, on a frame to frame basis.
Thus, ~..~ u ~Liul- is assisted through the addition of the short, relative to FRAMB
SYNC, BLOCK SYNC word which appears as the first byte position of each row before ~II..dLic,.~ data bytes in the lines of a frame. The block synch word is repetitive at the same columnar location throughout a particular frame and is thus easily recognized and detected.
In an alternative " t, typically for utilization m a less error-prone media, some of the block synch bits at particular, I ~ ' locations in the word may be utilized for network signalling or other purposes, for example, in ' or transmitter (source) i-l.. ,l.~._~.. _lq~ ExamplesofsuchnetworksignaUingdataincludeso calledautomatictransmitter ' ~ signaUing and order wire, , alarm or other data utilized in digital ~' The number, then, and position of bits aUocated to network signalling must be fixed for any given segment of a network, as this a-priori ~ must be ~lu2~ ..~1 into the receiving device but may vary from segment to segment.
It is not ' ' that the number of bits reserved for a synch pat~rn be reduced to less tham four, except in networks or media which are virtually free of errors. Thus BLOCK
SYNC should comprise a minimum of four bits, preferably comprises am eight bit byte, and may comprise t vo bytes, depending on the; rr Locating tbe network signaUing bits at parlicular positions in a block synch word makes these bits accessible even in a ~ error-prone ~.~ where, for example, error protection techniques such as Reed-Solomon, Viterbi coding and il.t~ll~.iA.~ are utilized or before frame ~..1 lll~ is obtained or even required. Since such network signaUing or other data bits, however, may not be protected by block data forward error correction parity bytes, a simple running majority vote error corrector may be utilized, tnus .' ,, tbe network signaUing on otber data values. At a receiver site 150, tbe data may be r SULS~ITUTE SHEET ~RULE 26) wo gS/15655 2 1 7 7 8 1 1 Pcr/Uss4ll366 as a low speed data channel and/or stored m memory and, as already suggested, a majority vote error corrector utilized.
Referring now to Figures 2d(1) and 2d(2), altemative ~ of one byte horizontal 3LOCK SYNC) words according to the present invention will be dt~scribed by way of example. Referring frst to F;gure 2(d)1, an eight bit horiwntal :~J~ ' " word of eight bits is shown comprising alternating zero and one values 01010101. Such a horizontal word exhibits a particular frequency for a brief p riod of time and has an advantage of being easily detected in a noisy ellVU~ ' All eight bits in this example are utilized for ~ lllull~tiu~l and no bits remain as network signalling or other data capacity. The .J ` ulfl~iùll bits may just as easily comprise the pattem of 10101010 (not shûwn). If either word 10101010 or 01010101 is deemed acceptable to a receiver by c ~. then, a binary code may be utilized to transmit very low speed data over time via the BLOCK SYNC words.
The horiwntal ~ ,h., word of Figure 2(d)(1) may be locked to by cu.. ~. ' locking techniques, either frequency (phase) or pattem ~ogniti tn Referring, however, to Figure 2(d)(2), the fixed i~r ' pattern only comprises the first four bit positions and four bit positions 4-7 remain as variable data bits ~ for, for example, network signalling or other low speed data l purposes. For example, network signaling data may be indicated by storing in a receiver the fact that the latter four bit positions ~7 are utilized for network signaling data. By way of example, ' network signaling data 0111 may be transmitted æ variable data XXXX. A table of memory of a receiver 150 may be composed for '~ ~ of received networlc signalling ~ l~tu~tiu~ or other data and recognized by the receiver, as the læt four bit positions (shown). Upon receipt, for exarnple, the network signaling data may be compaIed with the stored table data and recognized as to network signalling .:/;' Instead of ~alutions other data of a particular BLOCK SYNCH word, the four variable data bits may be ' æ a low speed data chalmel over time.
Moreover, referring to Figure 2d(2), an dght bit horizontal synch word is shown where the ~J..~ IIIU..~iiUII pattern portion comprises alternating ones and æros 1010 at opposite bit positions from Figure 2d(1) for the f rst bit positions 0-3. Also, the first four bit position could just as easily comprise the ~ ;UII pattem 0101, either pattern still ~ ." the same frequency. Block or line synch may be detected by frequency (phæe) detection or by pattern detection.

SUBSTlTUrE SHEET ~'FlULE 26) Each ,, described or derived from Figures 2(d)(1) or (2) or . ' or variations thereof may have advantage in different media segments of a lengthy;
chain, for example, involving optical fiber, satellite, coaxial cable, twisted p~ur and the like and their ~ y to data errors.
- Referring again to Figure 2a, the FRAME SYNC word prefeRbly comprises a fixed duRtion, for example, on the order of 64 bytes of pseudo-random data. The 64 byte word can be known to transmitter 100 and receiver 150 alike and determined from a given ~1.~ ' such as:
X~i'8+X~6+X~5+X+ 1.
Further details on BLOCK SYNC and FRAME SYNC ~' and recovery at a receiver may be found in copending, U.S. application serial no., entitled "Memory Efficient Method and AppaRtus for Synch Detection," (44641-A-546) and serial no. , entitled "Method and Apparatus for Locating and TRcking a QPSK Carrier" (44852-A-549) filed '~, herewith and r ' ~ herein by reference.
Referring again to Figure 2a, PACKETS is intended to refer to a collection of, for example, control data, system data and low speed data service packets in blocks (rows). The control and system data are intended to signal or control a receiver 150 to, for example, identify the data types or data services and the respective dat~ beginning and ending boundaries to follow as well as provide a basis upon which an end user may control his receiver to receive and output data services as he chooses. In other words, the user's selection of services is only limited by their on-hand equipment and their "l~f~...~ to particular ones of the services in pa~ticular , of the various '~' ' data streams or blocks that follow in the data stream (low, medium, high speed data).
By low speed data is intended telete~t, facsimile, conditional access, alarm, energy 1~ t, certain audio and other data streams which typically exhibit data rates of less than sixty-four kilobytes per second. By medium speed data is interlded high quality coded audio such as ~surround-sound~ and medium speed data Rtes between, for example, 64 I~ilobytes per second amd Tl carrier (i ' ` rates of rr l~, one megabit or more per second. Medium speed audio data is prefeRbly ~ I~ in a~wl ' with well-known audio, . algorithms known in the art. Then, by high speed data, is intended some' or non- , ' forms of video up to data rates required for high definition color television (HDTV). By EIDTV is intended Japanese MUSE, European, so called Grand Alliance proposed U.S. format or other HDTV format. Such a frame structure is not SllBSTlTUT~-SHEET ~RULE 26) WO 95/15655 , PCT/US94113664 intended to be fixed; for example, the present suggested data rates may be broken into only two regions of low and high speed data. ~ .el~ " for example, low speed data will always be included within PACKETS data and precede higher speed data sections of the frame, and high speed data will always foUow slower speed data and prexde the FRAME SYNC word for the next frame.
The size of a particular frame is dictated by the i medium and the data to be carried. One of the features of the present invention is a I of the number of bytes utilized for ~ l,ll or er correction and a of the payload or data portions of the frame. Thus, transmitter power and signal to noise r ' objectiYeS
are achieved along witb r " payload Then, large frames are inherently more efficient, and there is an improved tolerance of long burst errors, for example, in a cable ~v Other factoTs weigh against the choice of a large frame. These include the speed of achieving ~y at a TeCeiVer and the cost of erTor correction CiTCUitry such as de-ih~t~ll~v ,, memoTy costs at a receiver site.
In an erTor-prone ellV t, error protection is provided by a Reed-Solomon block c~de denoted REED-SOLOMON and appearing in Figure 2a as a narTow but long lC. ~ ' column at the right of the figure. In the horizontal OT block width dimension, the practical maximum is on the oTdeT of 255 bytes of r " and erTor protection and, to achieve T= 10 (coTTection for ten errors) within that 255 bytes, there wiU be 20 bytes of the 25S bytes reserved for Reed-Solomon paTiq~ The 255 byte baTrier is pTimarily set by standaTd Reed-Solomon block decoding integrated ciTcuits known in the art; howeveT, the 255 byte barrier may be breached with time. Of course, if the i media is practicaUy data erTor-fTee, theri, Reed-So~omon pariq data can be practically eliminated. FOT some cable systems e~chibiting a medium erTor rate, a T=5 Reed-Solomon data protection scheme may be more -rr r As is shown in either Figure 2a or 2b, the Reed-Solomon block code is appended to tbe F ~ . data bytes as for vard erTor correction (FEC) paTity bytes. The propoTtion of FEC
bytes to ' bytes is on the order of fTom one to ten peT cent derJending on the paTticulaT
medium or mixture of media or application (one per cent meaning only two of 255 bytes for Reed Solomon parity). The size of each block of data then, ' data bytes plus FECbytes, is now pTeferably less than 255 set, as previously suggested, by the availability of commodity electTonic imtegrated circuits.

SllBSTl~UTE SHEET ~ULE 26) wo 95/15655 2 1 7 7 8 1 1 PCT~ S94,l366~
To provide additional protection against extended bursts of errors, a number of blocks are grouped in the depicted frame, and bytes are shuffled between blocks according to a ' ' algorithm known to transmitter and receiver alike. This process is most , described as ' v _ The number of blocks over which ' ~ ,, is performed (or "depth" of i,.t~ ) is chosen ag~un for the medium and the expected burst error lengths.
L-t~,ll~v , is applied at a transmitter site 100 and de-i..t~ ll~v ~ at a receiver site 150 because a byte correcting limit of 16 errored data bytes of 255 data ' bytes is a practical upper limit for Reed-Solomon while ' ' ~ " or swapping rows and columns of a frame for i l, is a strategy that can improve data recovery in a burst error-prone e..~ To recover data and correct errors therein, a receiver must first identify the boundaries of the interleaved frame, reverse the byte shuffling and then apply the Reed-Solomon correction algorithm. As already indicated, this frarne boundary of the interleaved frame is identified by the specific bit pattem of the FRAME SYNC word embedded in the i ' il ' ' data stream. Typically, the interleaved fr~unes are received in a sequence of constant sized frames, and so the FRAME SYNC word is repeated on a periodic or frune basis.
The regular detection of the FRAME SYNC bit pattem is the basis of reliable frune boundary ~' even in the presence of many data errors.
The boundary of the interleaved frame is also used to mark the start of the scalable rl~u-,~-l as.d multiplex which is carried as the data r ~ payload. Referring briefly to Figure 5 and 6a, in the receiver, this periodic r ' ~ ' ~ signal is fed forward from the error corrector stage (Figure 5) to a ' "il ' stage (Figure 6) in parallel with the corrected data and any indication of FEC failure (error flag) due to e~cessive errors.
According to the present invention, it is ~ that the high speed (video) data sampling rate conform to the CCIR standard 601 sampling rate at 13.5 megahertz. This clock rate may be easily generated if the multiplex rate of the present invention is chosen to comprise multiples of 2.25 megabits per second. The 13.5 MHz clock rate is ~u~ useful since it has common elements in botn the European 625 and North American and Japanese 525 line worlds.
Referring to Figure 2c, the frames of either Figure 2a and 2b are ' as a sequence of frames at a rate and having a width (columns) and length (rows) which are limited to the bandwidth of the i channel. According to the present invention and for satellite i in particular, it is suggested to utilize a data frame rate on the order of 50 SUBSTITUTE SHEET (~UI E 26 WO 95/15655 , 2 1 7 7 8 1 1 PCII[IS94/13664 Hertz. Other frame rates besides 50 Hz are possible and within the scope of the present invention.
A nearly square, but not perfectly square, frame is preferred and thus the practical ma-Aimum limit on the vertical dimension is about 512 rows or blocks.
The scalable r ~ 1~i multiplex is configured to allocate data capacity to various data inputs. Normally, this is a static aUocation of frame capacity, but, as data service priorities are h ~ at a control location or transmitter site, the il ' of the present invention u~t~ input buffers of the individual input data services to determine the required data aUocation _ Iy, even on a frame-by-frame basis as required. Given new service or prioritieS, the "i,' preempts data capacity from lower priority data services as a higher priority service requires an increased aUocation of frame capacity.
As reallocation of frame capacity may result in an I . ' '~ , of a par~icula~ low priority service, an alternative mode of operation is to establish an upper bound to the data rate for each SeNiCe, so that aU data servioes can be guaranteed carriage under all The .IlulLi~ ,A~ . then reduoes the frame capacity aUocated to each service should the maAimum capacity not be required. Thus, the need to byte stuff null data into a servioe stream simply to conform to a p.~ d~; ~ frame capacity is minimized as is any on a reoeiving data prooessor to determine valid from invalid or v r ~ ~- ~f~d null data.
PACKETS data will now be described which follows the FRAME SYNC word in the frame. Cerlain PACKETS data is utilized to identify the number of bytes provided in a frame for a particular servioe when byte stuffing is required. Si~A bit packet headers uniquely "~ the type of descriptive ' to follow in a I ' ' packet length. For c-Aample, two types of packets may be Video Servioe Descriptor packets and Audio Servioe Descriptor packets. Referring briefly to Figure 12b, the packet header for the video descriptor wiU be 100101 and, referring to Figure llb, for audio 10"011, by way of e~ample. Other headers will ~ '' other packets up to a ma~imum of si~ty-four different types ofPACKETS.
As indicated before, a reasonable ma-Aimum number of video servioes is 32, so the header is followed with a video service identifier comprising five bits; see Figure 12b, the video servioe stream number. Since a practical limit on audio servioes is si-Aty-four, following the header will be an audio servioe identifier of si-A bits; see Figure llb, audio servioe stream number. In the video packet, one way to identify high definition is to utilize an HDTV flag bit; see Figure 12b, HDTV video output. If the flag is set for a particular video servioe, then a control signal may SUvSTrrUl~ SHEET (RULE 26) ~ W095/15655 2 1 778 1 1 pCl[~US94113664 be preferably transmitted via a connector to .~ ul decoder equipment to switch an HDTV
receiver display from standard to high resolution processing modes or vice versa; see Figure 6a, HDTV flag output of video processor 630.
The service byte count word preferably follows the header and video service identifler amd HDTV flag. The service byte count word determines tbe number of bytes for a particular identified service, for example, 17 bits (2**17 bytes maximum); see Figures I lb and 12b. One service byte count packet is sent for each identified data service (audio or video or other service) whenever null data or byte stuffing is required. A ~ ' at a receiver site 150 initializes a counter at the beginning of each frame for each identified service. The byte counter matches the byte count for the service against the 17 bit service byte count word. If the service byte count is reached before the end of a frame, the data service outout is suspended and the balance of the data in that service in that frame is presumed to be L.., :. r' ~ff~l null data. (See Figure 2a, hatched area in last row of the frame).
No service byte count packet may be sent for a patticular identified servi¢e. In that case, it is assumed that the full ~lcd~ ' frame capacity is allocated to that service with no null bytes T ' ' '.~ following the FRAME SYNC word is a MVX Structure Control~ packet;
see Figure 8. In a satellite e..~lh~ tt the , of this packet is reflected in providing extra forward error correction and im its position, always following FRAME SYNCH. One suggested means of providing extta forward error correction for tbis packet is to utilize a 5:1 majority logic, (3,2,13) Cu~l.. ' ' code.
The MUX (mutliplex) sttucture control packet comprises some 100 to 200 bits of ;.. r.. ~ (according to Figure 8, it preferably comprises 144 bits). For example, one included word may be a sttucture control type word for permittmg a static defmition of the frame structure; for example, when only one static collection of data r~vices is ,' l, then the sttucture control type wiU in shorthand define a pattieular l ' ' static structure. For example, for b - rr ' , it may be: , ' ' that the overaU frame sttucture wiU remain static and l The sttuctute eontrol packet (MSC)also defines the vatiable ~ Jt~ , or session length (in frames) and the erypto-cycle count, for example, from one to 64 (or even 256) maximum via an eight bit byte (see Figure 10), which may be dynamieaUy redefined. There is also an end of PACKETS marker, an end of medium (AUDIO) speed data marker and so on which can initiate counters to signal the end of the portions of the packet type to a decoder. There also are SIJBSTITU~E SHEET ~RULE 26) ~Yogs/ls6ss i 2 1 778 1 1 PCT/IIS94/1366~ ~
preferably included other counter data such as the number of bytes per data service, such as medium speed data service and high speed data serYice. There is also a signal as to when the end of extra forward error correction PACKETS data is reached (region 1 in Figure 2b). In Figure 10, region I is deflned as all packets indicated aboYe the double line boundarY of the table. Region 2 is all packets indica~ed below the double line boundarY.
Referring to Figure 2b, the PACKETS data portion of the multiple~c frame, then, may be further defined to consist of two regions: one region including the Mux Structure Control packet requiring additional forward error correction and a second region requiring no additional forward error correction than the Reed-Solomon coding proYided for each row or block (excluding BLOCK SYNC and FRAME SYNC). Examples of PACKETS in region 1 are the multiplex structure contro~ packet (Figure 10), audio and Yideo control packets (Figures 1 la and 12a) and seed packets for decryption.
Other categories of PACKETS data do not, then, require additional forward error correction. These indude any 32 and 42 byte packets described further herein. Thus, region 2 includes cyclic system data, composite virtual channel and definition packets for providing what may be perceived as additional data services, addressed data packets for i messages to addressed decoders, text and low speed data packets and other service packets (OSP). Teletext services and virtual channels are further described in related 1, . ' serial nos. (44890-A-551) and (44891-A-550) to the present application and are not further described herein. .
Now, an encoder according to the present invention will be further described with reference to Figure 3. It has akeady been described that an encoder according to the preSent imvention typically involves AIV , 101(1) to 101(m). Particular suggested capacities for one such A/V, . , for example, . 101(1) are to limit the number of input video streams to I arld to provide up to a maximum of four audio input streams (or two stereo streams) each comprising left and right input streams.
It has also been described that low speed data formatters 105(1) to 105(n) be provided.
Typically, however, each low speed data formatter may handle, for example, sixteen or even thirty-two input data streams. t~ " it is .' ' that the number of such formatters required will number only I or 2. Low speed data formatters typically receive low speed data in a ~,.c ' ' format, such as RS232, and strip the data of any header data, st~t data, stop data, parity data and such depending on the plc.l. l ' and identified input data SUBSTlTUtE SHEET ~RULE 26) -~ WO 95115655 2 t 7 7 8 ~ 1 PCT~US94/1366~
strearn so that only true ;,.1..".- ~;."- carrying data remains in a serial data stream. The data is then ~fvl-~ ~ into packets as per Figure 6c for passage to buffer 412 (Figure 4).
Now, the ' . ' 110 of Figure 3 will be described in further detail with reference to Figure 4. Audio/video service strearns Al to An are received frorn audio/video at audio/video data buffer 410. Service '~' 110 operates to multiplex a plurality of digital service streams for i to remote locations. Also shown imputs to a low speed data buffer 412 from low speed data formatters 105(1) to 105(n). Buffer 410 (audio/video) and buffer 412 for low speed data preferably signal a buffer fullness condition to the next functional element, for example, encryption block 415, if encryption is desired, or on to multiplex frame formatter 418 for low speed data. ~ncryption block 415 is intended to represent the inclusion of, for example, single or double tiers of encryption in -- ' with seeds and keys and particular, I ' ' algorithms as required for the digital service streams, for example, in a pay L..~' ' Other digital data is input from a text/graphics input computer, for example, teletext data to text data processor 416 via computer interface 414 to the service "i, ' 418.
I' ' ' access data is input, for example, from a billing computer or subscriber service computer for storage in conditional access data buffer 417. C ' ' access data typically defines the services, especially pay services, to wbich a subscriber has - ' This data interfaces also via interface 414 and is processed and packeted into region 2 PAC~ETS via I access data processing block 417 for input to multiplex formatter 418.
Thus, at the output of mu~tiplex (~U~ block 418 is a '~ ' ' frame structure as described by Figures 2a, 2b and 2c. The output digital stream is Reed Solomon encoded according to an a~ I. ' encoding scheme depending on the noise ~ of the media by a well known Reed Solomon encoder 454. Then, preferably in a highly noisy ~.. t, the frame is interleaved on a byte or word (rows and columns switching) basis at interleave block 462. Interleave circuit 462 interleaves the data frame by i ~ ~
row and column addresses of data within the frame. Lasdy, BLOCK SYNC and FRAME SYNC
are inserted into trne frame just prior to at synch insert block 458. This data t'nen appears at a receiver at its original location in the frame wbile aU other data is interleaved.
Clock 420 provides clocks to any and all blocks requiring same including, but not limited to Reel Solomon 454, Multiplex 418, interleave 462 and sync insert 458. MUXSYNCH signals will be described in connection with Figures 7, 8 and 9.

SUBSrlTllTE SHEET ~RULE 26) WO9511~655 2 1 7781 1 Pcrluss4/l366 Referri-ng now to Figure 5, there is shown a receiver 150 per Figure 1 im greater detail.
Receiver 150 includes a tuner 579 and a ~' ' ' 580 already shown comprising ' ' 154 of Figure 1. Such do not always comprise elements of a decoder. The tuner, for example, may preferably be a '-' device as may the d ~ ' ' 580. In an alternative ~ b~ ' the tuner and ' ' ' together may comprise a ' ~ ' device. In yet a third altemative ~ ~ " t, the ' ~ ' ' may comprise an element of the decoder as shown in Figure 5.
According to Figure 5, ~ 581 (Figure 1, DCP 158) controls tlmer 579, ~' ' ' 580, Viterbi circuit 582, clock amd data recovery (CDR) circuit 584 and Reed Solomon decoder circuit 588 and together comprise a decoder according to the present invention.
Further det;lils of the operation of tuner 579, ~' ' ' 580, Viterbi circuit 582 and CDR
circuit 584 for locking to incoming signals are found in co-pending, . ~.~ filedapplication serial no., entitled "Method and Apparatus for Locating and Tracking a QPSK
Carrier" (44852-A-549) ~ ' as to essential subject matter herein. Mi~ 581 (Figure 1, DCP 158) also controls ~ ' 614 of Figure 6 as will be ! ~
described in greater detail. r 580 con~.prises a standard QPSK .' ' and Viterbi circuit 582 standard Viterbi error protection filtering known in the art. On the other hand, clock and data recovery ASIC 584 may preferably comprise a custom integrated circuit for operating in accordance with U.S. application serial no., entitled "Memory EfficientMethod and Apparatus for Synch Detection" (44641-A-546), S~ir.~.~ . ~ herein by reference. According to that, r-' " , one memory 586 is shared for syrlch recovery and for ~' ' v ~ functions. First, s~ ' for horizontal or bloclc b,~ ~ '' is recovered; then, the frame b~ h~ n is recovered. The frame s.~ ' then signals the release of the memory for ~ purposes. Memory 586 may be a ~ .. ' or standard dynarnic random access memory (64k x 16, for e~ample, or larger) or a Irandom access memory hlown in t'ne art, for example, a Toshiba TC5183 pseudo-static RAM.
Memory 586 may be integrated within the CDR ASIC 584.
A data stream received from the satellite or cable system is tuned to by tuner 579 and then ~ ~ ' ' ' by ' ' ' 580, preferably a QPSK ~' ' ' known in the art. The ' ' ' data stream is passed to Viterbi circuit 582 for error correction. The partially corrected signal is passed to clock and data recovery circuit 584 which v~ith ,' ' ~1..~, memory, for example, dynamic random access memory (DRAM) 586. The output of clock and data recovery circuit 584 is (1) digital service data which is passed to Reed S~IBSJIl~ITE SHEET ~RULE 26) WO 9511565~ , PCT/I.'S94/1366~1 Solomon circuit 588 for decoding, (2) clwks and (3) a frame sync pulse. The clock and data recovery circuit first recovers horizontal or block synch from the BLOCK SYNC word, then vertical or frame synch from FRAME SYNC, and then can output the digital ' ' service stream data with assurance for RS decoding at functional block 588 which may be a standard RS de.-oder integrated circuit known in the art. r ~ of network signa'.'~ing or other data included in BLOCK SYNC may occur at CDR 584 in with ~ ` 581.
Referring now to Figure 6a, the outputs of the clock and data recovery circuit (clocks, frame sync, RS data from Reed Solomon circuit 588 and an error flag depending on errors) are preferably passed to ;' 'i, ' 612 (~' i 158 of Figure 1 shown in greater detail).
D ~i ' 612 is contro led preferably by the same I ~ " as l " 581 of Figure 5 which may be a decoder control processor for contro.,ing the entire set of operations of a decoder according to the present invention. In an alternative, ' t, L_ "
614 may be separate from IIL~CI~ 581 and operate in sequence with that lvll~i ~ for example, over a common bus (not shown). Front panel 616 is intended to indicate the same or simi'ar function to KBD 152 of Figure 1. M;~l~vl~llu l_ 581/614 may operate in concert under control of a remote control or other uær keyboard for tuning and control purposes as ~.yyl~ r ' (referred to generically as front panel 616). Mi. 1~ "
581/614 preferably com^riæs an ~Lylv, '~ selected and L ~ ~ I ' Oyl~l~ such as a Motorola MCM68HC11, including on board or externa'. read only and/or random access memory as required for the particu~lar q"pl ~qtfr~n The ~' i, ' dah streams comprise, for example, video, audio, te~t and low speed data streams which may be gated into respective data processors 630, 620, 618, and 622 responsive to mu'ltiple~ structure control data words as i~terpreted by ~' i, ' 612. Other processors (not shown) may be a~so provided on the bus and be provided individual enable leads which operate to gate t'~e service data streams into the , . ærvice stre~rn processor.
A fifth type of periphera. processor that is not shown is an optional service processor for processing optiona'l ærvice data (of optiona'. ær-~ice packets) other t.an data types which may be processed by the data processors 618, 620, 622 and 630. An expansion socket is provided for expanding the data processing capabiities to other processors not shown. Such an ad. ~ is further described in U.S. app,ication æria. no. , entided "A
Medhod Service Data Receiver A ' I (44642-A-547), in which the data streams may '~, flow through to the periphera'l processors, for example, processors 618, 620, 622 and 630 without any 1~, for buffer memory. The MSC control word (Figure 10) SIIBSTIIUTE St EET (RULE 26) WO 95/15655 2 1 7 7 8 1 PCrllJS94113664 provides counter data as previously described which, under control of ~uller 614, is utilized to actuate ENABLE signals of data bus 610 as a~ UI The counters may be contained within the MUX applicatiûn specific integrated circuit 612 ûr Illi~ ulh,~ 614.
In one i ~ ... the low speed data pr~cesso} 6æ and the text processor, shown separately, may be integrated with ' '~,' ASIC 612.
Referring now to Figures 6b and 6c, the recovery of low speed data from PACKETS
(Figure 2a or 2b) is further described. Figure 6b provides pa~ticular detail of low speed data processor 622. Low speed data from data bus 610 is enabled via an enable lead to enter header stripper functional block 624. The data payload then is forwarded to buffer 626. ~ f", .~
628, under control of system clock and user input as to the ~ype of data, outputs one or more low speed data streams with reincluded parity, start, stop bits and so on as required.
The l ' data packet is shown in Figure 6c and preferably comprises a three byte header (24 bits). The bits are allocated as to packet type (four bits) which, for example, signal RS232 data, four bits for 1 of 16 service numbers, six bits for byte coumt, two bits for rate trim, three bits for selecting baud rate and the rest spare. The data payload of serial data may, for example, comprise 312 bits (39 bytes), tbe depicted packet then comprising a total of 42 bytes.
Rate trim of, for example, 2-3 bits is for fine tuning a divided down system clock to closely meet the expected data rate, for example, 2400, 48ûO, 96~J0 and so on due to any difference that might exist between, for example, a divided dûwn 27 MHz clock and the desired baud rate. A rate trim of 00 may represent a û% scaling, 01 .5%, 10 1% and 11 2%. Baud rate may be encoded, for example, such tbat 0OJ0 represents 3ûO baud, 001 600 baud, 101 1200 baud, . . . 100 4800 baud and so on up to 111 , lg a 38.4 kb (or 64 kbps) rate.
At times, the desired output data rate may e~ceed the input data rate. In such a situation and in accordance with the present invention, the data may be output at a higher rate than received, for example, in a sequence of bursts with RS232 formatting ~' ' by the , rl~. of the receiver.
Referring now to Figure 7a and Figure 7b, two ~ are shown for providing ' ~ ' l lO in a hot-standby and dual l/Q QPSK modulator input ~
According to Figure 7a showing a redundant ~ g -l;...., two ' il ' are configured such tbat one is a hot standby for the other. Should, for example, ' i, ' 110(1) fail for some reason, operation can be switched to ' ~' 110(2) through duplicated links from A/V
101(1) to lOl(m). Similarly, if one modulator 130(1), for example, fails, then Sl,113STI~JTE SHEET (RULE 26) Wos5/156s5 2 1 7 7 81 1 PcT/Uss4/13664 whichever ' ' is activated can input data to the other modulator 130(2) through duplicated links to each.
According to Figure 7b, modulator 130 is a QPSK modulator having I and Q input streams, for example, at 21.5 megabits. Then, a plurality of 2m services can 'oe handled (in a non-redundant manner) by the depicted dual multiple~ (single thread) ~ -~ under control of control computer 120 at 43 megabits. One 'i ' , for example, 110(1) receives inputs from AIV . . 101(1) to 101(m) while the other '~, ` 110(2) receives inputs from A/V ~ . 101(m+1) to 101(2m). In a cable c..~ t, one advantage is that the I
and Q data streams may be .' ' .- ' and provide outputs on two or three or more cable channels.
In the ~ v of Figures 7a, 7b or other: ~ involving plural or other digital or analog data input equipment, it is typical for equipment to be ~ ' ' utilizing a continuous wave signal for locking all equipment requiring a reference. For example in i ' ~ systems, it is known to provide continuous "pilot" signals at various r,~ for }egulation, alarms andlor protection switching control in steps of a multiplex above a channel bank level. For example, accurate pilot ~ I at 104.08 ~Iz, 100. 8 kE~, 315.92 kHz, 2.84 MHz, 5.888 MHz and 13.92 MHz are generated to + or -.1 dB.
For digital video . , however, a more convenient frequency for a continuous wave clock signal is 13.5 MHz for reasons already described or multiples or thereof, especially, according to the present invention, 3.375 MHz (13.5 MHz14). As a result, the phase lock loop design for locking to the frequency is simplified. Moreover, 3.375 MHz falls within the standard ' ~;J~II, of practically any known video format, either standard definition or high definition, and so can be carried over any c~ . media including twisted pair, cable or optical fiber.
According to the present invention, a 50 Hz frame ~ '~ signal may be inserted to confor~n the digital "frame" of the present invention as already discussed. A synch signal at 50 Hz is one which is identically utilized in several different known or proposed television formats. On the other hand, the apparatus for generating a ~.~h.~,..l " signal for the apparatus of Figures 7a and 7b should not be construed so narrowly. A 60 Hz or other convenient p' signal c~n likewise be employed as desired. The illt~ u~lioll (or trigger) signal signals an analog 3.3775 MHz signal generator to begin dampening to zero according to a cosine squared damping function and insert a special frame identifier signal at a p~
location signal, for example, within one cycle of receipt of the interrupt signal. This special gJBS~lT~E SHEE~ tRULE 26~

Wo95/ls6ss , 21 778 1 1 Pcrluss4ll3664 signal then signals a precise frame synch location, for example, by means of a zero crossing and preferably comprising one cycle of a sinusoidal waveform at a higher signal level but of j..;rl~ltly lower frequency; (see Figure 8).
It is desirable to avoid ~ , ' ' locking circuitty of the prior art and thus speciaUy design the ~ ' signal for locking various encoder location equipment (and decûder equipment, if necessary) wherever situated. The signal shown in Figure 8 achieves this objective amd is generated by , ~ at 50 hz the generation of the continuous wave signal of 3.3~5 MHz and .5 v pp. After receipt of the ~ iu.. signal, the signal size is increased in amplitude from its original size, for example, up to twice its size as shown, from .5 volt peak to peak to I v peak to peak (although in an alternative ' ' t, one may select from the range .375 to I volt for the continuous wave signal and .75 to 2.0 volts pp for the marking signal depending on the ~rp~ n) A 1 volt maximum peak to peak signal has greaterhowever, im the television atts. The frame synch marker comprises a ramp-down (or ramp-up) portion to a maximum level of ~ ' duration, a maximum level portionof the same duration in the opposite sense and a zero crossing coincident with the subcartier's zero crossing between the two half cycles of maximum level. During a transition from the 3.375 M~Iz wave to the special marker signal por~ion, a one cycle duration cosine squared dampening section may comprise a single half-cycle wave half amplitude portion at .25 volt pp.
(shown) foUowed by a fuU cycle at zero level signal. As a result, the signal according to the present invention has no DC component that can be AC coupled and no clamping is required.
The signal that is generated , : a natural cosine squated dampening that results in no shatp transitions to upset any locking circuitry. On the other hand, the signal accotding to Figure 8 is capable of being locked by any number of well known i ' , , including frequency locking, zero crossing detection, amplitude detection,; ' of these or other w..~, ' i ' , Also, the sync edge section . ~ ' to a cosine squated pulse having a half period of 590 1 ' (2 cycles) which results in a null at 3.375 MHz,preferably, the frame marking zero crossimg. A multiple of 12 cydes defines the entite special marking signal. Six cycles precedes the ftame marking zero crossing and six cydes foUow the frame marking zero crossing.
While the signal may be generated utilizing analog signal generators, referring no~v to Figure 9, there is shown a &gital waveform generator for provi&ng a ;~ l-lul~ s waveform in a ' with the present invention and, in patticular, the waveform shown in Figure 8.
The waveform generator comprises plUL, ' '- array logic circuit 901 for generating SUBSTI~U~E SHEET (RU~E 26) 2~ 7781 1 WO 95/15655 PCT/US94/1366 ~
addresses for addressing a ~ ' read only memory or other memory device 902. The PAL 901 receives clock signal, preferably at 13.5 MH~ and controls counter 902 at the 13.5 MH~ rate. Counter 902 addresses 1~ f ROM or other memory 902. P~
ROM 902, in tum, outputs digiti~l data in paraLlel ~ ~ waveform signal levels to be generated, the wavefomn of Figure 8, to digital to analog converter 903 which outputs equivalent analog signals according to the input digital levels. The output digital values of digital to analog converter 903 are, , ' 'y shown in the wavefomn of Figure 8; the boxes represent clocked outputs over time of D/A converter 904. For example, the 3.375 MHz wave is generated by outputing the values 128, 192 and 65 from PROM 903 to D/A converter 904 which may be stored at address locations of PROM 903.
In one ~ ~ - ' of the digital waveform generator, counter 902 simply . '~, counts through a sequence of numbers under control of PAL 901. Under control of PAL 901 then a counter ~ 'y counts (outputs four PROM addresses) 0 (for 128 stored at that address), l (192), 2(128), 3(65) at each tick of a 13.5 MHz clock and returns to 0 (128) until an interrupt signal (TNT) is received. If the interrupt signal is received, the counter continues to count through additional addresses of the PROM 902 beyond 0-3 in stead of going back to 0, namely, 4(128), 5(192), 6(128), 7(96, half: .' ' ), 8-12 (128), 13 (123), 14 (109), 15 (84), 16 (65), 17 (40), 18 (20), l9 (6), 20-28 (1), 29 (11), 30 (38), 31 (79) and 32 (128), the frame marking zero crossing, and so on to 59 (65), or fifty-six additional addresses. Once t'ne spfcial wavefomm is generated under control of PAL 901 after the interrupt signal, counter 902 resumes counting addresses only 0 to 3 to generate the 3.375 MHz waw ag~un until the next interrupt signal. While four addresses uniquely deflne a continuous periodic waveform, a greater number of addresses output at a faster frequency provides a better definition of the wavefomm.
In other i ' " the functions of the counter are embodied in the PAL circuit 901.In yet other ~ L - ' tne PAL circuit 901, counter 902 and memory 903 functions may be replaced by a simple , ~l. Other ' ' of a digital waveform generator may come to rnind of one of ordinary skill in the art from an ~ iul. and further study of t'ne waveform of Figure 8.
The output of the D/A converter 904 is then filtered at low pass filter 905 and amplified as necessary at amplifier 906 for delivery to any and aLI equipment requiring regulation, alarm signalling or switching input. The filter is preferably set to the low pass baseband of interest, gJ6511~U~t SHET~ULE 26) 2 l 7781 1 wogs/156ss Pc~luss for example, the video bandwidth, and the amplifier 906, typically an opcrational amplifier, provides assurance that the output signal is within 1~ ' ' level tolerances.
The waveform generator of Figure 9 may be provided as a plug-in or other module of ,' 110 of Figure 4 associated with clock 420 and coupled to synch inserter 458 for controlling synch insertion. The waveform generator of one such ' il' , for example, 110(1), then may be a master and be provided with a convenient output port for controlling ~y11~l11u1fi~8i~J11 of other i, ' : slaved to it in ~, such as Figures 7a or 7b or other equipment. In the alurnative the waveform generator may be a separate stand-alone unit.
Now particular details are provided with reference to Figures 10 to 12 and included tables for the multiplex frame format of the present inveùtion.
Th~ Multiplex Frame Structure The multiplex (MU~ frame structure is divided up into four (4) distinct sections: a highly error proucted section which carries control data and non-repeating conditional access (region I in Figure 2b); a low data rau section (region 2 in Figure 2b) which carries services requiring a data rate, for example, no greater than 64 Kbps such as teleuxt or utility data or optional service packets (region I and 2 together are defined as the paclcet region, PACKETS); a medium dah rate section which carries services re~uiring data rates from 64 K
to I megabits per second such as MPEG audio (this is defined as the AUDIO region); and a high dah rate section which carries services requiring dah rates from I M to 20 M bps such as MPEG video (this is defined as the VI~EO region).
As e~plained previously, the MUX frame structure preferably has a structure which is composed of rows of bytes arranged into columrls. The MUX may have from 2 bytes to 255 bytes per row (excluding BLOCK SYNC) and have from I to 511 rows.
Frr~r ProUction/Correction The entire MUX frame, with the exception of the BLOCK SYNC and FRAME SYNC
sections, is protected by a Reed-Solomon (RS) Error Correcting Code (ECC) wbich provides adequate protection for the service regions, but not enough for the control section (region 1) in the PACKETS section of the MUX frame.
The frame structure control section, which is the first part of the MUX frame has additional error prouction because it contains the: r~ ;"" which is used by a ~
of a decoder to d~ ' the M13~ frame. The non-repeating conditional access section related to ~ ... of particular subscriber decoders to receive certain, for example, pay portions of the MUX also has additional error prouction.

S~lBSTiTUTE SHET ~5UJLE 26 WO 95/1565~ PCT/IIS94/13664 The rest of the MUX frame, which contains repeatable conditional access data, teletext, utility data, OSPs (optional service packets), audio, and video does not require additional protection. The de~oder's ~ '~ ' will indicate when a detec~able RS ~ " block occurs by passing on the error flag signal assertPd (actiYe low or high by convention) from the RS decoder and will output a ~ , ,, signal, for example, in the opposite sense, and the data output should be ~ , handled by any peripheral device which is receiving the data.
All bytes, even bytes indicated to be in RS Error, will be output from the ~ "i' to maintain byte alignment with the input data.
PEG ~P~APr nPtPrti~ln A decoder's ~' ', ' may be designed to work with MPEG decoding units for audio and video, although not c~h~ ly~ but for the majority of such units (for example, those available from vendors such as C-Cube, SGS-Thomson, Tl and L.S.I. Logic). As such, a feature has been added to the DEMUX 612 (Figure 6a) which stops erroneous data from being output, for example, as Video data when an, ' '- RS block error occurs. The " 'i ' of a decoder requires that the decoder micro-processor indicate that the selected Video Channel Stream must have the '~PEG header detection activated.
The '~ "i ' 612 will perform the following on the data being output on the bus 610 when a RS Eiror occurs. The MPEG "Error Start Code" will be assertPd on a Video data port or bus of the ~ I 612. Since there may be typically two Video data streams active in the ' '~il ' integrated circuit, both streams must be individuaUy contro}led. It should be noted that the DEMUX expects aU MPEG dah to be perfectly 1,~ ^'iLrAA as it will not attempt to find non-byte aligned start codes.
For~ 71 Frn~r pr~Artirm The region 1 section of the MUX frame which contams addiaonal error protection uses a Cv~-vl ' (3,2,13) Forward Error Correcaon (FEC) code in ~ ' with 5:1 majority Iogic to provide a high probability of error-free r ~ to be available for controlling the system. The 5:1 majority logic is interleaved over a byte to increase error tolerance of the data.
The Reed Solomon error correcaon code (RS ECC) may corrupt bytes of data if it is unable to correct them at a decoder. By ' . the majority logic values over a byte, the system provides for further robustness under high gaussian noise conditions.
In the .' ' , ' 612 of the decoder, the 5:1 majority logic is performed f~rst and its results are then fed into the CullV~ " ' (3, 2, 13) FEC. The FEC has the following taps:
gl ={0, 8, 9, 12}; g,={0, 6, 11, 13}. The actual design in the DEM~JX 612 maintains proper SUBSTITUTE SHEET ~RULE 26) wo9s/l56ss , 21778t1 PCT/US9J/13664 byte-alignment byte extending the FEC to be a (3, 2, 13+3) FEC using the correction taps of the (3, 2, 13) FEC. The convolutional (3, ~, 13) FEC is set to the zero state (all registers cleared) before any data is entered. This occurs during the FSYNC word of the MUX. It will take ((13+1)*3*5) MUX data bits to be entered mto the FEC before any corrected fc bits are available as output from the FEC registers (not shown) of the ~' ', ' 612. All internal delays are not apparent outside the DEMUX 612.
The (3, 2, 13) FEC recluires a ~run-out~ to allow for all of the useful data to be removed from a ~..v;' ' first-in-first-out (EIFO) memory (not shown). The "run-out" normally required would be 3#13 = 39 bits, but by having prior knowledge of the location of the parity bits, the number of transmitted bits can be reduced to 13 bits. Therefore, the recluired bits to be transmitted are the syndrome parity bits generated inside the multiplex encoder 110~ The data bits which are entered into the encoding FEC are set to zeros (00) and the same is true in the DEMUX 612. This saves 26 bits of otherwise useless data. These 13 "run-out~ bits must still be 5:1 majority protected; therefore, the total number of bits in the MUX required for FEC
"run-out" will be 65 + 15 bits, because everything must be 1". t~ -aL6..~1. Therefore, the runout which follows all FEC protected packets is 10 bytes long, or 2 bytes of "run-out" parity bits which are then 5:1 majority logic encoded.
If an error exists in the highly protected data section (region 1 of Figure 2b) of the MUX
frame, the DEMUX 612 may not perform its functions prc)perly and I, " ' ' results will occur. According to statistical ~nubdl~;l;~i" when this section does get corrupted, the rest of the MUX data wiU contain too many errors for proper decoding.
~i~lex Packets (PACKETS!
The MUX contains aU of the system related packets directly after the Fl~AME SYNCword with the Multiplex Structure Control Packet (Figure 10) being the first one because it determines how the frame has been defined. The MUX frame structure is rigid with respect to the way in which the packets are defined, but the values wit~un the packets are defined over time as a se~uence of MUX frames are transmitted and adapted for different data service IC.
There are three groups of packets in the MUX frame, each of which is handled differently. The first group is the DEMUX packets which control the ~ of the MUX frame; the second group is the Micro-Support packets which are used by the decoder U~ (DCP 158, for example, in Figure l); and the third group is the Optional Service packets (OSP).

SUBSl IIUl~ SHEET ~RULE 26) ~ W095/15655 , 2 ~ 778 1 1 PCT,US94,l3664 The order in which the packets are located within the MUX frame is IJIC ' ' ' ' SO
that the ~ , . 612 knows where the packets are located.
DF.MUX p:~rlrf~
The DEMUX packets are used by the DEMUX section of the ' ' . ' application specific integrated circuit (ASIC) 612 of a decoder to determine where the different data bytes for all the data services are located in the MUX frame. All of these packets are not visible outside of the ' ~,' ASIC These packets have additional error-protection and areincluded in region I (Figure 2b).
The ' "i' expects to receive its packets in a specific order: MSC (multiplex structure control) packet; ACPs (Audio control); VCPs (Video control); ASDPs (Audio service d~ tul), and VSDPs (Video service descriptor). The actual location of the ASDPs and VSDPs may be changed but it makes the Multiplex encoder's task simpler if this order is followed as the ASDPs and VSDPs are optional packets.
The ACPs, VCPs, ASDPs, and VSDPs are grouped together into the category of "45 byte packets" which is their length including the additional FEC protection. They each contain 6 bytes of '~ -~" which is used for routing in the ,' "ii ' 612 of the decoder; (see Figures 11 and 12).
F - Stn.nh~re ~nnh~l Referring now to Figure 10, the MUX frame structure is defined by the Multiplex Structure Control (MSC) packet which is the first packet following the FRAME SYNC or vertical ~I~ lu.~liu~. word. The MSC packet detennines how the '( ' contained within the MUX frame is to be 3 '~ ' ' into l1r , data processors 618, 620, 622,630 via bus 610. The micro-processor 614 will be . ' to initialize the ' , ' 612 with a multiplex variant value which ~~ r to the MSC's structure type header. The DEMUX 612 must have a match or it will not release any of the r " from the MUX
frame. The .1~ i,' ASIC 612 will only d~ "i, ' the data which r ~ tl ' to the selected ~ Tbe DEMUX 612 does not permit e~rcess flexibility by aUowing for too many sections of the multiplex variant to be ~.. ,, ' ' as this costs silicon area.
The MSC packet is palli~.ul~uly arranged, accordmg to Figure 10, to pennit the DEMUX
612 enough time to extract aU of the required r " from the packet before actual data is to be output on an output spigot, preferably bus 610. This packet is ~ Iy en~or-protected within region 1. The ~' ' ,' 612 is~preferably designed to work with only the MSC

S~J8STIT~E SHEET ~RULE 2~) W09~ 655 21 7781 1 PCTIUS94/13664 packet while the rest of the MUX frame is uæd for Audio and Video data. This minimai overhead aliows for better bandwidth utiiization in a frequency division ~ii ' ' MUX.
. Control Packet Referring now to Figure lla, the Audio Control Packet (ACP) determines how the medium data rate service(s) (Audio) are to be dc ' ' The Audio ærvice is æctioned into byte packets which are then subdivided up into a maximum of 64 different audio ærvices.
Audio service may be of any ' type from MPEG Audio, Sedat Audio, or any mediumdata rate ærvice.
The ACP is determined to be this packet by the .' ~ ' 612 which uses the uniqueDescriptor Header value. The header value wili be a I ' ' binary value of, for example, ~100010" for this multiplex variant, and this value cannot be changed without changing the variant number. Each packet describes at most 10 audio ærvices, therefore to faciiitate 64 audio services 7 ACP packets are required. When the number of audio ærvices is not related to 10, a counter value of the unused audio portion should be æt to zero. If the sum of all the counter numbers exceeds the number of l, ~ t~/iJIv~ value of the MSC, audio j c~ will not be correctiy output from the ' ' .~ 612.
The order that an audio ærvice's numbers of bytes are located in the frame format determines their relative position in the actual audio byte packets of the audio section. The ~' ' ,' wiil ælect the first and last byte location vaiues (from the audio ~ft~/blv~k number) for two authorized audio services. The relative star~ng position of the first byte for the required audio ærvice equais 6e sum of all the previous counter values and number of bytes for this authorized ærvice determines its stopping byte location. 'rhe DEMUX 612 wiU add the number of bytes which are uæd in the audio byte packet, and the total must equal the number of l,~tv~lv~ck of the MSC; if not, then, an invalid condition wiU exist and invaiid audio ;.,r~ ,, may be output from the DEMUX 612.
Audio Service Descriptor p~rl,P~ (~.r~np) Referring now to Figure llb, the Audio Service Descriptor Packet (ASDP) is a non-essential packet for this particular multiplex variant type, but it is uæd to distinguish the different audio for the purposes of ~ ' . ' v control of the DEMUX 612. The ASDP is ~iP~Pnnin~PA to be this packet by DEMUX 612 which uæs the unique Descriptor Header value.
The header value may be, for example, binary value of "100011~ for this variant, and this should be fixed and ~"~ ' ' Each packet describes only one Audio ærvice and contains the audio service number which it is to be uæd with. The ~d~ . ' 612 parses aU ASDPs Sl~ TuTE SHEE~ (RULE 26) ~ WO95/15655 2 1 7 7 8 1 1 PCT/US94/l3664 and looks for the required audio service match, if no match occurs, then there is no DEMUX
specific i--rùl-~ liull about the audio stream data, and it may be output normally. The .' 'il ' 612 will only handle the two authorized audio service streams.
The ...r~ , contained within this packet are: Audio Service Stream Number, this must be in the range from 00 to 63; the total number of bytes of Audio stream data contained in this frame for the selected audio service.
This multiplex variant allows for "dead-time" at the end of audio data of the frame, and this counter value allows for flexibility because it permits each Audio stream a "dead-timen.
The "Number of Bytes" value should be in bytes.
V~ ~1 P2rk~t (VCP) Referring to Figure 12a, the Video Control Packet (VCP) determines how the high data rate services (Video) are to be ~ ' ' The Video service is sectioned into byte packets which are then sub-divided up into a maximum of 20 different video services. Video service may be of any; r.... - ~ type from MPE~ Video, HDTV video, or MPE~ system data which contains both video and audio. Video data may also comprise high resolution film (motion picture for example) media converted into convenient ' ' form, if not HDTV video.
The video packet is determined to be this packet by DEMUX 612 which uses the unique Video Header value. The header value will be a I ~( ' binary value for this multiplex variant of, for example, "100100". Each packet describes at most 5 video services, therefore to facilitate 20 video services 4 packets are required. When the number of video services is not related to 5, the counter value of the unused portion must be set to zero. If any counter number exceeds the number of l.~sll,l~ value of the MSC (Figure 10), it will be assumed to be invalid and no video r " will be output from the DEMUX 612.
The order in which video service's numbers of bytes are located in this multiplex variant determines their relative position in the actual video byte packets of the video section (Figure 2a). The DEMIJX 612 will select the values for two authonzed video services by ~the relative starting position of the first byte for the required video service and number of bytes to be ' " .' ' The DEMUX 612 will add the number of bytes which are used in the video byte packet and it must equal the number of ~lu~L of the MSC, if not, then an invalid condition will exist and no i r,... -~i.... may be output from the DEMIJX 612.
Vi~i~ S~rVirf~ r~fi~n p~rlrrt (VSDP) Referring to Figure 12b, and like the ASDP, the Video Service Descriptor Packet (VSDP) is a . ' packet for this ' ' l ' variant, but it is used to distjnguish the SlJBSrlTUI E SHEET ~RULE 26 WO 9S/156S5 , PCTIUS94113664 different videog for the purposes of ' ' ' ~ control of the ~ ' ' 612. The VSDP
is determined to be this packet by DEMUX 612 which uses the Descriptor Header value. The header value may be, for example, the unique binary value of ~100101 " for this variant, and this, like the ASDP header, is Ill~L l ' Each VSDP paclket describes only one Video service and contains the video service number which it is to be used with. The ~' ' parses all VSDPs and looks for the required video service match, if no match occurs, then there is no DEMUX specific r ~- about the video stream data, and it may be output norn~ally.
The ' ' 612 will on~y handle the maximum two authorized video service streams (as per conditional access data).
The ;, r~ contained within this packet are: HDTV Selvice Stream or Video Service Stream Number, this must be in the range from 00 to 31; an ~)TV video flag for identifying the HDTV character of the stream and the total number of bytes of Video stream data contained in this frame for the selected video service.
The multiplex frame allows for "dead-time" at the end of the frame and this counter value allows for flexibility because it permits each Video stream a "dead-timen. The "Number of Bytes" value must be in bytes.
Mirro-prr r~cr~r Control p ~rb~t~
The Micro-Processor Control packets are used by the packet ~ section of the '' "ii ' ASIC to interface the imcoming MUX r " to the decoder micro-processor.
There are 5 different sizes of packets which are transmitted in the MUX: 75 byte packets; 10 byte packets; 5 byte packets; 32 byte packets; and 42 byte pac~ets (like the low sp~ed data packets already described). The packet 1, section recognizes the type of packet by its packet header which is indicated by a "start of packet signal~ by the DEMUX. The DEMUX
does not interpret any of the ;..r.... - ~;.... within these packets, rather it is e~pected that all of the r '- wiU be deciphered inside of the . 'ii ' 612.
75 Byte Packets .. . . ~ . . . .
The 75 byte packets are add;~l,dly er protected, and they carry 10 bytes of r ' This variant will norrnally transmit non-repeating data using these packets, these packets must arrive "error-free" to permit proper decoder operation.
An e~ample of a 75 byte packet is the A.. l ..;-~ Seed Packet (ASP) which contains the cyclic secds required to decrypt the next crypto-session's services. The seeds are transmitted using 75 byte packets. The ASP structure may be further described in application serial no.
, entitled ~System and Method for Transmitting and Receiving Variable Length 31) TlTll~E SHEET (RULE 26) WO95/15655 2 1 778 1 1 Pcr/US94/1366~
Control for Digita~ Services" (44852-A-549). The 75 byte packets may be used to transmit the ASP, but not C;A~ , for example, when a higher level of error protection is required for the seed data.
IOByte p~rk~tc The 10 byte packets are only protected by the RS ECC and as such are repeated several times during a ~crypto-session" to guarantee that they arrive ~error-free~. These packets corltain a checksum which is used by the micro-processor to verify that the packet arrived error-free.
The Cyclic System Data is one example of data which may be i ' using 10 byte packets. This data may be further described in application serial no., entitled ~System and Method for T ~ and Receiving Variable Length ~ ' ~ Control for Digital Services" (44852-A-549), ~ ' herein by reference.
S Byte pslrlrrtc The S byte packets are only protected by the RS ECC and as such are repeated several times during decoder operation to guar,mtee that they arrive "error-freen. The packets contain a checksum which is used by the micro-processor (DCP 158 im Figure 1) to verify that the packet arrived error-free.
The Composite Virtual Channels Data may be transmitted using the 5 byte packets, but not . A~,IU..;~ . The structure of the packet is described in U.S. patent ~ n l serial no.
, entitled "System and Method for .~ , Authorizing Multiple Virtual Channels"
(44891-A-550), ill~lr ' herein as necessary by reference.
32 Byte p~rkl~tc The 32 byte packets are only protected by the RS ECC (region 2 of Figure 2b) and as such are repeated several times during decoder operation to guarantee that they arrive ~error-free`'. The packets contain a checksum which is used by the decoder ~.O~I (DCP 158 in Figure 1) to verify that the packet arrived error-free.
The Virtual Channel Packet may be trmsmitted usmg 32 byte packets. These packetscontain the ;.. r.... - ;. required by the decoder micro-pro~essor to determine where a requested channel actually is located within the various multiplex charmels. The structure of the Virtual Channel Packet is described in (44891-A-550).
The Addressed Data Packet (ADP) may also be i ' using 32 byte packets. The ADP is used to provide decoder specific - to the decoder micro-processor, not Iu~ . Each ADP has a USER-ID value of 32 bits which ~ ~ ' to the decoder's SIJ8~111~1~ SHEET ~ULE 2 2l 7781 1 WO 95/15655 , PCTIUS94/13664 unique address. r~ne ~ ' will only select the ADPs which match the decoder micro-processor selected USER-ID.
42 Byte Packets The 42 byte packets are only protected by the RS ECC (and so faU in region 2) and, depending upon the type of ' within the packet, the packet may be discarded by the ~- 612 or the packet may contain a checksum which is used by the decoder micro-processor to verify that the packet arrived crror-free.
The Teletext Packet (TTP) is one example of a packet transmitted using 42 byte packets.
The teletext processing section of - ' ~l ' 612 will only allow the capture of a TTP when there is no RS Block Error indicated. Therefore, the text pro~essing elements 618 of a decoder expect that the time to perform a "teletext page grab~ will depend upon the number of times that a packet is i ' in the MUX and how many errors the ~ channel is when the TTP arrives at the decoder. Further detail on teletext service provision is described in U.S. application serial no., entitle~ ~System and Method for Providing Compressed Digital Teletext Services and Teletext Support Services" (44890-A-551), i--wl~ ' herein as necessary by reference.
The Utility Data Packet (UDP), already described, is another example of a 42 byte packet. The UDP provides a low bit rate channel for any r " which is to be output directly from the de~oder using data rates, for example, from 300 to 38,400 band or higher rates. The actual data rate clock will not be "p~rfect" and may contain some jittering, hence, rate trim as described already above. There is a maximum of 16 uti}ity data channels supported by the described multiplex variant and are determined by their Service number. If any errors exist in the packet, they will be output on the serial utility da~a port.
Optional Service p~rl~.tc (~p) The Optional Service Packets (OSP) are used to output any type of packet which does not fit into the normal ~concept~ of this multiplex variant. Another way of describing OSPs is by way of Figure 6a where only certain ~pes of peripheral processors are shown 618-630. But, if a particular service cannot be handled by these, it my be most cfficiently handled by an OSP proccssor (not shown) but still ,- ' '~ to bus 610 via the included expansion socket. To facilitate any future growth of this variant, the packet t of the OSP has been designed to handle any size packet from 1 byte to 255 bytes in length. The OSP length is fixed for an entire MUX Frame, but the packet size may change on a frame basis. The size of the OSP is defined in the MSC and controlled by the DEMTJX

g~BSI ITUrE SHEET ~RULE ~6) ~ wo 95/156~ , 2 1 7 7 8 1 1 PCT/us94ll3664 612. The data is protected by the RS ECC (and so are carried in region 2) and a detectable RS
error is indicated via an extemal error signal from demux 612.
The OSP data is output both in a parallel (byte-wide) mode and a Wll~ serial mode. The beginning of am OSP packet is indicating by a pulse which frames the first byte of the packet. The OSP will not be decrypted by the DEMUX and any _ ' will have to be done by the extemal OSP processor device which is processing the OSP - r " (not shown) but connected to bus 610 Referring to the foUowing table, one possible OSP ~ packet may comprise a packet header, a service number and a data field.
Description Bits Optional Service Packet Header 8 OSP Service Number 8 OSP Data 8 The anticipated packet i protocol for the MPEG II will require that theDEMUX output aU MPEG II packets out of the OSP port. The DEMUX expects that the extemal MPEG II device will handle a~l of the routing of the MPEG II services and as such no other MPEG II p~cket protocols have been , ' ' in this variant.
DEMUX t~r~R I
The Clock Data Recovery (CDR) ASIC 584 indicates the beginning of a multiplex frame by the use of the FRAME SYNC pulse (active high or low, by ~ ~ ) which is timed such that the faUing edge of the pulse coincides with the first byte of frame data. This byte is defined as byte 0 of the "i' frame. The first byte of frame data is the reference for aU' i, ' g and is used to re ~ ' u.~ the data stream. The CDR 584 preferably has an included ~ ,, ' ' register which aUows for the decoder control micro-processor 581 to modify the exact location register of the FRAME SYNC pulse. Once set, this register does not need to be updated as the offset is due to the data FIFO delay inside of the Reed-Solomon RS
decoder 588~
Data bytes entering the .' '* ' circuit 612 are enabled by a signal caUed DVALID(not shown) which is asserted from the RS Decoder 588 and ~frames" the data section of a RS
block. The DVALID signal must be byte aligned with the data bytes entering the ~' ', ' circuit 612. The circuit 612 expects the DVALID to be asserted (high or low by convention) S~STITUTE SHEET ~ULE 26) WO 95/15655 2 1 7 7 8 1 1 PCl-lUS94/13664 on the first byte of data and de-asserted after the last byte (of a RS block) has entered. The RS
Decoder 588, for example, one available from LSI Logic, performs this function and the ' i,' circuit 612 is designed to interface with this device.
The ~ circuit 612 only retains the decryption ' between multiplex frames and as such requires the first 135 bytes of ;.. r~.. ~;.. ,. to be the Multiplex Structure Control packet (MSC). CIhere are 18 bytes of ~ in the MSC.) This packet is used by the ~' ' , ' to determine how the MUX fr~une was constructed in the up-link Multiplex Encoder (Figure 1). The MSC cont7ins a Structure Control Type (Figure 10) which must match the MUX-Variant register, ~l~l controlled, for the ~ ' ,' 612 to begin de-e the MUX frame. If a match does not occur, the ' "il ' 612 will indicate that a MSC MUX variant mis-match has occurred to the decoder control micro-processor 158 (Figure 1) and mute all data from its outputs.
The Reed Solomon Circuit 588 also preferably provides an error signal which indicates that the RS block data has a detectable error. This error signal is output from the ~' "i~ ' 612 so that it is co-timed with the data being output. If an error occurs with the ' ', ' control packets which is not correctable by the additional FECs, the output of the ~ "il ' 612maybe DFMUX Channel Chan~es The DI~MUX has two different types of channel changes: an Inter-MUX Chalmel change (controlled by CDR Lock) and an Intra-MU~ Channel Change (Micro-Processor " i) The Inter-MUX channel change is controlled by the CDR 584 which indicates that the CDR has found a valid MUX frame. During a channel change, the CDR Lock signal is de-asser~ed (low or high by ~..~. ) and the DEMUX 612 does not output any data on its service ports or bus 610.
The time re4uired for a channel change is dependent upon the time used by the l' ' ' circuit to locate the required channel, the time required by the CDR 584 to l~cate both the horizontal and vertical ~.~ ' words, the time required by the decoder micro-processor to locate the a~ seeds for the service, and the time required by the MPEG decoder (video processor 630) to output the required stream.
The Intra-MUX chamnel change is controlled by the micro-processor 581/614 which changes the service which is output by selecting another service. This change is done by the micro-processor writing to a service channel number register (not shown). The . i DEMUX 612 expects that this channel change occurs during the last frame of a "crypto-session".

S~SrITUTE SHEET ~JLE 26) ~ Wo 95115655 , 2 1 7 7 8 1 PCTJUS94/13664 The time required for a channel change is dependent upon the time required by the MPEG decoder (for Aadio 620 or Video 630) to output the required stream.
The teletext prooessor 618 requires that the micro-prooessor 614 write to any channel selection registers on the last frame of a "crypto-session". For any channel change, the DEMUX 612 expects that its output servioes will be ~muted" and the MPEG decoder 620, 630 be informed of the channel change. Onoe a new MUX has been located, by the CDR lock signal and the DEMIIX micro-interrupt, the required servioe: '' ' ' seeds must be located and prooessed. After the ~crypto-session" boundaries have been located the decoder micro-prooessor 614 must write to the DEMUX channel selection registers dur'mg the last frame of the "crypto-session" . The mute servioe outputs can then be turned off at any time.
Multiplex S. rvi~ Pc The Multiplex frame may contain both audio and video servioes which will be globally encrypted (encryption block 415) and decrypted using a global decryption circuit (not shown) which comprises a portion of 1' "i~ ' 612. The global decryptor may comprise any of a number of known means for decryption depending on known means for encryption and may have, for example, a total of 56 seed bits. The DEMUX 612 requires the actual channel number for all servioes which are to be output on the DEMUX Data Bus (DMB) 610 to be loaded into the correct register before a crypto-session boundary. The DEMUX 612 will only change channels on a crypto-session boundary, but the "MI~TE SERVICE" control of the decoder micro-processor can be asserted at any time to stop the output of data on the DMB 610.
The teletext servioe ;s not globally encrypted and all teletext packets are passed to the text processor 618 for further ~ If any decryption of teletext is required, it must be done by a post-prooesssor such as a text.prooessor 618. Similarly, if utiliq data is encrypted, decryption would be æ: " ' ' at low speed dah processor 622.
The DEMUX data Bus (DMB) 610 provides the outside interface at least for all medium (audio) and high (video) rate services handled by this variant. The DMB 610 is, preferably, a '' " serial and ~ bit parallel bus with the r ~ ' ' enable signals. Each of the services supported by the DMB 610, of which there are five (video, audio, utility data, text and optional service), have their own enable signal. To facilitate the parallel transfer mode, a byte clock is provided which is generated from a serial data bit clock. All signals preferably tr~msition on the positive edge of clock, therefore signal hold times may be a problem and enable timing is suitably precise.

S~JBST~TlJTE SHEET (RULE 26) WO95/15655 2 1 778 1 1 Pcrluss4ll3664 All audio and video decoding processors 620, 630 must be connected to the DMB 610 to permit them to receive the ~ , ; .F~ For exarnple, the DEMUX 612 may output all video services out the DMB 610 with the video enable lines active at certain times and similarly for the audio data at other times.
Video The DEMUX will output a maximum 2 MPEG or other video services through the DMB
610, and each video service contains its own active high enable signal which frames the seria~
data. All data and control signals transition on the positive edge of bit clock. The decoder micro-processor must select the correct video service that it wants to have the data transmitted to the dccu,~ a:,;ull engine. If the rnicro-processor selects a video service which does not exist, the DEMUX 612 will indicate this via a register used to report status control, a 1 (or 0 by . ~, ) in this bit means an error has occurred. A video service does not exist when it is not described by any VCP packet.
- - liach video service has its own video decryptor which is active only for the specified channel data and is shut down (not clocked) for any other service. The video decryptor has a seed length of 32 bits which are contained in 4 different registers. The video æed is loaded into the decryptors at the beginning of the crypto-session from the micro-~ O ' registers.
The VSDP packet deterrnines if the video service should assert the HDTV signal which indicates that HDTV mode has been ælected for the video service. Both video ærvices can be HDTV, therefore there may be preferably 2 HDTV ports on the DEMUX 612. If the VSDP
packet contains the number of bytes count, the DEMUX 612 will stop the videû enab~e of the C' " 'I' ' 1: ~,, ærvice from being asærted after the byte count has reached zero. The byte count must be eqdal to the actual number of bytes because the value is checked before the enables are output. In other wûrds, if the total number of bytes is 1000, then the value must be 1000 and not 999. If a VSDP packet has a byte count of 0 or there are no VSDPs for a specific service, then all possible bytes for tne service will be routed to the video processing engines 630.
The Video services may also be considered as re-assigned video services which are routed to another video processor 630. The use of re-assigned video data is controlled by the decoder micro-processor. A video service will be rndicated as a normal video service or a re-assigned video service by the ~ ~ r- ~ enable signals. Normally, HDTV will only be handled as a re-assigned service because the HDTV format may not be compatible.with the decoder's particular normal video ~ , engine 630.

SIJBSTITUTE SHEET ~lULE 26 ~ Wo 95/15655 2 1 7 7 8 1 1 PCTirJS94~l3664 The D~MIJX 612 will preferably output a maximum 2 audio services through the DMB610 " ~y, and each audio service contains its own active high enable signal which frarnes the serial data as with video. All data and control signals transition on the positive edge of bit clock The decoder micro-processor must select the correct audio service that it wants to have the data transmitted to the audio ' ~ engine 620. If the decoder micro-processor selects an audio service which does not exist, the DEMUX 612 will indicate this via a register used to report status control; a 1 (or zero by . ~. ) in this bit means an error has occurred. An audio service does not exist when it is not described by any ACP packet.
Each audio service, like video, may have its own audio decryptor which is active only for the specified channel data and is shut down (not clocked) for any other service. The audio decryptor has a seed length of, for example, 24-32 bits which are contained in 3 or 4 different byte-size registers. The audio seed is loaded into the decryptors at the beginning of the crypto-session from the micro-~ v ' registers.
The audio ærvices may also be considered as re-assigned audio services which are routed to another audio processing engine 620. The use of re-assigned audio data is controlled by the decoder micro-processor. An audio service will be indicated as a normal audio ærvice or a re-assigned audio service by the . ~ ', enable signals.
ODtional S.- vice pqrk~c (o~p) The optional services ' contained within OSPs are output using the D~B 610 with a cc,~ active high (or low by cv~ ) enable pulse which frames the data to processors (not shown). The OSP processing device must be capable of ~ ,, that OSP
data is on the DMB 610, determine if the OSP data is the required ærvice, decrypt the data if encrypted, and process whatever data is contained within the OSP. The OSP data will not be globally encrypted, nor will it have its own decryptor. This facilitates the use of OSPs for future use without any ~ on it.
The DEMI.7X 612 determines that the packet is an OSP by its header and the entire packet, includimg the header value is transmitted on the DMB.
Utilitv r~q~q All utility data is contained within one or more packets which are transferred via the DEMUX ASIC 612's 8 bit bus. The DEMUX 612 will only look for the headers of the UDP
for routing purposes. The actual outputing of this data is control by a decoder micro-processor interface section of the ~ ' ASIC 612 to utility data processor 622.

SUBST~TUTE SHEET lRULE 26 WO 95/l'i655 , 2 1 7 7 8 1 1 PCTNS94/13664 The DEMUX 612 will determine if a packet is a TTP by its header; .r~ ;.." and transmit the entire TTP to a teletext processing section of the ' ti~ 612. This section should be able to handle the maximum data rate of the i media without loosing any data.
All TTPs must be of the same length. The DEMUX 612 can not handle TTPs of different lengths because it is looking for the header which is expected to be in a specific location.
The actual outputting of this data is controlled by a decoder micro-processor interface section of the ' "i,' 612 to text processor 618.
Servirl Channel ~`h~n~
The service channel may only be changed on a crypto-session boundary because of the decryption process. If the decoder ~ JC~vl knows that it wants to change a channel, it should assert the "mute service~ bit of a register which is examined on each frame boundary before h changes service channels. This will prevent any extra ;~f~ from entering the engines 618, 620, 622, 630 prior to a channel change and allow for a simpler ~ ' ~ of indicating a channel change to these engines without the ~ of valid data being inserted into their input ports.
When selecting a new channel, all channel specific r '' must be available to theDEMUX 612 before the ne~t cry~oto-session boundary. Once a channel is changed, all previous r '- is cleared when tbe new r - is loaded into the control registers. Since aU
r '- describing all services is available every frame, there will not be any inherent storage in the DEMUX 612, thus if a Data Integrity failure occurs the entire frame of r '- is lost and the DEMUX 612 waits until it receives the ne~t FRAME SYNC pulse.
A selected channel must e~ist in a frame, if the selected channel does not e~ist then the DEMUX 612 will indicate this by use of a bit in a status register.
Video The DEMUX 612 uses the r ' contained within the MSC (Figure 8) to detennine how large the video blocks are, the ma~imum si~e can be 256 bytes long since there are 8 bits.
This number is stored for the duration of the frame in memory of the DEMUX 612. The End of Audio Marker is used to determine where video starts. The audio marker indicates the last byte location of audio and it uses a 17 bit number which is compared with the intennal byte counter. After a match occurs, the next byte (audio marker + 1) contains the first byte of the S~18.STITUtE SHEET ~RULE 26) ~ WO95/15655 , 2 1 7 7 8 1 1 PCTNS94/13664 video block. The video block counter, which is 8 bits, is used to route the video block into the selected services.
The VCP packet contains the number of bytes used for each video service but the actual byte starting location must be calculated by adding the number of bytes used for each previous service. There is one adder which adds the bytes used and when the ælected video channel is reached, the adder's value and the number of bytes for the ælected channel are stored in a register before the byte number is added. This provides both the starting location and the number of bytes which need to be routed to the video ærvice spigot. Since tbere are 2 possible video ærvices which are to be ~ ' l, the DEMUX 612 contains 2 æts of location registers. The adder's value is not aUowed to exceed the value for the number of bytes contained in the video block.
Once the bytes have been dc ' i,' ' from the video block, they are routed to thevideo service decryptor block. During a specific test mode, the data will not be run through the decryptor block, rather it will be passed directly to the DM13 610. - - -The byte allocation counter is still c l,~ and once the end of video markers value, as indicated by the MSC, is reached, all d. 'i,' ~ is completed. If a FRAME SYNCoccurs before the end of video marker position, then the DEMTJX 612 will be re~
and the normal d~ " will occur. No error condition will be indicated if tbis occurs.
When the video service ælectcd has a .~ ~l ", VSDP (Figure 12b), the value contained in this VSDP is stored and compared with the byte allocation counter. Once a match occurs, the DEMUX 612 will turn off the video ærvice enable signals but all ~dead time" bits will not be passed tbrough the decryptors and output on the DMP 610.
~ .
The DEMUX 612 uses the ~ contained within the MSC to determine how large the audio blocks are, the maximum size can be 256 bytes long since there are 8 bits. This number is stored in memory for &e duration of the frame in the DEMUX 612. Referring to Figure 8, the End of Packets Marker is used to determine where audio starts, the packets marker indicates the last byte location of packets, and it uses a 17 bit number which is compared with the internal byte counter. After a match occurs, the next byte (packets marker + l) contains the f~rst byte of the audio block. The audio block counter, which is 8 bits, is used to route the audio block into the selected services.
The ACP (Figure l la) contains the number of bytes used for each audio service, but the actual byte starting location must be calculated by adding the number of bytes used for each S~iTUrE SHEET ~RULE 26) WO95/1565~ , 21 778 1 1 Pcr/lUss4l13664 previous service. There is one adder which adds the bytes used and when the selected audio channel is reach, the adder's value and the number of bytes for the selected channel are stored in a register before the byte number is added. This provides both the starting location and the number of bytes which need to be routed to the audio service spigot. Since there are 2 possible audio services which are to be dc ' ,' d, the DEMUX 612 contains 2 sets of location registers. The adder's value is not allowed to exceed the value for the number of bytes contained in the audio block.
Once the bytes have been de~ from the audio block, they are routed to an audio serviee decryptor block. During a specific test mode, the data will not be run through the decryptor block, rather h will be passed directly to the DMB 610 Referring to Figure 6, the functions of the ' ~ ' 612 will now be described. The two major functions of the ~' , ' are to ' ' . ' the various services in the received frames and to provide U~IU~i~UI interface support. Its functions include- ' ' 1, ' g of Mux Data services from CDR eircuit 584, decryption of Mux analog and video services, III;~.IU~ VI conditional access data interface, addressed data paeket filtering, virtual and eomposite channel packet filtering, text packet filtering, text character generator, and utility data generator. Text and virtual channel details are provided in . ~y filed A_ serial nos. (44890-A-551) and (44891-A-550).
The ' '~ ' 612 will be eloeked by the data cloek from CDR 584 and the miero support functional elements thereof will be clocked at 27MHz and 13.5MIIz elock. These eloeks are phase loeked to the input data rate by the CDR 584.
All packets sent to the d '~,' 612 eontain a 4 bit paeket type header and a 4 bit decoder type.
The deeoder type must also be matehed for packets to be valid. The decoder control processor loads the 4 bit deeoder type for the ~ ' to filter. If, for example, the decoder type in the packet header or loaded by the decoder processor is 0, then all decoder types are aceepted by the ' ' ,' ' " ' Aceess Packet E`
The System Data Packet (SDP) for i ~ conditional access data is one of the 10 byte paekets briefly described earlier. The d '~i,' 612 will buffer up to 32 SDP's per frame. If more than 32 SDP's per frame are sent in the Mux frame then tbe ~ 612 will ignore the extras. The ' ', ' 612 will preferably count the number of SDP packets StJBSTITUTE SHEET (RULE 26) WO 9S115655 , 2 1 7 7 8 1 1 PCTNss4/13664 in the buffer for the decoder control processor 614. The SDP counter will reset on every sesslon, The ~' ', ' 612 will set a SDP received flag in a STATUSO register. Then, the processor 614 will read the SDP count via Status register 2 and the SDP data via a Read RAM
command.
The Virtual Chalmel Packet (VCP) may be a 32 byte packet. The ~.' ' . ' 612 willcompare Virtual Channel numbers with the number requested by the decoder processor. If the number matches, tnen the Virtual Channel packet is stored into the RAM (not including Header ID). The ,1~ - 612 will store, for example, up to 8 Virtual Channel packets per session. If more tban 8 are sent, then it will ignore amy extra packets. The Virtual Channel received status flag is set when the packet has been written into RAM. The ' "i ' 612 will count the number of VCP's received for the decoder processor 614. The VCP counter will reset on every session.
The ~' "i ' 612 will set a VCP received flag-in the STATUSO register. Then, the processor 614 will read the VCP count via Status register 2 and the VCP data via the Read RAM command.
Composite packets are S bytes. The ~' "i' 612 will filter the CP's with the Virtual Channel number. If more than one Composite Packet with the same Virtual Channel number has been received tnen the previous Composite Packet will be U._l~lit._~.The: '~ ' 612 will set the VCP received flag in the STATUSO register. rnen, the processor will read tbe Composite Packet via the RAM Read command.
Seed Packets are 10 byte packets (after error rnr~ti~ln) Up to 64 Seed Packets will be buffered. Any e~ltra packets sent will be ignored by the ~ ii 612. The Seed packets must be stored in ' form to allow the processor 614 to easily calculate amy offsets.
The: "i ' 612 will set the Seed receive~ flag in the STATIJSO register. The DCP 614 will read the data via the Read Ram command. The l' "i,' 612 will keep acount of the number of seed packets in the status 3 register.
The ~' "i ' 612 will compare the Clear Addresses in the Addressed data packet with both of the two Clear Address loaded by the processor 614. If the address is found then the packet is written into RAM.
The: '~' 612 will be preferably able to store up to 16 ADP's of 32 bytes maximum length. The buffer will be ;~ t .1 in a circular FIFO buffer fashion. If buffer S~iBSTllUl`E SHEET (RULE 26 Wo95/156SS , 2 1 778 1 1 PcrluS94113664 is full then any additional ADP's will overwrite the out pointers' ADP's. The out pointer will still have to increment to the next ADP. Please note that on "power up" the in and out pointer will be random, therefore the decoder processor 614 must send a reset ADP command to set the in and out pointers to equal (reset both in and out pointers of offset of 0).
The ~' ' . 612 will support 2 user address compare registers. Either register must be equal to pass the ADP. A read of the ADP FIFO register will return the contents of the FIFO. The decoder processor 614 will control when to increment the FIFO pointer by setting the .~ , . control flag in the ADP Control register.
The buffer area required is 16 ADP's ~ 32 bytes = 512 bytes.
T~Yr p~.`k.~ Processing Text packets consists of Header packets and Text data packets. The Header packets will contain page number, character set number, starting row number and flags for encrypted page, boxed page and linked page.
-- The ' I~irlPY~-r 612 will compare the page number of the Text Header packet with the page number requested by the micro. If the page number is found then the following Text Data packets are written into RAM until a new Header packet is received.
The .' ' .' 612 will be able to store up to 16 te~t pages including Header row data and have 4 page number compare registers. When a page has been received and written to the RAM then a page grabbed status flag will be set for the decoder processor 614. The DCP
command structure will be Page grab command, p~e number, compare register number (0-3), RAM page to write to (O-IS). Status read commands retums the current status for the ' lg page grabs- The DCP 614 has access to the text header flags using the Read RAM
command.
There are also additional optional filters on the Text header. They are Time Zone, Service Category, Language, and Security Element. Each of these fields can be enabled or disabled via the Filter Enable flags.
The ~ . 612 will set its row counter to the starting row number in the header packet. The ' ' . ' 612 will not modify current data in the previous text rows. If the text page requireS space characters in the previous rows then either the encoder must transmit a full page or the decoder processor 614 must issue a clear page command. The ~' ' 612 should check for page overflow to make sure it does not write into the next te~t page in the RAM.

SUBSTJT~TE SHEET ~RULE 26) -~ WO 95/25655 Z 1 7 7 8 1 1 PCTIUSg4/1366~
The encrypted flag indicates that the current page will be encrypted. The encryption is on a pa~e by pa~e basis. The processor 614 will load the .J~ 612 with the text decryption seed every session. When the ' i~ ' 612 finds the page header, it loads the current text seed for the æssion and decrypts the entire page. The text data is store in the clear in RAM.
The display support controls the text data to be sent to the character generator of text processor 618. It also controls many of the display attributes requested by the DCP 614 or from the text header data.
The Character set number allows selection of more font ROMs. The 5 bit number will be used as upper address bits im addition to the 8 bit text data.
The boxed page flag tells the ' `'i~ ' to display the page in "boxed moden. The text data must still be preceded by 2 "open box" control characters to enable the boxed area and followed by 2 "close box~ control characters to disable the boxed area.
- The boxed enable flag is sent via the text header. The DCP 614 can override the flag with the "debox" or "local box" bits æt in the display control register.
The b~ ' of the boxed area can be ælected to be either video or te~t. This worksin ; witn the text display on/off control bit in the display control register.
Thus, there has been shown and described a method amd apparatus for - ~ a plurality of data services including low speed utility data, audio, video, teletext and optional service data via a flexible multiplex frame in accordance with the present irlvention. Other a.lv~.t&g~u, ' " will come to the mind of one of ordinary skill in the art as they read the above-provided ~P~rrir~ n The described method and apparatus should only be deemed to be limited by the scope of the claims that ~ollow.

STIIIJTE SHEET lRULE 26)

Claims (72)

We claim:
1. In a receiver for receiving digital data streams transmitted in a frame format comprising rows and columns, the first row of the frame comprising a horizontal synchronization word followed by a vertical synchronization word, apparatus for decoding the horizontal synchronizing word comprising means for storing the identity of predetermined respective locations of block synchronization data and other data of a horizontal synchronization word, means for recovering the horizontal synchronization word, means for extracting the other data at the predetermined locations and means for forming a data stream from the extracted other data.
2. The apparatus of claim 1 wherein the horizontal synchronization word is binary comprising alternating values.
3. The apparatus of claim 2 wherein the horizontal synchronization word comprises one eight bit byte and the block synchronization data and other data each comprise four bits.
4. The apparatus of claim 1 wherein the means for recovering the horizontal synchronization word comprises frequency comparison means.
5. The apparatus of claim 1 wherein the means for recovering the horizontal synchronization word comprises means for comparing the block synchronization data with a predetermined binary pattern.
6. The apparatus of claim 1 wherein the predetermined bit positions of the other data are in predetermined sequence and the other data comprises network signaling data.
7. In a receiver for receiving digital data streams transmitted in a frame format comprising rows and columns, the first row of the frame comprising a horizontal synchronization word followed by a vertical synchronization word, a method for decoding the horizontal synchronization word comprising the steps of storing the identity of predetermined locations of block synchronization and other data of a horizontal synchronization word, recovering the horizontal synchronization word, extracting the other data at the predetermined locations and forming a data stream from the extracted other data.
8. The method of claim 7 wherein the block synchronization data is binary comprising alternating one and zero values.
9. The method of claim 8 wherein the horizontal synchronization word comprises one eight bit byte and block synchronization and the other data each comprise four bits
10. The method of claim 7 wherein the step for recovering the horizontal synchronization word comprises comparison with a predetermined frequency represented by the horizontal synchronization word.
11. The apparatus of claim 7 wherein the step for recovering the horizontal synchronization word comprises comparing the horizontal synchronization word with a predetermined pattern.
12. The apparatus of claim 7 wherein the predetermined bit positions of the other data are in predetermined sequence and the other data comprises network signaling data.
13. In a receiver for receiving digital data streams transmitted in a frame format comprising rows and columns, the first row of the frame comprising a horizontal synchronization word immediately followed by a vertical synchronization word, the vertical synchronization word immediately followed by a multiplex structure control word, apparatus for decoding the multiplex structure control word comprising synchronization recovery means for recovering horizontal and vertical synchronization of the frame and demultiplexer means, responsive to the synchronization recovery means, for demultiplexing the digital data streams in accordance with the multiplex structure control word.
14. Apparatus according to claim 13 wherein the multiplex structure control wordcomprises end of data markers for the digital data streams and the demultiplexer comprises counters for determining the end of each received stream.
15. Apparatus according to claim 14 wherein the frame comprises PACKETS data of different types determined by the number of bytes in a particular type of packet and the multiplex structure control word further comprises data representing the number of packets of a particular type.
16. In a receiver for receiving digital data streams transmitted in a frame format comprising rows and columns, the first row of the frame comprising a horizontal synchronization followed by a vertical synchronization word, the vertical synchronization word immediately followed by a multiplex structure control word, and low speed data packets following the multiplex structure control word, apparatus for recovering the low speed data comprising synchronization recovery means for recovering horizontal and vertical synchronization of the frame and demultiplexer means, responsive to the synchronization recovery means, for demultiplexing the low speed data from the low speed data packets in accordance with the multiplex structure control word.
17. The apparatus of claim 16 further comprising a low speed data processor for processing low speed data packets, the low speed data processor comprising a stripping means for stripping header data from the received packet and a data reformatter for reformatting the data into an originally input format.
18. The apparatus of claim 17 wherein the low speed data processor decodes rate trim data of the header.
19. The apparatus of claim 17 wherein the low speed data processor decodes baud rate data of the header.
20. The apparatus of claim 16 further comprising buffer memory, the data reformatter outputing data from the buffer memory in data bursts at a faster rate than the data is stored in the buffer memory.
21. In a receiver for receiving digital data streams transmitted in a frame format comprising rows and columns, the first row of the frame comprising a horizontal synchronization word immediately followed by a vertical synchronization word, the vertical synchronization word immediately followed by a multiplex structure control word, apparatus for recovering the digital data streams comprising synchronization recovery means for recovering horizontal and vertical synchronization of the frame and demultiplexer means, responsive to the synchronization recovery means, for demultiplexing at least one of low speed, medium speed and high speed data streams from the received frame in accordance with the multiplex structure control word.
22. A method of transmitting digital data streams in a frame comprising rows andcolumns, the first row of the frame comprising a multiplex structure control word, the multiplex structure control word being followed in the frame by other packet data, the packet data being followed in the frame by medium speed data and the medium speed data being followed by high speed data, the method comprising the steps of forming a packets portion of the frame, a medium speed data region of the frame and a high speed data region of the frame depending on whether low speed, medium speed or high speed digital data streams are to be transmitted, interleaving the formed frame on a row and column basis in accordance with a predetermined algorithm and after the interleaving step, inserting horizontal synchronization words and vertical synchronization words in accordance with noise characteristics and the capacity of a particular transmission channel over which the data is to be transmitted, the vertical synchronization word immediately following a horizontal synchronization word for the first row of the frame.
23. The method according to claim 22 wherein the horizontal synchronization wordcomprises one byte.
24. The method according to claim 22 wherein the vertical synchronization word comprises a plurality of bytes determined in accordance with a predetermined polynomial.
25. The method according to claim 24, the vertical synchronization word for signaling a receiver where to begin deinterleaving.
26. The method according to claim 22 wherein the packets forming step further comprises the step of forming the multiplex structure control word, the multiplex structure control word including a plurality of fields describing the data structure of the frame.
27. The method according to claim 26 wherein the multiplex structure control word comprises the first word of interleaved data.
28. The method according to claim 26 wherein the multiplex structure control word particularly includes end of data markers for each of packets data, medium speed data and high speed data.
29. The method according to claim 26 wherein the multiplex structure control word particularly includes a unique indicator of the frame structure.
30. The method according to claim 28 wherein the multiplex structure control word further includes fields representing the number of bytes in each block of included medium speed or high speed data.
31. The method according to claim 26 wherein the multiplex structure control word includes fields representing the number of packets data words having a particular byte length.
32. The method according to claim 22 wherein the packets forming step further comprises the step of forming audio control packets, the audio control packets including byte counts for included medium speed data streams.
33. The method according to claim 32 wherein the packets forming step further comprises the step of forming audio service descriptor packets, the audio service descriptio packets including a medium speed data byte count for a particular medium speed data stream.
34. The method according to claim 22 wherein the packets forming step further comprises the step of forming video control packets, the video control packets including byte counts for included high speed data streams.
35 The method according to claim 34 wherein the packets forming step further comprises the step of forming video service descriptor packets, the video service descriptor packets including a high speed data byte count for a particular high speed data stream.
36. The method according to claim 35 wherein the video service descriptor packetfurther includes a high definition television output flag.
37. The method according to claim 22 further comprising the step of encoding each row of data to be transmitted according to a forward error correction algorithm prior to interleaving.
38. The method according to claim 37 wherein the forward error correction algorithm is Reed Solomon encoding.
39. The method according to claim 38 wherein the number of parity bytes inserted per row varies in direct proportion to the likelihood of data error of the transmission medium.
40. The method according to claim 38 wherein the packets forming step further comprises the step of forming first and second regions, a first region having additional forward error correction encoding to Reed Solomon encoding and a second region having Reed Solomon encoding.
41. The method according to claim 40 wherein the additional forward error correction encoding comprises majority logic and convolutional encoding.
42. Apparatus for encoding frames of digital data streams for transmission the frames comprising rows and columns, the apparatus comprising at least one data compression circuit for compressing an input high speed data stream for transmission, at least one low speed data formatter for removing framing and error protection digital data from an input low speed data stream, a multiplexer, responsive to the data compression circuit and the low speed dataformatter, for encoding the frames of data for transmission the multiplexer particularly comprising an interleaving circuit for interleaving the rows and columns according to a predetermined algorithm and a synch inserter, responsive to the interleaving circuit, for inserting horizontal and vertical synchronization words into the frame.
43. In receiver apparatus for receiving a signal including high speed data streams, the high speed data stream including at least a digital television data stream, a high speed data processor comprising decoder means for decoding a packet data portion of the received signal including a high definition television signal flag, first output means, responsive to said decoder means, for outputting a received television signal, and second output means, responsive to said decoder means, for outputting a high definition television signal indicator signal when the output television signal is a high definition television signal.
44. A waveform generator for generating a synchronizing waveform comprising a continuous periodic waveform generator means for generating a continuous periodic waveform having a frequency within the television bandwidth, interrupting means for interrupting the generation of the continuous periodic waveform, frame marking signal generator means, responsive to the interrupting means, for generating a frame marking signal, the frame marking signal comprising one cycle of a periodic waveform having a greater amplitude and a lower frequency than that of the continuous periodic waveform.
45. The waveform generator according to claim 44, the continuous periodic waveform signal having a frequency of 3.375 MHz.
46. The waveform generator according to claim 44, the frame marking signal generator means generating the frame marking signal at twice the amplitude of that of the continuous periodic waveform.
47. The waveform generator according to claim 44, the continuous periodic waveform having an amplitude between .375 and 1.0 volt, peak to peak.
48. The waveform generator according to claim 44, the frame marking signal having an amplitude between .75 and 2.0 volts, peak to peak.
49. The waveform generator according to claim 44, the interrupting means comprising a signal at a frame rate.
50. The waveform generator according to claim 44, the frame rate having a frequency of 50 Hz.
51. The waveform generator according to claim 44, the continuous periodic waveform generator means and the frame marking signal generating means comprising counting means for continuously outputing a first plurality of digital addresses, memory means, responsive to the counting means, for outputing digital data representative of analog signal levels, and digital to analog converter means, responsive to the memory means, for outputinganalog signal levels, the counting means, responsive to the interrupting means, for outputing additional digital addresses until a predetermined digital address, and, thereafter, returning to outputing the first plurality of digital addresses
52. The waveform generator according to claim 51, the first plurality of digitaladdresses comprising four addresses.
53. The waveform generator according to claim 51, the counting means being further responsive to a clocking means comprising a signal having a frequency at least four times greater than that of the continuous periodic waveform
54. The waveform generator according to claim 51, the additional digital addresses being fifty-six additional addresses.
55. The waveform generator according to claim 51, the frame marking signal generator means further generating one cycle of dampened continuous periodic waveform signal prior to generating the frame marking signal
56. The waveform generator according to claim 55, the dampening of the continuous periodic waveform signal corresponding to a cosine squared function.
57. The waveform generator according to claim 51, further comprising means for filtering and for maintaining the generated waveform within predetermined limits.
50a
58. The waveform generator according to claim 51, being coupled to a master multiplexer for synchronizing at least one slave multiplexer to the master multiplexer.
59. The high speed data processor according to claim 43, wherein said decoder means outputs at least one of data, an error flag, a clock signal, and a frame synchronization signal and said first output means receives said at least one of data, an error flag, a clock signal, and a frame synchronization signal.
60. The high speed data processor according to claim 59, further receiving an audio data stream and including an audio processor for responding to said audio data stream and said at least one of data, an error flag, a clock signal, and a frame synchronization signal and for outputing an audio signal.
61. The high speed data processor according to claim 59, further receiving a text data stream and including a text processor for responding to said text data stream and said at least one of data, an error flag, a clock signal, and a frame synchronization signal and for outputing a text signal.
62. The high speed data processor according to claim 59, further receiving a lowspeed data stream and including a low speed data processor for responding to said low speed data stream and said at least one of data, an error flag, a clock signal, and a frame synchronization signal and outputs a low speed data signal.
63. Apparatus for decoding a horizontal synchronizing word according to claim 1, said data stream forming means for extracting at least one bit of other data per frame and combining a plurality of said at least one bit received over at least two frames into said data stream.
64. Apparatus for decoding a horizontal synchronizing word according to claim 1,further including means, responsive to said data stream of said data stream forming means, stream from the extracted other data, for interpreting said data stream as at least one of network signalling, telecommunications identification, transmitter identification, logical connector order, maintenance and alarm information.
65. Apparatus for decoding the horizontal synchronizing word according to claim 63, further including means, responsive to said data stream of said data stream forming means, for interpreting said data stream as at least one of network signalling, telecommunications identification, transmitter identification, logical connector order, maintenance, and alarm information.

50b
66. The method for decoding the horizontal synchronizing word according to claim7, said step of forming a data stream from the extracted other data including the step of extracting at least one bit of other data per frame and combining a plurality of said at least one bit received over at least two frames into said data stream.
67. The method for decoding the horizontal synchronizing word according to claim7, further including the step of interpreting said data stream as at least one of network signalling, telecommunications, transmitter identification, logical connector order, maintenance, and alarm information.
68. The apparatus for decoding the multiplex structure control word according toclaim 13, said demultiplexer means outputting at least one of an error flag, data, clock, and enable signals.
69. The apparatus for decoding the multiplex structure control word according toclaim 67, said demultiplexer means controlling in accordance with said multiplex structure control word at least one of a video processor, an audio processor, a text processor, and a low speed data processor.
70. The apparatus for recovering the low speed data according to claim 16, said frame format further including high speed data packets containing high speed data, said demultiplexing means further including means for demultiplexing the high speed data from the high speed data packets in accordance with the multiplex structure control word.
71. The high speed data processor according to claim 43, further including an expansion socket receiving said at least one of data, an error flag, a clock signal, and a frame synchronization signal.
72. The apparatus for decoding the multiplex structure control word according toclaim 13, further including an expansion socket receiving said at least one of data, an error flag, a clock signal, and a frame synchronization signal.

50c
CA002177811A 1993-12-03 1994-12-05 Multiplexing digital signals for transmission to remote locations Abandoned CA2177811A1 (en)

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US5583562A (en) 1996-12-10
MA23382A1 (en) 1995-07-01
EP0746944A1 (en) 1996-12-11
US5757416A (en) 1998-05-26
WO1995015655A1 (en) 1995-06-08
US5502499A (en) 1996-03-26
KR960706747A (en) 1996-12-09
AU1295595A (en) 1995-06-19

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