CA2189451C - Power distribution module - Google Patents
Power distribution module Download PDFInfo
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- CA2189451C CA2189451C CA002189451A CA2189451A CA2189451C CA 2189451 C CA2189451 C CA 2189451C CA 002189451 A CA002189451 A CA 002189451A CA 2189451 A CA2189451 A CA 2189451A CA 2189451 C CA2189451 C CA 2189451C
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- power
- output
- input
- circuitry
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
- B60R16/00—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for
- B60R16/02—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements
- B60R16/03—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements for supply of electrical power to vehicle subsystems or for
- B60R16/0315—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements for supply of electrical power to vehicle subsystems or for using multiplexing techniques
Abstract
A power distribution module (200) is especially suited to vehicular applications. An input/output module port (229) is adapted forconnection to an external multiplexed communication path, with transceiver circuitry (228) being operative to sent and receive messages over the communicating path in digital form. The module is flexible enough to support a standard or user- defined, communication protocol. An input (231) is adapted for connection to a source of power. A plurality of controllable power switches (240) are used to selectively route power from the source to a plurality of power output ports (251) each port being associated with one of the switches. Control circuitry (220), operatively connected to the transceiver circuitry and to each power switch, facilitates the sending and receiving of messages over the communication path and provides control signals (246) to the switches in accordance with a message received.
Description
~ W095/30263 tr~ X~ aq45l 1 -- , .
POWER DISTRIBUTION MODULE
Field of the InvDntion This invention relates generally to power distribution and, in particular, to a module capable of receiving a power related command by way of a 5 , 1ratiOns inter~ace and routing power from an input to one of a plurality of outputs in accordance with a command received. The module is particularly useful in vehicular applications, where it may be interfaced to an existing network to simplify i.. Lt:L~ I; ons and eliminate wiring .
~ u~, "1 Of ~hD Invention Vehicles such as automobiles have traditionally routed electrical power from a source such as a fuse block or breaker panel to control energy cnnC~ming loads via modules including switches and/or relays. Generally the 15 fuses for breaker panel is conveniently located either under the ~lRAhho~rd or in the engine , i L. Many of the controls are located on the r~ to~ DApeci~lly on the driver's side. Other controls may be located closer to their associated loads, as with door-related or seat-20 related devices.
With today ' s automotive terhnnlogy, includingcomplex safety features, climate control and operational devices, ~LLr ~ ly complex wiring harnesses have resulted.
Over the past 15 years, various approaches have been taken 25 to reduce the number of wires and cables, thereby Wo95/30263 ~ $ ;~t~45t ~ 77 " 1~5 -simplifylng the manufacturing process, including lead dress reSIuirements . R~ r.; n~ the number of higher power cables in favor of low power signal lines adds a further advantage of reducing vehicle weight.
One way to limit the number of high power cables and to reduce the amount of wiring in general is to utilize multirl~Yin~ systems whereby control signals are f 1~ l A~I~J~d among switching units and loads distri~uted tllLuuylluu~ the vehicle, instead of having a separate power line for each load radiating from the central fuse box or breaker panel.
An early multiplex system for a vehicle is described in U. 5 . Patent ~lo . 3, 864, 578 . This sy6tem include6 an encoder unit preferably disposed at the head of the vehicle's steering column at or near the hub of the steering wheel which provides a timing signal and a code signal which are responsive to the position of operator actuable controls. A plurality of ~ub:.L~ILially identical decoders receive both the timing and code signals and provide a plurality of outputs driving relay means for selectively energizing vehicle ~ ~,,. This system uvt:d on the existing prior art by offering a stand~y mode of operation wherein the decoder and encoder means draw no significant current and by warning an operator in case of = failure of any controlled loads such as a brake 2~ lamp. However, this system is essentially ~yll- llLUl~UU5 in at a timing signal is delivered to all decoders with the code signal being interpreted with respect to this timing signal. As such, serious reliability problems could result ` j . ~
W0 95/30263 ~ 2 t 8 9 4 ~ t from the use of this system in the event an illCuLL~_~
5yll~1lLulluu5 signal were transmitted to all conn~cted receivers. This system also requires that a plurality of high gain auLuaLuLD, which to~J~L1lel comprise the relay meâns, are connected in line with each lOâd.
The system described in U.S. Patent No. 4,156,151 provides an electrical energy distribution system for motor vehicles in which a single power line having an associâted single control line can be used to feed a plurality of remote control units to which a plurality of current . _ _ are connected. A central control unit generates coded pulse signals for identifying the current-cnncl~min~
load and means are provided for ~ o~ling signals received ât a remote control unit associated with a group of selected power ~u~._ =,. This system, however, is very complex and relies upon discrete ~5 to monitor pulses contained in square waves in order to properly decode the address of a remote control unit. The system is Ult:Iefu ~ prone to error and difficult to expand, particularly if uu,_ analog controls are required.
A more recent vehicle multiplex system is ~ic~l05---q in U.S. Patent No. 4,845,708. In this system, both power buses and control buses radiate from the fuse block and the control buses int~,uulllleuL a controller with - 25 UU5 input and output units distributed about the vehicle . Pref erably, the controller selects one of the control buses as an active bus at any given time and i c~l~tF-c the I. i ni nq control buses both from the active WO 9!i/30263 ~ r~ 2 1 ~ q 4 5 i ~ J~ 477 ~ 4 ~
control bu6 and from the controller in order to improve system reliability and reduce ele~ L, tic interference.
This system suffers from the need for multiple input and output circuits which are functionally different from one 5 another. Also, as with all the prior art so far referenced, these input and output circuits are not ;ntc~ nt enough to facilitate two-way ~ iAtion over a sophisticated ~ ; ation path, whether using a proprietary or standard protocol.
S of the Inventinn The present invention is a power distribution module, ~Cpo- jAlly for vehicular applications, including an input/output port adapted f or connection to an external mult;pl~Y~ communication path. The module includes 15 transceiver circuitry cnnnot~7 to the input/output port operative to send and receive -- , over the ;çAtion path in digital form, and the module is f 7 ~Y; hl ~ enough to support a ~ .d~rd or user-def ined ; cation protocol .
The module further includes an input for connection to a source of power, a plurality of power output ports, and a plurality of controllable power switches, each associated with one of the power output ports, each power switch being operative to route power from the source of power to an associated power output port in accordance with a control signal. Control circuitry, operatively connected to the transceiver circuitry and to _ _ _ _ _ _ _ _ _ _ _ WO95130263 !'~ ,t~ ', 21 89451 r~ 77 each power switch, facilitates the sending and receiving of J ~ c over the communication path through the transceiver circuitry, and in a~ . vL-L~nce with a received message, provides a control signal to a specific power switch, causing power to be routed from the power source to the output port associated with that switch.
Fault-detection circuitry is included to compare signals representative of . r~ being sent and received and provide a fault signal to the control circuitry in the event of contention between the ~ being sent and received .
In a preferred embodiment, the module is entirely contained within an enclosure having an integral heat sink in thermal ic~tion with the power switches. A power input ulllleuLuI is provided on the enclosure to receive inr~min~ power from a source of power, and a plurality of ~ . -uuL~.L t~rmin/lq are provided on the enclosure, each t~rmin~l being adapted for connection to a E -- ~ ;nq load. The power switches preferably take the form of solid-state devices such as power MûSFET~ inrl~ n~ two-level chclLy~ ~ circuitry operative to boost the voltage provided to the gate of the MOSFET in order to deliver a desired, predetermined voltage through the associated ouLI.uL port yet conserve energy during quiescent - 25 periods.
The control circuitry may be implemented either as a general ~uL~ose mi, Ler or alternatively, as more dedicated circuitry for example, in the form of an w0 95/30263 ~ 2 1 8 9 4 5 1 P~1~ C5477 application-specif ic integrated circuit or using ~LUU,L hle array logic. In the event that a miuLu~:U~ ~,uLer is used, the module may further include a timer reset circuit configured to receive a signal from the controller 5 and reset the controller in the event that the signal is not received. For example, this circuit may include a low-frequency oscillatûr which cont;n~ cly aL~ Ls to re6et the controller unless an inhibit signal is supplied by the controller .
'rhe module preferably further includes output protection circuitry operative to sense the current through a power switch and turn of the switch if the current through the switch exceeds a pre~ n~d value.
Circuitry capable of detecting open-load conditions or 15 excecs t~ aLur e may alternatively be provided. Voltage regulation circuitry may also be included to convert an i n~ voltage into a voltage for use within the module, fûr example if the control circuitry is implemented with a mi~ r configured for a lower-voltage supply.
Wo s5/30263 i . ~ 4 ,~ 1 Rrief Descri~tion of thf- Draw; neC
FIGURE 1 is a block diagram which ~ es~ L:, ways in which information and power may be distributed in nc,cc,Ldc.................................. ce with the present invention;
FIGURE 2 is a block diagram of one of the power distribution modules ~ rict~l in Figure l;
FIGURE 3 is a drawing which illustrates a preferred physical realization of a power distribution module;
FIGIIBE 4 is a detailed schematic diagram of a preferred multiplex transceiver contained within each power distribution module for the purpose of bidirectional tion;
FIGURE 5 is a detailed schematic diagram of a preferred power switch used to route power to one of a plurality of output terminals; and FIGURE 6 is a schematic diagram which illustrates a pref erred voltage regulation and reset/watchdog circuit .
De~iled Descri~tion of the Preferred E ' ~; ' The present invention relates generally to distributed power control, and in particular, to a versatile, intelligent module capable of receiving through a communications interface and routing power from - an input to one of a plurality of outputs in a-,-;uL ~ .ce with '~ received.
Figure 1 shows at 100 several ways in which this module may be conf igured within an environment requiring W09530263 ~$~ 8~451 ~ 477 ._ power distribution. One such environment, for example, might be in a vPhiclllAr application, though other uses will be evident fron the following tl;ccll~;on.
Environment 100 may include an existing 5 communication network to which modules of the present invention may advantageously be interfaced. Such an existing network is shown in Figure 1 as nodes 102 i cating over path 103 . These node6 102 may take the form of either centralized or distributed network 10 facilities, some being general-purpose in nature while others are dedicated to specific tasks. Additionally, path 103 may support a~y~ Lu~ U5 or ~y---l-L~ JUS ;cations, either via parallel interface or a serial link, such as a twisted pair, in which case data mul~pl-~Yin~ may typically 15 be employed.
In vehicular applications, one such existing network comprising nodes 102 and paths 103 . TrAnemi ~sions over paths 103 may use standard protocols, including those supplied by major manufa~;~uL.:~. For example, in the case 20 of the Ford Motor Co., the b,L.~ d _UL~ LC~te protocol or SCP interface and associated data ~LLU~;LUL_S may be employed, which use a twisted, dual wire currently operating at approximately 42 kbps. A detailed description of this particular interface is contained within Ford 25 ~nginPP~ing Specification do~;, Ls. Document SCS-SCP-OOl, for example, details SCP data structures and interface requirements. rc_ L SDS-SCP-002 provides the subsystem design specification for the SCP diagnostic system, and W0 95/30263 ~ 77 _ 9 _ SDS-SCP-003 ~Yrl71inR network implementation requirements.
These lc_ ~s are generally available to outside vendors for the purpose of developing SCP-related Pq~ , and are inCUL~ULC~Led herein by reference.
Broadly, the SCP system facilitates the intelcu.l.... .eu~ion of multiple electronic data i cation modules as nodes within a vehicle using an open architecture network approach. SCP operates in a single-level network topology wherein all nodes are inteL~c,n~le- Led over a the ba~ e. In Figure 1, this is depicted by nodes 102 and routing paths 103. SCP data is encoded using pulse width modulation with a generic frame format including a start segment, priority type, target address, source address, a message of variable length, a cyclic ,~ check (CRC) segment, in-frame resolution bytes, and an end of frame delimiter. Additional information concerning this particular protocol and its conf ormance to IS0 r~Lalld~Lds may be ascertained from the Ford do L~
mentioned above. The present invention claims no portion of this existing network, but rather, may be lJLUyL -' and configured so as to intentionally interact with a wide variety of existing protocols available from U~D
sources, whether ~L~I,daLd or proprietary.
Continuing the reference to Figure 1, module 104, - 25 represents a power distribution module u u,.-LLu-;Led and ~JL~yL -' in accordance with the present invention. This module 104 may icate directly with other such modules 104 ' and 104" over communication path 105 . This WO g5/30263 ~ ; ;f ~ 2 1 ~ ~ 4 ~ 1 T~ . 5~77 illustrates the case where the modules of the present invention may interact with one another i n~ " L of other nt:l JLk_ such as that depicted by nodes 102 and path 103. Each distribution module, such as module 104, is 5 connected to a source of power 110 which, for example might take the form of a power distribution block, fuse block or a direct cnnn~r~inn to a power source such as a battery, rlQp~ nr1i ng upon the specific configuration. In response to information, icated via lines 105, power from source 10 110, routed to module 104 over thicker line 108, will be distributed to one or more outputs 106 of module 104. In like manner, modules 104' and 104", receiving power over lines 108' and 108", will deliver power to their respective outputs 106' and 106" in accordance with ~ '- received 15 over i cation path 105 .
Module 120 in Figure 1 shows the case where a module formed according to the present invention 120 is connected directly to an existing communication network over path 103 and, in accordance with ' ~ received 20 th~l~rr~, routes power through thicker line 130 to one or more of its associated outputs 122. Yet another configuration is possible, that being a direct Conn~-ction of the present invention module to a node of an existing network, but without using the network to which the 25 existing node is interfaced. Module 131 illustrates this situation, wherein an entirely separate communication path 130 is used to communicate with node 102 ' and, in &_L;Qr ~nce with n~ received, routes power from ~I W095/3~263 ~ if~ 9451 r~ 77 thicker line 133 to one or more of its outputs 132.
In summary, the module of the present invention may support an existing single- or multi-level network or, d~pon~91n~ upon the specific requirements and ciL~;ul~Ldnut:s, 5 may be used to f orm single- or multi-level network tnpol Ogi ~c ~ including star and ring architectures, whether of the masterless or master/slave conf iguration .
Figure 2 is a simpli~ied block diagram used to illustrate major operational features associated with a 10 single module formed in ac- oLdclnce with this invention.
The module overall, shown at 200, includes an enclosure represented by a broken line 210, within which control circuitry 220 is used to activate a plurality of power switches, one being depicted at 240 and being controlled by 15 controller 220 over line 246. ~rhe controller 220 is conveniently implemented with a single-chip mi~:L, L~r of conventional design, in the preferred ';- L this being a high-speed C-MOS device such as the MC683~C805C8, ~vailable from Motorola, Inc., though other devices from 20 other manufa~ Lu~L~ such an Intel and Texas In.iLL, L:, are equally applicable, as are non-mi.LuyLucessù~-based control 601utions .
The communication interface to module 200 is shown by a twisted pair 226, which interfaces to the 25 controller 220 via _ ications interface 228 through connector 229 supported on F~ncl ncllre 210 . Power is received to the module through thicker line 230 and t~rm; nAl 231, which is then routed to each of the switches _ . . , _ . . . .. . . . . . .. . . .. . . .
w09s~30263 . -~ 4 5 1 1~""" ~77 ~
240 and additionally to the controller 220 via line 234.
Each of the switches 240 is rPcpnncihle for routing power received via input 230 to an output t~rminAl associated with a particular power switch, such as along line 250 5 associated with switch 240. The output t~rminAl~ are preferably intagraI to a single connector 251 supported on .~n~ cllre 210.
Figure 3 illustrates in oblique view a preferred physical realization of a power distribution module formed 10 in a~cuL.lu..c~ with the present invention. A bracket 702, formed of a heat-G~nAl~-tive material such as Alllminllm~ is angled as shown in Figure 3 so as to include outwardly n-lin~ tabs 704 with nounting holes 706. These tabs 704 ~re connet~d to side walls 710 which in turn are c~nnPrtecl 15 to a generally t:. LI.~ular plate 712 having fins 714.
Various modifications to this 2-L~ LuLe: are possible, for example, with regard to the size and shape of the tabs 704, the t9i i t nc of side walls 710 and the overall geometrical configuration of fins 714. For example, in an 20 alternative ~ ol.~LLu- Lion it may be possible to use plate 712 with fins 714 alone, foregoing the need for side walls 710 and separate tabs 704, as these tabs may be solely provided on the outer ~n-locllre collar 720 which will now be described. This collar 720 includes side surfaces which 25 support various connectors and tPrmi n~l c which will subsequently be described, and includes a through ,s~el Lur c:
722 into which the angled bracket 702 is inserted. One outer side surface 726 is configured to receive a bolt 728 W095130263 ~ 9~5 1 1 ", ~77 having protruding threads 730 onto which nut 732 is placed.
This nut/bolt combination forms the power input tPrm;ni~l previously described with regard to the electrical aspects of the invention, and makes contact to a pad 734 on printed 5 circuit board 740. A connection between the bolt 728 and pad 734 is not shown, and may take a-lva-,Lage of various connection `~ , including mechanical ~Le~i~UL
soldering, and so forth.
Supported on another outer surface 742 is a 10 molded shape 744 within which power output tonm;n~l~ 746 are placed. These tP~;n~l~ 746 connect to CuLL~ ;ng pads 748 on circuit board 740, preferably through a soldered connection. With these ~r~;nAl~ 746 affixed to their c oLLeci~ullding pads, the circuit board~bracket 15 assembly is installed into the collar 720 by f irst inserting the f~-rm;nFIl 746 into apeLLuLes 750, then hinging the input t~-rm;n~l end of the bracket finally into the collar. Holes 750 may be replaced with a slot or other configuration to facilitate the i.,LLù.luuLion of more than 20 one f-~rm;n:~l at a time.
The plate 712 has an upper surface which preferably includes heat radiative fins 714, and an opposing lower surface against which circuit board 740 mounts. This circuit board 740 is preferably double-sided 25 with certain of the electrical ~ ~lellLs 754 being mounted on the side visible in Figure 3, and with other, Ls, such as those sensitive to t~ aLuLe or need of dissipating thermal energy being mounted between the 3 ~ 9 ~ $ ~ --circuit board and the lower surface of the plate 712. For example, the power switches previously described would typically be s~nrlwi ~-hc~d between the circuit board and the bracket lower surface. Although the connector associated 5 with the communications port is not visible in Figure 3, this, too, would be provided on an outer surf ace of collar 720, for example next to cu....e~:LuL shape 744 on surface 742. ~lternatively, this communications r ~P~ I ~" may be supported on surface 726 or the other two side walls 10 associated with the outwardly extending tabs. Once bracket 702 has been properly inserted into collar 726 a sealing member 760 may be installed into the buLi L portion of the assembly so as to protect the circuit board 740 and LE~ mounted the~ ~ul.u... This element 760 is 15 optional, however and may be replaced with some form of liquid potting material or, possibly eliminate it all together .
Figures 4 through 6 illustrate in more detailed form preferred implementations of the circuits illLr uduc:ed 20 in Figure 2. Figure 4, for example 6hows a detailed schematic of a communications controller in the form of a multiplexed transceiver circuit 400. This particular implementation is designed to be fault-tolerant, priority arbitrating, and sufficiently rugged to meet the demands of 25 vehicular applications. The circuit 400 will withstand continuous shorts to either ground or power up to 24 volts in both f orward and reverse directions . Load dunp protection is also provided.
-WO95/30263 ~ j 8q45 1 P~ . 477 The communications protocol makes use of a non-return to zero (NRZ) Pn~orling which is well known to those skilled in electronic communications. The output NRZ
6ignal is deliYered along line 410 from mi~L- , Ler 412, S to a pair of transistors Ql and Q2 which drive multiplex line 440. Input communications are fed to mi.;L. ,_LeL
412 along line 450 through resistor R9 and exclusive-OR
gate 461 which is configured as a non-inverting buffer.
The NRZ information is then converted by control circuitry 10 or miu~ Ler 412 in a~:coL-ldnce with software yLUU,L --' therein. The output delivered along line 410 is u~ e~ ~d to a pair of 10 K resistors R1 and R2. R1 provides a pull up to a 5-volt supply, to yuaLclllLee that the driver transistor Q2 is turned of f during power up and 15 initialization. Resistor R2 provides drive to the inverter transistor Ql, which in turn drives the output stage Q2 via R4. R3 provides current to Ql which pulls the output of Q2 high through R5 to its non-asserted state. The particular type of transistor used for the application of Q2 may be 20 adjusted in aucuL-lal.ce with operational deDands. Note that input line 450 both monitors what is being transmitted via multiplex line 440 and detects i nl i n~ information from the network via resistor R9. In the event that contention is detected, mi~L.- ,_Ler 412 will output a signal along 25 line 420, through exclusive-OR gate 463 and resistors R8 and R7, driving transistor Q4 to shut down the output device Q2.
Transistor Q3 and resistor R6 provide current W095J30163 ir~ ?~ s.~n7 limiting protection for Q2 in the event that the output 440 is shorted as a result of some fault. Load dump protection is provided by zener diode Zl as a threshold reference, with resistor R7 providing current limiting to turn off 5 transistor Q4 and the output driver Q2 during load dump.
This shunts the drive current away from output driver Q2, effectively turning it off.
Fault detection is ~ h~c~ with exclusive-OR
gate 460, which is used to test whether the plurality of 10 both the tr~n~; ss1 on and reception signals are the same .
However, due to system capacitances and other c~nr~ ration5, output line 440 will not in practice be capable of r~pon~linq immediately. As a ~rmceq~ n~e~ the fault gate 460 may detect an error even though one has not 15 oc~;uLLcd. Therefore, this type of error is effectively time integrated by resistor R10 and capacitor Cl, thus ~n;lhl;nq the system to stAh;1;7~ before actually reporting an error to the mi~:L~ -_Ler 412. The output of the integrator Cl/R10 is 5~5'h; 1; 7ed and inverted by another 20 gate 462 before presenting it to the mi.:L. ~ 412 along line 470.
Figure 5 illustrates one of the power switches depicted as devices 240 in Figure 2, this preferred implementation being f ault-tolerant as well as short-25 circuit-proof. ~s a driver device, the circuit preferably utilizes an N-channel power MOSFET, such as an MTP3055EL, as shown in the output stage. In operation, the output 520 of mi.;L ~ Ler 502 drives transistor Q4 to the ON state, ,, . . . _ . . . _ _ _ _ _ _ _ _ _ _ _ ~ ~ ~, wogsl30263 ~ ~ ~ t~ 2 ~ 8 94 5 ~ P~ll-J 9! ~477 driving the Ql-Q2 pair to a low output level, and turning off the output stage. When line 520 is driven low, Q4 is turned off which allows the output of the Ql-Q2 output to rise, which in turn asserts the output device Q3. Open-5 circuit fault detection is accomplished via R7 and R8.
When the output is off, R7 pulls up on the output pin, but the weak drive r~r~hility associated with R7 is ~V~l~ by the load. However, if the load is not connected or if the load is open, the weak drive provided by resistor R7 will 10 put the appropriate logic level at the output 530. For example, if a load is not c~nnec~ecl, the output 530 will nevertheless be pulled up to battery potential which will be sensed at input 540 of mi~;L._ _Ler 502 via resistor R8 .
The short-circuit protection associated with the output of the power switch will now be described. In the event that the output is shorted to ground, a voltage will be developed across R6 in direct proportion to the amount of current being sourced by MOSFET Q3. This voltage is 20 directly coupled to the base 506 of transistor Q6, with the base-emitter threshold voltage being used to detect when the current limit has been ~ e~ cl. For example, with a value of R6 equal to 0 . 03 Ohm, transistor Q6 will turn on for a current of 20 amps. When this threshold is reached, 25 the current through Q6 ~v~_ - the pull-down resistor R5.
When R5 is driven positive by approximately 0 . 6 volts, it drives current into Q5 via R4 causing transistor Q5 to turn on. When Q5 turns on, it lowers the output of the Ql-Q2 W095/30263 ~ }~ ~ 5~ r-~77 ~ , -- 1 8 predriver stage, effectively turning off the output driver Q3 .
A two-level charge pum~p circuit 550 includes two reference voltages, a high reference 552 and a low 5 reference 554, each reference feeding one input to two-input voltage ~ ~lLoLD 553 and 555, respectively. ~igh reference 552 feeds comparator 553 which, in turn, enables a low current charge pump 556 coupled to the power MOSFET
gates through line 560. Low voltage reference 554 feeds a 10 second comparator 555 used to enable a high current charge pump 557 c~nn~ct~d in parallel with the low-current charge pump 556, also in communication to the MOSFET gates along line 560. Although the characteristics of this circuit may be varied in ~o~uLd~ e with the reference voltage values, 15 and so forth, in a preferred ~mho~ir L comparator 553 will turn on and enable low current charge pump 556 at a nominal voltage of 8 volts and turn off at a nominal voltage of 10 volts. ~ Lor 555, on the other hand, will turn on and enable the high current charge pump at a nominal voltage of 20 7 volts and turn off at a nominal voltage of 8.5 volts.
Using this circuit, a low drain current will be supplied to the MOSFET gates during electrically quiet or qniP~c~nt periods, but if a voltage between 7 and 8.5 is realized, the high-current charge pump 557 will be activated, thus 25 ~-n~hl; n~ the power switches to properly route current from the input to one or more of the power outputs.
Figure 6 depicts in schematic form a regulator ~nd watchdog timer circuit. Battery voltage is applied to _ _ _ ~ _ _ _ _ _ _ _ _ _ _ _, _ . . _ _ _ _ ~ WO 95/30263 ~ Y~ r '.5 - ~ ? 1 8 9 4 ~j 1 P~ 477 a single-chip regulator 640 which supplies an output voltage in the range of 4 . 75 to 5 . 25 volts DC, this being well within the requirements of 5-volt miulu~ _Ler 601.
Such single-chip regulators are widely available from 5 commercial manufacturers including Motorola, National ~Pmi.. l LuL, Texas Ill~>LL L5 and others. The preferred regulator includes a delayed reset output which is shown along line 610 as it enters mi~:L. ~_Ler 601. When battery voltage is applied to the input of regulator 640 10 along line 620, the reset line 610 is asserted, holding the mi~;L._ _Ler 601 in a safe, controlled state. As the battery voltage rises, capacitor 65 is charged with a current source internal to the regulator device 640. When the voltage across this rAracitor reaches a prede~Prmi nP~l 15 threshold, indicating that the device 640 is supplying voltage in the proper range, the reset output is no longer asserted, allowing mi~;.u~ ~r 601 to function normally.
However, if the voltage falls low enough to cause the regulator to fall out of regulatlon, the reset output is 20 again asserted, placing the mi~;Ler a known safe state. In practice, reset occurs within a few hundred millivolts prior to the regulator dropping out of regulation, and a reset line 610 will remain asserted until the voltage returns to a safe value. At this point, the - 25 delay function will be activated, and the mi~iLoc Ler will be taken out of its reset condition in an orderly fashion. The regulator 640 also protects the electronics from reverse battery and load dumps, ~Ccllmi ng they do not ., . _ . . _ . . . . . .
WO95/30263 t; ~ S ~ 4~ t r~ ,477 exceed ~80 volts.
The watchdog circuit 604 uses an oscillator in~u.~oL~Ling a _ tlLor 602, which forces the miu- . Ler to change the state of the watchdog output 5 612 at a certain minimum rate in order to keep from being reset. Ir the mi~.. Ler does not come alive the oscillator will continue to oscillate at the lOW-rLt:yUell~;y rate, 5 Hz, which will keep resetting the miuL. Ler five times per second until it wakes up. Current for the 10 charging portion of the oscillator is provided by resistor Rl which is conne-t~d directly to the 12 volt battery input. The conf iguration shown in Figure 6 thus also conveniently performs a low battery voltage inhibit function. AC co-lrl; ng iS used between the oscillator and 15 the reset line 610 to prevent the oscillator from being defeated ir the output of the computer st~h;l;~oc at either a logic one or zero state, thereby rendering it ineffective. In operation, the output 612 of the miu, ~r 601 is converted to a pulse by the shaping 20 network 620 shown in the broken-line rectangle. Under normal conditions, this pulse consistently dis. l.aLy~:6 capacitor C, keeping the output of the oscillator 602 in the logic one state. }~owever, if the pulse does not arrive in time the oscillator will change state, driving the 25 output to a logic zero, which is passed through the diode, to reset the input of the ~ _L~ along line 610.
During normal operation, the system is continuously powered from the vehicle battery system over ~ W095130263 ~S 21~94~ r~ 77 line 620. Since the reset circuitry is designed to activate when the battery voltage drops below a predetermined reset threshold, the reset circuitry never - actuates as long as battery voltage i8 maintained.
5 However, during the life of a typical vehicle, the battery supply may dip below the threshold, for example if the battery has been discharged or ~liccf~ e~lPfl In the event this occurs, the system will go into an automatic reset mode, placing all outputs such as 530 in Figure 5 into a 10 Xnown, prP~lPtPrm;ned safe state. When the battery voltage iS ~f ~LuL~, the reset to the mi~:r. _~er along line 610 will be removed at the ay~LuyLiate time to allow normal operation .
Having thus described our invention, we claim:
POWER DISTRIBUTION MODULE
Field of the InvDntion This invention relates generally to power distribution and, in particular, to a module capable of receiving a power related command by way of a 5 , 1ratiOns inter~ace and routing power from an input to one of a plurality of outputs in accordance with a command received. The module is particularly useful in vehicular applications, where it may be interfaced to an existing network to simplify i.. Lt:L~ I; ons and eliminate wiring .
~ u~, "1 Of ~hD Invention Vehicles such as automobiles have traditionally routed electrical power from a source such as a fuse block or breaker panel to control energy cnnC~ming loads via modules including switches and/or relays. Generally the 15 fuses for breaker panel is conveniently located either under the ~lRAhho~rd or in the engine , i L. Many of the controls are located on the r~ to~ DApeci~lly on the driver's side. Other controls may be located closer to their associated loads, as with door-related or seat-20 related devices.
With today ' s automotive terhnnlogy, includingcomplex safety features, climate control and operational devices, ~LLr ~ ly complex wiring harnesses have resulted.
Over the past 15 years, various approaches have been taken 25 to reduce the number of wires and cables, thereby Wo95/30263 ~ $ ;~t~45t ~ 77 " 1~5 -simplifylng the manufacturing process, including lead dress reSIuirements . R~ r.; n~ the number of higher power cables in favor of low power signal lines adds a further advantage of reducing vehicle weight.
One way to limit the number of high power cables and to reduce the amount of wiring in general is to utilize multirl~Yin~ systems whereby control signals are f 1~ l A~I~J~d among switching units and loads distri~uted tllLuuylluu~ the vehicle, instead of having a separate power line for each load radiating from the central fuse box or breaker panel.
An early multiplex system for a vehicle is described in U. 5 . Patent ~lo . 3, 864, 578 . This sy6tem include6 an encoder unit preferably disposed at the head of the vehicle's steering column at or near the hub of the steering wheel which provides a timing signal and a code signal which are responsive to the position of operator actuable controls. A plurality of ~ub:.L~ILially identical decoders receive both the timing and code signals and provide a plurality of outputs driving relay means for selectively energizing vehicle ~ ~,,. This system uvt:d on the existing prior art by offering a stand~y mode of operation wherein the decoder and encoder means draw no significant current and by warning an operator in case of = failure of any controlled loads such as a brake 2~ lamp. However, this system is essentially ~yll- llLUl~UU5 in at a timing signal is delivered to all decoders with the code signal being interpreted with respect to this timing signal. As such, serious reliability problems could result ` j . ~
W0 95/30263 ~ 2 t 8 9 4 ~ t from the use of this system in the event an illCuLL~_~
5yll~1lLulluu5 signal were transmitted to all conn~cted receivers. This system also requires that a plurality of high gain auLuaLuLD, which to~J~L1lel comprise the relay meâns, are connected in line with each lOâd.
The system described in U.S. Patent No. 4,156,151 provides an electrical energy distribution system for motor vehicles in which a single power line having an associâted single control line can be used to feed a plurality of remote control units to which a plurality of current . _ _ are connected. A central control unit generates coded pulse signals for identifying the current-cnncl~min~
load and means are provided for ~ o~ling signals received ât a remote control unit associated with a group of selected power ~u~._ =,. This system, however, is very complex and relies upon discrete ~5 to monitor pulses contained in square waves in order to properly decode the address of a remote control unit. The system is Ult:Iefu ~ prone to error and difficult to expand, particularly if uu,_ analog controls are required.
A more recent vehicle multiplex system is ~ic~l05---q in U.S. Patent No. 4,845,708. In this system, both power buses and control buses radiate from the fuse block and the control buses int~,uulllleuL a controller with - 25 UU5 input and output units distributed about the vehicle . Pref erably, the controller selects one of the control buses as an active bus at any given time and i c~l~tF-c the I. i ni nq control buses both from the active WO 9!i/30263 ~ r~ 2 1 ~ q 4 5 i ~ J~ 477 ~ 4 ~
control bu6 and from the controller in order to improve system reliability and reduce ele~ L, tic interference.
This system suffers from the need for multiple input and output circuits which are functionally different from one 5 another. Also, as with all the prior art so far referenced, these input and output circuits are not ;ntc~ nt enough to facilitate two-way ~ iAtion over a sophisticated ~ ; ation path, whether using a proprietary or standard protocol.
S of the Inventinn The present invention is a power distribution module, ~Cpo- jAlly for vehicular applications, including an input/output port adapted f or connection to an external mult;pl~Y~ communication path. The module includes 15 transceiver circuitry cnnnot~7 to the input/output port operative to send and receive -- , over the ;çAtion path in digital form, and the module is f 7 ~Y; hl ~ enough to support a ~ .d~rd or user-def ined ; cation protocol .
The module further includes an input for connection to a source of power, a plurality of power output ports, and a plurality of controllable power switches, each associated with one of the power output ports, each power switch being operative to route power from the source of power to an associated power output port in accordance with a control signal. Control circuitry, operatively connected to the transceiver circuitry and to _ _ _ _ _ _ _ _ _ _ _ WO95130263 !'~ ,t~ ', 21 89451 r~ 77 each power switch, facilitates the sending and receiving of J ~ c over the communication path through the transceiver circuitry, and in a~ . vL-L~nce with a received message, provides a control signal to a specific power switch, causing power to be routed from the power source to the output port associated with that switch.
Fault-detection circuitry is included to compare signals representative of . r~ being sent and received and provide a fault signal to the control circuitry in the event of contention between the ~ being sent and received .
In a preferred embodiment, the module is entirely contained within an enclosure having an integral heat sink in thermal ic~tion with the power switches. A power input ulllleuLuI is provided on the enclosure to receive inr~min~ power from a source of power, and a plurality of ~ . -uuL~.L t~rmin/lq are provided on the enclosure, each t~rmin~l being adapted for connection to a E -- ~ ;nq load. The power switches preferably take the form of solid-state devices such as power MûSFET~ inrl~ n~ two-level chclLy~ ~ circuitry operative to boost the voltage provided to the gate of the MOSFET in order to deliver a desired, predetermined voltage through the associated ouLI.uL port yet conserve energy during quiescent - 25 periods.
The control circuitry may be implemented either as a general ~uL~ose mi, Ler or alternatively, as more dedicated circuitry for example, in the form of an w0 95/30263 ~ 2 1 8 9 4 5 1 P~1~ C5477 application-specif ic integrated circuit or using ~LUU,L hle array logic. In the event that a miuLu~:U~ ~,uLer is used, the module may further include a timer reset circuit configured to receive a signal from the controller 5 and reset the controller in the event that the signal is not received. For example, this circuit may include a low-frequency oscillatûr which cont;n~ cly aL~ Ls to re6et the controller unless an inhibit signal is supplied by the controller .
'rhe module preferably further includes output protection circuitry operative to sense the current through a power switch and turn of the switch if the current through the switch exceeds a pre~ n~d value.
Circuitry capable of detecting open-load conditions or 15 excecs t~ aLur e may alternatively be provided. Voltage regulation circuitry may also be included to convert an i n~ voltage into a voltage for use within the module, fûr example if the control circuitry is implemented with a mi~ r configured for a lower-voltage supply.
Wo s5/30263 i . ~ 4 ,~ 1 Rrief Descri~tion of thf- Draw; neC
FIGURE 1 is a block diagram which ~ es~ L:, ways in which information and power may be distributed in nc,cc,Ldc.................................. ce with the present invention;
FIGURE 2 is a block diagram of one of the power distribution modules ~ rict~l in Figure l;
FIGURE 3 is a drawing which illustrates a preferred physical realization of a power distribution module;
FIGIIBE 4 is a detailed schematic diagram of a preferred multiplex transceiver contained within each power distribution module for the purpose of bidirectional tion;
FIGURE 5 is a detailed schematic diagram of a preferred power switch used to route power to one of a plurality of output terminals; and FIGURE 6 is a schematic diagram which illustrates a pref erred voltage regulation and reset/watchdog circuit .
De~iled Descri~tion of the Preferred E ' ~; ' The present invention relates generally to distributed power control, and in particular, to a versatile, intelligent module capable of receiving through a communications interface and routing power from - an input to one of a plurality of outputs in a-,-;uL ~ .ce with '~ received.
Figure 1 shows at 100 several ways in which this module may be conf igured within an environment requiring W09530263 ~$~ 8~451 ~ 477 ._ power distribution. One such environment, for example, might be in a vPhiclllAr application, though other uses will be evident fron the following tl;ccll~;on.
Environment 100 may include an existing 5 communication network to which modules of the present invention may advantageously be interfaced. Such an existing network is shown in Figure 1 as nodes 102 i cating over path 103 . These node6 102 may take the form of either centralized or distributed network 10 facilities, some being general-purpose in nature while others are dedicated to specific tasks. Additionally, path 103 may support a~y~ Lu~ U5 or ~y---l-L~ JUS ;cations, either via parallel interface or a serial link, such as a twisted pair, in which case data mul~pl-~Yin~ may typically 15 be employed.
In vehicular applications, one such existing network comprising nodes 102 and paths 103 . TrAnemi ~sions over paths 103 may use standard protocols, including those supplied by major manufa~;~uL.:~. For example, in the case 20 of the Ford Motor Co., the b,L.~ d _UL~ LC~te protocol or SCP interface and associated data ~LLU~;LUL_S may be employed, which use a twisted, dual wire currently operating at approximately 42 kbps. A detailed description of this particular interface is contained within Ford 25 ~nginPP~ing Specification do~;, Ls. Document SCS-SCP-OOl, for example, details SCP data structures and interface requirements. rc_ L SDS-SCP-002 provides the subsystem design specification for the SCP diagnostic system, and W0 95/30263 ~ 77 _ 9 _ SDS-SCP-003 ~Yrl71inR network implementation requirements.
These lc_ ~s are generally available to outside vendors for the purpose of developing SCP-related Pq~ , and are inCUL~ULC~Led herein by reference.
Broadly, the SCP system facilitates the intelcu.l.... .eu~ion of multiple electronic data i cation modules as nodes within a vehicle using an open architecture network approach. SCP operates in a single-level network topology wherein all nodes are inteL~c,n~le- Led over a the ba~ e. In Figure 1, this is depicted by nodes 102 and routing paths 103. SCP data is encoded using pulse width modulation with a generic frame format including a start segment, priority type, target address, source address, a message of variable length, a cyclic ,~ check (CRC) segment, in-frame resolution bytes, and an end of frame delimiter. Additional information concerning this particular protocol and its conf ormance to IS0 r~Lalld~Lds may be ascertained from the Ford do L~
mentioned above. The present invention claims no portion of this existing network, but rather, may be lJLUyL -' and configured so as to intentionally interact with a wide variety of existing protocols available from U~D
sources, whether ~L~I,daLd or proprietary.
Continuing the reference to Figure 1, module 104, - 25 represents a power distribution module u u,.-LLu-;Led and ~JL~yL -' in accordance with the present invention. This module 104 may icate directly with other such modules 104 ' and 104" over communication path 105 . This WO g5/30263 ~ ; ;f ~ 2 1 ~ ~ 4 ~ 1 T~ . 5~77 illustrates the case where the modules of the present invention may interact with one another i n~ " L of other nt:l JLk_ such as that depicted by nodes 102 and path 103. Each distribution module, such as module 104, is 5 connected to a source of power 110 which, for example might take the form of a power distribution block, fuse block or a direct cnnn~r~inn to a power source such as a battery, rlQp~ nr1i ng upon the specific configuration. In response to information, icated via lines 105, power from source 10 110, routed to module 104 over thicker line 108, will be distributed to one or more outputs 106 of module 104. In like manner, modules 104' and 104", receiving power over lines 108' and 108", will deliver power to their respective outputs 106' and 106" in accordance with ~ '- received 15 over i cation path 105 .
Module 120 in Figure 1 shows the case where a module formed according to the present invention 120 is connected directly to an existing communication network over path 103 and, in accordance with ' ~ received 20 th~l~rr~, routes power through thicker line 130 to one or more of its associated outputs 122. Yet another configuration is possible, that being a direct Conn~-ction of the present invention module to a node of an existing network, but without using the network to which the 25 existing node is interfaced. Module 131 illustrates this situation, wherein an entirely separate communication path 130 is used to communicate with node 102 ' and, in &_L;Qr ~nce with n~ received, routes power from ~I W095/3~263 ~ if~ 9451 r~ 77 thicker line 133 to one or more of its outputs 132.
In summary, the module of the present invention may support an existing single- or multi-level network or, d~pon~91n~ upon the specific requirements and ciL~;ul~Ldnut:s, 5 may be used to f orm single- or multi-level network tnpol Ogi ~c ~ including star and ring architectures, whether of the masterless or master/slave conf iguration .
Figure 2 is a simpli~ied block diagram used to illustrate major operational features associated with a 10 single module formed in ac- oLdclnce with this invention.
The module overall, shown at 200, includes an enclosure represented by a broken line 210, within which control circuitry 220 is used to activate a plurality of power switches, one being depicted at 240 and being controlled by 15 controller 220 over line 246. ~rhe controller 220 is conveniently implemented with a single-chip mi~:L, L~r of conventional design, in the preferred ';- L this being a high-speed C-MOS device such as the MC683~C805C8, ~vailable from Motorola, Inc., though other devices from 20 other manufa~ Lu~L~ such an Intel and Texas In.iLL, L:, are equally applicable, as are non-mi.LuyLucessù~-based control 601utions .
The communication interface to module 200 is shown by a twisted pair 226, which interfaces to the 25 controller 220 via _ ications interface 228 through connector 229 supported on F~ncl ncllre 210 . Power is received to the module through thicker line 230 and t~rm; nAl 231, which is then routed to each of the switches _ . . , _ . . . .. . . . . . .. . . .. . . .
w09s~30263 . -~ 4 5 1 1~""" ~77 ~
240 and additionally to the controller 220 via line 234.
Each of the switches 240 is rPcpnncihle for routing power received via input 230 to an output t~rminAl associated with a particular power switch, such as along line 250 5 associated with switch 240. The output t~rminAl~ are preferably intagraI to a single connector 251 supported on .~n~ cllre 210.
Figure 3 illustrates in oblique view a preferred physical realization of a power distribution module formed 10 in a~cuL.lu..c~ with the present invention. A bracket 702, formed of a heat-G~nAl~-tive material such as Alllminllm~ is angled as shown in Figure 3 so as to include outwardly n-lin~ tabs 704 with nounting holes 706. These tabs 704 ~re connet~d to side walls 710 which in turn are c~nnPrtecl 15 to a generally t:. LI.~ular plate 712 having fins 714.
Various modifications to this 2-L~ LuLe: are possible, for example, with regard to the size and shape of the tabs 704, the t9i i t nc of side walls 710 and the overall geometrical configuration of fins 714. For example, in an 20 alternative ~ ol.~LLu- Lion it may be possible to use plate 712 with fins 714 alone, foregoing the need for side walls 710 and separate tabs 704, as these tabs may be solely provided on the outer ~n-locllre collar 720 which will now be described. This collar 720 includes side surfaces which 25 support various connectors and tPrmi n~l c which will subsequently be described, and includes a through ,s~el Lur c:
722 into which the angled bracket 702 is inserted. One outer side surface 726 is configured to receive a bolt 728 W095130263 ~ 9~5 1 1 ", ~77 having protruding threads 730 onto which nut 732 is placed.
This nut/bolt combination forms the power input tPrm;ni~l previously described with regard to the electrical aspects of the invention, and makes contact to a pad 734 on printed 5 circuit board 740. A connection between the bolt 728 and pad 734 is not shown, and may take a-lva-,Lage of various connection `~ , including mechanical ~Le~i~UL
soldering, and so forth.
Supported on another outer surface 742 is a 10 molded shape 744 within which power output tonm;n~l~ 746 are placed. These tP~;n~l~ 746 connect to CuLL~ ;ng pads 748 on circuit board 740, preferably through a soldered connection. With these ~r~;nAl~ 746 affixed to their c oLLeci~ullding pads, the circuit board~bracket 15 assembly is installed into the collar 720 by f irst inserting the f~-rm;nFIl 746 into apeLLuLes 750, then hinging the input t~-rm;n~l end of the bracket finally into the collar. Holes 750 may be replaced with a slot or other configuration to facilitate the i.,LLù.luuLion of more than 20 one f-~rm;n:~l at a time.
The plate 712 has an upper surface which preferably includes heat radiative fins 714, and an opposing lower surface against which circuit board 740 mounts. This circuit board 740 is preferably double-sided 25 with certain of the electrical ~ ~lellLs 754 being mounted on the side visible in Figure 3, and with other, Ls, such as those sensitive to t~ aLuLe or need of dissipating thermal energy being mounted between the 3 ~ 9 ~ $ ~ --circuit board and the lower surface of the plate 712. For example, the power switches previously described would typically be s~nrlwi ~-hc~d between the circuit board and the bracket lower surface. Although the connector associated 5 with the communications port is not visible in Figure 3, this, too, would be provided on an outer surf ace of collar 720, for example next to cu....e~:LuL shape 744 on surface 742. ~lternatively, this communications r ~P~ I ~" may be supported on surface 726 or the other two side walls 10 associated with the outwardly extending tabs. Once bracket 702 has been properly inserted into collar 726 a sealing member 760 may be installed into the buLi L portion of the assembly so as to protect the circuit board 740 and LE~ mounted the~ ~ul.u... This element 760 is 15 optional, however and may be replaced with some form of liquid potting material or, possibly eliminate it all together .
Figures 4 through 6 illustrate in more detailed form preferred implementations of the circuits illLr uduc:ed 20 in Figure 2. Figure 4, for example 6hows a detailed schematic of a communications controller in the form of a multiplexed transceiver circuit 400. This particular implementation is designed to be fault-tolerant, priority arbitrating, and sufficiently rugged to meet the demands of 25 vehicular applications. The circuit 400 will withstand continuous shorts to either ground or power up to 24 volts in both f orward and reverse directions . Load dunp protection is also provided.
-WO95/30263 ~ j 8q45 1 P~ . 477 The communications protocol makes use of a non-return to zero (NRZ) Pn~orling which is well known to those skilled in electronic communications. The output NRZ
6ignal is deliYered along line 410 from mi~L- , Ler 412, S to a pair of transistors Ql and Q2 which drive multiplex line 440. Input communications are fed to mi.;L. ,_LeL
412 along line 450 through resistor R9 and exclusive-OR
gate 461 which is configured as a non-inverting buffer.
The NRZ information is then converted by control circuitry 10 or miu~ Ler 412 in a~:coL-ldnce with software yLUU,L --' therein. The output delivered along line 410 is u~ e~ ~d to a pair of 10 K resistors R1 and R2. R1 provides a pull up to a 5-volt supply, to yuaLclllLee that the driver transistor Q2 is turned of f during power up and 15 initialization. Resistor R2 provides drive to the inverter transistor Ql, which in turn drives the output stage Q2 via R4. R3 provides current to Ql which pulls the output of Q2 high through R5 to its non-asserted state. The particular type of transistor used for the application of Q2 may be 20 adjusted in aucuL-lal.ce with operational deDands. Note that input line 450 both monitors what is being transmitted via multiplex line 440 and detects i nl i n~ information from the network via resistor R9. In the event that contention is detected, mi~L.- ,_Ler 412 will output a signal along 25 line 420, through exclusive-OR gate 463 and resistors R8 and R7, driving transistor Q4 to shut down the output device Q2.
Transistor Q3 and resistor R6 provide current W095J30163 ir~ ?~ s.~n7 limiting protection for Q2 in the event that the output 440 is shorted as a result of some fault. Load dump protection is provided by zener diode Zl as a threshold reference, with resistor R7 providing current limiting to turn off 5 transistor Q4 and the output driver Q2 during load dump.
This shunts the drive current away from output driver Q2, effectively turning it off.
Fault detection is ~ h~c~ with exclusive-OR
gate 460, which is used to test whether the plurality of 10 both the tr~n~; ss1 on and reception signals are the same .
However, due to system capacitances and other c~nr~ ration5, output line 440 will not in practice be capable of r~pon~linq immediately. As a ~rmceq~ n~e~ the fault gate 460 may detect an error even though one has not 15 oc~;uLLcd. Therefore, this type of error is effectively time integrated by resistor R10 and capacitor Cl, thus ~n;lhl;nq the system to stAh;1;7~ before actually reporting an error to the mi~:L~ -_Ler 412. The output of the integrator Cl/R10 is 5~5'h; 1; 7ed and inverted by another 20 gate 462 before presenting it to the mi.:L. ~ 412 along line 470.
Figure 5 illustrates one of the power switches depicted as devices 240 in Figure 2, this preferred implementation being f ault-tolerant as well as short-25 circuit-proof. ~s a driver device, the circuit preferably utilizes an N-channel power MOSFET, such as an MTP3055EL, as shown in the output stage. In operation, the output 520 of mi.;L ~ Ler 502 drives transistor Q4 to the ON state, ,, . . . _ . . . _ _ _ _ _ _ _ _ _ _ _ ~ ~ ~, wogsl30263 ~ ~ ~ t~ 2 ~ 8 94 5 ~ P~ll-J 9! ~477 driving the Ql-Q2 pair to a low output level, and turning off the output stage. When line 520 is driven low, Q4 is turned off which allows the output of the Ql-Q2 output to rise, which in turn asserts the output device Q3. Open-5 circuit fault detection is accomplished via R7 and R8.
When the output is off, R7 pulls up on the output pin, but the weak drive r~r~hility associated with R7 is ~V~l~ by the load. However, if the load is not connected or if the load is open, the weak drive provided by resistor R7 will 10 put the appropriate logic level at the output 530. For example, if a load is not c~nnec~ecl, the output 530 will nevertheless be pulled up to battery potential which will be sensed at input 540 of mi~;L._ _Ler 502 via resistor R8 .
The short-circuit protection associated with the output of the power switch will now be described. In the event that the output is shorted to ground, a voltage will be developed across R6 in direct proportion to the amount of current being sourced by MOSFET Q3. This voltage is 20 directly coupled to the base 506 of transistor Q6, with the base-emitter threshold voltage being used to detect when the current limit has been ~ e~ cl. For example, with a value of R6 equal to 0 . 03 Ohm, transistor Q6 will turn on for a current of 20 amps. When this threshold is reached, 25 the current through Q6 ~v~_ - the pull-down resistor R5.
When R5 is driven positive by approximately 0 . 6 volts, it drives current into Q5 via R4 causing transistor Q5 to turn on. When Q5 turns on, it lowers the output of the Ql-Q2 W095/30263 ~ }~ ~ 5~ r-~77 ~ , -- 1 8 predriver stage, effectively turning off the output driver Q3 .
A two-level charge pum~p circuit 550 includes two reference voltages, a high reference 552 and a low 5 reference 554, each reference feeding one input to two-input voltage ~ ~lLoLD 553 and 555, respectively. ~igh reference 552 feeds comparator 553 which, in turn, enables a low current charge pump 556 coupled to the power MOSFET
gates through line 560. Low voltage reference 554 feeds a 10 second comparator 555 used to enable a high current charge pump 557 c~nn~ct~d in parallel with the low-current charge pump 556, also in communication to the MOSFET gates along line 560. Although the characteristics of this circuit may be varied in ~o~uLd~ e with the reference voltage values, 15 and so forth, in a preferred ~mho~ir L comparator 553 will turn on and enable low current charge pump 556 at a nominal voltage of 8 volts and turn off at a nominal voltage of 10 volts. ~ Lor 555, on the other hand, will turn on and enable the high current charge pump at a nominal voltage of 20 7 volts and turn off at a nominal voltage of 8.5 volts.
Using this circuit, a low drain current will be supplied to the MOSFET gates during electrically quiet or qniP~c~nt periods, but if a voltage between 7 and 8.5 is realized, the high-current charge pump 557 will be activated, thus 25 ~-n~hl; n~ the power switches to properly route current from the input to one or more of the power outputs.
Figure 6 depicts in schematic form a regulator ~nd watchdog timer circuit. Battery voltage is applied to _ _ _ ~ _ _ _ _ _ _ _ _ _ _ _, _ . . _ _ _ _ ~ WO 95/30263 ~ Y~ r '.5 - ~ ? 1 8 9 4 ~j 1 P~ 477 a single-chip regulator 640 which supplies an output voltage in the range of 4 . 75 to 5 . 25 volts DC, this being well within the requirements of 5-volt miulu~ _Ler 601.
Such single-chip regulators are widely available from 5 commercial manufacturers including Motorola, National ~Pmi.. l LuL, Texas Ill~>LL L5 and others. The preferred regulator includes a delayed reset output which is shown along line 610 as it enters mi~:L. ~_Ler 601. When battery voltage is applied to the input of regulator 640 10 along line 620, the reset line 610 is asserted, holding the mi~;L._ _Ler 601 in a safe, controlled state. As the battery voltage rises, capacitor 65 is charged with a current source internal to the regulator device 640. When the voltage across this rAracitor reaches a prede~Prmi nP~l 15 threshold, indicating that the device 640 is supplying voltage in the proper range, the reset output is no longer asserted, allowing mi~;.u~ ~r 601 to function normally.
However, if the voltage falls low enough to cause the regulator to fall out of regulatlon, the reset output is 20 again asserted, placing the mi~;Ler a known safe state. In practice, reset occurs within a few hundred millivolts prior to the regulator dropping out of regulation, and a reset line 610 will remain asserted until the voltage returns to a safe value. At this point, the - 25 delay function will be activated, and the mi~iLoc Ler will be taken out of its reset condition in an orderly fashion. The regulator 640 also protects the electronics from reverse battery and load dumps, ~Ccllmi ng they do not ., . _ . . _ . . . . . .
WO95/30263 t; ~ S ~ 4~ t r~ ,477 exceed ~80 volts.
The watchdog circuit 604 uses an oscillator in~u.~oL~Ling a _ tlLor 602, which forces the miu- . Ler to change the state of the watchdog output 5 612 at a certain minimum rate in order to keep from being reset. Ir the mi~.. Ler does not come alive the oscillator will continue to oscillate at the lOW-rLt:yUell~;y rate, 5 Hz, which will keep resetting the miuL. Ler five times per second until it wakes up. Current for the 10 charging portion of the oscillator is provided by resistor Rl which is conne-t~d directly to the 12 volt battery input. The conf iguration shown in Figure 6 thus also conveniently performs a low battery voltage inhibit function. AC co-lrl; ng iS used between the oscillator and 15 the reset line 610 to prevent the oscillator from being defeated ir the output of the computer st~h;l;~oc at either a logic one or zero state, thereby rendering it ineffective. In operation, the output 612 of the miu, ~r 601 is converted to a pulse by the shaping 20 network 620 shown in the broken-line rectangle. Under normal conditions, this pulse consistently dis. l.aLy~:6 capacitor C, keeping the output of the oscillator 602 in the logic one state. }~owever, if the pulse does not arrive in time the oscillator will change state, driving the 25 output to a logic zero, which is passed through the diode, to reset the input of the ~ _L~ along line 610.
During normal operation, the system is continuously powered from the vehicle battery system over ~ W095130263 ~S 21~94~ r~ 77 line 620. Since the reset circuitry is designed to activate when the battery voltage drops below a predetermined reset threshold, the reset circuitry never - actuates as long as battery voltage i8 maintained.
5 However, during the life of a typical vehicle, the battery supply may dip below the threshold, for example if the battery has been discharged or ~liccf~ e~lPfl In the event this occurs, the system will go into an automatic reset mode, placing all outputs such as 530 in Figure 5 into a 10 Xnown, prP~lPtPrm;ned safe state. When the battery voltage iS ~f ~LuL~, the reset to the mi~:r. _~er along line 610 will be removed at the ay~LuyLiate time to allow normal operation .
Having thus described our invention, we claim:
Claims (10)
1. A power distribution module, comprising:
an input/output port adapted for connection to an external multiplexed communication path;
transceiver circuitry connected to the input/output port operative to send end receive messages over the communication path in digital form;
an input for connection to a source of power;
a plurality of power output ports;
a plurality of controllable power switches, each associated with one of the power output ports, each power switch being operative to route power from the source of power to an associated power output port in accordance with a control signal;
charge pump circuitry operative to boost the voltage provided to at least certain of the power switches so as to deliver a desired predetermined voltage through the associated power-output port; and a controller operatively connected to the transceiver circuitry and to each power switch, the controller being operative to perform the following functions:
send and receive messages over the communication path through the transceiver circuitry, and provide a control signal to a specific power switch in accordance with a received message, causing power to be routed from the power source to the output port associated with that switch.
an input/output port adapted for connection to an external multiplexed communication path;
transceiver circuitry connected to the input/output port operative to send end receive messages over the communication path in digital form;
an input for connection to a source of power;
a plurality of power output ports;
a plurality of controllable power switches, each associated with one of the power output ports, each power switch being operative to route power from the source of power to an associated power output port in accordance with a control signal;
charge pump circuitry operative to boost the voltage provided to at least certain of the power switches so as to deliver a desired predetermined voltage through the associated power-output port; and a controller operatively connected to the transceiver circuitry and to each power switch, the controller being operative to perform the following functions:
send and receive messages over the communication path through the transceiver circuitry, and provide a control signal to a specific power switch in accordance with a received message, causing power to be routed from the power source to the output port associated with that switch.
2. The power distribution module of claim 1, further including fault-detection circuitry operative to compare signals representative of messages being sent and received and provide a fault signal to the controller in the event of contention between the massage being sent and received.
3. The power distribution module of claim 1, further including output protection circuitry operative to sense the current through a power switch and turn off the switch if the current through the switch exceeds a predetermined value.
4. A power distribution module for vehicular applications, comprising:
an enclosure;
an input/output connector supported on the enclosure to interface with a bi-directional communication path disposed within the vehicle;
a plurality of power-output terminals supported on the enclosure, each terminal being adapted for connection to a load associated with the operation of the vehicle;
a power input connector supported on the enclosure configured to receive incoming power from a source of power within the vehicle;
digital communication circuitry disposed within the enclosure and connected to the input/output connector, the digital communication circuitry being operative to:
send and receive messages over the bi-directional communication path, monitor the signals present on the communication path, and output a fault signal if a message is received while one is being sent, a plurality of solid-state power switches disposed within the enclosure, each associated with one of the power output terminals, each power switch being operative to route power from the power input connector to an associated power output terminal in response to a control signal;
output protection circuitry contained with the enclosure, the circuitry being operative to sense the current through a power switch and electrically protect that switch if the current through the switch exceeds a predetermined value;
and control circuitry disposed within the enclosure, the control circuitry being operative to:
send a message to the digital communication circuitry, causing the message to be placed on the communication path through the input/output connector;
receive a message over the communication path, through the input/output connector, and from the digital communication circuitry;
provide control signals to the power switches in accordance with a received message, and receive the fault signal from the digital communication circuitry and inhibit an outgoing message in the event of contention on the bidirectional communication path.
an enclosure;
an input/output connector supported on the enclosure to interface with a bi-directional communication path disposed within the vehicle;
a plurality of power-output terminals supported on the enclosure, each terminal being adapted for connection to a load associated with the operation of the vehicle;
a power input connector supported on the enclosure configured to receive incoming power from a source of power within the vehicle;
digital communication circuitry disposed within the enclosure and connected to the input/output connector, the digital communication circuitry being operative to:
send and receive messages over the bi-directional communication path, monitor the signals present on the communication path, and output a fault signal if a message is received while one is being sent, a plurality of solid-state power switches disposed within the enclosure, each associated with one of the power output terminals, each power switch being operative to route power from the power input connector to an associated power output terminal in response to a control signal;
output protection circuitry contained with the enclosure, the circuitry being operative to sense the current through a power switch and electrically protect that switch if the current through the switch exceeds a predetermined value;
and control circuitry disposed within the enclosure, the control circuitry being operative to:
send a message to the digital communication circuitry, causing the message to be placed on the communication path through the input/output connector;
receive a message over the communication path, through the input/output connector, and from the digital communication circuitry;
provide control signals to the power switches in accordance with a received message, and receive the fault signal from the digital communication circuitry and inhibit an outgoing message in the event of contention on the bidirectional communication path.
5. The power distribution module of claim 4, further including a heat sink integral to the enclosure.
6. A power distribution module adapted for use with an existing vehicular communication network characterized in having a plurality of distributed nodes which communicate along a bidirectional message routing path according to a predetermined protocol, the module comprising:
an input/output port adapted for direct connection to the network, including communication circuitry operative to send and receive messages over the network;
an input for connection to a source of power;
a plurality of power output ports, each adapted for connection to a power-consuming load in the vehicle, including a port which supplies power to at least one node of the existing network;
a plurality of controllable power switches, each associated with one of the power output ports, each power switch being operative to route power from the source of power to a power-consuming load in the vehicle through an associated power output port in accordance with a control signal; and a controller connected to the communication circuitry and to each power switch, the controller being operative to:
interpret messages received over the existing network;
provide a control signal to a specific power switch in response to a received message relating to the activation of a load, causing power to be routed from the power source through the output part associated with that switch for delivery to that load, and format an outgoing message in accordance with the protocol used by the existing network.
an input/output port adapted for direct connection to the network, including communication circuitry operative to send and receive messages over the network;
an input for connection to a source of power;
a plurality of power output ports, each adapted for connection to a power-consuming load in the vehicle, including a port which supplies power to at least one node of the existing network;
a plurality of controllable power switches, each associated with one of the power output ports, each power switch being operative to route power from the source of power to a power-consuming load in the vehicle through an associated power output port in accordance with a control signal; and a controller connected to the communication circuitry and to each power switch, the controller being operative to:
interpret messages received over the existing network;
provide a control signal to a specific power switch in response to a received message relating to the activation of a load, causing power to be routed from the power source through the output part associated with that switch for delivery to that load, and format an outgoing message in accordance with the protocol used by the existing network.
7. A distributed vehicular power-control system, comprising:
a first, existing network characterized in having a plurality of nodes which communicate by way of a first bidirectional routing path;
a plurality of power-control modules interfaced to the first network, each power-control module including an input-output communications port, a power-input port, and a plurality of power-output terminals, each power output terminal being adapted for connection to a power consuming load within the vehicle, each power-control module being operative to selectively route power from the power-input port to the nodes and to the loads connected thereto in response to a message received through the input-output communications port.
a first, existing network characterized in having a plurality of nodes which communicate by way of a first bidirectional routing path;
a plurality of power-control modules interfaced to the first network, each power-control module including an input-output communications port, a power-input port, and a plurality of power-output terminals, each power output terminal being adapted for connection to a power consuming load within the vehicle, each power-control module being operative to selectively route power from the power-input port to the nodes and to the loads connected thereto in response to a message received through the input-output communications port.
8. The distributed vehicular power-control system of claim 7, wherein at least one power-control module is interfaced to the first network through a direct connection between the input-output communications port of the module and the fast bidirectional routing path.
9. The distributed vehicular power-control system of claim 7, wherein at least one power-control module is interfaced to the first network through a direct connection between the input-output communications port of the module and a single node of the existing network.
10. The distributed vehicular power-control system of claim 7, wherein the power-control modules communicate with one another over a second network connecting the input-output ports of the modules, but wherein at least one of the modules further functions as a gateway to the existing network.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US23706694A | 1994-05-03 | 1994-05-03 | |
| US08/237,066 | 1994-05-03 | ||
| PCT/US1995/005477 WO1995030263A1 (en) | 1994-05-03 | 1995-05-03 | Power distribution module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2189451A1 CA2189451A1 (en) | 1995-11-09 |
| CA2189451C true CA2189451C (en) | 2002-03-26 |
Family
ID=22892198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002189451A Expired - Fee Related CA2189451C (en) | 1994-05-03 | 1995-05-03 | Power distribution module |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6404607B1 (en) |
| EP (1) | EP0759219A4 (en) |
| JP (1) | JP3383312B2 (en) |
| CA (1) | CA2189451C (en) |
| MX (1) | MX9605297A (en) |
| WO (1) | WO1995030263A1 (en) |
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- 1995-05-03 WO PCT/US1995/005477 patent/WO1995030263A1/en not_active Application Discontinuation
- 1995-05-03 MX MX9605297A patent/MX9605297A/en not_active IP Right Cessation
- 1995-05-03 EP EP95918926A patent/EP0759219A4/en not_active Withdrawn
- 1995-05-03 CA CA002189451A patent/CA2189451C/en not_active Expired - Fee Related
- 1995-05-03 JP JP52850095A patent/JP3383312B2/en not_active Expired - Fee Related
-
1996
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Also Published As
| Publication number | Publication date |
|---|---|
| EP0759219A4 (en) | 2000-12-20 |
| JPH10502239A (en) | 1998-02-24 |
| WO1995030263A1 (en) | 1995-11-09 |
| EP0759219A1 (en) | 1997-02-26 |
| CA2189451A1 (en) | 1995-11-09 |
| MX9605297A (en) | 1997-12-31 |
| US6404607B1 (en) | 2002-06-11 |
| JP3383312B2 (en) | 2003-03-04 |
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| Date | Code | Title | Description |
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| EEER | Examination request | ||
| MKLA | Lapsed |