CA2216335A1 - Contention control circuit - Google Patents
Contention control circuitInfo
- Publication number
- CA2216335A1 CA2216335A1 CA002216335A CA2216335A CA2216335A1 CA 2216335 A1 CA2216335 A1 CA 2216335A1 CA 002216335 A CA002216335 A CA 002216335A CA 2216335 A CA2216335 A CA 2216335A CA 2216335 A1 CA2216335 A1 CA 2216335A1
- Authority
- CA
- Canada
- Prior art keywords
- cell
- control circuit
- priority
- contention control
- cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L12/5602—Bandwidth control in ATM Networks, e.g. leaky bucket
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/5647—Cell loss
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/565—Sequence integrity
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/5651—Priority, marking, classes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5679—Arbitration or scheduling
Abstract
A contention control circuit which temporarily stores cells arriving from a respective plurality of input lines to output cells to a single output line without collisions by simply comparing, at each input line in turn, the priority of the cell that has arrived from that input line, with the priority of the cell selected from among cells that have arrived at preceding input lines as the cell having the highest priority, and again selecting the cell with the higher priority.
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25330096 | 1996-09-25 | ||
JP8-282522 | 1996-10-24 | ||
JP28252296 | 1996-10-24 | ||
JP8-282553 | 1996-10-24 | ||
JP28255396 | 1996-10-24 | ||
JP8-253300 | 1996-10-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2216335A1 true CA2216335A1 (en) | 1998-03-25 |
CA2216335C CA2216335C (en) | 2007-09-25 |
Family
ID=27334209
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002216335A Expired - Fee Related CA2216335C (en) | 1996-09-25 | 1997-09-24 | Contention control circuit |
Country Status (4)
Country | Link |
---|---|
US (1) | US5953341A (en) |
EP (1) | EP0833480B1 (en) |
CA (1) | CA2216335C (en) |
DE (1) | DE69734636T2 (en) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6188698B1 (en) * | 1997-12-31 | 2001-02-13 | Cisco Technology, Inc. | Multiple-criteria queueing and transmission scheduling system for multimedia networks |
US6463068B1 (en) * | 1997-12-31 | 2002-10-08 | Cisco Technologies, Inc. | Router with class of service mapping |
GB2334651A (en) * | 1998-02-18 | 1999-08-25 | Power X Limited | Scheduling means for data switching apparatus |
EP0982970B1 (en) * | 1998-08-21 | 2006-10-04 | Nippon Telegraph and Telephone Corporation | ATM switch |
KR20000032728A (en) * | 1998-11-17 | 2000-06-15 | 서평원 | Method for assigning channel when communicating data in wide band wireless multimedia communication system |
JP3439373B2 (en) * | 1999-05-12 | 2003-08-25 | 日本電気通信システム株式会社 | Competitive priority control circuit |
JP3438651B2 (en) * | 1999-05-31 | 2003-08-18 | 日本電気株式会社 | Packet multiplexer |
WO2002065709A1 (en) * | 2001-02-14 | 2002-08-22 | Kawasaki Microelectronics, Inc. | Network switching device |
US6970921B1 (en) * | 2001-07-27 | 2005-11-29 | 3Com Corporation | Network interface supporting virtual paths for quality of service |
US7860120B1 (en) | 2001-07-27 | 2010-12-28 | Hewlett-Packard Company | Network interface supporting of virtual paths for quality of service with dynamic buffer allocation |
US7894480B1 (en) | 2002-08-27 | 2011-02-22 | Hewlett-Packard Company | Computer system and network interface with hardware based rule checking for embedded firewall |
US7724740B1 (en) | 2002-08-27 | 2010-05-25 | 3Com Corporation | Computer system and network interface supporting class of service queues |
US7289044B2 (en) * | 2004-06-02 | 2007-10-30 | Research In Motion Limited | Handheld electronic device with text disambiguation |
FR3113799B1 (en) * | 2020-08-26 | 2023-06-16 | Thales Sa | GATEWAY FOR EXCHANGES OF INFORMATION BETWEEN PROCESSING UNITS, DEVICES AND ASSOCIATED PROCESSES |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2012425C (en) * | 1989-03-17 | 1996-12-24 | Atsuo Itoh | Packet switching system having arbitrative function for competing packets |
US5150358A (en) * | 1990-08-23 | 1992-09-22 | At&T Bell Laboratories | Serving constant bit rate traffic in a broadband data switch |
KR960003505B1 (en) * | 1992-12-29 | 1996-03-14 | 재단법인 한국전자통신연구소 | Atm multiplexing processor |
AU6788598A (en) * | 1997-04-04 | 1998-10-30 | Ascend Communications, Inc. | Hierarchical packet scheduling method and apparatus |
-
1997
- 1997-09-12 EP EP97307096A patent/EP0833480B1/en not_active Expired - Lifetime
- 1997-09-12 DE DE69734636T patent/DE69734636T2/en not_active Expired - Lifetime
- 1997-09-24 CA CA002216335A patent/CA2216335C/en not_active Expired - Fee Related
- 1997-09-24 US US08/936,667 patent/US5953341A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0833480B1 (en) | 2005-11-16 |
US5953341A (en) | 1999-09-14 |
EP0833480A2 (en) | 1998-04-01 |
CA2216335C (en) | 2007-09-25 |
DE69734636D1 (en) | 2005-12-22 |
EP0833480A3 (en) | 1999-03-31 |
DE69734636T2 (en) | 2006-06-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |
Effective date: 20170925 |
|
MKLA | Lapsed |
Effective date: 20170925 |