CA2241650A1 - Assembly for networking a plurality of gaming machines to a central server and with improved microprocessor construction and communication protocol and fault analysis - Google Patents
Assembly for networking a plurality of gaming machines to a central server and with improved microprocessor construction and communication protocol and fault analysis Download PDFInfo
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- CA2241650A1 CA2241650A1 CA002241650A CA2241650A CA2241650A1 CA 2241650 A1 CA2241650 A1 CA 2241650A1 CA 002241650 A CA002241650 A CA 002241650A CA 2241650 A CA2241650 A CA 2241650A CA 2241650 A1 CA2241650 A1 CA 2241650A1
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Abstract
An assembly for networking a plurality of gaming machines to a central server situated at a remote location from the individual gaming machines. Each of the gaming machines includes a main processor. A plurality of peripheral controllers are provided with each controller being slaved to a selected peripheral operating device associated with the gaming machine. The peripheral controllers are each operable to transmit to the main processor data relative to the operation of each peripheral device. A distributed network architecture and communication protocol is established between the main processor and peripheral controllers which facilitate collection of data by the main controller through reduced internal wiring. A communication network consisting of an existing AC power line network within a facility operably connects each of said main processors associated with separate gaming machines in parallel to a network interface adapter/controller (NIAC) and then to network server. A first network interface adapter unit contained within each of said gaming machine outputs frequency converted signals across said existing AC power line network and the network interface adapter and control unit (NIAC) reconverts the frequency input into a digitized output for transmission to the network server.
Description
CA 022416~0 1998-06-24 ~SSEMBLY FOR NETWORKING A PLURALITY OF
GAMING MACHINES TO A CENTR~L SERVER AND
WITH IMPROVED MICRO PROCESSOR CONSTRUCTION
~ND COMMUNIC~TION PROTOCOL AND F~ULT ANALYSIS
S I~ack~l oulld oï tlle InYelltio Fiel~l of ~ InYelltioll The present invention relates generally to slot machilles and related gaming machines and, more particularly, to an assembly for networking a plurality of individual gaming machines into a central network server and with an improved microprocessor construction and communication protocol for operating each of the gaming machines both internally as well as from the central location.
l?es~ription of tll~ Prior ~rt Gaming machine technology, particularly slot n ~c!lin~s, are well known in the art. The older versions of such machines, which are mechanical in nature, have been progressively replaced by new versions which incorporate substantial amounts of electronic circuitry and wiring so as to provide enhancedvisual ancl audial effects.
Current slot machine teclmology incolporates electronic operating circuitly whicll is capable of monitoring the operational status of the gaming macllines and further includes such features as data collection systems and player tracking systems which make possible the tracking of numerous variables relating to levels of usage of the games as well as payouts given relative to money taken in. Current slot machine teclmology furtller makes possible the automatically ability to deactivate the gaming machine upon the occurrence of a tilt condition, such condition usually rendering the machille incapable of continued play prior to maintenance and correction of the tilt. It is also knownin the art to hook pluralities of such machines inlo a comrnon network for the purpose of transmitting operating information from such machines to a common network server.
CA 022416~0 1998-06-24 It is also known in the art that such conventional gaming machines as have been previously described typically require complex processor circuitry and wiring within their cabinet designs in order for each of the operating peripherals to be tied into a main processor dedicated to that machil1e.
Furthermore, it is necessary to run specialized and expensive wiring within a gaming facility from each of a plurality of such machines to a remote network server to effect communication with the server. The additional wiring requirements of the facility typically make it very difficult to rearrange the gaming machines tied into the network from one place to another, such movement of machines often being desirable in response ~o chzlnging crowd and flow patterns throughout a gaming casino and effective in maximizing play of selected machines.
Numerous other tyl~es of gaming machilles ancl slot machines are known in the art which utilize various microprocessor technology and an example of SUCIl a device is illustrated in U.S. Patent No. 5,179,517, issued to Sarbin et al., which teaches a data transfer system capable of collection data from gamingmachines and transferring the data to a smart card type data unit cont~ining a memory. The data unit is capable of storing machine information and for receiving machining identifying data relating to play and status data.
A further example of a gaming system is shown in U.S. Patent No.
5,170,345, issued to Poole, whicl1 shows a control circuit for coin operated amusement games. As discussed previously, Poole illustrates an example of a gamil1g control system which requires extensive specialized wiring an power source supply in order to operate a selected number of gaming machines.
A still further example of a progressive gaming system in which slot machines at different casinos are tied in together is shown in U.S. Patent No.
5,611,730, issued to Weiss. A controlled computer network includes a monitor host which accesses banks of slot or gaming machines at specified participating casinos through modem connections to each of the locations. A casino master controller at.each location is responsible for all data communication to and from -CA 022416~0 1998-06-24 the host site such as information relevant to slot operation which is compared to informa~ion obtained from machines at other networked locations. A
specified objective of Weiss is the ability to tie slot machines at a variety ofindependent non-restricted gaming locations to contribute to and compete from a set of common jackpots.
Sumlllary Or Ille Present Invelllioll The present invention is an assembly for networking a plurality of gaming machines to a central network server and with improved micro processor method and communication protocol for monitoring operational status and collecting game play information both internally by individual gaming machines as well as by the network server. The network assembly and processor/protocol system according to tlle present invention is an improvement over the prior art gaming control systems in that it facilitates more efrlcient and reliable communication between individual gaming machines and a network server and that it also further reduces and simplifies wiring requirements both within the individual machines and througllout a network connecting a plurality of such machines together while improving both fault detection and communication protocol functions.
The gaming machines each include an internally mounted main processor board which communicates with individual controllers which are in turn assigned to selected peripheral devices of the machine and are mounte(l in proximity to the peripherals. The arrangement of the main processor and peripheral controllers greatly simplifies the wiring requirements of the gaming machine which would otherwise be necessary if a single processor were provided within the machine and from which a large plurality of wires would of necessity extend to the various peripheral devices. The arrangement of the individual controllers in proximity to their selected peripherals also serves togreatly decentralize much of the iterative sensing and calculating steps which would otherwise of necessity have to be performed by the main processor board CA 022416~0 1998-06-24 and which would also require lhe provision of signiricantly more wiring and wire harnesses.
A communication protocol is established between the main processor board an(l the peripheral conlrollers, the result of whicll is that the wirillg requiremellts of the system are reduced ~o two separate lines to whicll all the periplleral controllers are comlected in parallel for dedicated transmission andreception of signals to and from the main processor board. A third dedicated line, also in the form of a unique line to which each peripheral/controller is connected, is also provided according to tlle protocol interrace an~ permits tlle main processor to poll each controller successively for information to be collected from the peripheral devices, such information usually relatillg to game play data and information relevant to operating characteristics of the periplleral devices .
Sensors are located at each of a selected group of peripheral devices and supply a continuous stream of signals representative of a monitored and operational function of a selected peripheral and for which the ability to determine the fault of the peripheral is important to the operation of the machine. The signals read by the sensors are converted to a readable forln by the associated controller and supplied to the main processor board. In case of a fault or warnillg being detected during the monitoring of any of the specifiedperipherals, the main processor board within the gaming machine notif1es the specified peripheral througll its associated controller to either shut down and/or to cease its iterative sensing function, or put the selected machine into a tiltcondition.
A network server is located remote from the plurality of gaming machines and is operatively connected in parallel to the plurality of gaming machines by mealls of the existing electrical power lines extending throughout the gaming facility, such lines typically being AC internal lines. The network server typically is provided in the form of a cormputer which includes a hard drive, a central processor unit with built-in program memory, a network server , CA 022416=,0 1998-06-24 in~erface adaptor controller (NIAC), and the individual main processor boards of t}le individual gaming machines each furlher include interface adapter circuitry to permit signals to be sent to and from one another over the conventional AC lines. The interface adapters of the main processor boards of the gaming machines and the NIAC of the network server operatively commlll1ic~e by successively converting digitized signals within the machines to frequency signals of a selected kilohertz range which are sent over the existing AC lines in addition to the normal voltage/current flow, the frequency signal being received at the NIAC location and being reconverted back into l 0 digitized form by the network interface adapter/controller for subsequent transmission to the l1etwork server.
Tlle ability of the network server and individual machines to communicate tllrough the facilities existing AC networ~: greatly increases the quantity and types of il~ormation wl1icll can be sent to the network server froml 5 the individual machines widlout the need of installirlg additional wiring within the facility. The ability to make use of the existing AC line network also permits tl1e moving around the macl1il1es within the facility to take advantage of ever charlgil1g crowd and flow patterns so as to maxin1ize the effectiveness of the machines and this is done witllout the necessity of any additional wiringand with the network server m~inl~init1g identification of tlle selected gaming machines.
Also, the main controllers on the selected gaming machines are capable of communicating botl1 identified faults read from the sensors as well as other standard game play and operational data polled from the macl1ines to tlle NIAC
and network server. In the event of an identified warning in a selected machine or a tilt condition representative of inoperability of a macl1il1e, the server can instruct certain features of one or more gaming macl1ine to deactivate or can instluct one or more of the machilles to shut down entirely. The network server is further capable of compiling detailed reports by means of a computer software program which assembles and compiles all of the inputted inforl11ation CA 022416~0 1998-06-24 from througllout the nelwork and provides detailecl information on all aspects of gaming machine operatioll.
~rief Descriptioll of Ille Dra~vin~c ReferellCe WillllOW be made to tlle a~tached drawings, whell read in combination with the following specification, wherein like reference numerals refer to like parts througllout the several views, and in whicll:
Fig. 1 is a view of an interior of a selected gaming machine and illustrating the improved and simplified wiring structure of the processor construction and distributed network architecture according to the present 1 0 invention;
Fig. 2 is a block diagram of the a main processor unit of a selected gaming machine in communication with various controllers assigned to peripheral operating devices with the gaming machine;
Fig. 3 is a block diagram view of the interface network for communicating a plurality of individual gaming machines with a network server which utilizes conventional AC power lines according to the present invention;
and Fig. 4 is a wiring diagram of the distributed network architecture between main processor board and peripheral controllers wllicll results in simplified wiring of a selected gaming machine according to the present invention.
Description of the Preferred Embodilllellt Referring to Fig. 1, an example of a gaming machine is illustrated at 10 which incorporates an improved micro processor method construction forming a part of the networking assembly according to the present invention. The gaming machine 10 is in the preferred embodiment an electronic operable slot machine witll a main cabinet body 12 within which is contained the working components of the gaming machine and a hingedly colmected door 14 which is opened outwardly to reveal the components of the machine 10.
, CA 02241650 1998-06-24 ~ main central processing unit board 16 is located at a generally centralized location within the cabinet body 12 and is electrically colmected toa plurality of specific peripheral operating devices of the gaming machine 10 as will now be described. A first operating peripheral is identified by a reel 18 which is mounted to an electric motor secured to a bracket 22 within the cabinetbody 12. Each reel includes its own electric motor, not sllown, for controlling operation of the reel. For pulposes of ease of illustration, on a single reel 18is illustrated, however it is conventionally known to supply three or more such reels upon whicll are placed pluralities of identifying symbols and for whicll it is desirable to achieve a specific combination of symbols during game play in order to obtain a game payout. Arrayed on the connected door 14 of the gaming machine 10 are a first window 24, second window 26 and third window 28 whicll correspond with the reel 18 all(l two additional such reels and which permit randolllly generated symbols to appear during game play The prior art also teaches electronically controlled clevices for randomly generating the probability of occurrence for any given combination of identifyillg symbols on the reels and the teachings of such devices are hereby incorporated by reference.
Referring back to Fig. 1, a firsl periplleral controller 30 is illustrated whicll is operatively comlected to the reel 18 and in turn connects to the main central processing unit board 16 by a series of tllree comlecting wires such as PCB trace lines, not sllowm A second periplleral unit 32 is illustrated wllich is a COill collect hopper mounted to a base of the machine cabinet 12 and whicl also includes an associaled controller 34 likewise operatively comlecte(l thel-eto.
A wiring harness 36 of three wires extends from the peripheral controller 34 and likewise feeds into the main central processing unit board 16. A warning light 38 and an LCD (liquid crystal diode) notification display 40 forrn in combination a third peripheral Ullit and an associated controller 42 is operatively connected to the light 38 and LC~ display 40 and is in turn CA 022416~0 1998-06-24 ~ electrically communicated to the main processor unit board 16 by a further wire harlless 4~.
The objective of the novel and improved arrangement of the processor construction and distributed network architecture of the selected gaming machille shown in Fig. 1 is further evidenced by diagrams showing the problem analysis circuitry for determining faults in operating peripherals as shown in Fig. 2 and also the distributed network architecture in Fig. 4. The network architecture of Fig. 4 enables communication between the various peripheral controllers and the main processor unit board 16, a portion of which is again dedicated to the problem analysis circuitry of Fig. 2, as well as to additional polling and compiling functions assembling game play and player tracking information as will be further described.
Referring now to Fig. 2, a block diagram of the problem analysis circuitry system is shown at 46 which corresponds to the features illustrated in15 the gaming machine arrangement of Fig. 1. A main central processor Ullit board 48 is shown which corresponds to the processing unit board 16 illustrated structurally in Fig. 1. A first peripheral controller S0 and a second periplleral controller 52 likewise can correspond to peripheral controllers such as have been identified at 30, 34 and 42 in Fig. 1 and are shown by diagram to be 20 coImected to the main processor unit board 48 by communicating line 54 extending from the main unit board 48 and connecting to a bus line 56 to which the controllers are electronically engaged.
In a preferred embodiment, the main processor unit board 48 is typically provided as a commonly available integrated circuitry chip, such an element 25 commonly known as an 8051 Intel Integrated Circuit capable of receiving processing and transmitting signals in simultaneous fashion. The peripheral controllers S0 and 52 are likewise provided witll microprocessing capability andmay also be integrated circuit devices such as the main processor unit board, however such peripheral controllers are usually specified such that they require , CA 022416~0 1998-06-24 some lesser amount of processing capability as opposed to lhe main processor ur it board 48.
Referring again to Fig. 2, a first selected peripheral 58is illustrated in operative communication with the first controller 50 along line 68 and a second S selected peripheral 60 is likewise in operative communication using line 76 with the second controller 52. A rlrst sensor 62is illustrated in communication with the first controller 50 by line 64 and a further line 66 extends from the sensor62 to the peripheral 58. A second sensor 70 is likewise illustrated in communication wilh the second controller 52 by line 72 and a furlher line 74 extends from the sensor 70 to the peripheral 60.
The sensors 62 and 70 operate by continuously providing signals associated with the specified peripheral device, such devices ranging in nature from coin hoppers, electric motors, reels, switches ancl power input supply.
The controller to which the senor is slaved then decides whether the signal read from the peripheral is active or within a specified acceptable range. A
first type of conventional sensor is capable of sensing whetller an AC power line is active or not, such as occurrhlg in an input power supply, and then notifying the assigned controller of the same after converting the AC input intoa DC output which is capable of being read by the controller. In tllis instance,a tap of a line to the power supply allows a small current to flOw tllrougll a series resistor and then through a rectifier diode on the positive portion of anestablished sine wave. The current charges a small capacitor very quickly and a produced voltage is then clipped to an established level via a zener diode so it can then be tested by the controller. The controller in this instance is capable of determining whether the ~C power level of the power supply falls within a specified range of acceptable values stored within a processor memory of the controller. In the event of the power level falling outside this range, usually below the minim:~l acceptable value, the controller then notifies the main processor unit board 48 of this fact and the processor then issues a command Oll a separate output line back to the assigned peripheral whicll either shuts down the peripheral and/or ceases the iterative function to which the sensor is slaved and can put the machine into a tilt condition. In a commercially known embodiment, it is desirable to m~in~in the power level of the maclline at a minimal level of at least 70 volts RMS (root means squared).
A second type of conventional sensor is largely similar to the type previously described above with the exception that it does not require the conversion of an AC signal into DC form prior to OUtpUttillg the results to the associated controller. The sensor according to this type therefore does not require the rectifier diode and capacitor and simply functions to inclicate the existence or non-existence of a DC signal from the peripheral in an output signal to the controller from which it is slaved. The associated controller onceagain outputs a signal to the main central processing unit board 48 notifying itof the fault in the peripheral and the unit board 48 in turn outputs a separate signal back to the periplleral instructing the faulted function to sllut down and/or ceasing the sensing iterative function associated with that fault an~ canput the selected machine into tilt.
As previously stated, the problem analysis circuitry system as discussed in Fig. 2 operates as a portion of the signal protocol design according to the overall distributed network architecture, as will be further discussed with reference to Fig. 4, and functions simply to notify the main processor Ullit in the event of a system component falling outside of acceptable parameters or failing entirely. Referring again to gaming machine constluction illustrated Fig. 1, the warnillg light 38 and LCD display 40 are concurrently notified by the mahl processor Ullit of a detected fault concurrent with the rmain processoriSSUillg instructions to either shut down and/or cease iterative sensing of the associated peripheral. As will be subsequently described with reference to the diagram of Fig. 3, an operator of a central network server will be notified of a fault in a given gaming machine and a maintenance operator upon encountering the machine will be immediately notified of the existence of a , CA 022416~0 1998-06-24 faul~ by illumination of the fault light 38 and can further read the nature of the fault whicll will be displayed upon the LCD unit 40.
In application, the problem analysis circuitry system of Fig. 2 is capable of internally and automatically sensing, analyzing, reporting and responding to a determined tilt condition as opposed to a fault or maintenance condition wi~hin the machine. A tilt condition is defined as one in which the machine is rendered inoperative and includes such thillgs as coins becoming jamrned within a hopper, bad switches in a door or coin out unit, a bad hopper motor, bad processor board, bad coupler, bad stepper motor, bad reel reader or inadequate power supply. A warning or maintellallce condition is defined as one in whicll a portion Or the machine is ren(lere(l inoperative and includes such thillgs as a burned out light, bad service switch, bad fuse, validator and the like.
Referring again to Fig. 2, and in view of the above disclosure, any number of periplleral controllers and associated sensors may be provided which are assigned to any like number of operating peripherals as previously described. The sensors, sucl~ as at 62 and 70, tllerefore continuously pull a steady stream of AC or DC signals from its slaved peripheral, convert the signals into DC form from AC if necessary, and then supply the output to the assigned controller. The controller in turn, see 50 and 52, determilles whetllerany problem occurs and, if so, notifies the main processor unit board 48 of thisfact. The main processor Ullit 48 again in turn notifies the assigned peripheral, thlougll line 56 as illustrated in the drawing, of the identified rault to shut down the responsible function and/or to cease the iterative sensing step relating to that function. Concurrent with the main processor unit board 48 being notified of the existence of a warning/tilt condition, and as will be better described with reference to Fig.3, the main processor notifies a peripheral interface controller such as 50 of a main network server remotely located from the gaming machine of the occurrence of a tilt or maintenance request to facilitate necessary repairs of the unit.
CA 022416~0 1998-06-24 Referring now to Fig. 3, a data collection and player tracking system is illustrated which permits a plurality of such gaming machines as previously described with reference to Figs. 1 and 2 to be tied into a parallel network whicl1 is directly linked to a remotely located network server. The most significant aspect of tl1e data collection and player tracking systems accordingto the present invention is that it permits two-way communication between the individual main central processing units within the gaming machines and the NIAC via the existing AC power lines withil1 tlle facility.
Referring to Fig. 3, a first user node is shown at 82 and represents an individual gaming machine 84, such as is illustrated structurally in Fig. 1. as previously described. An interface circuit 86 and a network interface adapter 88 are also shown and, according to the preferred embodiment, forms part of peripheral located in the gaming machine illustrated at 84. It is however also contemplated that the networking system of Fig. 3 could be incorporated into an existing gaming machine according to a prior art construction simply by inserting the appropriate circuit boards con~ining the interface circuit 86 and network adapter 88 without deviating from the scope of the present invention.
An additional nodes 90 and 92 are illustrated and represent further such gaming machines which are constructed similar to that shown at 82.
As previously explained, the purpose of the data collection and tracking system is to transfer all types of information from the individual gaming machines to the remotely located network server as well as to provide for selective return communication from the network server to one or more gaming machines. One type of information which is communicated to the network server relates to the warning/tilt monitoring system as describec3 in Fig. 2.
Additional types of information to be sent to the NIAC, as will be described with reference to the dedicated architecture structure of Fig. 4, have to do with routine polling and collection of game and player data which is automatically and iteratively collected individually within each gaming machine by its internal main proce~sor board and then sent to the NIAC over the network.
CA 022416~0 1998-06-24 Referring back to Fig. 3, the networking system according to the present invention operates first by converting the data being collected by the main processor board from its digitized input to an audio frequency output of a selected kilohertz range via the network peripheral. This is accomplished by the interface circuit 86 receiving the stream of digitized signals from the game's main processor unit representative of monitoring conditions and game play data and player tracking data as will be further described, and then outputling the signals to the network interface adapter 88 whereupon it is converted to the frequency output, preferably in a range of 100 to 400 kilohertz.
As was previously indicated, a great advantage of the data collection and player tracking system provided by the network of Fig. 3 is that it utilizes theexisting AC power lines within the gaming facility or casino for effecting transfer of the information to the network server. An AC power line is illustrated schematically at 94 and is shown comlected to nodes 82, 90 and 92 in parallel. It is understood that this block diagram illustration is intended to show the ability to plug the various gaming machines into existing wall sockets,as well as the network server to be subsequently described, and that lhe interior wiring structure of the facility is then adopted as the communication conduit system for purposes of this invention.
Accordingly, the various gaming machines are capable of collecting a variety of different types of information, converting the information from a digitized input into an audio/frequency output, and then commullicating the output over the existing AC lines of the facility. It is further understood thatin order for the audio frequency output to be successfully transmitted over the existing AC lines, the network interface adapter 88 must use what is commonly referred to as CE-Bus for diversifying an output signal over a wide range so that it can be successfully tr~n.~mi~( d over the AC lines sim~ n~ously with thenormal power carrying characteristics of an AC line. CE-Bus is of a type of protocol commonly produced under the commercial designation EIA IS-600 which conforms to existing ANSI standards.
-CA 022416~0 1998-06-24 A network server at 96 is in the preferred embodiment a computer with hard drive having at least 386 processing speed capability or better. The server96 is again preceded by a network interface adaptor/controller (NIAC) 98 which is provided as a separate unit and communicates with an existing serial port of the server hard drive 96. The purpose of the NIAC 98 is to first convert ~he frequel1cy outputs of the various gamillg macllines back into a digitized format such as previously existed prior to lhe initial conversion by the various network interface adapter units, such as shown at 88. This haviu1g been done, the NIAC's 98 next job is to run the converted information throughout a backup network buffer 100, which is usually a large hard drive, concurrently with sending tlle information directly to the server 96. The buffer 100 is essentially a memory holding tank for compiling the information converted by the NIAC 98 and ensures an available backup in the unlikely event that the information is lost in transmission to the server 96.
The NIAC 98 then dowllloads the acquired information in digitized form to the server 96 and, as the server 96 receives the information, it cormnunicates back to the NIAC 98 to let it know that the information was received. Most information received by the NIAC 98 is passed 011 to the server 96 with the exception of information received which relates to signal qualiLy, the NIAC 98 being able to separaLely process and intelpret that information. As previously described, the server 96 is capable of issuing comm~nds in reverse fashion througl1out the network to instruct one or more gaming machines to shut down a selected operating function, or to shut down entirely, and this is normally inresponse to the NIAC being notified of a fault or tilt condition.
Also conn~-cte~l to the server 96 is an uninterruptible power supply 102, such as a back-up battery, which augments the existing power supply of the facility and ensures that no loss of information will occur in the event of a power outage. A printer 104 is also shown an(l is utilized by the server 96 to print out detailed reports relating to such items a game play data, player data,operational and maintenance reports relating to each gaming machine, and any CA 022416=,0 1998-06-24 other information. A dedicated software program is incorporate(l into the server for compiling and presenting this data and will normally operate in conjunction with a computer operating program, such as a Windows basecl 95 or NT system. Additional discussion of the content of the reporting function of the server 96 will be subsequently made in somewhat more detail.
Referring back to Fig. 3, the server 96 and NIAC 98 assist in comparing computed values to m~nll~lly retrieved values through slave computers, or the m~nll~lly retrieved information can be put into the server 96 by halld for compiling reports.
Step 106 represents a machine manual download step in which an employee of the casino manually removes both hard (COill) and soft (paper) currencies from within each of the gaming machines. Step 108 represents the supervised accounting process of counting both the hard and soft currencies drawn from each machine and this information is then inputted into a slave computer 110 m~nll~lly, or with an electronic scale and a soft drop analyzer such typically being a laptop or other desk top system located in the count roomof the gaming facility. The slave computer(s) 110 are tied into the NIAC 98 by a fiequency module bus 112 and can likewise operate to carry data bearing signals in a frequency modulated format over air waves from the accounting room to the NIAC 98. The NIAC 98 retrieves the information from the slave computer(s) 110, converts it back to a digitized format, and then sends it on tothe server 96 where it is compiled and compared to the information which was previously sent from the various machilles relating to money taken in.
A coupler 114 is also shown whicl1 may be connected to an additional AC line 116 within the facility and is capable of hooking additional pluralities, or banks, of gaming machines into the network. It is also contemplated that redundant servers could be utilized for the network which can interface with one another and continuously update each other with all input information collected across the network. The NIAC is the basis (originator) of all CA 022416~0 1998-06-24 information. The servers have no direct access to its buffer, they only verify that data was received.
The advantages of the player and game tracking system as set fortll in Fig. 3 are numerous. The most notable of which is that the existing AC power lines within the facility are adopted as the communication network and it is only necessary to plug the individual machines into a wall socket and to provide the necessary information carrying bus to enable the system. Therefore, the necessity of running separate wiring for connecting each machine to the network server is therefore avoided. An additional advantage is that the network server can m~int~ identification with each networked gaming machine regardless of whether the machine is moved anywhere within the existing facility, so long as the machine is plugged into an existing AC line which is in operative commllnication with the NIAC 98 and network server 96.
This is provided in part by a dedicated network circuit 88 whicll is implanted withill the network peripheral of each gaming machine and which m~int~in.~
identifying two way communication with the network server as well as data collection and player tracking information.
The network system permits a user of a networked gaming machine to belong to a club within the casino and to access a player tracking system by placing either a key or card insert in the machine and to then be identified by the network which lists all the information relevant to the player, keeps track of tlleir playing time, winnings, losses and the like. A primary objective of the player tracking system is to provide a more effective means by which players can be rewarded for using the system, such as by awarding points, complementary items or the like.
As previously described, the network server 96 compiles a detailed report relating to all aspects of gaming operation. Such information again typically includes all warning or tilt conditions sensed by the problem analysiscircuitry of Fig. 2. Also transmitted to the network server 96 from each machine is an update of every game play that machine experiences. Such an CA 022416~0 1998-06-24 update normally occurs each time a COill or legal lender is inserled within a slot of tlle machine and the machille lever or button is depressed to activate game play. Upon the end of game play and the outcome of the game being delermined, the main processor board of the selected gamillg macl1il1e collects all inrormatiol1 relevant to that game play, i.e, how many coins were entere~l, was a payout made and, if so, how much, and the machine transmits this information in a separate packet to the NIAC where it is convertecl into digitized format then sent to the server wllere it is compiled and inserted witllin lhe report.
Referrillg finally to Fig. 4, a schematic is shown of the distributed network archilecture of a selected gaming machine, such a network architecture essentially being as presented structurally in the view of Fig. 1 and illustrating a simplified wiring design of the gaming machine which is a dramatic improvement over existing gaming machines. Again, and to avoid confusion, the problem analysis circuitry system of Fig. 2 functions as a subroutine of theoverall network archilecture to monitor and report warning/Lilt conditions of the machines and the wiring architecture of Fig. 4 is also intended to cover all information transmissions to the network server which additionally relate to player tracking, game play and any other information which is sought by the network server. As such, the schematic of Fig. 2 is not to be confused with the overall structuring of the wiring layout of Fig. 4, rather it is considered to be incorporated into it.
Referring again to Fig. 4, the network architecture of a selected gaming machine is shown in block diagram and identifies a first peripheral 118 and a second peripheral 120, such peripherals again being any operating component (hopper, motor, swilch, lamps, etc.) of the gaming machine capable of being tied into the main processing board. Peripheral controllers 122 and 124 are operably connected to the machines, respectively, in a fashion known in the art and so that they are capable of pulling information from the machines relating CA 022416~0 1998-06-24 to any aspect of the peripheral. !rhese connections are illustrated scllematically by lines 126 and 128, respectively, for purposes of this illustration.
Tlle main central processing unit board is illustrated at 130 including a circuit, the purpose of which will be shortly described, is illustrated at 132. As was discussed previously, the objective of the distributed network architecture is to greatly simplify the wiring requirements of the machine and this is largely accomplished by distributing much of the lower level processing functions to the individual peripheral controllers located througllout the machine and which are in turn connected in common bus fashion to the main processing unit board 130 and the peripheral enables unit 132 by fewer wires tl~an which would otherwise be necessary if only a single processor where employed which would require multiple lines ex~ending to each operating peripheral.
A common peripheral controller reception line 134 and a common peripheral controller transmission line 136 are provided as bus lines to which each of the plurality of peripheral controllers, illustrated at 122 and 124, areconnected. The main central processing unit 130 includes an output transmission line 138 to the common controller reception line 134 as well as an input reception line 140 to the common controller transmission line 136.
Accorclingly, the main processing unit 130 receives input directly from the controllers on line 140 and issues responsive com-n~n-l~ back to the controllersand associated peripherals on line 138, such input including normal player tracking and game play data and which may also include problem monitoring and analysis of machine function.
A separate dedicate(l line extends from the peripheral enables circuit 132 to each of the peripheral controllers 122 and 124 and is shown at 142 and 144, respectively. The peripheral enables circuit 132 is essentially an additional logic IC incorporated into the machine hardware which performs the specific functioll of polling in successive fashion each of tlle peripherals/controllers.The main CPM specifically polls each peripheral/controller in succession via the peripheral enable IC as to its operative function and whetller there are -CA 022416~0 1998-06-24 currently any problems. The information collected by the main CPU is then transmitted to the main central processing unit 130 along a line 146 extending therebetween. It is also understood that certain types of information polled by the main CPU from the respective peripherals/controllers coùld also be obtained directly by the main central processing unit board 130, however this further distributed networking facilitates faster and more emcient operation of the main processor board 130.
A player interface controller 148 is illustrated to whicl1 is coml11ul1icated the input and output of the main processor board 130 along lines 134 an~l 136 as well as to the peripheral enables circuit 132 along a further line 150 extending therebetween. The player interface controller 148 essentially facilitates the display of any information relative to the machine to the LCD.
One preferred application of this technology is again illustrated by the LCD
display of Fig. 1 which is in operative communication with an output of the main processor unit. Again, the purpose of the distributed network architecture of Fig. 4 is to facilitate the collection of all relevant game play, player and warning/tilt monitoring data from withh1 the machine into a main processor Ullitwhich utili~es reduced wiring as opposed to other existing gaming machines.
This information is then sent to the network server through the NIAC n~ili7ing the existing AC line network as previously described in Fig. 3.
It is therefore clearly evident that the present invention teaches a novel assembly for networking a plurality of gaming machines to a central network server and also teaches an individual gaming machine with improved processor construction and communication protocol and fault analysis. E~aving described my invention, additional embodiments will become apparent to those skilled in the art to which it pertains without deviating from lhe scope of the appended claims.
I claim:
GAMING MACHINES TO A CENTR~L SERVER AND
WITH IMPROVED MICRO PROCESSOR CONSTRUCTION
~ND COMMUNIC~TION PROTOCOL AND F~ULT ANALYSIS
S I~ack~l oulld oï tlle InYelltio Fiel~l of ~ InYelltioll The present invention relates generally to slot machilles and related gaming machines and, more particularly, to an assembly for networking a plurality of individual gaming machines into a central network server and with an improved microprocessor construction and communication protocol for operating each of the gaming machines both internally as well as from the central location.
l?es~ription of tll~ Prior ~rt Gaming machine technology, particularly slot n ~c!lin~s, are well known in the art. The older versions of such machines, which are mechanical in nature, have been progressively replaced by new versions which incorporate substantial amounts of electronic circuitry and wiring so as to provide enhancedvisual ancl audial effects.
Current slot machine teclmology incolporates electronic operating circuitly whicll is capable of monitoring the operational status of the gaming macllines and further includes such features as data collection systems and player tracking systems which make possible the tracking of numerous variables relating to levels of usage of the games as well as payouts given relative to money taken in. Current slot machine teclmology furtller makes possible the automatically ability to deactivate the gaming machine upon the occurrence of a tilt condition, such condition usually rendering the machille incapable of continued play prior to maintenance and correction of the tilt. It is also knownin the art to hook pluralities of such machines inlo a comrnon network for the purpose of transmitting operating information from such machines to a common network server.
CA 022416~0 1998-06-24 It is also known in the art that such conventional gaming machines as have been previously described typically require complex processor circuitry and wiring within their cabinet designs in order for each of the operating peripherals to be tied into a main processor dedicated to that machil1e.
Furthermore, it is necessary to run specialized and expensive wiring within a gaming facility from each of a plurality of such machines to a remote network server to effect communication with the server. The additional wiring requirements of the facility typically make it very difficult to rearrange the gaming machines tied into the network from one place to another, such movement of machines often being desirable in response ~o chzlnging crowd and flow patterns throughout a gaming casino and effective in maximizing play of selected machines.
Numerous other tyl~es of gaming machilles ancl slot machines are known in the art which utilize various microprocessor technology and an example of SUCIl a device is illustrated in U.S. Patent No. 5,179,517, issued to Sarbin et al., which teaches a data transfer system capable of collection data from gamingmachines and transferring the data to a smart card type data unit cont~ining a memory. The data unit is capable of storing machine information and for receiving machining identifying data relating to play and status data.
A further example of a gaming system is shown in U.S. Patent No.
5,170,345, issued to Poole, whicl1 shows a control circuit for coin operated amusement games. As discussed previously, Poole illustrates an example of a gamil1g control system which requires extensive specialized wiring an power source supply in order to operate a selected number of gaming machines.
A still further example of a progressive gaming system in which slot machines at different casinos are tied in together is shown in U.S. Patent No.
5,611,730, issued to Weiss. A controlled computer network includes a monitor host which accesses banks of slot or gaming machines at specified participating casinos through modem connections to each of the locations. A casino master controller at.each location is responsible for all data communication to and from -CA 022416~0 1998-06-24 the host site such as information relevant to slot operation which is compared to informa~ion obtained from machines at other networked locations. A
specified objective of Weiss is the ability to tie slot machines at a variety ofindependent non-restricted gaming locations to contribute to and compete from a set of common jackpots.
Sumlllary Or Ille Present Invelllioll The present invention is an assembly for networking a plurality of gaming machines to a central network server and with improved micro processor method and communication protocol for monitoring operational status and collecting game play information both internally by individual gaming machines as well as by the network server. The network assembly and processor/protocol system according to tlle present invention is an improvement over the prior art gaming control systems in that it facilitates more efrlcient and reliable communication between individual gaming machines and a network server and that it also further reduces and simplifies wiring requirements both within the individual machines and througllout a network connecting a plurality of such machines together while improving both fault detection and communication protocol functions.
The gaming machines each include an internally mounted main processor board which communicates with individual controllers which are in turn assigned to selected peripheral devices of the machine and are mounte(l in proximity to the peripherals. The arrangement of the main processor and peripheral controllers greatly simplifies the wiring requirements of the gaming machine which would otherwise be necessary if a single processor were provided within the machine and from which a large plurality of wires would of necessity extend to the various peripheral devices. The arrangement of the individual controllers in proximity to their selected peripherals also serves togreatly decentralize much of the iterative sensing and calculating steps which would otherwise of necessity have to be performed by the main processor board CA 022416~0 1998-06-24 and which would also require lhe provision of signiricantly more wiring and wire harnesses.
A communication protocol is established between the main processor board an(l the peripheral conlrollers, the result of whicll is that the wirillg requiremellts of the system are reduced ~o two separate lines to whicll all the periplleral controllers are comlected in parallel for dedicated transmission andreception of signals to and from the main processor board. A third dedicated line, also in the form of a unique line to which each peripheral/controller is connected, is also provided according to tlle protocol interrace an~ permits tlle main processor to poll each controller successively for information to be collected from the peripheral devices, such information usually relatillg to game play data and information relevant to operating characteristics of the periplleral devices .
Sensors are located at each of a selected group of peripheral devices and supply a continuous stream of signals representative of a monitored and operational function of a selected peripheral and for which the ability to determine the fault of the peripheral is important to the operation of the machine. The signals read by the sensors are converted to a readable forln by the associated controller and supplied to the main processor board. In case of a fault or warnillg being detected during the monitoring of any of the specifiedperipherals, the main processor board within the gaming machine notif1es the specified peripheral througll its associated controller to either shut down and/or to cease its iterative sensing function, or put the selected machine into a tiltcondition.
A network server is located remote from the plurality of gaming machines and is operatively connected in parallel to the plurality of gaming machines by mealls of the existing electrical power lines extending throughout the gaming facility, such lines typically being AC internal lines. The network server typically is provided in the form of a cormputer which includes a hard drive, a central processor unit with built-in program memory, a network server , CA 022416=,0 1998-06-24 in~erface adaptor controller (NIAC), and the individual main processor boards of t}le individual gaming machines each furlher include interface adapter circuitry to permit signals to be sent to and from one another over the conventional AC lines. The interface adapters of the main processor boards of the gaming machines and the NIAC of the network server operatively commlll1ic~e by successively converting digitized signals within the machines to frequency signals of a selected kilohertz range which are sent over the existing AC lines in addition to the normal voltage/current flow, the frequency signal being received at the NIAC location and being reconverted back into l 0 digitized form by the network interface adapter/controller for subsequent transmission to the l1etwork server.
Tlle ability of the network server and individual machines to communicate tllrough the facilities existing AC networ~: greatly increases the quantity and types of il~ormation wl1icll can be sent to the network server froml 5 the individual machines widlout the need of installirlg additional wiring within the facility. The ability to make use of the existing AC line network also permits tl1e moving around the macl1il1es within the facility to take advantage of ever charlgil1g crowd and flow patterns so as to maxin1ize the effectiveness of the machines and this is done witllout the necessity of any additional wiringand with the network server m~inl~init1g identification of tlle selected gaming machines.
Also, the main controllers on the selected gaming machines are capable of communicating botl1 identified faults read from the sensors as well as other standard game play and operational data polled from the macl1ines to tlle NIAC
and network server. In the event of an identified warning in a selected machine or a tilt condition representative of inoperability of a macl1il1e, the server can instruct certain features of one or more gaming macl1ine to deactivate or can instluct one or more of the machilles to shut down entirely. The network server is further capable of compiling detailed reports by means of a computer software program which assembles and compiles all of the inputted inforl11ation CA 022416~0 1998-06-24 from througllout the nelwork and provides detailecl information on all aspects of gaming machine operatioll.
~rief Descriptioll of Ille Dra~vin~c ReferellCe WillllOW be made to tlle a~tached drawings, whell read in combination with the following specification, wherein like reference numerals refer to like parts througllout the several views, and in whicll:
Fig. 1 is a view of an interior of a selected gaming machine and illustrating the improved and simplified wiring structure of the processor construction and distributed network architecture according to the present 1 0 invention;
Fig. 2 is a block diagram of the a main processor unit of a selected gaming machine in communication with various controllers assigned to peripheral operating devices with the gaming machine;
Fig. 3 is a block diagram view of the interface network for communicating a plurality of individual gaming machines with a network server which utilizes conventional AC power lines according to the present invention;
and Fig. 4 is a wiring diagram of the distributed network architecture between main processor board and peripheral controllers wllicll results in simplified wiring of a selected gaming machine according to the present invention.
Description of the Preferred Embodilllellt Referring to Fig. 1, an example of a gaming machine is illustrated at 10 which incorporates an improved micro processor method construction forming a part of the networking assembly according to the present invention. The gaming machine 10 is in the preferred embodiment an electronic operable slot machine witll a main cabinet body 12 within which is contained the working components of the gaming machine and a hingedly colmected door 14 which is opened outwardly to reveal the components of the machine 10.
, CA 02241650 1998-06-24 ~ main central processing unit board 16 is located at a generally centralized location within the cabinet body 12 and is electrically colmected toa plurality of specific peripheral operating devices of the gaming machine 10 as will now be described. A first operating peripheral is identified by a reel 18 which is mounted to an electric motor secured to a bracket 22 within the cabinetbody 12. Each reel includes its own electric motor, not sllown, for controlling operation of the reel. For pulposes of ease of illustration, on a single reel 18is illustrated, however it is conventionally known to supply three or more such reels upon whicll are placed pluralities of identifying symbols and for whicll it is desirable to achieve a specific combination of symbols during game play in order to obtain a game payout. Arrayed on the connected door 14 of the gaming machine 10 are a first window 24, second window 26 and third window 28 whicll correspond with the reel 18 all(l two additional such reels and which permit randolllly generated symbols to appear during game play The prior art also teaches electronically controlled clevices for randomly generating the probability of occurrence for any given combination of identifyillg symbols on the reels and the teachings of such devices are hereby incorporated by reference.
Referring back to Fig. 1, a firsl periplleral controller 30 is illustrated whicll is operatively comlected to the reel 18 and in turn connects to the main central processing unit board 16 by a series of tllree comlecting wires such as PCB trace lines, not sllowm A second periplleral unit 32 is illustrated wllich is a COill collect hopper mounted to a base of the machine cabinet 12 and whicl also includes an associaled controller 34 likewise operatively comlecte(l thel-eto.
A wiring harness 36 of three wires extends from the peripheral controller 34 and likewise feeds into the main central processing unit board 16. A warning light 38 and an LCD (liquid crystal diode) notification display 40 forrn in combination a third peripheral Ullit and an associated controller 42 is operatively connected to the light 38 and LC~ display 40 and is in turn CA 022416~0 1998-06-24 ~ electrically communicated to the main processor unit board 16 by a further wire harlless 4~.
The objective of the novel and improved arrangement of the processor construction and distributed network architecture of the selected gaming machille shown in Fig. 1 is further evidenced by diagrams showing the problem analysis circuitry for determining faults in operating peripherals as shown in Fig. 2 and also the distributed network architecture in Fig. 4. The network architecture of Fig. 4 enables communication between the various peripheral controllers and the main processor unit board 16, a portion of which is again dedicated to the problem analysis circuitry of Fig. 2, as well as to additional polling and compiling functions assembling game play and player tracking information as will be further described.
Referring now to Fig. 2, a block diagram of the problem analysis circuitry system is shown at 46 which corresponds to the features illustrated in15 the gaming machine arrangement of Fig. 1. A main central processor Ullit board 48 is shown which corresponds to the processing unit board 16 illustrated structurally in Fig. 1. A first peripheral controller S0 and a second periplleral controller 52 likewise can correspond to peripheral controllers such as have been identified at 30, 34 and 42 in Fig. 1 and are shown by diagram to be 20 coImected to the main processor unit board 48 by communicating line 54 extending from the main unit board 48 and connecting to a bus line 56 to which the controllers are electronically engaged.
In a preferred embodiment, the main processor unit board 48 is typically provided as a commonly available integrated circuitry chip, such an element 25 commonly known as an 8051 Intel Integrated Circuit capable of receiving processing and transmitting signals in simultaneous fashion. The peripheral controllers S0 and 52 are likewise provided witll microprocessing capability andmay also be integrated circuit devices such as the main processor unit board, however such peripheral controllers are usually specified such that they require , CA 022416~0 1998-06-24 some lesser amount of processing capability as opposed to lhe main processor ur it board 48.
Referring again to Fig. 2, a first selected peripheral 58is illustrated in operative communication with the first controller 50 along line 68 and a second S selected peripheral 60 is likewise in operative communication using line 76 with the second controller 52. A rlrst sensor 62is illustrated in communication with the first controller 50 by line 64 and a further line 66 extends from the sensor62 to the peripheral 58. A second sensor 70 is likewise illustrated in communication wilh the second controller 52 by line 72 and a furlher line 74 extends from the sensor 70 to the peripheral 60.
The sensors 62 and 70 operate by continuously providing signals associated with the specified peripheral device, such devices ranging in nature from coin hoppers, electric motors, reels, switches ancl power input supply.
The controller to which the senor is slaved then decides whether the signal read from the peripheral is active or within a specified acceptable range. A
first type of conventional sensor is capable of sensing whetller an AC power line is active or not, such as occurrhlg in an input power supply, and then notifying the assigned controller of the same after converting the AC input intoa DC output which is capable of being read by the controller. In tllis instance,a tap of a line to the power supply allows a small current to flOw tllrougll a series resistor and then through a rectifier diode on the positive portion of anestablished sine wave. The current charges a small capacitor very quickly and a produced voltage is then clipped to an established level via a zener diode so it can then be tested by the controller. The controller in this instance is capable of determining whether the ~C power level of the power supply falls within a specified range of acceptable values stored within a processor memory of the controller. In the event of the power level falling outside this range, usually below the minim:~l acceptable value, the controller then notifies the main processor unit board 48 of this fact and the processor then issues a command Oll a separate output line back to the assigned peripheral whicll either shuts down the peripheral and/or ceases the iterative function to which the sensor is slaved and can put the machine into a tilt condition. In a commercially known embodiment, it is desirable to m~in~in the power level of the maclline at a minimal level of at least 70 volts RMS (root means squared).
A second type of conventional sensor is largely similar to the type previously described above with the exception that it does not require the conversion of an AC signal into DC form prior to OUtpUttillg the results to the associated controller. The sensor according to this type therefore does not require the rectifier diode and capacitor and simply functions to inclicate the existence or non-existence of a DC signal from the peripheral in an output signal to the controller from which it is slaved. The associated controller onceagain outputs a signal to the main central processing unit board 48 notifying itof the fault in the peripheral and the unit board 48 in turn outputs a separate signal back to the periplleral instructing the faulted function to sllut down and/or ceasing the sensing iterative function associated with that fault an~ canput the selected machine into tilt.
As previously stated, the problem analysis circuitry system as discussed in Fig. 2 operates as a portion of the signal protocol design according to the overall distributed network architecture, as will be further discussed with reference to Fig. 4, and functions simply to notify the main processor Ullit in the event of a system component falling outside of acceptable parameters or failing entirely. Referring again to gaming machine constluction illustrated Fig. 1, the warnillg light 38 and LCD display 40 are concurrently notified by the mahl processor Ullit of a detected fault concurrent with the rmain processoriSSUillg instructions to either shut down and/or cease iterative sensing of the associated peripheral. As will be subsequently described with reference to the diagram of Fig. 3, an operator of a central network server will be notified of a fault in a given gaming machine and a maintenance operator upon encountering the machine will be immediately notified of the existence of a , CA 022416~0 1998-06-24 faul~ by illumination of the fault light 38 and can further read the nature of the fault whicll will be displayed upon the LCD unit 40.
In application, the problem analysis circuitry system of Fig. 2 is capable of internally and automatically sensing, analyzing, reporting and responding to a determined tilt condition as opposed to a fault or maintenance condition wi~hin the machine. A tilt condition is defined as one in which the machine is rendered inoperative and includes such thillgs as coins becoming jamrned within a hopper, bad switches in a door or coin out unit, a bad hopper motor, bad processor board, bad coupler, bad stepper motor, bad reel reader or inadequate power supply. A warning or maintellallce condition is defined as one in whicll a portion Or the machine is ren(lere(l inoperative and includes such thillgs as a burned out light, bad service switch, bad fuse, validator and the like.
Referring again to Fig. 2, and in view of the above disclosure, any number of periplleral controllers and associated sensors may be provided which are assigned to any like number of operating peripherals as previously described. The sensors, sucl~ as at 62 and 70, tllerefore continuously pull a steady stream of AC or DC signals from its slaved peripheral, convert the signals into DC form from AC if necessary, and then supply the output to the assigned controller. The controller in turn, see 50 and 52, determilles whetllerany problem occurs and, if so, notifies the main processor unit board 48 of thisfact. The main processor Ullit 48 again in turn notifies the assigned peripheral, thlougll line 56 as illustrated in the drawing, of the identified rault to shut down the responsible function and/or to cease the iterative sensing step relating to that function. Concurrent with the main processor unit board 48 being notified of the existence of a warning/tilt condition, and as will be better described with reference to Fig.3, the main processor notifies a peripheral interface controller such as 50 of a main network server remotely located from the gaming machine of the occurrence of a tilt or maintenance request to facilitate necessary repairs of the unit.
CA 022416~0 1998-06-24 Referring now to Fig. 3, a data collection and player tracking system is illustrated which permits a plurality of such gaming machines as previously described with reference to Figs. 1 and 2 to be tied into a parallel network whicl1 is directly linked to a remotely located network server. The most significant aspect of tl1e data collection and player tracking systems accordingto the present invention is that it permits two-way communication between the individual main central processing units within the gaming machines and the NIAC via the existing AC power lines withil1 tlle facility.
Referring to Fig. 3, a first user node is shown at 82 and represents an individual gaming machine 84, such as is illustrated structurally in Fig. 1. as previously described. An interface circuit 86 and a network interface adapter 88 are also shown and, according to the preferred embodiment, forms part of peripheral located in the gaming machine illustrated at 84. It is however also contemplated that the networking system of Fig. 3 could be incorporated into an existing gaming machine according to a prior art construction simply by inserting the appropriate circuit boards con~ining the interface circuit 86 and network adapter 88 without deviating from the scope of the present invention.
An additional nodes 90 and 92 are illustrated and represent further such gaming machines which are constructed similar to that shown at 82.
As previously explained, the purpose of the data collection and tracking system is to transfer all types of information from the individual gaming machines to the remotely located network server as well as to provide for selective return communication from the network server to one or more gaming machines. One type of information which is communicated to the network server relates to the warning/tilt monitoring system as describec3 in Fig. 2.
Additional types of information to be sent to the NIAC, as will be described with reference to the dedicated architecture structure of Fig. 4, have to do with routine polling and collection of game and player data which is automatically and iteratively collected individually within each gaming machine by its internal main proce~sor board and then sent to the NIAC over the network.
CA 022416~0 1998-06-24 Referring back to Fig. 3, the networking system according to the present invention operates first by converting the data being collected by the main processor board from its digitized input to an audio frequency output of a selected kilohertz range via the network peripheral. This is accomplished by the interface circuit 86 receiving the stream of digitized signals from the game's main processor unit representative of monitoring conditions and game play data and player tracking data as will be further described, and then outputling the signals to the network interface adapter 88 whereupon it is converted to the frequency output, preferably in a range of 100 to 400 kilohertz.
As was previously indicated, a great advantage of the data collection and player tracking system provided by the network of Fig. 3 is that it utilizes theexisting AC power lines within the gaming facility or casino for effecting transfer of the information to the network server. An AC power line is illustrated schematically at 94 and is shown comlected to nodes 82, 90 and 92 in parallel. It is understood that this block diagram illustration is intended to show the ability to plug the various gaming machines into existing wall sockets,as well as the network server to be subsequently described, and that lhe interior wiring structure of the facility is then adopted as the communication conduit system for purposes of this invention.
Accordingly, the various gaming machines are capable of collecting a variety of different types of information, converting the information from a digitized input into an audio/frequency output, and then commullicating the output over the existing AC lines of the facility. It is further understood thatin order for the audio frequency output to be successfully transmitted over the existing AC lines, the network interface adapter 88 must use what is commonly referred to as CE-Bus for diversifying an output signal over a wide range so that it can be successfully tr~n.~mi~( d over the AC lines sim~ n~ously with thenormal power carrying characteristics of an AC line. CE-Bus is of a type of protocol commonly produced under the commercial designation EIA IS-600 which conforms to existing ANSI standards.
-CA 022416~0 1998-06-24 A network server at 96 is in the preferred embodiment a computer with hard drive having at least 386 processing speed capability or better. The server96 is again preceded by a network interface adaptor/controller (NIAC) 98 which is provided as a separate unit and communicates with an existing serial port of the server hard drive 96. The purpose of the NIAC 98 is to first convert ~he frequel1cy outputs of the various gamillg macllines back into a digitized format such as previously existed prior to lhe initial conversion by the various network interface adapter units, such as shown at 88. This haviu1g been done, the NIAC's 98 next job is to run the converted information throughout a backup network buffer 100, which is usually a large hard drive, concurrently with sending tlle information directly to the server 96. The buffer 100 is essentially a memory holding tank for compiling the information converted by the NIAC 98 and ensures an available backup in the unlikely event that the information is lost in transmission to the server 96.
The NIAC 98 then dowllloads the acquired information in digitized form to the server 96 and, as the server 96 receives the information, it cormnunicates back to the NIAC 98 to let it know that the information was received. Most information received by the NIAC 98 is passed 011 to the server 96 with the exception of information received which relates to signal qualiLy, the NIAC 98 being able to separaLely process and intelpret that information. As previously described, the server 96 is capable of issuing comm~nds in reverse fashion througl1out the network to instruct one or more gaming machines to shut down a selected operating function, or to shut down entirely, and this is normally inresponse to the NIAC being notified of a fault or tilt condition.
Also conn~-cte~l to the server 96 is an uninterruptible power supply 102, such as a back-up battery, which augments the existing power supply of the facility and ensures that no loss of information will occur in the event of a power outage. A printer 104 is also shown an(l is utilized by the server 96 to print out detailed reports relating to such items a game play data, player data,operational and maintenance reports relating to each gaming machine, and any CA 022416=,0 1998-06-24 other information. A dedicated software program is incorporate(l into the server for compiling and presenting this data and will normally operate in conjunction with a computer operating program, such as a Windows basecl 95 or NT system. Additional discussion of the content of the reporting function of the server 96 will be subsequently made in somewhat more detail.
Referring back to Fig. 3, the server 96 and NIAC 98 assist in comparing computed values to m~nll~lly retrieved values through slave computers, or the m~nll~lly retrieved information can be put into the server 96 by halld for compiling reports.
Step 106 represents a machine manual download step in which an employee of the casino manually removes both hard (COill) and soft (paper) currencies from within each of the gaming machines. Step 108 represents the supervised accounting process of counting both the hard and soft currencies drawn from each machine and this information is then inputted into a slave computer 110 m~nll~lly, or with an electronic scale and a soft drop analyzer such typically being a laptop or other desk top system located in the count roomof the gaming facility. The slave computer(s) 110 are tied into the NIAC 98 by a fiequency module bus 112 and can likewise operate to carry data bearing signals in a frequency modulated format over air waves from the accounting room to the NIAC 98. The NIAC 98 retrieves the information from the slave computer(s) 110, converts it back to a digitized format, and then sends it on tothe server 96 where it is compiled and compared to the information which was previously sent from the various machilles relating to money taken in.
A coupler 114 is also shown whicl1 may be connected to an additional AC line 116 within the facility and is capable of hooking additional pluralities, or banks, of gaming machines into the network. It is also contemplated that redundant servers could be utilized for the network which can interface with one another and continuously update each other with all input information collected across the network. The NIAC is the basis (originator) of all CA 022416~0 1998-06-24 information. The servers have no direct access to its buffer, they only verify that data was received.
The advantages of the player and game tracking system as set fortll in Fig. 3 are numerous. The most notable of which is that the existing AC power lines within the facility are adopted as the communication network and it is only necessary to plug the individual machines into a wall socket and to provide the necessary information carrying bus to enable the system. Therefore, the necessity of running separate wiring for connecting each machine to the network server is therefore avoided. An additional advantage is that the network server can m~int~ identification with each networked gaming machine regardless of whether the machine is moved anywhere within the existing facility, so long as the machine is plugged into an existing AC line which is in operative commllnication with the NIAC 98 and network server 96.
This is provided in part by a dedicated network circuit 88 whicll is implanted withill the network peripheral of each gaming machine and which m~int~in.~
identifying two way communication with the network server as well as data collection and player tracking information.
The network system permits a user of a networked gaming machine to belong to a club within the casino and to access a player tracking system by placing either a key or card insert in the machine and to then be identified by the network which lists all the information relevant to the player, keeps track of tlleir playing time, winnings, losses and the like. A primary objective of the player tracking system is to provide a more effective means by which players can be rewarded for using the system, such as by awarding points, complementary items or the like.
As previously described, the network server 96 compiles a detailed report relating to all aspects of gaming operation. Such information again typically includes all warning or tilt conditions sensed by the problem analysiscircuitry of Fig. 2. Also transmitted to the network server 96 from each machine is an update of every game play that machine experiences. Such an CA 022416~0 1998-06-24 update normally occurs each time a COill or legal lender is inserled within a slot of tlle machine and the machille lever or button is depressed to activate game play. Upon the end of game play and the outcome of the game being delermined, the main processor board of the selected gamillg macl1il1e collects all inrormatiol1 relevant to that game play, i.e, how many coins were entere~l, was a payout made and, if so, how much, and the machine transmits this information in a separate packet to the NIAC where it is convertecl into digitized format then sent to the server wllere it is compiled and inserted witllin lhe report.
Referrillg finally to Fig. 4, a schematic is shown of the distributed network archilecture of a selected gaming machine, such a network architecture essentially being as presented structurally in the view of Fig. 1 and illustrating a simplified wiring design of the gaming machine which is a dramatic improvement over existing gaming machines. Again, and to avoid confusion, the problem analysis circuitry system of Fig. 2 functions as a subroutine of theoverall network archilecture to monitor and report warning/Lilt conditions of the machines and the wiring architecture of Fig. 4 is also intended to cover all information transmissions to the network server which additionally relate to player tracking, game play and any other information which is sought by the network server. As such, the schematic of Fig. 2 is not to be confused with the overall structuring of the wiring layout of Fig. 4, rather it is considered to be incorporated into it.
Referring again to Fig. 4, the network architecture of a selected gaming machine is shown in block diagram and identifies a first peripheral 118 and a second peripheral 120, such peripherals again being any operating component (hopper, motor, swilch, lamps, etc.) of the gaming machine capable of being tied into the main processing board. Peripheral controllers 122 and 124 are operably connected to the machines, respectively, in a fashion known in the art and so that they are capable of pulling information from the machines relating CA 022416~0 1998-06-24 to any aspect of the peripheral. !rhese connections are illustrated scllematically by lines 126 and 128, respectively, for purposes of this illustration.
Tlle main central processing unit board is illustrated at 130 including a circuit, the purpose of which will be shortly described, is illustrated at 132. As was discussed previously, the objective of the distributed network architecture is to greatly simplify the wiring requirements of the machine and this is largely accomplished by distributing much of the lower level processing functions to the individual peripheral controllers located througllout the machine and which are in turn connected in common bus fashion to the main processing unit board 130 and the peripheral enables unit 132 by fewer wires tl~an which would otherwise be necessary if only a single processor where employed which would require multiple lines ex~ending to each operating peripheral.
A common peripheral controller reception line 134 and a common peripheral controller transmission line 136 are provided as bus lines to which each of the plurality of peripheral controllers, illustrated at 122 and 124, areconnected. The main central processing unit 130 includes an output transmission line 138 to the common controller reception line 134 as well as an input reception line 140 to the common controller transmission line 136.
Accorclingly, the main processing unit 130 receives input directly from the controllers on line 140 and issues responsive com-n~n-l~ back to the controllersand associated peripherals on line 138, such input including normal player tracking and game play data and which may also include problem monitoring and analysis of machine function.
A separate dedicate(l line extends from the peripheral enables circuit 132 to each of the peripheral controllers 122 and 124 and is shown at 142 and 144, respectively. The peripheral enables circuit 132 is essentially an additional logic IC incorporated into the machine hardware which performs the specific functioll of polling in successive fashion each of tlle peripherals/controllers.The main CPM specifically polls each peripheral/controller in succession via the peripheral enable IC as to its operative function and whetller there are -CA 022416~0 1998-06-24 currently any problems. The information collected by the main CPU is then transmitted to the main central processing unit 130 along a line 146 extending therebetween. It is also understood that certain types of information polled by the main CPU from the respective peripherals/controllers coùld also be obtained directly by the main central processing unit board 130, however this further distributed networking facilitates faster and more emcient operation of the main processor board 130.
A player interface controller 148 is illustrated to whicl1 is coml11ul1icated the input and output of the main processor board 130 along lines 134 an~l 136 as well as to the peripheral enables circuit 132 along a further line 150 extending therebetween. The player interface controller 148 essentially facilitates the display of any information relative to the machine to the LCD.
One preferred application of this technology is again illustrated by the LCD
display of Fig. 1 which is in operative communication with an output of the main processor unit. Again, the purpose of the distributed network architecture of Fig. 4 is to facilitate the collection of all relevant game play, player and warning/tilt monitoring data from withh1 the machine into a main processor Ullitwhich utili~es reduced wiring as opposed to other existing gaming machines.
This information is then sent to the network server through the NIAC n~ili7ing the existing AC line network as previously described in Fig. 3.
It is therefore clearly evident that the present invention teaches a novel assembly for networking a plurality of gaming machines to a central network server and also teaches an individual gaming machine with improved processor construction and communication protocol and fault analysis. E~aving described my invention, additional embodiments will become apparent to those skilled in the art to which it pertains without deviating from lhe scope of the appended claims.
I claim:
Claims (20)
1. An assembly for networking a plurality of individual gaming machines with a remotely located network server, said assembly comprising:
each of the gaming machines including a main processor, a plurality of peripheral operating devices each representative of an operating function of thegaming machine and a like plurality of peripheral controllers, each of said peripheral controllers being slaved to a selected peripheral device and in operative communication with said main processor, each of said main processors of said individual gaming machines further including a first network interface adapter unit;
the network server including a central processor with program memory, a second network interface adaptor and controller unit being in operative communication with the network server;
a communication network extending between the plurality of individual gaming machines and the network server, via a network interface adaptor controller, said communication network interfacing at multiple first ends with each of said first network interface adapter units and at a second end with saidsecond network interface adaptor and controller unit; and said main processor of each gaming machine compiling data from said plurality of peripheral controllers relative to an operation of each of said peripheral operating devices, said date being communicating over said network to the network server and the network server capable of issuing responsive commands over said network to any plurality of the gaming machines.
each of the gaming machines including a main processor, a plurality of peripheral operating devices each representative of an operating function of thegaming machine and a like plurality of peripheral controllers, each of said peripheral controllers being slaved to a selected peripheral device and in operative communication with said main processor, each of said main processors of said individual gaming machines further including a first network interface adapter unit;
the network server including a central processor with program memory, a second network interface adaptor and controller unit being in operative communication with the network server;
a communication network extending between the plurality of individual gaming machines and the network server, via a network interface adaptor controller, said communication network interfacing at multiple first ends with each of said first network interface adapter units and at a second end with saidsecond network interface adaptor and controller unit; and said main processor of each gaming machine compiling data from said plurality of peripheral controllers relative to an operation of each of said peripheral operating devices, said date being communicating over said network to the network server and the network server capable of issuing responsive commands over said network to any plurality of the gaming machines.
2. The assembly as described in claim 1, said communication network further comprising an existing AC power line wiring network of a facility within which said network server and said plurality of gaming machines are located.
3. The system as described in claim 2, said first network interface adapter units each comprising first conversion means for converting digitized signals compiled by said main processor into a frequency signal of a selected kilohertz band width, said second network interface adaptor and controller unit further comprising second conversion means for reconverting said frequency signals into digitized signals for transmission to the network server.
4. The system as described in claim 1, further comprising a backup network buffer in operative communication with said second network interface adaptor and controller unit.
5. The system as described in claim 4, further comprising at least one slave computer separately connected to said second network interface adaptor and controller unit through RF (radio frequency) and capable of downloading hard and soft currency count information to said second adapter and controller unit for subsequent transmission to the network server.
6. The system as described in claim 5, the network server utilizing a software based program for preparing a detailed report illustrative of said datacompiled from each of said gaming machines and a printer in operative communication with the network server for printing out said report.
7. The system as described in claim 1, the individual gaming machines each further comprising a plurality of sensors, each of which are operatively connected at a first end to a signal output of a selected peripheral operating device to which said sensor is slaved, said peripheral controllers collecting said signal outputs from said peripherals and outputting a digitized conversion of said signal outputs to a slaved peripheral controller for subsequent transmission to said main processor.
8. The system as described in claim 7, further comprising a warning display light mounted to a selected gaming machine and in operative communication with an output of said main processor, said main processor issuing a command to illuminate said warning display light in response to a determined warning in one of said peripheral operating devices.
9. The system as described in claim 8, further comprising an LCD
display unit mounted to a selected gaming machine in proximity to said fault display light, said LCD display unit being in operative communication with an output of said main processor and displaying a textual message of a warning/tiltsignified by illumination of said fault display light.
display unit mounted to a selected gaming machine in proximity to said fault display light, said LCD display unit being in operative communication with an output of said main processor and displaying a textual message of a warning/tiltsignified by illumination of said fault display light.
10. The system as described in claim 1, further comprising a first common data transmission line and a second common data reception line to which each of said peripheral controllers are connected in parallel, said main processor including a first reception port in communication with said common data transmission line and a second transmission port in communication with said common data reception line.
11. The system as described in claim 10, further comprising a peripheral IC unit and a separate communication line extending from said peripheral IC unit to each of said peripheral controllers within a selected gaming machine, said peripheral enables unit enabling each of said peripheral controllers successively for data and communicating said data at selected intervals over an additional communication line extending between said peripheral enables unit and said main processor.
12. The system as described in claim 1, said main processor further comprising a micro controller based processing and integrated circuit component.
13. The system as described in claim 1, said selected peripheral device further comprising a rotary slot machine reel.
14. The system as described in claim 1, said selected peripheral device further comprising a power input supply to the gaming machine.
15. The system as described in claim 1, said selected peripheral device further comprising a coin collection hopper.
16. The system as described in claim 1, said selected peripheral device further comprising a motor.
17. A communication network for connecting a plurality of individual gaming machines to a remotely located network server, comprising:
each of the gaming machines including at least one processor unit which communicates with a plurality of individual peripheral operating devices, each said processor unit further including a first network interface adaptor unit;
the network server including a central processor with program memory, a second network interface adapter and controller unit being in operative communication with the network server;
an existing AC power line network within a facility to which said first network interface adapter units are operatively communicated at first ends and said second network interface adapter and controller unit is communicated at a second end; and said processor unit of compiling data from said peripheral devices relative to an operation of each of said peripheral devices, said first network interface adaptor units converting a digitized output of said processor unit into a frequency signal of a selected kilohertz band width for transmission across said AC power line network, said second network interface adapter and controller unit reconverting said frequency signals into a digitized form for transmission to the network server.
each of the gaming machines including at least one processor unit which communicates with a plurality of individual peripheral operating devices, each said processor unit further including a first network interface adaptor unit;
the network server including a central processor with program memory, a second network interface adapter and controller unit being in operative communication with the network server;
an existing AC power line network within a facility to which said first network interface adapter units are operatively communicated at first ends and said second network interface adapter and controller unit is communicated at a second end; and said processor unit of compiling data from said peripheral devices relative to an operation of each of said peripheral devices, said first network interface adaptor units converting a digitized output of said processor unit into a frequency signal of a selected kilohertz band width for transmission across said AC power line network, said second network interface adapter and controller unit reconverting said frequency signals into a digitized form for transmission to the network server.
18. An improved processor construction and distributed network architecture for a gaming machine, comprising:
a main processor;
a plurality of peripheral controllers which are each in operative communication with said main processor by a first transmission line, a second reception line and a third peripheral enable line;
a plurality of peripheral operating devices to which each of said peripheral controllers are respectively slaved; and said main processor compiling data from said plurality of peripheral controllers relative to an operation of each of said peripheral operating device, said main processor outputting a warning/tilt notification signal identified from a peripheral device to an exterior of the gaming machine.
a main processor;
a plurality of peripheral controllers which are each in operative communication with said main processor by a first transmission line, a second reception line and a third peripheral enable line;
a plurality of peripheral operating devices to which each of said peripheral controllers are respectively slaved; and said main processor compiling data from said plurality of peripheral controllers relative to an operation of each of said peripheral operating device, said main processor outputting a warning/tilt notification signal identified from a peripheral device to an exterior of the gaming machine.
19. The improved processor contruction and distributed network architecture as described in claim 18, further comprising a sensor in operative communication with a signal output of a selected peripheral operating device, said sensor converting said signal output into a digitized format and transmitting said digitized signal as an output to said associated peripheral controller.
20. The improved processor construction and distributed network architecture as described in claim 19, further comprising a peripheral enables IC which is separately connected to each of said peripheral controllers by a communication line, said peripheral enables unit polling each of said peripheralcontrollers in successive fashion and outputting collected data across a furthercommunication line to said main processor.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US89690497A | 1997-07-18 | 1997-07-18 | |
| US08/896,904 | 1997-07-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2241650A1 true CA2241650A1 (en) | 1999-01-18 |
Family
ID=25407043
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002241650A Abandoned CA2241650A1 (en) | 1997-07-18 | 1998-06-24 | Assembly for networking a plurality of gaming machines to a central server and with improved microprocessor construction and communication protocol and fault analysis |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA2241650A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8162755B2 (en) | 2001-04-19 | 2012-04-24 | Igt | Open architecture communications in a gaming network |
-
1998
- 1998-06-24 CA CA002241650A patent/CA2241650A1/en not_active Abandoned
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8162755B2 (en) | 2001-04-19 | 2012-04-24 | Igt | Open architecture communications in a gaming network |
| US8454440B2 (en) | 2001-04-19 | 2013-06-04 | Igt | Open architecture communications in a gaming network |
| US8545333B2 (en) | 2001-04-19 | 2013-10-01 | Igt | Open architecture communications in a gaming network |
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