CA2247341A1 - Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure - Google Patents

Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure

Info

Publication number
CA2247341A1
CA2247341A1 CA002247341A CA2247341A CA2247341A1 CA 2247341 A1 CA2247341 A1 CA 2247341A1 CA 002247341 A CA002247341 A CA 002247341A CA 2247341 A CA2247341 A CA 2247341A CA 2247341 A1 CA2247341 A1 CA 2247341A1
Authority
CA
Canada
Prior art keywords
adp
packet
packet counter
asynchronous data
application
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002247341A
Other languages
French (fr)
Other versions
CA2247341C (en
Inventor
Scott D. Smyers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Electronics Inc
Original Assignee
Sony Electronics, Inc.
Scott D. Smyers
Sony Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Electronics, Inc., Scott D. Smyers, Sony Corporation filed Critical Sony Electronics, Inc.
Publication of CA2247341A1 publication Critical patent/CA2247341A1/en
Application granted granted Critical
Publication of CA2247341C publication Critical patent/CA2247341C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/64—Hybrid switching systems
    • H04L12/6418—Hybrid transport
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40071—Packet processing; Packet format

Abstract

An asynchronous data pipe (ADP) automatically generates transactions necessary to complete asynchronous data transfer operations for an application over a bus structure. The ADP includes a register file which is programmed and initiated by the application.
The register file includes the bus speed, transaction label, transaction code, destination node identifier, destination offset address, length of each data packet, packet counter, packet counter bump field, control field, and a status field. During a data transfer operation, the ADP generates the transactions necessary to complete the operation over the appropriate range of addresses, using the information in the register file as a template. The ADP increments the value in the destination offset address field for each transaction according to the length of each data packet, unless the incrementing feature has been disabled and the transactions are to take place at a fixed address. The packet counter represents the number of transactions remaining to be generated. The packet counter value is decremented after each packet of data is transferred. The application can increment the packet counter value by writing to the packet counter bump field. A multiplexer is included within a system having multiple ADPs for multiplexing the information from the ADPs onto the bus structure. A demultiplexer is included within a system having multiple ADPs for routing information from the bus structure to the appropriate ADP.
CA002247341A 1996-03-07 1997-02-19 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure Expired - Lifetime CA2247341C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/612,321 US6519268B1 (en) 1996-03-07 1996-03-07 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure
US08/612,321 1996-03-07
PCT/US1997/002546 WO1997033230A1 (en) 1996-03-07 1997-02-19 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure

Publications (2)

Publication Number Publication Date
CA2247341A1 true CA2247341A1 (en) 1997-09-12
CA2247341C CA2247341C (en) 2008-11-04

Family

ID=24452676

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002247341A Expired - Lifetime CA2247341C (en) 1996-03-07 1997-02-19 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure

Country Status (10)

Country Link
US (4) US6519268B1 (en)
EP (1) EP0885418B1 (en)
JP (1) JP4155413B2 (en)
KR (1) KR100439539B1 (en)
AT (1) ATE198237T1 (en)
AU (1) AU2129997A (en)
CA (1) CA2247341C (en)
DE (1) DE69703732T2 (en)
TW (1) TW381233B (en)
WO (1) WO1997033230A1 (en)

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US20090268760A1 (en) 2009-10-29
US7145921B2 (en) 2006-12-05
KR19990087389A (en) 1999-12-27
AU2129997A (en) 1997-09-22
US20060291508A1 (en) 2006-12-28
EP0885418B1 (en) 2000-12-20
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JP4155413B2 (en) 2008-09-24
US6519268B1 (en) 2003-02-11
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WO1997033230A1 (en) 1997-09-12
TW381233B (en) 2000-02-01

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