CA2247701A1

CA2247701A1 - Automatic routing method

Info

Publication number: CA2247701A1
Application number: CA002247701A
Authority: CA
Inventors: Noriko Shinomiya; Masahiro Fukui
Original assignee: Matsushita Electric Industrial Co Ltd
Current assignee: Panasonic Corp
Priority date: 1997-09-29
Filing date: 1998-09-22
Publication date: 1999-03-29
Also published as: US6330707B1

Abstract

First, initial routing is performed on a net. If a design rule error exists in a wire already routed as a result of the initial routing, the wire already routed, causing the design rule error, is removed. Next, if the wire already routed and removed is a wire interconnecting a movable terminal, freely placeable within a predetermined region, to another terminal, then the movable terminal is displaced within the predetermined region and the removed wire is re-routed such that the displaced movable terminal is interconnected to the other terminal. Accordingly, the movable terminal can be located at an appropriate position within the predetermined region in accordance with the situation of surrounding wires. As a result, routing results of a higher density can be obtained.

Description

AUTOMATIC ROUTING METHOD

BACKGROUND OF THE INVENTION
The present invention generally relates to an improved S automatic routing method utilized for designing an LSI
through routing. More particularly, the present invention re-lates to an improved routing method for eliminating design rule errors by removing/re-routing and to an improved method for searching for wiring routes. Specifically, the present invention searches for wiring routes by applying a maze algo-rithm to a wiring region divided into a plurality of grids.
In particular, the method of the present invention is adapted to search for a wiring route satisfying a constraint applied on the height or the lateral width of a wiring region irre-spective of the number of grids of the wiring region.
Removing/re-routing is a conventionally known routing method attaining satisfactory results. In accordance with this re-routing method, if one of the wires already routed prevents a predetermined net from being routed, then the wire is removed, the predetermined net is routed and the wire re-moved is re-routed.
Such a re-routing method is disclosed, for example, by Youn-Long Lin et al., "A Detailed Router Based on Simulated Evolution", 1988 International Conference on Computer Aided Design, in which design rule errors (i.e., shortcircuit of a wire) resulted from initial routing is eliminated by remov-ing/re-routing. Hereinafter, the processing procedure of this conventional method will be described.
First, in order to meet a given hardwiring request, ini-tial routing is performed independently on respective nets.That is to say, wiring routes are once determined without taking design rule errors caused with other wiring routes in-to consideration. In the above-described document, initial routing is carried out in accordance with a greedy algorithm by moving a column from left to right.
Next, if no design rule errors exist in any of the cur-rently routed wires, then it is determined that the routing process should end. However, if any obstructive wire causing a design rule error exists, then the wire is extracted as a wire to be removed. Specifically, this extraction step is performed in the following manner.
First, the score of a net is evaluated by the following Equation l:
Score of net = a X (number of design rule errors) + b X
(number of contacts-number of terminals)+cX(real wire length/estimated wire length) (l) (where a, b and c are parameters) the "estimated wire length" is herein equal to one half of the entire peripheral length of a minimum rectangle surround-ing a plurality of terminals to be interconnected.

Thereafter, it is determined based on a comparison be-tween the score of a net and a random number whether or not the net should be removed. For example, if the net has a score larger than the random number, then the net is extract-ed as a wire to be removed.
Subsequently, the extracted wire is removed, a target netis routed and then the wire removed is re-routed.
On the other hand, a maze algorithm has conventionally been used for searching for a route interconnecting a plural-ity of terminals. Such a maze algorithm is disclosed, forexample, by Frank Rubin et al., "The Lee Path Connection Al-gorithm", 1974 IEEE Transactions on Computers, Vol. c-23, No.9. In accordance with this maze algorithm, a wiring route cost given by the following Equation 2 is used:
Wiring route cost = aX(wire length)+bX(number of con-tacts)+cX(number of design rule errors) (2) (where a, b and c are also parameters) If a cost regarding a design rule error is defined for a wir-ing route cost in accordance with Equation 2, then the design rule errors can be gradually eliminated by repeatedly per-forming removing/re-routing.
In recent years, in order to enhance the performance of a MOSFET, fabrication technologies for reducing the diffusion resistance of the MOSFET by utilizing silicide and/or sali-cide process techniques have been commonly used. Before such fabrication technologies were developed, source/drain elec-trodes 81 and 82 of a conventional MOSFET with high diffusion resistance shown in Figure 9(a), including gate, source and drain electrodes 80, 81 and 82, had to be extended as metal wires 71 from a diffusion region 70 via a large number of contacts 72. However, since the diffusion resistance of a MOSFET is reduced by utilizing such fabrication technologies, the number of contacts 72 in the source/drain electrodes 81 and 82 can be considerably reduced as shown in Figure 9(b).
Thus, as can be understood from Figure 9(b), source/drain terminals 71A and 71B, each having a small number (e.g., one in Figure 9(b)) of contacts 72, may be formed at any arbi-trary positions in the source/drain regions.
The present inventors carried out intensive analysis on an automatic routing/designing method of an LSI, in view of such progress in fabrication technologies. And we paid spe-cial attention to the fact that if the positions of the source/drain terminals 71A and 71B are appropriately moved within the source/drain regions, then a metal wire 7lC can be placed over a part of the diffusion region 70 where the source/drain terminals 71A and 71B are not placed as shown in Figure 9(b). From this point of view, we found that if the presence of freely movable terminals within a certain region is taken into consideration and if the freely movable termi-nals are appropriately placed in accordance with the situa-tions of surrounding wires, then high-density routing results can be obtained.
However, according to the conventional removing/re-routing method, the positions of terminals are fixed and therefore cannot be appropriately moved in accordance with the situations of wires.
An exemplary conventional method for searching for wir-ing routes in accordance with the maze algorithm as disclosed by Frank Rubin et al. in the above-identified document will o be described with reference to the flow chart illustrated in Figure 24.
First, in Step S10, hardwiring information is input.
Next, in Step S20, currently searchable grids are extracted.
Searchable grids adjacent to a grid in a list L, i.e., avail-able grids other than grids specified as being located in awiring forbidden region and grids in which terminals are lo-cated, are put into a list Ll. At the same time, search di-rections from the grid in the list L to the respective searchable grids are saved. The grids in the list Ll are ex-tracted as searchable grids.
Then, in Step S40, wire length costs are added while thesearchable grids, extracted in Step S20, are being searched for. Every time one grid is passed, a wire length cost of "1"
is added. Next, a particular grid having a minimum cost is selected from the grids in the list Ll and inserted into the list L.
Subsequently, in Step S50, it is determined whether or not an end point has been reached. If the end point has been reached, then the process advances to the next step. Other-S wise, the process returns to Step S20. In other words, if agrid to be reached is included among the grids in the list L, then the process advances to the next Step S60 of selecting a route having a minimum cost. Otherwise, the process returns to Step S20.
In Step S60, a wiring route having a minimum cost is ex-tracted by tracing back the route using the search directions saved in Step S20.
Hereinafter, this process will be described in more de-tail with reference to Figure 25. Herein, the number of wir-ing layers is assumed to be one for the sake of simplicity.A wiring region 20 is divided into a large number of grids 30. In the wiring region 20, terminals lOA, lOa, lOB, lOb, lOC and lOc and a wiring forbidden region 21 are present.
In Step S10, hardwiring information is input. The numer-als of the terminals lOA, lOa, lOB, lOb, lOC and lOc denotethe number of respective nets and a pair of terminals having the same number (e.g., the terminals lOA and lOa) should be hardwired to each other.
A case of routing Net 1 will be described. The start point of Net 1 is the terminal lOA and the end point thereof is the terminal lOa. In Step S20, the grid where the start point lOA is placed is first put into the list L. Then, searchable grids adjacent to the start point lOA are put into the list Ll. In this example, four grids vertically and hori-zontally adjacent to the start point lOA are put into thelist Ll. At the same time, the search directions indicated by the arrows in Figure 25 are saved. And the four grids in the list Ll are extracted as searchable grids.
Next, in Step S40, every time a single grid has been passed, a wire length cost of "1" is added.
Then, at least one grid having a minimum cost is/are se-lected from the list Ll and inserted into the list L. Since all of the four grids currently present in the list Ll have the same cost of "1", all these four grids are inserted into the list L.
Subsequently, if it is determined that the end point grid lOa has not been reached yet in Step S50, then the proc-ess returns to Step S20. Thereafter, until the end point grid lOa is reached, the same processing steps S20, S40 and S50 are repeatedly performed.
In Figure 25, the numbers in respective grids represent the results obtained by adding the wire length costs.
If it is determined in Step S50 that the end point grid lOa is included in the list L after the same steps have been repeatedly performed several times, then the search direction represented by the arrows in Figure 25 is traced back from the end point grid lOa in Step S60, thereby extracting a wir-ing route 40 having a minimum cost.
The routing results are illustrated in Figure 26(a).
s Figure 26(b) illustrates the results obtained by compacting downward the wires shown in Figure 26(a). By performing com-paction, not only wires but also terminals and a wiring for-bidden region can be moved downward if there are vacant spaces. Thus, the terminals lOA and lOc have been moved down-ward.
In accordance with a conventional method for searchingfor wiring routes, if routing is performed in a wiring region divided into a number of grids and if the number is not suf-ficiently large, then wires already routed sometimes prevent routing. Thus, in order to complete routing, grids should be added from an initial stage or after it is determined that routing cannot be completed and thereby a sufficient number of grids should be secured.
However, if some constraint on height or lateral width is given to a wiring region, the constraint sometimes cannot be satisfied because of such posterior insertion of addition-al grids. An exemplary case will be described with reference to Figures 27 through 29. In the following description, a method for routing and designing a standard cell, applicable to designing an ASIC, will be exemplified.

In Figures 27 through 29, a height constraint 101 is or-dinarily given to a standard cell 100. In the cell 100, tran-sistors 50A, 50B, terminals 10 and power supply lines 60 are present. Herein, even though the cell actually has a multi-layer wiring structure, only wires in the first layer (afirst metal wiring layer 71 for a standard cell) are illus-trated for the sake of simplicity.
In Figure 27, a grid gap 32 is defined by uniformly di-viding the cell by the routing pitch of the first wiring o layer 71. If maze routing is completed on the grids having a uniform routing pitch, then the height constraint on a cell can be automatically satisfied. In other words, in order to complete routing between the transistors 50A and 50B, a gap corresponding to the wires passing therethrough should be provided beforehand between the transistors.
However, it is very difficult to precisely estimate the gap before the routing is performed. In actuality, during routing and designing manually, trials and errors are inevi-table for routing wires and adjusting the gap between tran-sistors simultaneously.
For example, if the gap between the transistors 50A and50B, obtained by pre-routing estimation, is too narrow as shown in Figure 28, then routing fails or cannot be completed because of the shortage in number of grids. As can be seen, the terminals lOA and lOB cannot be routed because of the shortage in number of grids.
In order to solve such a problem, in accordance with a conventional method, grids having a height narrower than the routing pitch, i.e., grids having a gap 32B narrower than an s ordinary gap 32A, are provided between the transistors 50A
and 50B as shown in Figure 29, thereby completing routing.
Thereafter, the gap between the transistors and the gap be-tween the wires are modified through compaction, thereby ob-taining the same results as those illustrated in Figure 27.
lo However, if such grids as having the narrower gap 32B
are inserted as shown in Figure 29, then the number of grids in the height direction increases. Thus, in accordance with such a conventional wiring route search method involving the insertion of narrower grids, the height constraint on the IS cell 100 cannot be satisfied. In the foregoing example, a case where a height constraint cannot be satisfied has been described. A similar problem happens in the same way when a constraint is given on a lateral width.

SUM~L~RY OF THE INVENTION
The first object of the present invention is appropri-ately placing freely movable terminals in accordance with the situations of surrounding wires and thereby obtaining routing results with a higher density for an automatic routing method.

The second object of the present invention is providing a wiring route search method that can always satisfy a con-straint given on height and/or lateral width of a wiring re-gion irrespective of the number of grids included in the wiring region.
In order to accomplish the first object, according to the present invention, the positions of the freely movable terminals are appropriately modified and moved in accordance with the situations of surrounding wires while removing/re-routing is being performed.
And in order to accomplish the second object, the pre-sent invention sets a passage cost as a cost required by a maze algorithm for a column of grids having a height con-straint or a row of grids having a lateral width constraint based on the number of available grids, and adds the passage cost to a wiring route cost.
The automatic routing method of the present invention is a method for routing and designing an LSI. The method includ-es the steps of: a) initial routing of a net; b) removing a wire, which has already been routed and causes a design rule error or a non-routable wire, if the design rule error exists in the wire or the non-routable wire is caused as a result of the step a); and if the wire already routed and removed dur-ing the step b) is a wire interconnecting a movable terminal, freely placeable within a predetermined region, to another terminal, c) displacing the movable terminal within the pre-determined region and re-routing the removed wire such that the displaced movable terminal is interconnected to the another terminal.
s In one embodiment of the present invention, the step a) may include the steps of: d) defining the predetermined re-gion where the movable terminal is placeable; and e) deter-mining an initial position of the movable terminal in the defined, predetermined region.
In another embodiment of the present invention, in the step b), the wire already routed and to be removed is ex-tracted by regarding the number of the movable terminals as an index of evaluation.
In the method of the present invention for searching for a wiring route during automatically routing and designing an LSI, the wiring route is searched for in accordance with a maze algorithm in which a wiring route cost is calculated by adding a cost every time a single grid is passed in a wiring region divided into a plurality of grids. The method includ-es the steps of: a) inputting at least one of a height con-straint and a lateral width constraint of the wiring region and hardwiring information; b) calculating a number of avail-able grids for each column of grids, on which the height con-straint of the wiring region is applied, or each row of grids, on which the lateral width constraint of the wiring region is applied, during routing based on the hardwiring in-formation; and c) setting a passage cost for one of the co-lumns of grids or one of the rows of grids, to which column or row the wiring route to be searched for proceeds, based on S the number of available grids calculated for the column or the row, and adding the passage cost to the wiring route cost.
In one embodiment of the present invention, in the step b), the number of available grids is calculated by subtract-ing a size of a wiring forbidden region in each said columnor row of grids and a total size of wires already assigned to the column or row of grids from the height or lateral width constraint of the wiring region.
In another embodiment of the present invention, in the step c), the passage cost is set based on not only the number of available grids but also a penalty for failing to satisfy the height or lateral width constraint.
In still another embodiment, the method further includes the steps of: e) repeatedly searching for the wiring route if the height or lateral width constraint of the wiring region has not still been satisfied after all the routes have been searched for; and f) changing the penalty for failing to sat-isfy the height or lateral width constraint every time the wiring route is repeatedly searched for.
In accordance with the automatic routing method of the present invention, a wire already routed, causing design rule error or a non-routable wire, is removed. Thereafter, if the removed wire already routed has a movable terminal during re-routing the removed wire, then the position of the movable terminal is appropriately modified, moved and re-routed si-multaneously. As a result of re-routing of the removed wire, a wire satisfying the design rule and having a shortest wire length can be obtained, and the position of the movable ter-minal on the route is an optimum position. Consequently, a large number of nets can be routed with a higher density.
In particular, according to the present invention, since the removed wire is extracted by regarding the number of mov-able terminals as an index of evaluation, a wire having a movable terminal is more likely to be extracted as a wire al-ready routed and to be removed. Since it is highly probableto find another route having a shorter wire length for such a wire having a movable terminal by displacing the movable ter-minal, the routing results can be of an even higher density.
Also, in accordance with the method of the present in-vention for searching for a wiring route during automaticrouting and designing, a wiring route, which is more likely to fail to satisfy the height or lateral width constraint of a wiring region, has a smaller number of available grids, a higher passage cost and a higher wiring route cost. On the other hand, a wiring route, which is less likely to fail to satisfy the constraint, has a larger number of available grids, a lower passage cost and a lower wiring route cost.
Thus, if a wiring route having a lower wiring route cost is selected, then the height or lateral width constraint of a s wiring region can be satisfied irrespective of the number of grids included in the wiring region.
In particular, according to the present invention, if the height or lateral width constraint of a wiring region is still not satisfied after all the routes have been searched for, then the route is repeatedly searched for by gradually increasing the penalty for failing to satisfy the height or lateral width constraint until the constraint is met. Thus, the route of a wire having the largest wiring route cost of all the wires can be changed into the route of another wire having a smaller wiring route cost. Accordingly, the height or lateral width constraint on a wiring region can be satis-fied substantially without depending on the order of routing.

BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a flow chart illustrating the processing procedure of an automatic routing method in the first embodi-ment of the present invention.
Figure 2 is a diagram illustrating the results of ini-tial routing in accordance with the automatic routing method 2s of the first embodiment.

Figure 3 is a diagram illustrating an intermediate stage of the initial routing in accordance with the automatic routing method of the first embodiment.
Figure 4 is a diagram illustrating a preparatory stage s of re-routing in accordance with the automatic routing method of the first embodiment.
Figure 5 is a diagram illustrating an intermediate stage of the re-routing in accordance with the automatic routing method of the first embodiment.
Figure 6 is a flow chart illustrating the processing procedure of an automatic routing method in the second em-bodiment of the present invention.
Figure 7 is a diagram illustrating an intermediate stage of routing in accordance with the automatic routing method of the second embodiment.
Figure 8 is a diagram illustrating the results of re-routing and displacing a terminal in accordance with the automatic routing method of the second embodiment.
Figure 9(a) is a schematic representation of a conven-tional MOSFET; and Figure 9(b) illustrates a specific example of a movableterminal.
Figure lO is a flow chart illustrating the processing procedure of a wiring route search method in the third em-bodiment of the present invention.

Figures ll(a) and ll(b) are a diagram and a table for illustrating how the number of available grids is calculated for a column of grids in accordance with the wiring route search method of the third embodiment.
Figures 12(a) and 12(b) are diagrams illustrating the respective results of the wiring route search performed for a predetermined net on the first and second wiring layers in accordance with the wiring route search method of the third embodiment.
I0 Figure 13(a) is a diagram illustrating a specific exam-ple in which the wiring route of Net 1 is specified in a man-ner based on the results of the wiring route search shown in Figures 12(a) and 12(b); and Figure 13(b) is a diagram illustrating another specific example in which the wiring route of Net 1 is specified in another manner based on the results of the wiring route search shown in Figures 12(a) and 12(b).
Figure 14(a) is a diagram illustrating the results of routing in accordance with the wiring route search method of the third embodiment; and Figure 14(b) is a diagram illustrating the results ob-tained by compacting the results shown in Figure 14(a).
Figure 15 is a flow chart illustrating the processing procedure of a wiring routing search method in the fourth em-2s bodiment of the present invention.

Figure 16 is a diagram with a table for illustrating a problem happening when a penalty for failing to satisfy a height constraint is fixed and the results obtained by routing in the order of Nets 1, 2, 3 and 4.
Figure 17 is a diagram for illustrating the problem and the results obtained by routing in the order of Nets 1, 4, 2 and 3.
Figure 18 is a diagram for illustrating the problem and the results obtained by routing in the order of Nets 4, 1, 2 and 3.
Figure 19 is a diagram with a table for illustrating an intermediate processing stage in which the repetitive number of processes is set at 1 in accordance with the wiring route search method of the fourth embodiment.
Figure 20 is a diagram with a table for illustrating an intermediate processing stage in which the repetitive number of processes is set at 2 in accordance with the wiring route search method of the fourth embodiment.
Figure 21 is a diagram with a table for illustrating an intermediate processing stage in which the repetitive number of processes is set at 3 in accordance with the wiring route search method of the fourth embodiment.
Figure 22 is a graph illustrating how the penalty p changes.
Figure 23 is a graph illustrating the relationship be-tween a repetitive number of processes and a penalty for failing to satisfy a height constraint in accordance with the wiring route search method of the fourth embodiment.
Figure 24 is a flow chart illustrating the processing s procedure of a conventional wiring route search method.
Figure 25 is a diagram illustrating an intermediate processing stage of the conventional wiring route search method.
Figure 26(a) is a diagram illustrating the results of routing in accordance with the conventional wiring route search method; and Figure 26(b) is a diagram illustrating the results ob-tained by compacting the results shown in Figure 26(a).
Figure 27 is a diagram illustrating the results obtained by routing and designing a standard cell using grids uniform-ly divided with a routing pitch in the conventional wiring route search method.
Figure 28 is a diagram illustrating an example in which routing cannot be completed because of shortage in number of grids in the conventional wiring route search method.
Figure 29 is a diagram illustrating an example in which routing is completed by providing grids having a height nar-rower than the routing pitch in the conventional wiring route search method.

DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the preferred embodiments of the present invention will be described with reference to the accompany-ing drawings.

s Figure 1 is a flow chart illustrating the processing procedure of an automatic routing method in the first embodi-ment of the present invention. An automatic routing program, illustrated by this flow chart, is stored in a computer read-able storage medium and used for routing and designing an LSI
by a computer.
In Figure 1, in Step S1, a predetermined region, where a freely placeable terminal (hereinafter, such a terminal will lS be called a "movable terminal~) can be positioned, is defined In this embodiment, the number of wiring layers is assumed to be one for the sake of simplicity. This Step S1 will be de-scribed in detail with reference to Figure 2.
As shown in Figure 2, a wiring region 22 is divided into a large number of grids 31 with a plurality of grid lines 30.
Terminals include movable terminals 10, 10A and fixed termi-nals lla, llB, llb, llC and llc. The numerals in the respec-tive terminals denote the numbers of nets. Net 1 includes the mova~le terminal 10A and the fixed terminal lla. The movable 2s terminal lOA has a size corresponding to one grid. And a mov-able terminal placeable region 20A, having a height corre-sponding to three vertical grids, is defined. Herein, it is assumed that the movable terminal lOA is freely placeable within the movable terminal placeable region 20A. In routing and designing at a transistor level, the movable terminal corresponds to a source/drain terminal of a MOSFET, while the movable terminal placeable region 20A corresponds to a source/drain region. The fixed terminal herein means a non-movable terminal, e.g., a gate terminal or a power supply terminal. Net 2 includes the fixed terminals llB and llb, and Net 3 includes the fixed terminals llC and llc. In Figure 2, a wiring forbidden region 21 exists.
In Figure 1, in Step S2, initial routing is performed and the initial positions of the movable terminals are deter-mined (corresponding to the steps of determining an initialposition and initial routing). In the step of initial rout-ing, respective nets are routed independently in response to a given hardwiring request as in the conventional method.
That is to say, wiring routes are determined without taking design rule errors with other wiring routes into considera-tion. Nevertheless, only intersection and overlap of wires and intersection between a movable terminal and a wire are allowed as design rule errors in this embodiment. Thus, no design rule error is allowed for the fixed terminals and the wiring forbidden region.

In the step of initial routing, a route having a minimum cost is searched for in accordance with the maze search method described in the Background section.
A wiring route cost used for initial routing is given, s for example, by the following Equation 3:
Wiring route cost = aX(wire length) (3) (where a is a parameter) A step of obtaining an initial wiring route for Net 1 includ-ing the movable terminal lOA and the fixed terminal lla shown lo in Figure 2 will be described with reference to Figure 3.
As shown in Figure 3, the fixed terminal lla is marked by a start point mark 50 (S), and three grids 31A, 31B and 31C located in the movable terminal placeable region 20A for the movable terminal lOA are marked by end point marks 51 (T) The numbers 1 to 5 in the grids surrounding the start point mark 50 (S) denote costs 60 taken to reach the respective grids from the grid marked by the start point mark 50 (S) through maze searching. As a result of this maze searching, it can be understood that the grid 3lA out of the three grids marked by the end point marks 51 (T) can be reached with a minimum cost of "5" via a wiring route 40A. Thus, the wiring route 40A is determined as the initial route of Net 1 and the grid 31A is determined as the initial position of the movable terminal lOA.
Next, Net 2 including the two fixed terminals llB and llb is routed. As described above, during initial routing, the design rule error is allowed while obtaining a route hav-ing a minimum cost. Accordingly, a wiring route 40B passing the grid 31A, which is the initial position of the movable terminal lOA, is obtained as shown in Figures 2 and 3.
Subsequently, Net 3 including the two fixed terminals llC and llc is routed. As a result, a wiring route 40C is determined as shown in Figure 2.
In Figure 1, in Step S3, it is determined that the routing process should end if no design rule error exists in the current wires and if no non-routable net exists. In this embodiment, the movable terminal lOA overlaps with the wiring route 40B between Nets 1 and 2, and the wiring routes 40A and 40C overlap with each other between Nets 1 and 3. Since the-se design rule errors exist, the process should not end andproceeds to the next step S4.
In Figure 1, in the next Step S4, obstructive wires and movable terminals, causing design rule errors, are extracted.
Specifically, first, the scores of the respective nets are evaluated. In this embodiment, the scores are determined in accordance with the following Equation 4:
Score of net = aX(number of design rule errors)+bX(re-al wire length/estimated wire length) + c X (number of movable terminals) (4) (where a, b and c are parameters) The first and second terms on the right side of Equation 4 are scores used in the conventional method . The f irst term is used for making a net having a larger number of design rule errors eas ier to remove . On the other hand, the second term is provided based on the prediction that another route is more likely to be found for the more detouring wire. And the third term is characteristic of the present invention and used for evaluating the score of a net by using the number of movable terminals as an index of evaluation . Specif ically, 10 the number of movable terminals is multiplied by the parame-ter c based on the prediction that another route is more likely to be found as the number of movable terminals exist-ing in a net increases.
The scores of Nets 1 to 3 in Figure 2 are calculated as 15 follows. In this example, a, b and c are assumed to be 10, 10 and 3, respectively.
Score of Net 1 = aX5+bX (5/5)+cX1 = 63 Score of Net 2 = aXl+bX(6/6)+cX0 = 20 Score of Net 3 = aX4+bX (7/5)+cX1 = 54 It is determined in the same way as the conventional method whether or not a net should be removed. As a result, only Net 1 having the maximum score is extracted as a wire to be removed.
Subsequently, if there is any movable terminal in the 25 net extracted as the wire to be removed, then the movable terminal is extracted as a candidate terminal to be moved.
In this example, since Net 1 as the wire to be removed has the movable terminal lOA, the terminal 10A iS extracted as a candidate terminal to be moved.
In Figure 1, Step S5 of removing a wire is performed in the same way as the conventional method.
Next, in Step S6, the removed wire is re-routed and the candidate terminal to be moved is displaced (corresponding to the steps of displacing a movable terminal and re-routing), and the process returns to Step S3. This Step S6 will be de-scribed with reference to Figure 4.
In Figure 4, the removed Net 1 is re-routed. The mov-able terminal 10A belonging to Net 1 has had the initial position thereof defined at the grid 31A in Step S2. However, IS the movable terminal 10A has also been extracted as a candi-date terminal to be moved in Step S4. Thus, the current posi-tion of the movable terminal 10A is invalidated, an optimum position is re-selected for the terminal 10A from the movable terminal placeable region 20A and then Net 1 is re-routed based on the optimum position to which the movable terminal has been moved. This re-routing processing step is performed in the following manner.
First, the fixed terminal lla is marked by a start point mark 50 (S). Next, the three grids 31A, 31B and 31C located in the movable terminal placeable region 20A for the movable terminal lOA are marked by end point marks 51 (T).
Then, in accordance with the maze search method de-scribed in the Background section, a route having a minimum cost is searched for.
A wiring route cost used for re-routing is given by the following Equation 5:
Wiring route cost = aX(wire length)+bX(number of des-ign rule errors) (5) (where a and b are parameters) The costs taken to reach the respective grids in accordance with the maze search method (where a =l and b = 10) are shown in Figure 5.
As a result of this maze search, it is found that the grid 31B out of the three grids 31A, 31B and 31C marked by the end point marks 51 can be reached with a minimum cost of "6"
via a wiring route 40a. Accordingly, the wiring route 40a is defined as the re-routing result of Net 1 and the movable ter-minal lOA is moved from the grid 31A as the initial position to the grid 31B.
Next, the process returns to Step S3. If it is deter-mined that the process should not end, Steps S3 through S6 are repeatedly performed.
In this embodiment, the present invention has been de-scribed as being applied to single-layer wiring. Alterna-tively, the present invention is naturally applicable to multilayer wiring consisting of two or more layers if the costs of contacts are taken into consideration as in the con-ventional method.

Figure 6 is a flow chart illustrating the processing procedure of an automatic routing method in the second em-bodiment of the present invention. An automatic routing pro-gram, illustrated by this flow chart, is stored in a computer readable storage medium and used for routing and designing an LSI by a computer.
In Figure 6, in Step Sl, a region where a movable termi-nal can be positioned is defined. In this embodiment, the number of wiring layers is assumed to be one for the sake of simplicity. This embodiment is characterized in that no des-ign rule error such as overlap and intersection of wires is allowed during the routing process. The routing process of this embodiment will be described in detail with reference to Figure 7.
As shown in Figure 7, a wiring region 22 is divided into a large number of grids 31 with a plurality of grid lines 30.
Terminals include a movable terminal lOA and fixed terminals lla, llB, llb, llC and llc. The numerals in the respective terminals denote the numbers of nets. Net l includes the mov-able terminal 10A and the fixed terminal lla. The movable terminal lOA has a size corresponding to one grid. Herein, it is assumed that the movable terminal lOA is freely placeable within the movable terminal placeable region 20A in which three grids 31A, 31B and 31C are located. In routing and des-S igning at a transistor level, the movable terminal corre-sponds to a source/drain terminal, while the movable terminal placeable region 20A corresponds to a source/drain region.
The fixed terminal is, for example, a gate terminal. Net 2 includes the fixed terminals llB and llb, and Net 3 includes lo the fixed terminals llC and llc. In Figure 7, a wiring for-bidden region 21 exists.
In Figure 6, in Step S3, it is determined that the routing process should end if no design rule error exists in the current wires and if no non-routable net exists. In Fig-ure 7, routing of Net 3 cannot be completed because the wireof Net 1 obstructs. Thus, the process should not end and proceeds to the next Step S4.
In Figure 6, in the next Step S4, obstructive wires and movable terminals, causing non-routable wires, are extracted.
In Figure 7, since Net 1 is obstructive for Net 3, Net 1 is extracted as the wire to be removed. Furthermore, if there is any movable terminal in the net extracted as the wire to be removed, then the movable terminal is extracted as a can-didate terminal to be moved. In this example, since Net 1 as the wire to be removed has the movable terminal lOA, the ter-minal 10A is extracted as a candidate terminal to be moved.
The next Step S5 of removing a wire is performed in the same way as the conventional method. Specifically, Net 1 is removed.
Next, in Step S6, the removed wire is re-routed and the candidate terminal to be moved is displaced, and the process returns to Step S3. In Figure 7, Net 1 is removed, Net 3 is routed and then the removed Net 1 is re-routed.
The movable terminal 10A belonging to Net 1 has the ini-lO tial position thereof defined at the grid 31A in the first embodiment. However, the movable terminal 10A has also been extracted as a candidate terminal to be moved in Step S4.
Thus, the current position of the movable terminal 10A is in-validated, an optimum position is re-selected for the termi-15 nal 10A from the movable terminal placeable region 20A and then Net 1 is re-routed based on the optimum position to which the movable terminal has been moved. This re-routing step is performed in the following manner.
First, the fixed terminal lla is marked by a start point 20 mark 50 (S) as shown in Figure 8. Next, two grids 31A and 31C
out of the three grids 31A, 31B and 31C located in the mov-able terminal placeable region 20A for the movable terminal 10A are marked by end point marks 51 (T). This is because the grid 31B is used by the wire of Net 2.
Then, in accordance with the maze search method de-scribed in the Background section, a route having a minimum cost is searched for. A wiring route cost used for re-routing is given by the following Equation 6:
Wiring route cost = aX(wire length) (6) s (where a is a parameter) As a result of this maze search, it is found that the grid 3lC
out of the two grids 31A and 31C marked by the end point marks 51 can be reached with a minimum cost via a route 40a. Accord-ingly, the route 40a is defined as the re-routing result of lo Net 1 and the movable terminal lOA is moved from the grid 31A
as the initial position to the grid 31C.
Next, the process returns to Step S3. And Steps S3 through S6 are repeatedly performed until the process ends.
In Figure 7, since no non-routable net exists, the process ends.
In this embodiment, the gate terminal is regarded as a fixed terminal. This is because it is difficult to form a contact over a gate in accordance with the current fabrica-tion technologies and because it is only possible to extend the gate electrode from the position of the gate terminal 85 shown in Figures 9(a) and 9(b). Thus, should the progress in fabrication technologies such as that disclosed in Japanese Patent Application No. 7-048063 make it possible to extend a gate electrode from any arbitrary position in the gate region 80 in the future, then the gate terminal will be able to be treated as a movable terminal.
In the first and second embodiments, automatic routing in accordance with a maze search method has been described.
However, the present invention is not limited thereto, but encompasses automatic routing in accordance with other route search methods.

Figure lO is a flow chart illustrating the processing procedure of a wiring route search method in the third em-bodiment of the present invention. A wiring route search program, illustrated by this flow chart, is stored in a com-puter readable storage medium and used for routing and des-igning an LSI or the like by a computer.
First, in Step SlOl, a height constraint on a wiring re-gion and hardwiring information are input. The height con-straint and hardwiring information will be described in detail with reference to Figures ll(a) and ll(b).
As shown in Figure ll(a), a wiring region 20 is divided into a large number of grids 30. In the wiring region 20, terminals lOA, lOa, lOB, lOb, lOC and lOc and a wiring forbid-den region 2l exist. A height constraint lOl of "4" (i.e., the number of vertical grids is four) is given to the wiring re-gion. Herein, two wiring layers, i.e., first and second wir-2s ing layers, are assumed to exist.

Figure ll(a) illustrates the wiring region in the first wiring layer. The numerals in the terminals lOA, lOa, lOs, lOb, lOC and lOc denote the numbers of nets and three pairs of terminals, each having the same net number, should be hard-wired. In Figure ll(a), a case where Nets 2 and 3 have alreadybeen routed and Net l is yet to be routed will be described.
The start point of Net l is the terminal lOA and the end point thereof is the terminal lOa.
Step Sl02 of extracting searchable grids is performed in the same way as Step S20 of the conventional method.
Hereinafter, Step Sl03 of calculating the number of available grids for a column of grids (corresponding to the step of calculating the number of available grids) shown in Figure lO will be described with reference to Figures ll(a) and ll(b).
The number of available grids is defined for a column of grids by the following Equation 7:
Number of available grids for column of grids = (height constraint on wiring region)-(height of wiring forbidden region)-(height of regions occupied by wires) ....... (7) In Figure ll(a), the numbers of available grids are calculat-ed for columns of grids No. 5, 6 and lO in the wiring region 20 in the first wiring layer with respect to Net l.
In the column of grids No. 5, the terminal lOC of Net 3 exists. Herein, the size of the terminal is assumed to be "1". Since the terminal lOC of Net 3 is a wiring forbidden region for Net 1, the number of available grids for this co-lumn of grids is "3" (= 4-1-0).
In the column of grids No. 6, a wiring forbidden region having a height of "2", the terminal lOB of Net 2 and a hori-zontal wire of Net 3 exist. The size of the terminal and the height of a region occupied by a single wire are each assumed to be "1". Since the terminal lOB of Net 2 is a wiring for-bidden region for Net 1, the number of available grids for this column of grids is "0" (= 4-3-1).
In the column of grids No. 10, the terminal lOa of Net 1, the terminal lOb of Net 2 and a vertical wire of Net 2 exist.
The terminal lOa of Net 1 is not a wiring forbidden region for Net 1. The terminal lOb of Net 2 is a wiring forbidden region for Net 1 and the size of the terminal is assumed to be "1". Since the length of the vertical wire of Net 2 is "2", the number of available grids of the column No. 10 is "1" (=
4-1-2).
The numbers of available grids that are calculated in a similar manner for the remaining columns of grids Nos. 1 to 4, 7 to 9, and 11 are shown in Figure ll(b). As for the second wiring layer, the numbers of available grids for columns of grids can be calculated in the same manner. Since no termi-nals and no wiring forbidden regions exist in the second wir-ing layer, the number of available grids is "4" in all the columns of grids.
In Figure 10, in Step S104, when route search advances to one of the searchable grids extracted in Step S102, a grid column passage cost is added to the column of grids, to which the searchable grid belongs, based on the number of available grids calculated for the column of grids in Step S103.
A grid column passage cost when a column of grids having the number of available grids of "S" is passed is defined by the following Equation 8:
lo Grid column passage cost = 100 (if S-<0) Grid column passage cost = 0 (if S>0) (8) It is noted that the grid column passage cost when S -<0 may be such a high value as enabling the selection of other wir-ing routes and is not limited to "100".
Step S105 of determining whether or not an end point has been reached and Step S106 of selecting a route having a minimum cost are the same as Steps S50 and S60 of the conven-tional method, respectively.
Then, Steps S102 through S105 are repeatedly performed until the end-point grid lOa is reached.
Figures 12(a) and 12(b) illustrate the results of wiring route search for Net 1. In the respective grids, each value in the first term represents the sum of a wire length cost and a contact cost, and each value in the second term repre-sents a grid column passage cost. For example, as for the in-dications "4+100" and "15+100" in Figure 12(a), "4" and "15"
represent the sums of costs in the first terms and "100" rep-resents the grid column passage costs. As for the grids hav-ing the second term of "0", only the first terms are S indicated. In Figures 12(a) and 12(b), the signs a through k and A through E denote abscissas and ordinates, respectively.
The wire length cost is determined in the same way as described in the Background section. The contact cost has al-so been frequently used conventionally and is described in the document cited in the Background section. In this embodi-ment, every time one contact is produced, a cost "5" is added The search results shown in Figures 12(a) and 12(b) will be described in detail below. For example, if Net 1 is rout-ed as shown in Figure 13(a), then the routing cost is "117".
On the other hand, if Net 1 is routed as shown in Figure 13(b), then the routing cost is "17". This difference in costs results from the following fact. Since the grid column passage cost of "100" is given to the grid belonging to the column of grids No. 7 in the first wiring layer and having coordinates (g, A) (see Figure 11), a contact is disposed in the grid having the coordinates (g, A) in the wiring route shown in Figure 13(a), but is not disposed in the grid in the wiring route shown in Figure 13(b).
Next, when the end-point terminal lOa is reached, the search routes shown in Figures 12(a) and 12(b) are traced 3s back from the end-point terminal lOa in Step S106, thereby extracting a wiring route 40 having a minimum cost. The search directions are indicated by arrows, open circles and hatched circles. The non-hatched, open circles indicate the s search directions from the first wiring layer 71 to the sec-ond wiring layer 72. The hatched circles indicate the oppo-site search directions.
The results of routing are shown in Figure 14(a). The wiring route 40 having a minimum wiring route cost for Net 1 changes from the first wiring layer 71 to the second wiring layer 72 at a contact 80A and then changes from the second wiring layer 72 to the first wiring layer 71 at a contact 80B
The results obtained by compacting the results shown in Figure 14(a) are shown in Figure 14(b). It can be understood lS that the height constraint 101 is satisfied.

Figure 15 is a flow chart illustrating the processing procedure of a wiring route search method in the fourth em-bodiment of the present invention. A wiring route search pro-gram, illustrated by this flow chart, is stored in a computer readable storage medium and used for routing and designing an LSI or the like by a computer.
In Figure 15, in Step S100, a penalty p for failing to 2s satisfy a height constraint (i.e., a cost when a crowded re-gion is passed), which is subsequently used in Step S300 of searching for a wiring route, is initialized. And a predeter-mined number of height constraint errors, which is subse-quently used for Step S400 of determining whether or not the s process should end, is also initialized at "O".
In Step S200, the penalty p is changed. The penalty p is increased as Step S200 through S400 are repeatedly performed a larger number of times. That is to say, at the initial stage of repetition, the penalty p is set at a small value. And as the number of times of repetition increases, the penalty p is increased.
Next, in Step S300, a wiring route search is performed on all the nets. The processing flow of Step S300 is the same as that illustrated in Figure 10.
In Step S4 of adding a grid column passage cost, the grid column passage cost for a case of passing a column of grids having a number of available grids S is defined by the following Equation 9 using the penalty p:
Grid column passage cost = p (if S-O) Grid column passage cost = O (if S>O) (9) In Step S400, it is determined whether or not the number of height constraint errors has become equal to or smaller than a predetermined value in every column of grids in each layer. If the numbers are all equal to or smaller than the predetermined value, then the routing process ends. On the other hand, if any number exceeds the predetermined value, then the process returns to Step S200. Since the predeter-mined number of the height constraint errors is set at "0" in Step S100, Steps S200 through S400 are repeatedly performed until there is no height constraint error.
In the following description, the wiring route cost is calculated using the wire length, the number of contacts and the grid column passage cost as represented by the following Equation 10:
Wiring route cost = aX(wire length)+bX(number of con-tacts)+pX (number of times grid columns with no avail-able grids have been passed) (10) (where a and b are parameters) Next, before a specific example of this embodiment is described, it will be discussed with reference to Figures 16 through 18 what types of problems happen if the penalty p is fixed at a large value.
Figures 16 through 18 illustrate the problems happening when Nets 1 to 4 are routed using first and second wiring layers and applying a height constraint 101 corresponding to two wires (or two grids) to each layer. It is herein assumed that terminals and a wiring forbidden region 21 are present in the first layer.
In Equation 10, the parameter a is set at 1 and 2 for the first and second wiring layers, respectively. The parame--ter b is set at 5. And the penalty p is fixed at 100, which is sufficiently larger than the parameters a and b.
The results of routing in the order of Nets 1, 2, 3 and 4 are illustrated in Figure 16. The wiring route costs of the S respective nets are as follows.
Nets 1, 2 and 3: lX4 (wire length in first layer) = 4 Net 4: 2xlO (wire length in second layer)+5X2 (number of contacts) = 30 Thus, the sum of the wiring route costs of all the nets is 42 The results of routing in the order of Nets 1, 4, 2 and 3 are illustrated in Figure 17. The wiring route costs of the respective nets are as follows.
Net 1: lX4 (wire length in first layer) = 4 Nets 2 and 3: 2 X2 (wire length in second layer) + 5 X2 (number of contacts) = 14 Net 4: 1 X 8 (wire length in first layer) + 2 X 4 (wire length in second layer)+5X2 (number of contacts) = 26 Thus, the sum of the wiring route costs of all the nets is 58 The results of routing in the order of Nets 4, 1, 2 and 3 are illustrated in Figure 18. The wiring route costs of the respective nets are as follows.
Nets 1, 2 and 3: 2X2 (wire length in second layer)+5X2 (number of contacts) = 14 Net 4: lX12 (wire length in first layer) = 12 Thus, the sum of the wiring route costs of all the nets is 54 All the results shown in Figures 16 through 18 satisfy the height constraint. Of these results, those shown in Fig-ure 16 in which the sum of the wiring route costs of all the nets is the minimum are better than the results shown in Fig-ures 17 and 18. As can be understood, if the penalty p isfixed at a large value, the results of routing greatly depend on the order of routing, and the cost does not always become minimum in all types of routing.
Next, a specific example of this embodiment will be de-scribed with reference to Figures 19 through 21.
First, in Step S100, the initial value of the penalty p, which is to be used in Step S104 as one of the processing steps of Step S300, is set at "0". And the predetermined num-ber of height constraint errors used in Step S400 is also set at "0'~.
The order of routing is defined as Nets 4, 1, 2 and 3.
In Equation 10, the parameter a is set at 1 and 2 for the first and second wiring layers, respectively, while the parameter b is set at 5. In the following description, a re-petitive number is defined as a number representing how manytimes Steps S200 through S400 shown in Figure 15 are passed (or repeated).
Figure 19 illustrates a case where the repetitive number is 1. The penalty p remains the same as the initial value of 2s 0. In such a case, Equation 10 is modified as:

/lo Wiring route cost = 1 X (wire length) + 5 X (number of con-tacts) (lOa) Then, the wiring routes, in which the wiring route costs for the respective nets are given by:
S Nets 1, 2 and 3: lX4 (wire length in first layer) = 4 Net 4: lx12 (wire length in first layer) = 12 can be obtained. Since the penalty p is set at O in this case, the results of routing do not satisfy the height con-straint. In Figure 19, a number of available grids having a negative value (-1) means that the height constraint is not satisfied.
Figure 20 illustrates a case where the repetitive number is 2. In Step S200, the penalty p is changed into 1. In such a case, Equation 10 is modified as:
lS Wiring route cost = lX(wire length)+5X(number of con-tacts) +lX(number of times grid columns with no avail-able grids have been passed) (lOb) The number of times grid columns with no available grids have been passed for Nets 4, 1, 2 and 3 are "9", "3", "3" and "3", respectively. Since the costs regarding the formation of con-tacts are higher than the grid column passage costs, the routes are not changed and the same results as those illus-trated in Figure 19 are obtained. The wiring route costs of the respective nets are as follows:
Nets 1, 2 and 3: lX4 (wire length in first layer)+lX3 (number of times grid columns with no available grids have been passed) = 7 Net 4: lX12 (wire length in first layer)+lX9 (number of times grid columns with no available grids have been s passed) = 21 Figure 21 illustrates a case where the repetitive number is 3. In Step S200, the penalty p is changed into 3. As for Net 4, the wiring route cost of the same route as that shown in Figure 19 is:
Net 4: lX12 (wire length in first layer)+3 X9 (number of times grid columns with no available grids have been passed) = 39 As shown in Figure 21, since the cost of a wiring route, which uses two contacts and the second wiring layer and is given by:
Net 4: 2 X10 (wire length in first layer)+5X2 (number of times grid columns with no available grids have been passed) = 30 is smaller, the route is changed into that illustrated in Figure 21. As for Nets 1, 2 and 3, the wiring route cost is:
Nets 1, 2 and 3: lX4 (wire length in first layer) = 4 that is, the same minimum cost as that of the route illus-trated in Figure 19. Thus, the route is not changed.
When the number of height constraint errors becomes "0~
by repeatedly performing these processing steps, the process ends.
As can be understood, by repeatedly performing re-routing without changing the order of routing for nets and with the penalty p gradually increased (see Figure 22), wir-S ing routes resulting in the minimum sum of wiring route costscan be found in consideration of both the cost when a crowded region is passed and the cost when a contact is produced. As a result, all the wires can be routed with a small penalty p.
The smaller the penalty p is, the more satisfactory routing results can be attained with the smaller degree of dependence on the order of routing for the nets. In this embodiment, re-sults of routing, in which the number of overall contacts is the smallest and the height constraint is also satisfied, can be obtained without any dependence on the order of routing.
The penalty p for failing to satisfy the height con-straint may be changed in any other arbitrary way than that exemplified in this embodiment. For example, as represented by the following Equation 11, the penalty p may be changed in proportion to a repetitive number i Steps S200 through S400 are repeatedly performed.
Penalty p = (l-exp (i))X100 (11) Figure 23 illustrates this Equation 11 as a graph.
In this embodiment, the penalty p is gradually increased from a smaller value to a larger value. Alternatively, the penalty may be gradually decreased from a larger value to a smaller value.
Also, in this embodiment, Step S300 of searching for a wiring route is repeatedly performed for all the nets. Al-ternatively, the same results can be attained if the step of s searching for the wiring route is selectively performed only for some of the nets causing the height constraint errors.
In the first and fourth embodiments, a height constraint in the vertical direction is given. Alternatively, the pre-sent invention is also applicable to a case of giving a lat-eral width constraint in the horizontal direction, which canbe satisfied by calculating the numbers of available grids for rows of grids in the horizontal direction.

Claims

WHAT IS CLAIMED IS:

1. An automatic routing method for routing and designing an LSI, the method comprising the steps of:
a) initial routing of a net;
b) removing a wire already routed, causing a design rule error or a non-routable wire, if the design rule error exists in the wire or the non-routable wire is caused as a result of the step a); and if the wire already routed and removed during the step b) is a wire interconnecting a movable terminal, freely placeable within a predetermined region, to another terminal, c) displacing the movable terminal within the predetermined region and re-routing the removed wire such that the displaced movable terminal is interconnected to the another terminal.

2. The method of Claim 1, wherein the movable terminal is a source/drain terminal of a MOSFET.

3. The method of Claim 1, wherein in the predetermined region where the movable terminal is placed, an area where the movable terminal is placed and the other areas of the region are all routable areas.

4. The method of Claim 1, wherein the step a) comprises the steps of:
d) defining the predetermined region where the movable terminal is placeable; and e) determining an initial position of the movable terminal in the defined, predetermined region.

5. The method of Claim 1, wherein in the step b), the wire already routed and to be removed is extracted by regarding the number of the movable terminals as an index of evaluation.

6. The method of Claim 1, wherein the step a) is performed without taking the design rule error caused with other wires into consideration.

7. The method of Claim 1, wherein the step a) is performed without allowing the design rule error to happen with other wires.

8. A storage medium in which an automatic routing program for routing and designing an LSI by using a computer is stored, wherein initial routing of a net is performed, and wherein if a design rule error exists in a wire already routed or a non-routable wire is caused as a result of initial routing, the wire already routed, causing the design rule error or the non-routable wire, is removed, and wherein if the wire already routed and removed is a wire interconnecting a movable terminal, freely placeable within a predetermined region, to another terminal, then the movable terminal is displaced within the predetermined region and the removed wire is re-routed such that the displaced movable terminal is interconnected to the another terminal.

9. The storage medium of Claim 8, wherein the movable terminal is a source/drain terminal of a MOSFET.

10. The storage medium of Claim 8, wherein in the predetermined region where the movable terminal is placed, routing and re-routing are performed by regarding an area where the movable terminal is placed and the other areas of the region as routable areas.

11. The storage medium of Claim 8, wherein during initial routing, the predetermined region where the movable terminal is placeable is defined and an initial position of the movable terminal in the defined, predetermined region is determined.

12. The storage medium of Claim 8, wherein when the wire is removed, the wire already routed and to be removed is extracted by regarding the number of the movable terminals as an index of evaluation.

13. A method for searching for a wiring route during automatically routing and designing an LSI in accordance with a maze algorithm in which a wiring route cost is calculated by adding a cost every time a single grid is passed in a wiring region divided into a plurality of grids, the method comprising the steps of:
a) inputting at least one of a height constraint and a lateral width constraint of the wiring region and hardwiring information;

b) calculating a number of available grids for each column of grids, on which the height constraint of the wiring region is applied, or each row of grids, on which the lateral width constraint of the wiring region is applied, during routing based on the hardwiring information; and c) setting a passage cost for one of the columns of grids or one of the rows of grids, to which column or row the wiring route to be searched for proceeds, based on the number of available grids calculated for the column or the row, and adding the passage cost to the wiring route cost.

14. The method of Claim 13, wherein in the step b), the number of available grids is calculated by subtracting a size of a wiring forbidden region in each said column or row of grids and a total size of wires already assigned to the column or row of grids from the height or lateral width constraint of the wiring region.

15. The method of Claim 13 or 14, further comprising the step of d) extracting a wiring route having a minimum wiring route cost.

16. The method of Claim 13 or 14, wherein in the step c), the passage cost is set based on not only the number of available grids but also a penalty for failing to satisfy the height or lateral width constraint.

17. The method of Claim 16, further comprising the steps of:

e) repeatedly searching for the wiring route if the height or lateral width constraint of the wiring region has not still been satisfied after all the routes have been searched for; and f) changing the penalty for failing to satisfy the height or lateral width constraint every time the wiring route is repeatedly searched for.

18. The method of Claim 17, wherein in the step f), the penalty is gradually changed from a smaller value to a larger value.

19. A storage medium, in which a program for searching for a wiring route during automatically routing and designing an LSI in accordance with a maze algorithm is stored, a wiring route cost being calculated by adding a cost every time a single grid is passed in a wiring region divided into a plurality of grids, wherein at least one of a height constraint and a lateral width constraint of the wiring region and hardwiring information are input, and wherein the number of available grids is calculated for each column of grids, on which the height constraint of the wiring region is applied, or each row of grids, on which the lateral width constraint of the wiring region is applied, during routing based on the hardwiring information, and wherein a passage cost is set for one of the columns of grids or one of the rows of grids, to which column or row the wiring route to be searched for proceeds, based on the number of available grids calculated for the column or the row, and is added to the wiring route cost.

20. The storage medium of Claim 19, wherein the number of available grids is calculated by subtracting a size of a wiring forbidden region in each said column or row of grids and a total size of wires already assigned to the column or row of grids from the height or lateral width constraint of the wiring region.

21. The storage medium of Claim 19 or 20, wherein a wiring route having a minimum wiring route cost is extracted after a wiring route cost from a start point terminal to an end point terminal has been calculated.

22. The storage medium of Claim 19 or 20, wherein the passage cost is set based on not only the number of available grids but also a penalty for failing to satisfy the height or lateral width constraint.

23. The storage medium of Claim 22, wherein the wiring route is repeatedly searched for if the height or lateral width constraint of the wiring region has not still been satisfied after all the routes have been searched for, and wherein the penalty for failing to satisfy the height or lateral width constraint is changed from a smaller value to a larger value every time the wiring route is repeatedly searched for.