CA2308211A1 - Composite trellis system and method - Google Patents

Composite trellis system and method Download PDF

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Publication number
CA2308211A1
CA2308211A1 CA002308211A CA2308211A CA2308211A1 CA 2308211 A1 CA2308211 A1 CA 2308211A1 CA 002308211 A CA002308211 A CA 002308211A CA 2308211 A CA2308211 A CA 2308211A CA 2308211 A1 CA2308211 A1 CA 2308211A1
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CA
Canada
Prior art keywords
signal
phase
trellis
received signal
trellis diagram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002308211A
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French (fr)
Other versions
CA2308211C (en
Inventor
Ronald J. Huff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commscope Technologies LLC
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Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2308211A1 publication Critical patent/CA2308211A1/en
Application granted granted Critical
Publication of CA2308211C publication Critical patent/CA2308211C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6325—Error control coding in combination with demodulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03203—Trellis search techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
    • H04L2025/03375—Passband transmission
    • H04L2025/03401—PSK
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0024—Carrier regulation at the receiver end
    • H04L2027/0026—Correction of carrier offset
    • H04L2027/0038—Correction of carrier offset using an equaliser
    • H04L2027/0042—Correction of carrier offset using an equaliser the equaliser providing the offset correction per se

Abstract

This invention provides means for pro-cessing a received digitally-modulated carrier signal to coherently demodulate or, for some applications, coherently demodulate and de-code said signal when the signal's phase has an undesired component and/or to generate successive estimated values of said undesired phase of the received signal. The signal pro-cessed is partially represented by a compos-ite trellis diagram formed by combining mul-tiple component trellis diagrams which are phase-displaced versions of a root trellis di-agram. Desired variations in signal param-eter values that result from modulating the signal effect transitions between states within the root trellis diagram. For some embod-iments of this invention, transitions between states within different component trellis dia-grams for which phase values are proximate, trellis coupling transitions, are incorporated into the composite trellis diagram in a periodic manner to accommodate undesired variations in the received signal's phase for which the rate of change in phase is adequately small rel-ative to the modulation rate but not otherwise restricted. The received signal is processed in accord with the composite trellis diagram through appropriate application of the Viterbi maximum likelihood processing algorithm or any sub-optimum variant, derivative or counterpart thereof. A demodulated data sequence and/or a sequence of estimated values of the received signal's phase are derived from appropriately structured path history values generated for the multiple states in the composite trellis diagram.
The received signal processed may have a continuous envelope or may be comprised of a succession of non-overlapping signal bursts which originate at one or more transmit locations as in a TDMA system.
CA002308211A 1997-10-30 1998-10-29 Composite trellis system and method Expired - Fee Related CA2308211C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/961324 1997-10-30
US08/961,324 US5974091A (en) 1997-10-30 1997-10-30 Composite trellis system and method
PCT/US1998/023124 WO1999023779A2 (en) 1997-10-30 1998-10-29 Composite trellis system and method

Publications (2)

Publication Number Publication Date
CA2308211A1 true CA2308211A1 (en) 1999-05-14
CA2308211C CA2308211C (en) 2003-12-16

Family

ID=25504329

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002308211A Expired - Fee Related CA2308211C (en) 1997-10-30 1998-10-29 Composite trellis system and method

Country Status (11)

Country Link
US (1) US5974091A (en)
EP (2) EP1130787A2 (en)
JP (1) JP2001522194A (en)
AU (1) AU1293099A (en)
BR (1) BR9813354A (en)
CA (1) CA2308211C (en)
DE (1) DE69803351T2 (en)
ES (1) ES2170989T3 (en)
IL (1) IL135731A (en)
MX (1) MXPA00004141A (en)
WO (1) WO1999023779A2 (en)

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US6373858B1 (en) * 1997-04-21 2002-04-16 Hughes Electronics Corporation Burst format and associated signal processing to improve frequency and timing estimation for random access channels
US6339624B1 (en) * 1997-08-19 2002-01-15 Stanford Telecommunications, Inc. Trellis decoding with multiple symbol noncoherent detection and diversity combining
US6477208B1 (en) * 1997-10-30 2002-11-05 Comtier Composite trellis system and method
JP3185867B2 (en) * 1997-11-28 2001-07-11 日本電気株式会社 Error detection method and device, signal demodulation method and device
US6421399B1 (en) * 1998-03-05 2002-07-16 Agere Systems Guardian Corporation Frequency and phase estimation for MPSK signals
US6738949B2 (en) * 1998-05-13 2004-05-18 Matsushita Electric Industrial Co., Ltd. Error correction circuit and error correction method
US7277506B1 (en) * 1999-08-09 2007-10-02 Broadcom Corporation Maximum likelihood sequence estimator which computes branch metrics in real time
US6680980B1 (en) * 1999-09-03 2004-01-20 Infineon Technologies North America Corp. Supporting ME2PRML and M2EPRML with the same trellis structure
US6654921B1 (en) * 1999-10-15 2003-11-25 Cisco Technology, Inc. Decoding data from multiple sources
US7499507B2 (en) * 1999-12-03 2009-03-03 Broadcom Corporation Synchronization module using a Viterbi slicer for a turbo decoder
US6560749B1 (en) * 2000-01-28 2003-05-06 Nec Electronics, Inc. Apparatus and method for implementing a decoder for convolutionally encoded symbols
US6622283B1 (en) * 2000-01-28 2003-09-16 Nec Electronics, Inc. Digital signal processor decoding of convolutionally encoded symbols
US6484285B1 (en) * 2000-02-07 2002-11-19 Ericsson, Inc. Tailbiting decoder and method
US6665832B1 (en) * 2000-03-31 2003-12-16 Qualcomm, Incorporated Slotted mode decoder state metric initialization
US6795511B1 (en) * 2000-09-27 2004-09-21 Storage Technology Corporation Method for reducing the sensitivity of a maximum likelihood detection trellis to channel variations
US7113555B2 (en) * 2002-10-15 2006-09-26 International Business Machines Corporation Data channel with joint data estimation and timing recovery
CA2504648C (en) * 2002-11-27 2008-08-12 Research In Motion Limited Method and system for applying viterbi type psk demodulation for optimum correlation of gps signals
DE10342361B3 (en) * 2003-09-12 2005-04-21 Infineon Technologies Ag Demodulation of a frequency-modulated received signal by means of a two-stage path selection in a trellis diagram
KR100896684B1 (en) 2004-01-27 2009-05-14 삼성전자주식회사 Digital broadcasting transmission/reception capable of improving receiving performance and signal processing method thereof
KR100692596B1 (en) 2004-05-06 2007-03-13 삼성전자주식회사 Digital broadcasting transmission/reception capable of improving receiving performance and signal processing method thereof
JP4432781B2 (en) * 2005-01-17 2010-03-17 株式会社日立製作所 Error correction decoder
US7680180B2 (en) * 2005-12-20 2010-03-16 Yuwei Zhang Decision feedback equalization with composite trellis slicer
US20070266303A1 (en) * 2006-04-27 2007-11-15 Qualcomm Incorporated Viterbi decoding apparatus and techniques
US8259866B2 (en) * 2008-01-04 2012-09-04 Qualcomm Incorporated Decoding scheme using A-priori information about transmitted messages
US8259867B2 (en) * 2008-01-04 2012-09-04 Qualcomm Incorporated Methods and systems for turbo decoding in a wireless communication system
US8731032B2 (en) * 2010-10-12 2014-05-20 Electronics And Telecommunications Research Institute Communication apparatus for continuous phase modulation signal
KR102043023B1 (en) * 2012-11-09 2019-11-12 삼성전자주식회사 Method and apparatus for generating and recovering multiple-access signal in communication system
US9077501B1 (en) * 2013-05-03 2015-07-07 Marvell International Ltd. Systems and methods for detecting cycle slip and/or framing error
CN109480815B (en) * 2018-12-29 2021-10-29 出门问问信息科技有限公司 Heart rate measuring method and device
CN113055327B (en) * 2019-12-26 2022-11-29 鹤壁天海电子信息系统有限公司 Signal demodulation method and device and signal demodulator
CN113973037A (en) * 2020-07-24 2022-01-25 晶晨半导体(上海)股份有限公司 Demodulation method, apparatus, device and computer readable storage medium
US20210117359A1 (en) * 2020-12-24 2021-04-22 Krishna Kumar Nagar User Signals for Data Transmission Over a Bus Interface Protocol

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US4578800A (en) * 1982-07-12 1986-03-25 Yutaka Yasuda Synchronization circuit for a Viterbi decoder
US5303263A (en) * 1991-06-25 1994-04-12 Oki Electric Industry Co., Ltd. Transmission channel characteristic equalizer
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Also Published As

Publication number Publication date
BR9813354A (en) 2000-08-22
AU1293099A (en) 1999-05-24
EP0913950B1 (en) 2002-01-02
WO1999023779A2 (en) 1999-05-14
DE69803351D1 (en) 2002-02-28
CA2308211C (en) 2003-12-16
EP1130787A2 (en) 2001-09-05
IL135731A0 (en) 2001-05-20
IL135731A (en) 2004-05-12
EP0913950A3 (en) 1999-09-08
MXPA00004141A (en) 2003-08-01
EP0913950A2 (en) 1999-05-06
WO1999023779A3 (en) 1999-07-15
US5974091A (en) 1999-10-26
JP2001522194A (en) 2001-11-13
DE69803351T2 (en) 2002-08-14
ES2170989T3 (en) 2002-08-16

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