CA2483107A1 - Rf power amplifier employing bias circuit topologies for minimization of rf amplifier memory effects - Google Patents

Rf power amplifier employing bias circuit topologies for minimization of rf amplifier memory effects Download PDF

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Publication number
CA2483107A1
CA2483107A1 CA002483107A CA2483107A CA2483107A1 CA 2483107 A1 CA2483107 A1 CA 2483107A1 CA 002483107 A CA002483107 A CA 002483107A CA 2483107 A CA2483107 A CA 2483107A CA 2483107 A1 CA2483107 A1 CA 2483107A1
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CA
Canada
Prior art keywords
amplifier
power supply
coupled
active
supply connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002483107A
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French (fr)
Other versions
CA2483107C (en
Inventor
Ahmad Khanifar
Nikolai Maslennikov
Gareth Spiller
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Intel Corp
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Individual
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Publication of CA2483107A1 publication Critical patent/CA2483107A1/en
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Publication of CA2483107C publication Critical patent/CA2483107C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H03F1/3229Modifications of amplifiers to reduce non-linear distortion using feed-forward using a loop for error extraction and another loop for error subtraction
    • H03F1/3235Modifications of amplifiers to reduce non-linear distortion using feed-forward using a loop for error extraction and another loop for error subtraction using a pilot signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/60Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/12A bias circuit for some stages being shown using transmission lines
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/15Indexing scheme relating to amplifiers the supply or bias voltage or current at the drain side of a FET being continuously controlled by a controlling signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/451Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3209Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion the amplifier comprising means for compensating memory effects
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3224Predistortion being done for compensating memory effects

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

An RF power amplifier (10) having reduced memory effects is disclosed. This is achieved by a novel design of the DC supply feed network (26) to achieve low impedance across video frequencies, whilst maintaining the correct RF output matching. One or more transmission zeros are provided in the bias circuit transfer function, which are positioned in the video bandwidth so as to provide low and relatively constant impedance across the video bandwidth.
Also, a parallel Dc feed line (68, 69) may be employed to reduce impedance across the video bandwidth. The reduction in memory effects allows improved performance of predistortion linearization techniques and an implementation in a feed forward amplifier (110) employing predistortion linearization is also disclosed.

Claims (28)

1. An RF amplifier, comprising:
an input receiving an RF input signal;
an active amplifier device receiving and amplifying the input signal to provide an output, the active amplifier device having a power supply connection;
and a bias circuit coupled between a DC power supply and the active amplifier device power supply connection, the bias circuit comprising an RF blocking inductance, a first set of decoupling capacitors coupled in a parallel configuration to a ground connection and configured between the DC power supply and the RF
blocking inductance, and a second set of one or more decoupling capacitors coupled to a ground connection and configured between the active device power supply connection and the RF blocking inductance.
2. An RF amplifier as set out in claim 1, wherein said RF blocking inductance comprises a printed conductive line having an impedance at least ten times the device output impedance.
3. An RF amplifier as set out in claim 1, wherein said bias circuit further comprises an RF shunt capacitor coupled to a ground connection to form an RF parallel-resonant circuit with said second set of one or more decoupling capacitors.
4. An RF amplifier as set out in claim 3, wherein said shunt capacitor has a capacitance of about 0.5 - 5 pF.
5. An RF amplifier as set out in claim 1, wherein said second set of one or more decoupling capacitors comprises a capacitor having a capacitance of about 0.1 -µF.
6. An RF amplifier as set out in claim 1, wherein said second set of one or more decoupling capacitors comprises first and second capacitors coupled in parallel to a ground connection.
7. An RF amplifier as set out in claim 6, wherein said first and second capacitors have different capacitances selected in the range of about 0.1 - 1 µF.
8. An RF amplifier as set out in claim 7, wherein said first capacitor has a capacitance of about 0.1 µF and said second capacitor has a capacitance of about 1 µF.
9. An RF amplifier as set out in claim 1, wherein active amplifier device comprises an LDMOS transistor and wherein said power supply connection comprises a drain contact.
10. An RF amplifier as set out in claim 2, wherein said RF blocking inductance further comprises a capacitor coupled to the line at a spacing of one sixteenth to one quarter wavelength of the RF input signal from said device power supply connection and having a capacitance acting as a short to ground at the frequency of the RF input signal.
11. An RF amplifier as set out in claim 3, further comprising an output impedance matching circuit coupled to the output of the active amplifier device and wherein said RF shunt capacitor is incorporated as part of said output matching circuit in the form of a lumped or distributed component.
12. An RF amplifier as set out in claim 1, further comprising an input impedance matching circuit coupled between the input of the amplifier and the active amplifier device.
13. An RF amplifier, comprising:
an input receiving an RF input signal comprising an RF carrier and a modulation signal having a modulation bandwidth of at least 5 MHz;
an active amplifier device receiving and amplifying the input signal to provide an output, the active amplifier device having a power supply connection;
and a bias circuit coupled between a DC power supply and the active amplifier device power supply connection, the bias circuit comprising a network of circuit elements having an impedance versus frequency response having plural minima spaced across the modulation bandwidth and an impedance at said RF carrier frequency at least ten times the output impedance of said active amplifier device.
14. An RF amplifier as set out in claim 13, wherein said network of circuit elements comprises plural decoupling capacitors having series resonances at frequencies spaced over the modulation bandwidth.
15. An RF amplifier as set out in claim 14, wherein at least one of said plural decoupling capacitors comprises a surface mount capacitor.
16. An RF amplifier as set out in claim 14, wherein said network of circuit elements further comprises a transmission line coupled to the active amplifier device power supply connection and an RF short capacitor coupled to ground and to said transmission line at a spacing of between one sixteenth and one quarter wavelength of said RF carrier from the device power supply connection.
17. An RF amplifier as set out in claim 16, wherein at least one of said plural decoupling capacitors is coupled to said transmission line at a spacing of less than one sixteenth wavelength of said RF carrier from the device power supply connection.
18. An RF amplifier as set out in claim 17, wherein said network of circuit elements further comprises a small value capacitor coupled to ground adjacent the device power supply connection to form a parallel resonance circuit with said decoupling capacitor coupled to said transmission line at a spacing of less than one sixteenth wavelength from said device power supply connection.
19. An RF amplifier as set out in claim 18, wherein said small value capacitor has a capacitance of about 0.5 to 5 pF.
20. An RF amplifier, comprising:
an input receiving an RF input signal;
an active amplifier device receiving and amplifying the input signal to provide an output, the active amplifier device having a power supply connection;
and a bias circuit coupled between a DC power supply and the active amplifier device power supply connection, the bias circuit comprising parallel power supply feed lines connected to the active amplifier device power supply connection and a plurality of decoupling capacitors coupled in a parallel configuration to a ground connection and electrically coupled to the DC power supply and the parallel power supply bias feed lines.
21. An RF amplifier as set out in claim 20, wherein said bias circuit further comprises a surface mount capacitor coupled to one of said feed lines within one sixteenth wavelength of the RF carrier signal from said active amplifier device power supply connection.
22. An RF amplifier as set out in claim 21, wherein said bias circuit further comprises a small value capacitor coupled to ground adjacent the device power supply connection to form a parallel-resonant circuit with said surface mount capacitor.
23. A method of amplifying an RF input signal, comprising:
providing an input signal comprising a modulating signal having a video bandwidth and an RF carrier to an RF amplifier device having a power supply connection;
providing DC power from a DC supply to said RF amplifier device power supply connection along parallel feed lines; and providing a low impedance to said supplied power across the video bandwidth and an impedance at least ten times the device output impedance at the frequency of the RF carrier.
24. A bias circuit for use with an amplifier having an active device power supply connection, comprising:
a DC power supply connection;
an RF blocking inductance;
a first set of decoupling capacitors coupled in a parallel configuration to a ground connection and configured between the DC power supply and the RF
blocking inductance; and a second set of one or more decoupling capacitors coupled to a ground connection and configured between the active device power supply connection and the RF blocking inductance.
25. A bias circuit according to claim 24, in which said second set of decoupling capacitors are configured to be close to a parallel resonance at the RF
carrier frequency.
26. An RF amplifier, comprising:
an input receiving an input signal comprising an RF carrier and a modulation signal having a modulation bandwidth of at least 5 MHz;
an active amplifier device receiving and amplifying the input signal to provide an output, the active amplifier device having a power supply connection;
and a bias circuit coupled between a DC power supply and the active amplifier device power supply connection, the bias circuit comprising a network of circuit elements having an impedance versus frequency response having at least one minimum in the modulation bandwidth and a low impedance across the modulation bandwidth so as to minimize amplifier memory effects and a higher impedance from a parallel resonance close to said RF carrier frequency, wherein the impedance at said RF carrier frequency is at least ten times the output impedance of said active amplifier device.
27. An RF amplifier as set out in claim 26, further comprising a predistorter receiving and predistorting the input signal prior to said active amplifier device receiving and amplifying the input signal.
28. A feed forward amplifier, comprising:
an RF input for receiving an RF signal having an RF carrier and a modulation bandwidth of at least 10 MHz;
a predistortion circuit receiving and predistorting said RF input signal;
a main amplifier receiving and amplifying said predistorted RF signal, said main amplifier comprising an active device and a bias circuit coupled to a DC
power supply, said bias circuit having a transfer function having a plurality of transmission zeros spaced across the modulation bandwidth so as to substantially eliminate amplifier memory effects;
a main amplifier output sampling coupler;
a first delay coupled to the RF input and providing a delayed RF signal;
a carrier cancellation combiner coupling the delayed RF signal to the sampled output from the main amplifier;
an error amplifier receiving and amplifying the output of the carrier cancellation combiner;
a second delay coupled to the output of the main amplifier;
an error injection coupler combining the output from the error amplifier and the delayed main amplifier output from the second delay so as to cancel distortion introduced by the main amplifier; and an RF output coupled to the error injection coupler output and providing an amplified RF output.
CA2483107A 2002-04-24 2003-04-22 Rf power amplifier employing bias circuit topologies for minimization of rf amplifier memory effects Expired - Lifetime CA2483107C (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US37506902P 2002-04-24 2002-04-24
US60/375,069 2002-04-24
US37586402P 2002-04-26 2002-04-26
US60/375,864 2002-04-26
US10/410,457 US7034620B2 (en) 2002-04-24 2003-04-08 RF power amplifier employing bias circuit topologies for minimization of RF amplifier memory effects
US10/410,457 2003-04-08
PCT/US2003/012259 WO2003092153A2 (en) 2002-04-24 2003-04-22 Rf power amplifier employing bias circuit topologies for minimization of rf amplifier memory effects

Publications (2)

Publication Number Publication Date
CA2483107A1 true CA2483107A1 (en) 2003-11-06
CA2483107C CA2483107C (en) 2010-09-21

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CA2483107A Expired - Lifetime CA2483107C (en) 2002-04-24 2003-04-22 Rf power amplifier employing bias circuit topologies for minimization of rf amplifier memory effects

Country Status (6)

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US (2) US7034620B2 (en)
EP (1) EP1576724B1 (en)
AT (1) ATE543252T1 (en)
AU (1) AU2003228615A1 (en)
CA (1) CA2483107C (en)
WO (1) WO2003092153A2 (en)

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Also Published As

Publication number Publication date
ATE543252T1 (en) 2012-02-15
US20030227330A1 (en) 2003-12-11
AU2003228615A1 (en) 2003-11-10
US7034620B2 (en) 2006-04-25
EP1576724A4 (en) 2006-10-04
EP1576724B1 (en) 2012-01-25
CA2483107C (en) 2010-09-21
WO2003092153A2 (en) 2003-11-06
US20060087374A1 (en) 2006-04-27
EP1576724A2 (en) 2005-09-21
AU2003228615A8 (en) 2008-06-12
WO2003092153A3 (en) 2008-04-24
US7106134B2 (en) 2006-09-12

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