CA2560586A1

CA2560586A1 - Reduced complexity nonlinear filters for analog-to-digital converter linearization

Info

Publication number: CA2560586A1
Application number: CA002560586A
Authority: CA
Inventors: Roy G. Batruni
Original assignee: Optichron, Inc.; Roy G. Batruni; Netlogic Microsystems, Inc.
Current assignee: Netlogic I LLC
Priority date: 2004-03-25
Filing date: 2005-03-24
Publication date: 2005-10-13
Also published as: AU2005228167B2; EP1728329A2; AU2005228167A1; WO2005094548A3; US20070030189A1; WO2005094548A2; KR20070058376A; JP2007531415A; US7142137B2; CN1998140A; US20050219088A1; CN1998140B; US7394413B2; EP1728329A4

Abstract

A method of converting an input analog signal to a compensated digital signal comprises converting the input analog signal to an uncompensated digital signal, inputting the uncompensated digital signal to a distortion model, generating a modeled distortion signal based on the uncompensated digital signal, and subtracting the modeled distortion signal from the uncompensated digital signal to generate the compensated digital signal. A distortion compensating analog to digital converter (ADC) comprises an uncompensated ADC
configured to convert an input analog signal to an uncompensated digital signal, and a compensation module coupled to the uncompensated ADC, configured to receive the uncompensated digital signal, generate a modeled distortion signal based on the uncompensated digital signal and subtract the modeled distortion signal from the uncompensated digital signal to generate the compensated digital signal.

Description

REDUCED COMPLEXITY NONLINEAR FILTERS FOR
ANALOG-TO-DIGITAL CONVERTER LINEARIZATION
CROSS REFERENCE TO OTHER APPLICATIONS
[0001] This application claims priority to U.S. Provisional Patent Application No. 60/556,663 (Attorney Docket No. OPTIP007+) entitled REDUCED
COMPLEXITY NONLINEAR FILTERS FOR ANALOG-TO-DIGITAL
CONVERTER LINEARIZATION filed March 25, 2004 which is incorporated herein by reference for all purposes.
BACKGROUND OF THE INVENTION

[0002] Analog-to-digital converters (ADCs) have a wide range of applications. Applications such as high speed communication systems often require ADCs with low distortion or linear distortion that may be corrected using known techniques. In practice, the outputs of many ADCs have nonlinear distortion in addition to quantization error inherent in the conversion of an analog signal to a digital signal. There are many causes for the nonlinear distortion, including nonlinear components such as inductors, capacitors and transistors, nonlinear gate transconductance, gain errors in amplifiers, digital to analog converter level errors, etc. Nonlinear ADCs often have variable time constants that change with the input.
Changes in time constants may depend on the input, the rate of change for the input (also referred to as slew rate), as well as external factors such as temperature. The effects of the changing time constants are often more pronounced in high speed ADCs where the slew rate change in the input is high. To improve nonlinear distortion, some of the existing ADC designs use physical components that are less sensitive to input changes. This approach, however, is not always effective. Some nonlinearity in the physical components is usually unavoidable, which means that the ADC
typically will have some nonlinearity. Furthermore, the special components often lead to more complicated design and higher device cost.

[0003] It would be useful if the nonlinear distortion in ADCs could be more easily compensated. It would also be desirable if the compensation technique would not significantly increase the complexity and cost of the ADCs.
BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Various embodiments of the invention are disclosed in the following detailed description and the accompanying drawings.

[0005] Figure 1A is a diagram illustrating an embodiment of an analog-to-digital converter.

[0006] Figure 1B is a block diagram illustrating a model of ADC 102.

[0007] Figure 1 C is a block diagram illustrating an example embodiment of compensation module 104.

[0008] Figure 2 is a flowchart illustrating the operations of a distortion correcting analog-to-digital converter embodiment.

[0009] Figure 3A - 3C are frequency domain signal diagrams illustrating the effects of distortion and compensation.

[0010] Figure 4A is a block diagram illustrating the implementation of a distortion compensating analog-to-digital converter embodiment.

[0011] Figure 4B illustrates the timing diagrams of some sampling clocks used by the primary and auxiliary ADCs.

[0012] Figure 4C is a flowchart illustrating a process embodiment for compensating an analog input signal.

[0013] Figures SA- SC are signal diagrams illustrating the operations of a compensating analog-to-digital converter such as ADC 400.

[0014] Figures 6A - 6C illustrate manifolds of the distortion function for several different temperatures.
DETAILED DESCRIPTION

[0015] The invention can be implemented in numerous ways, including as a process, an apparatus, a system, a composition of matter, a computer readable medium such as a computer readable storage medium or a computer network wherein program instructions are sent over optical or electronic communication linlcs.
W this specification, these implementations, or any other form that the invention may take, may be referred to as techniques. A component such as a processor or a memory described as being configured to perform a task includes both a general component that is temporarily configured to perform the task at a given time or a specific component that is manufactured to perform the taslc. In general, the order of the steps of disclosed processes may be altered within the scope of the invention.

[0016] A detailed description of one or more embodiments of the invention is provided below along with accompanying figures that illustrate the principles of the invention. The invention is described in connection with such embodiments, but the invention is not limited to any embodiment. The scope of the invention is limited only by the claims and the invention encompasses numerous alternatives, modifications and equivalents. Numerous specific details are set forth in the following description in order to provide a thorough understanding of the invention.
These details are provided for the purpose of example and the invention may be practiced according to the claims without some or all of these specific details. For the purpose of clarity, technical material that is known in the technical fields related to the invention has not been described in detail so that the invention is not unnecessarily obscured.

[0017] A method and system of converting an input analog signal to a compensated digital signal is disclosed. In some embodiments, the input analog signal is converted to an uncompensated digital signal. The uncompensated digital signal is sent to a distortion model and a modeled distortion signal is generated. The modeled distortion signal is subtracted form the uncompensated digital signal to generate the compensated digital signal. In some embodiments, fractional phase samples and/or derivatives of the input are used to generate the modeled distortion signal.

[0018] Figure 1A is a diagram illustrating an embodiment of an analog-to-digital converter. In this example, ADC 100 is a compensating ADC. It includes an uncompensated ADC 102 and a compensation module 104. ADC 102 and compensation module may be implemented as software or firmware code embedded in a processor, a field programmable gate array (FPGA), a programmable digital processing engine (DSP), an application specific integrated circuit (ASIC), or any other appropriate techniques. The output of ADC 102, y", has some nonlinear distortion that requires correction. yn is sent to compensation module 104, which generates an estimated distortion ~" . Optionally, the input to the ADC may also be sent to compensation module 104. Combiner 106 subtracts the estimated distortion from the output.

[0019] Figure 1B is a bloclc diagram illustrating a model of ADC 102. In tl~s example, ADC 102 is modeled as an ideal quantizer 110 and a nonlinear distortion filter 112. Ideal quantizer 110 performs sample and hold operation on the analog input to generate an ideal quantized signal v1. The ideal quantized signal is equal to the input minus the quantizer's quantization error (i.e. the portion of the analog sigrial below the finest ADC quantization level). Nonlinear distortion filter 112 is used to illustrate the distortion function of ADC 102. The distortion function is denoted as r~" . IJnlilce quantization error, which typically cannot be reduced for an ADC with a predefined number of bits, the distortion can be compensated using techniques described herein. The overall ADC output is expressed as y" = v" + r~" .

[0020] Figure 1C is a block diagram illustrating an example embodiment of compensation module 104. In this example, compensation module 104 includes a distortion modeling filter 120 that implements a distortion model function r)"
that is substantially similar to the ADC's distortion function ~~" . The output of filter 120 is subtracted from the ADC output, y" .

[0021] In the examples shown above, a signal entering the ADC propagates in continuous-time mode through several analog circuit components before being sampled and held at a sampling capacitor. The sampled signal is compared with a set of pre-stored voltage (or current) levels and the results of the comparisons are converted to digital bits that form the output of the ADC. The dynamic signal path extends from the ADC's input pad to the sampling capacitor(s). The sample-and-hold function places on the sampling capacitors) a charge proportional to the input signal level at the time the sampling switch opens. After the charge is placed, the signal is no longer processed in the continuous-time domain. It is processed in the discrete-time domain and the signal path becomes static. As used in this specification, the distortions in the continuous-time path and the discrete-time path are referred to as dynamic distortion and static distortion respectively.

[0022] The dynamic distortion is a function of the continuous-time signal v (t) propagating through a nonlinear analog medium. The analog signal paths have one or more resistor-capacitor (RC) time constants z, , zz "' zL . The dynamic nonlinear distortion in ADCs are due to RC time constants that change as functions of the continuous-time signal and its history, i.e., z1 (v(t), v(t - s), v(t -2s),' ' ') , zz (v(t), v(t - s), v(t - 2s), ' ' ') , . . . , zL (v(t), v(t - s), v(t - 2s), ' ' ') , where s is an small time increment. In other words, the dynamic nonlinear distortion is a function of the signal value at time t, the signal value immediately preceding time t at t- s , and the signal value immediately preceding t- s and so on. The dynamic nonlinear distortion is therefore a function of the signal a (t) and its rate of change v (t) (also referred to as derivative or slew rate). The analog signal path also contains linear distortion that generates memory effects on the distortion, causing the nonlinear distortion to be a function of v (t) , v (t - ~) , . . . and v (t) , i~ (t - ~) , . . . where ~
is a discrete time step and a high sampling-rate.

[0023] Take the following dynamic nonlinear distortion function for example:
y (t) = v (t) + k, ( v (t) ) ( y (t - ~) - x (t) ) + k2 arctan ( v (t) ) (equation 1 ), where Is1 ( v (t) ) is the filter constant that is a varying function of the signal input level, and k2 arctan ( v (t) ) is a continuous-time, nonlinear distortion function. This equation can be approximated by y (t) = v (t) + k, ( v (t) ) ( ~ (t) ) + k2 arctan ( v (t) ) (equation 2).

[0024] When linear distortion is severe enough to cause analog signal path bandwidth limitations and consequently memory effects on the nonlinear distortion, the previous equation can be written as:
y(t)=v(t) +1~, (v(t))(~'(t)) +ki (v(t-~))(~'(t-s~)) (equation 3).
+ k2 arctan ( v (t) ) + k~ arctan ( v (t - ~) ) (0025] After the sample-and-hold function, the signal is discretized, and the static distortion is a function of the signal level at the sampling instant and the history of the signal levels at previous sampling instants. Thus, the distortion can be expressed as:
.f (y(~T ),Y((T~-1)T ),...y((~-~)T )) .f(v(jzT),v((~-1)T),v((h-2)T),...V(hT-~),v(~T-2~),v(hT-3~),...
v(fZT),v(hT-~),v(rzT-2~),'.. ) (equation 4).
A general expression for the distortion function is the following:
~7rr = v,, + ao v,= + a° vr,vn_~ + a2 v3-z~ +... + a;~ ~r,vr~-k~ + ao v3 + ai vr,_~ + a2 vr,-Z5 + ... + a; vn_,~~
+ Cl~ Vrr_1 + Ch Vn-Z + Clz 1n-3 + ... + Cl Z Vr~-/c-1 + b (equation 5), where the coefficients a~ and b are nonlinear functions of all the signals that cause the distortion. In other words, each coefficient is a nonlinear function of the vector y - ~ Vrr Vrr-~ Vrr-2~ ... Vrt-k~ Vrr Vn_~ Vr1-2~ ... Vrr-k~ Vrr_1 Vn-2 Vn_3 ...Vn-k-1 J ' (0026] Alternatively, the distortion function may be expressed as:
~n - a0,n (~n ) Vn + "' + CIzN-2,n (r' n ) Vn-2N+2 + Un (~r ) (equation 6), where each coefficient ak," (I ;, ) is a nonlinear function of Vn . In some embodiments, the coefficients of the distortion function are determined empirically. Test tones having varying amplitudes and slew rates are sent to the ADC. Least mean squared error approximation is performed on the results to determine the coefficients.

[0027] Figure 2 is a flowchart illustrating the operations of a distortion correcting analog-to-digital converter embodiment. In this example, an input analog signal is first converted to an uncompensated digital signal (202). The uncompensated digital signal is then input to a distortion model (204). In some embodiments, the distortion model is implemented as a filter similar to filter 120 of Figure 1C. A modeled distortion signal is generated based on the uncompensated digital signal (206). The modeled distortion signal is subtracted from the uncompensated digital signal to generate a compensated signal (208).

[0028] Process 200 may be implemented by a system such as ADC 100 of Figure 1A. In ADC 100, the input analog signal v is converted to an uncompensated digital signal yn by ADC 102. The uncompensated digital signal includes an ideal digital signal vn and a distortion component ran . The uncompensated digital signal is sent to a distortion model 120 to generate a modeled distortion signal ~" .
~7" is then subtracted from yn to generate a compensated signal v" .

[0029] Figure 3A - 3C are frequency domain signal diagrams illustrating the effects of distortion and compensation. In Figure 3A, input signal v1 is transformed by function 1 + ran to produce an output signal yn. The transformation of input signal component 302 results in output signal 310, which includes a desired output component 304 and distortion harmonics 306 and 308. In Figure 3B, an input signal y,1 is transformed by function ~" to generate estimated distortion. If signal component 312 is approximately the same as signal component 302, estimated distortion components 314 and 316 are expected to be approximately equal to signal components 306 and 308, respectively. In Figure 3C, the distortion model ~7"
is applied to signal 310 of Figure 3A. The desired output signal 304 results in distortion signals 304a and 304b. Distortion component 306 results in distortion signals 306a and 306b. Sinularly, distortion component 308 results in distortion components 308a and 308b. As shown in this diagram, applying a signal with distortion to the distortion model generates an estimated distortion comprised of distortion of the desired signal and distortions of the distortion component. As long as components such as 306a-b and 308a-b remain relatively small, estimated distortion signal 320 cm be subtracted from distorted output 310 to generate a compensated output with significantly less distortion.

[0030] Figure 4A is a block diagram illustrating the implementation of a distortion compensating analog-to-digital converter embodiment. ADC 400 of Figure 4A includes a primary ADC 402 and a plurality of auxiliary ADCs such as 404 and 406. Some of the auxiliary ADCs such as 412 and 414 are coupled to capacitors.
The primary and auxiliary ADCs are coupled to a distortion correction module 420.
Primary ADC 402 samples the input signal vn and provides the required number of bits (denoted as L) for the overall ADC. Each of the auxiliary ADCs generates m bits of outputs. In some embodiments, m is less than L. For example, a 16 bit ADC
may be implemented using a 16 bit primary ADC and a plurality of 8 bit auxiliary ADCs.
Other bit values are possible in different embodiments.

[0031] ADCs are configured to sample the input signal at various phases.
Figure 4B illustrates the timing diagrams of some sampling clocks used by the primary and auxiliary ADCs. In this example, the sampling clock used by primary ADC 402 is referred to as phase zero clock (ph0) and the samples generated are referred to as the integral samples. An auxiliary ADC may sample its input using the same sampling clock or using a sampling clock that has a relative phase offset with respect to the phase zero clock. The sampling clock with a relative phase offset is referred to as a fractional phase sampling clock (e.g. phl, ph2 and phn).
Other fractional phase sampling cloclcs may be used as well.

[0032] Returning to Figure 4A, an auxiliary ADC such as 404 rnay sample the input at fractional intervals between the integral samples to generate fractional phase samples. In the example shown, the fractional phase sampling clocks used by auxiliary ADCs 404 and 406 differ by a phase ~. For each integral sample y2 generated by the primary ADC, ADCs 404 and 406 generate fractional phase samples y"-~ and y,t-2~ , respectively. The input signal is also sent to capacitors such 408 and 410 for generating derivatives of the input signal. Auxiliary ADCs such as 412 and 414 sample the derivatives using the phase zero sampling clock or specified fractional phase sampling clocks to provide derivative samples y" , yn_~ , etc.

[0033] Figure 4C is a flowchart illustrating a process embodiment for compensating an analog input signal. In this example, process 450 may be implemented on ADC 400 of Figure 4A. Integral samples are generated based on the analog input signal (452). In this case, the integral samples form the uncompensated signal. Optionally, fractional phase samples and/or derivative samples are also generated (454, 456). The signal samples are input into a distortion model (458). A
modeled distortion signal is generated by the distortion model, based on the integral, fractional and/or derivative samples (460). The modeled distortion signal is subtracted from the uncompensated integral samples to generate a compensated signal (462).

[0034] The distortion correction module implements a distortion model with the following transfer function:
~7» = ao,~r (Yn ) Yn + . . . -.~- aN,n (Y» ) Y"-N + bn (Y~ ) (equation 7), where Y,t is a vector including the integral samples, the fractional samples, and the derivatives. An example of Y" is Y, _ ~Y~t Yn-~ Y"-2~ .Yn .f"-5 Y"-2~ Y"-~ Y»-a Y»-3 [0035] Equation 7 can be viewed as a "linear" convolution between the input variables and the nonlinear coefficients that are time variant nonlinear functions of the input signal. In other words, the function has the form of a linear filter, but with nonlinear coefficients. The relative location of input Y" in the mufti-dimensional input space determines the values of the a~," and b" coefficients. The dependence of the filter coefficient values on the input signal vector gives the filter its nonlinear property.

[0036] The nonlinear processor output, u" , includes a replica of the original linear signal v" and the residual uncorrected nonlinear distortion ~" . The relationship may be expressed as:

V n - .Yrt ~n - ~n + ~n ~n - V n + ~n (equation 8), where ~" = r~" - ~" . (equation 9).

[0037] By using the fractional samples and the fractional derivative samples, the distortion correction module can better predict the distortion of the signal. The estimated distortion is then subtracted from the output of the primary ADC to provide a compensated output.

[0038] Figures 5A - 5C are signal diagrams illustrating the operations of a compensating analog-to-digital converter such as ADC 400. Figure 5A is a time domain diagram illustrating the sampling effects of the primary ADC. A
modulated input 500 is sampled at intervals 502, 504, 506, etc. Sampling by the primary ADC
demodulates the higher frequency input signal to a lower frequency. In this case, the input signal is subsampled and demodulated to baseband. The samples can be interpolated to form a demodulated baseband signal 508. The sampling effects in the frequency domain are shown in Figure 5B. Sampling signal 500 at intervals shown in Figure 5A downshifts the signal to baseband, resulting in signal 508.

[0039] In the examples shown, a distortion correction module relies on the samples to generate an estimated distortion signal. Since the distortion model is dependent on the history of the signal and its derivatives, the model can provide better distortion estimation if more detailed information between the sampled points is available. For example, more input data history and better derivative values can be used to improve the distortion model output. In Figure 5C, the primary ADC
provides samples such as 510a, 510b, 510c, etc. The auxiliary ADCs sample the input at fractional sampling phases. For example, fractional phase sample 512a, 512b and 512c are generated by an auxiliary ADC sampling at fractional sampling phase Phl.
Similarly, another auxiliary ADC sampling at fractional sampling phase Ph2 generates samples 514a, 514b, 514c, etc. The derivatives may be computed based on the fractional phase samples. Together, the fractional samples and/or derivatives are used by the distortion model to provide more accurate distortion estimation.

[0040] In some systems, the distortion model also depends on system temperature. In Figures 6A - 6C, manifolds of the distortion function for three different temperatures T1, TZ, and T3 are illustrated. The coefficients of the distortion model at different temperatures are determined based on measurements and stored.
During operation, the coefficients corresponding to the operating temperature is selected to construct an appropriate distortion correction filter. In some embodiments, the operating temperature is used to analytically determine the corresponding coefficients. For example, a processor or computation block may extrapolate several measurements at different temperatures to derive coefficients that correspond to a temperature without existing measurements. During operation, the coefficients are computed based on a function of the input and its history, the derivatives of the input, the temperature, the changes in temperature, any other appropriate factors or a combination thereof.

[0041] In some embodiments, a distortion model similar to equation 7 can be implemented using one or more minimum-maximum processors and/or absolute value processors. Details of the implementation are described in U.S. Patent No.
6,856,191, entitled NONLINEAR FILTER, which is incorporated herein by reference for all purposes. According to the techniques described, the transfer function of the distortion model may be expressed as:
77,r = AT Yr + b + ~ c j I e~ j Y,r + /3 j I (equation 10).
j=1 (0042] Let sign ( aj Y,r +,6j ) _ ~,jrr , equation 10 can be rewritten as:
K K K
~n - a0 + ~ Cj. a0 j /~'jn .~ln '+' ... .+. (zN -E- ~ Cj G2%~r j l~.jn .yrr-N
+ l7 + ~ Cj ~j ~jn j=1 j=1 j=1 (equation 11).
Equation 11 is also equivalent to equation 7.

[0043] The distortion function may be transformed into vector form to simplify the function and achieve computational reductions. In some embodiments, the distortion function is implemented as a low complexity filter with reduced number of multiplication operations. The distortion function of equation 4 can be transformed as follows:

7~n = f~T ~t + l7 -~- ~ Cj ~ yn -f- ~ j I + ~ C j I .~tt-1 + ~ j . . + ~~2 C j ~ .yn-N + ~ j j=I j=~t+I j=hzN-s+1 =l~T Yt +~J+~Cj /~.jrt\yn +Nj)+ ~Cj a'j,n\yn-1 +~j~'..+ x~Cj /~.jtt~yn-N +~j~
./=111+1 ./=112N_3+1 (equation 12).
Let ~,j,,t = sigya ( y"-i + ,6j ) , the function can be further transformed as K't Kz N-z ~n - a0 + ~ C j o~' j n .lJn 'i-' . . . .~.. Cl2n-2 -E. ~ C j ~, j n .yn-N +
j7 + ~ Cj ~j ~j n J=1 J°~2N-3+1 J=1 (equation 13).

[0044] A filter implementing the general form of equation 13 is referred to as a first order nonlinear filter since each coefficient is multiplied with terms ofy to the first order at most. W some embodiments, c j and c j ~3j are pre-computed and stored. Since ~,j,t is either 1 or -1, the coefficients can be computed without using multiplication and the complexity in filter implementation is greatly reduced.

[0045] Other simplifications using vector manipulation are also possible. For example, another simplified form of the distortion function is expressed as:
~n f0, n (~n ) yn + "' + f2N-2,n (~t ) yn-2N+2 + a0,n (Yn ) yn + ~ " + a2N-2,n (Yn ) yn-2N+2 + ~n (~t ) (equation 14), where each fk,,t (Yn ) is a first order nonlinear function _ _ _ fk,rt (Yt ) - Ak ~t + j1k + ~C~ G2:~ ~t + ~~ ~ = ap n (~t ) yn + ~ .. -E- a N-2 n (Y: ) .yn-2N+2 + ~n (~t ) j=1 (equation 15).
Accordingly, each coefficient in equation 14 is a nonlinear function of the input vector elements and some of the coefficients multiply a power-of two element of the input vector or cross-product-of two elements of the input vector. A filter implementing this simplified form is referred to as a second order filter.

[0046] In some embodiments, the distortion function is simplified to have constants in each discrete input region. This simplification results in a zero order transfer function. The zero order filter is sometimes referred to as a "catastrophic"
structure because of the discontinuities in the filter response. A general form of a zero order nonlinear filter is expressed as:
K K K
_ ~ 0 0 ~ 1 1 ~ 2N 2 2N-2 n - ~ 0 + a I '+' . .. -I- CZ 2 ~,-2 -I- IJ -I- C j /~, j -I- C j /~, j -I- .
. . -I- Cj /~, j j=1 j=1 j=1 (equation 16).
K

[0047] To implement a zero order nonlinear filter, combinations of ~ C~ ~,~n , j=I
If c~ ~,~" , etc. may be pre-computed, stored and retrieved based on the appropriate f =I
input. In some embodiments, the coefficient value is determined using an indicator that indicates the relative location of the input within the range of possible inputs.
The indicator is sometimes referred to as a "thermometer code," which is a vector having a total of at most one sign change among any two adjacent elements.

[0048] Take the following second order function as an example:
~n - a0 .Yrl -~- al .Yrt-1 -~ U + ~ C~ ~ y,t -~- ~ j ~ y,t + ~ C j ~ .fin-1 +
~ j I .Yn j=1 j=1 K K K K
.y~ + ~Cj /~'j .~n .yn-1 + Cl0 +~Cj ~~~j +~Cj ~j~j .~n +Cl1 .Yn-I +b j=1 j=1 j=1 j=1 _ 2 L
- a0l,rr .yrt + Ch ,: .Yn .~n-1 + Cl0 ,t .~n + Cll ,: .~n-1 + U
(equation 17).

[0049] The input is compared to the set of /3~ values to determine the relative location of the input variable within the range of possible inputs, and the vector of s1. j," , denoted as ~lr, . Depending on the input, A" may be a vector with terms that are + 1 only, -1 only, or -1 for the first k terms and +1 for the rest of the terms. In other words, A" is a thermometer code with at most one sign change among its terms.
For example, assuming that constants /3~ are distributed across the dynamic range of y" E (-1,1 ) and there are 8 values of /3~ E ~ - ~ - - - ~ ~ ~ ~ ~ . If y" < - ~ , then A" _ ~-1-1-1-1-1-1-1-1 ] . If y" > ~ , then A" _ ~+ 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 ] . If y" is somewhere in between, A"
may have a sign change. For example, if y,~ = 3~ , then 11" _ ~ 1-1-1-1-1-1-1 + 1 ~ . If y'= - less , then A" _ ~-1-1-1 + 1 + 1 + 1 + 1 + 1 ] . Since the thermometer code has x only 8 values, there are only 8 possible values for aol," _ ~ c; ~,~ , 8 possible values j=I
K K K
for al," _ ~ c~ ~,~," , and 64 possible values for ao,n = a~ + ~ c~ ~,~~3J + ~
c~ ~,~,(3~ .
j=I j=I j=1 [0050] The number of add operations can be reduced by pre-computing the possible values for coefficients of aol>" , al," , etc. and storing them in memory. In this example, the addresses of the coefficients are stored in a lookup table, which stores the 8 possibilities of thermometer code t1" and the corresponding addresses of pre-computed coefficients. The coefficients can be retrieved by accessing the memory addresses that correspond to the appropriate thermometer code entry.
Once the coefficients aol," , all," etc. . . are read out of memory, the filter output can be computed as ~7" = aol,nYn + al>aY~,Y~,-I + ao,~tY,t + al,»Y"-I + b (equation 18).
This technique is also applicable to zero, first or higher order filters.

[0051] Low complexity nonlinear filters may be implemented based on the simplified forms. In some embodiments, the low complexity linear filter includes a processor coupled to the nonlinear filter, configured to determine the relative location of the input variable within a range of possible inputs and to determine a filter coefficient of the nonlinear filter using the relative location of the input variable. The filter coefficients can be determined without using multiplication operations.
In some embodiments, filter coefficients for zero order, first order, second order and/or higher order filters are pre-computed, stored and retrieved when appropriate. Higher order filters can be formed by nesting lower order filters. Details of implementing a nonlinear transfer function using low-complexity filter or thermometer code are described in U.S. Patent Application No. 11/061,850 (Attorney Docket No.

OPTIP006) entitled LOW-COMPLEXITY NONLINEAR FILTERS, filed 2/18/2005, which is incorporated herein by reference for all purposes.

[0052] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, the invention is not limited to the details provided. There are many alternative ways of implementing the invention.
The disclosed embodiments are illustrative and not restrictive.

[0053] WHAT IS CLAIMED IS:

Claims

1. A method of converting an input analog signal to a compensated digital signal, comprising:
converting the input analog signal to an uncompensated digital signal;
inputting the uncompensated digital signal to a distortion model;
generating a modeled distortion signal based on the uncompensated digital signal;
and subtracting the modeled distortion signal from the uncompensated digital signal to generate the compensated digital signal.

2. A method as recited in claim 1, wherein the uncompensated digital signal includes an ideal digital signal and a distorted signal.

3. A method as recited in claim 1, wherein the modeled distortion signal is generated based on a function of the ideal digital signal and the distorted signal.

4. A method as recited in claim 1, wherein generating a modeled distortion signal includes generating a fractional phase sample.

5. A method as recited in claim 1, wherein generating a modeled distortion signal includes sampling the input analog signal using a fractional phase sampling clock and inputting the fractional phase sample to the distortion model.

6. A method as recited in claim 1, wherein generating a modeled distortion signal includes:
generating a plurality of fractional phase samples by sampling the input analog signal using a plurality of fractional phase sampling clocks;
inputting the plurality of fractional phase samples to the distortion model;
and generating a modeled distortion signal based on the uncompensated digital signal and the plurality of fractional phase samples.

7. A method as recited in claim 1, wherein generating a modeled distortion signal includes generating a derivative of the input analog signal and inputting the derivative to the distortion model.

8. A method as recited in claim 1, wherein the distortion model includes a nonlinear coefficient.

9. A method as recited in claim 1, wherein the distortion model includes a nonlinear coefficient that is empirically determined.

10. A method as recited in claim 1, wherein the distortion model includes a low complexity filter configured to implement a nonlinear distortion function.

11. A method as recited in claim 1, wherein the distortion modeled implements a nonlinear function having a plurality of nonlinear coefficients, and the plurality of coefficients is determined using a thermometer code.

12. A method as recited in claim 1, wherein the distortion model is temperature compensated.

13. A distortion compensating analog to digital converter (ADC), comprising:
an uncompensated ADC configured to convert an input analog signal to an uncompensated digital signal; and a compensation module coupled to the uncompensated ADC, configured to:
receive the uncompensated digital signal;
generate a modeled distortion signal based on the uncompensated digital signal; and subtract the modeled distortion signal from the uncompensated digital signal to generate the compensated digital signal.

14. An ADC as recited in claim 13, wherein the uncompensated digital signal includes an ideal digital signal and a distorted signal.

15. An ADC as recited in claim 13, wherein the compensation module is configured to generate the modeled distortion signal based on a function of the ideal digital signal and the distorted signal.

16. An ADC as recited in claim 13, wherein the uncompensated ADC includes a primary ADC and the compensation module includes a plurality of auxiliary ADCs.

17. An ADC as recited in claim 13, wherein:
the uncompensated ADC is a primary ADC configured to generate an L-bit output;
the compensation module includes a plurality of auxiliary ADCs each configured to generate an m-bit output; and L is greater than m.

18. An ADC as recited in claim 13, wherein the uncompensated ADC includes a primary ADC and the compensation module includes a plurality of auxiliary ADCs configured to generate a plurality of fractional phase samples.

19. An ADC as recited in claim 13, wherein:
the uncompensated ADC includes a primary ADC; and the compensation module includes a plurality of auxiliary ADCs configured to:
generate a fractional phase sample by sampling the input analog signal using a fractional phase sampling clock; and input the fractional phase sample to a distortion correction module.

20. An ADC as recited in claim 13, wherein the compensation module includes an auxiliary ADCs configured to generate a derivative of the input analog signal and input the derivative to a distortion model.

21. An ADC as recited in claim 13, wherein the compensation module includes a distortion correction module having a distortion model with a nonlinear coefficient.

22. An ADC as recited in claim 13, wherein the compensation module includes a distortion correction module having a distortion model with a nonlinear coefficient that is empirically determined.

23. An ADC as recited in claim 13, wherein the compensation module includes a low complexity filter configured to implement a nonlinear distortion function.

24. An ADC as recited in claim 13, wherein the compensation module implements a nonlinear function having a plurality of nonlinear coefficients, and the plurality of coefficients is determined using a thermometer code.

25. An ADC as recited in claim 13, wherein compensation module implements a distortion model that is temperature compensated.

26. A computer program product for converting an input analog signal to a compensated digital signal, the computer program product being embodied in a computer readable medium and comprising computer instructions for:
converting the input analog signal to an uncompensated digital signal;
inputting the uncompensated digital signal to a distortion model;
generating a modeled distortion signal based on the uncompensated digital signal;
and subtracting the modeled distortion signal from the uncompensated digital signal to generate the compensated digital signal.