CA2730646A1 - Output power port management control - Google Patents
Output power port management control Download PDFInfo
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- CA2730646A1 CA2730646A1 CA 2730646 CA2730646A CA2730646A1 CA 2730646 A1 CA2730646 A1 CA 2730646A1 CA 2730646 CA2730646 CA 2730646 CA 2730646 A CA2730646 A CA 2730646A CA 2730646 A1 CA2730646 A1 CA 2730646A1
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- Prior art keywords
- power output
- power
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- circuit
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J1/00—Circuit arrangements for dc mains or dc distribution networks
- H02J1/14—Balancing the load in a network
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0083—Converters characterised by their input or output configuration
- H02M1/009—Converters characterised by their input or output configuration having two or more independently controlled outputs
Abstract
A power converter that gives priority to the high power output and only provides power to the low power output when the total potential output power is equal to or less than the rated power of the power converter. A specific power threshold is established, and when the high power output remains below this threshold for a period of time the low power output is allowed to turn on. If the high power output subsequently exceeds this threshold for a period of time, then an electronic circuit powers down the low power output in order to keep the total output power below the rated power of the power converter. Subsequently, the high power output is checked against the threshold to determine if the low power output can be turned on again. If the high power output is below the threshold, then the low power output is turned on.
Description
OUTPUT POWER PORT MANAGEMENT CONTROL
FIELD OF THE INVENTION
[0001] The present invention generally relates to the field of power converters, and more particularly to a power converter having both a high power output and low power output for use with portable electronic devices.
BACKGROUND OF THE INVENTION
[00021 As the use of mobile electronic devices, such as PC
notebooks, PDAs, cellular telephones, MP3 players, cameras and the like continues to increase, the need for low cost, compact power converters to power and recharge these devices also continues to increase. Most manufacturers of mobile devices typically include plug-in power adapters along with these mobile devices to power and charge batteries of these devices.
[0003] Today's power converters are typically AC-to-DC, or DC-to-DC power converters, which are configured to either step-up or step-down the DC voltage input delivered to the mobile device. With AC-to-DC converters, for example, users can power most mobile devices by simply plugging the converter into a standard AC wall outlet commonly found in most homes or offices.
Similarly, when only DC input power is available, such as in an automobile or airplane, users can still power their mobile devices by using a standard, off-the-shelf DC-to-DC converter. Normally, both converters are designed and tailored to provide a regulated DC output voltage, which can typically range from between VDC to 30 VDC depending on the kind of mobile device being powered.
[0004] Typically, dual output power converters provide power to both the high power output and the low power output and monitor for an over power condition. An over power condition is when the sum total of the output power exceeds a threshold, such as the converter power rating. A typical converter may be rated at 65W, providing up to 50W continuous power or more to the main power output, and up to 15W continuous power to the low power output. When the sum of the output power exceeds the converter 65W rating for a period of time, the entire converter resets and power is interrupted from both outputs. This complete shutdown is inconvenient to a user trying to utilize or power both devices.
[0005] Accordingly, there is a need to avoid a complete shutdown of a dual output converter when an over power condition occurs.
[0006] Although these power converters conveniently provide direct power and recharging capabilities, users are often required to carry separate converters to provide power to each individual mobile device. This often means that users have to carry multiple converters: one for an AC input power source, and another for a DC input power source. This often means that users are typically required to carry multiple power converters to power multiple devices.
Thus, by carrying multiple mobile devices, users are often forced to carry more than one power supply converter, thereby increasing the amount of bulk a user is required to carry.
FIELD OF THE INVENTION
[0001] The present invention generally relates to the field of power converters, and more particularly to a power converter having both a high power output and low power output for use with portable electronic devices.
BACKGROUND OF THE INVENTION
[00021 As the use of mobile electronic devices, such as PC
notebooks, PDAs, cellular telephones, MP3 players, cameras and the like continues to increase, the need for low cost, compact power converters to power and recharge these devices also continues to increase. Most manufacturers of mobile devices typically include plug-in power adapters along with these mobile devices to power and charge batteries of these devices.
[0003] Today's power converters are typically AC-to-DC, or DC-to-DC power converters, which are configured to either step-up or step-down the DC voltage input delivered to the mobile device. With AC-to-DC converters, for example, users can power most mobile devices by simply plugging the converter into a standard AC wall outlet commonly found in most homes or offices.
Similarly, when only DC input power is available, such as in an automobile or airplane, users can still power their mobile devices by using a standard, off-the-shelf DC-to-DC converter. Normally, both converters are designed and tailored to provide a regulated DC output voltage, which can typically range from between VDC to 30 VDC depending on the kind of mobile device being powered.
[0004] Typically, dual output power converters provide power to both the high power output and the low power output and monitor for an over power condition. An over power condition is when the sum total of the output power exceeds a threshold, such as the converter power rating. A typical converter may be rated at 65W, providing up to 50W continuous power or more to the main power output, and up to 15W continuous power to the low power output. When the sum of the output power exceeds the converter 65W rating for a period of time, the entire converter resets and power is interrupted from both outputs. This complete shutdown is inconvenient to a user trying to utilize or power both devices.
[0005] Accordingly, there is a need to avoid a complete shutdown of a dual output converter when an over power condition occurs.
[0006] Although these power converters conveniently provide direct power and recharging capabilities, users are often required to carry separate converters to provide power to each individual mobile device. This often means that users have to carry multiple converters: one for an AC input power source, and another for a DC input power source. This often means that users are typically required to carry multiple power converters to power multiple devices.
Thus, by carrying multiple mobile devices, users are often forced to carry more than one power supply converter, thereby increasing the amount of bulk a user is required to carry.
[0007] Some power converters provide two output voltages enabling two devices to be powered by a single converter. By providing a power converter that has both high power output and low power output terminals, users have the ability to provide power to several mobile devices of varying power requirements, simultaneously, regardless of whether the input voltage is AC or DC.
SUMMARY OF INVENTION
[0008] The present invention achieves technical advantages as a power converter that gives priority to the high power output and only provides power to the low power output when the total potential output power is equal to or less than the rated power of the power converter. A specific power threshold is established, and when the high power output remains below this threshold for a period of time the low power output is allowed to turn on. If the high power output subsequently exceeds this threshold for a period of time, then an electronic circuit powers down the low power output in order to keep the total output power below the rated power of the power converter. After a period of time, the high power output is checked against the threshold to determine if the low power output can be turned on again. If the high power output is below the threshold, then the low power output is turned on. Subsequently, if the high power output level exceeds the converter rating for a period of time, the high power port and the low power port are turned off and the converter must be unplugged from its power source and then plugged back in. Additionally, the low power output will be shutoff if a short circuit is applied to the low power output either before the converter is powered or after the converter is powered and operating normally.
SUMMARY OF INVENTION
[0008] The present invention achieves technical advantages as a power converter that gives priority to the high power output and only provides power to the low power output when the total potential output power is equal to or less than the rated power of the power converter. A specific power threshold is established, and when the high power output remains below this threshold for a period of time the low power output is allowed to turn on. If the high power output subsequently exceeds this threshold for a period of time, then an electronic circuit powers down the low power output in order to keep the total output power below the rated power of the power converter. After a period of time, the high power output is checked against the threshold to determine if the low power output can be turned on again. If the high power output is below the threshold, then the low power output is turned on. Subsequently, if the high power output level exceeds the converter rating for a period of time, the high power port and the low power port are turned off and the converter must be unplugged from its power source and then plugged back in. Additionally, the low power output will be shutoff if a short circuit is applied to the low power output either before the converter is powered or after the converter is powered and operating normally.
BRIEF DESCRIPTION OF THE DRAWINGS
[00091 Advantages of the invention and the specific embodiments will be understood by those of ordinary skill in the art by reference to the following detailed description of preferred embodiments taken in conjunction with the drawings, in which:
[00101 FIG. 1 shows a block diagram of a dual input AC and DC
power converter having high power and low power outputs in accordance with the present invention;
[00111 FIG. 2 shows a detailed block diagram of an exemplary embodiment of the low power output port digital control circuit in accordance with the present invention;
[0012] FIG. 3 shows a waveform diagram of total converter power output at various stages in accordance with the present invention; and [00131 FIG. 4 shows a detailed flow diagram of the methodology of the low power output port digital control circuit in accordance with the present invention.
[0014] FIG. 5 shows a detailed flow diagram of the methodology of the control circuit latch subroutine in accordance with the present invention.
[00091 Advantages of the invention and the specific embodiments will be understood by those of ordinary skill in the art by reference to the following detailed description of preferred embodiments taken in conjunction with the drawings, in which:
[00101 FIG. 1 shows a block diagram of a dual input AC and DC
power converter having high power and low power outputs in accordance with the present invention;
[00111 FIG. 2 shows a detailed block diagram of an exemplary embodiment of the low power output port digital control circuit in accordance with the present invention;
[0012] FIG. 3 shows a waveform diagram of total converter power output at various stages in accordance with the present invention; and [00131 FIG. 4 shows a detailed flow diagram of the methodology of the low power output port digital control circuit in accordance with the present invention.
[0014] FIG. 5 shows a detailed flow diagram of the methodology of the control circuit latch subroutine in accordance with the present invention.
DETAILED DESCRIPTION OF THE PRESENT INVENTION
[00151 The numerous innovative teachings of the present invention will be described with particular reference to the presently exemplary embodiments. However, it should be understood that this class of embodiments provides only a few examples of the many advantageous uses and innovative teachings of the inventor. In general, statements made in the specification of the present application do not necessarily delimit any of the various claimed inventions. Moreover, some statements may apply to some inventive features, but not to others.
[00161 There is shown in FIG. 1 a block diagram of dual input AC/DC power converter 10 having dual DC voltage outputs in accordance with the present invention. The converter may be a dual input AC/DC converter as shown, but may also be a single input AC or DC input converter as desired.
Dual input AC/DC power converter 10 comprises input converter power circuitry 13 and power converter circuitry 20. Power converter circuitry 20 is seen housed in converter housing 11 and advantageously provides both high power output 16 and low power output 18. Both of these DC output voltages may be generated as a function of either the AC or DC input voltages.
[0017 ] DC power input 12 and AC power input 14 are configured such that different power cords are adapted to receive input power from different sources, which power cords may form part of DC power input 12 and AC power input 14. For instance, DC power from an airplane or car power source can to couple to DC power input 12, and an AC source can couple to AC power input 14. Power converter circuitry 20 is adapted to provide priority to high power output 16 and only power low power output 18 when it is determined that the total high output power is equal to or less than a predetermined power threshold for the power converter.
[ 00181 Referring now to FIG. 2 there is shown a detailed block diagram of the power converter circuitry 20 of the dual input AC/DC power converter 10 as depicted in FIG. 1 in accordance with an exemplary embodiment of the present invention. As described herein in greater detail, power converter circuitry 20, in an exemplary embodiment, comprises controller 22, logic circuit 24, control circuit 26, sensor 28, and output stage 30.
[00191 Dual input AC/DC power converter 10 as depicted in FIG.
1 details DC power input 12 and AC power input 14, either of which provides power denoted as all power 46 that is provided to power converter circuitry 20 in FIG. 2. All power 46 is received by sensor 28, which in one preferred embodiment is a current sense integrated circuit. Sensor 28 senses the delivered high power output 16 current level and generates sensor signal Pmain 32 indicative of high power output 16.
[00201 Sensor signal Pmain 32 is received by logic circuit 24, which in the preferred embodiment is a comparator, and compares it to power threshold Pthreshold 34. For example, if the converter total power output rating is 65W, the power threshold Pthreshold 34 could be set at 50W or a different value. Logic circuit 24 comparator compares sensor signal Pmain 32 to the power threshold Ptnreshold 34, and generates input logic signal In, 36. If sensor signal Pmain 32 is determined to be less than power threshold Pthreshold 34, then input logic signal In, 36 is the Boolean value 1. If sensor signal Pmain 32 is determined to be greater than power threshold Pthresnoid 34, then input logic signal In, 36 is the Boolean value 0. In the above example, if power threshold Pthreshold 34 is established to be 50W and sensor signal Pmain 32 is only 45W, the input logic signal In, 36 would be the value 1, whereas if power threshold Pthreshold 34 is established to be 50W and sensor signal Pmain 32 is 55W, input logic signal In, 36 would be the value 0.
[0021] Input logic signal In, 36 is received by controller 22, which in the preferred embodiment is a microcontroller. Controller 22 receives input logic signal In, 36 and generates output signal Out, 40 coupled to output stage 30.
In one preferred embodiment, output stage 30 is a MOSFET transistor. If controller 22 receives a Boolean value of 1 as input logic signal In, 36 for a pre-determined time period, such as 5 seconds, output signal Out, 40 enables output stage 30 because the logic circuit 24 determined that enough spare power is available to enable the low power output 18 while high power output 16 is enabled. If controller 22 receives a Boolean value of 0 as input logic signal In, 36, for a predetermined time period, such as 5 seconds, output signal Out, 40 disables output stage 30. Advantageously, disabling output stage 30 disables only the low power output 18, thus preventing the situation where the power converter is shut down altogether.
[00221 Control circuit latch 26, which in the preferred embodiment is a latch circuit switch and electronic fuse, monitors the current flowing to low power output 18 by sensing overload signal 44 provided by output stage 30. If no overload condition of the low power output exists, control circuit latch 26 remains off and controller 22 continues normal operation by continuing to enable low power output 18. If an overload condition of the low power output exists, control circuit latch 26 immediately switches on and controller 22 disables low power output 18 before the electronic device coupled to the low power output can be permanently damaged and before output stage 30 can be damaged.
[00151 The numerous innovative teachings of the present invention will be described with particular reference to the presently exemplary embodiments. However, it should be understood that this class of embodiments provides only a few examples of the many advantageous uses and innovative teachings of the inventor. In general, statements made in the specification of the present application do not necessarily delimit any of the various claimed inventions. Moreover, some statements may apply to some inventive features, but not to others.
[00161 There is shown in FIG. 1 a block diagram of dual input AC/DC power converter 10 having dual DC voltage outputs in accordance with the present invention. The converter may be a dual input AC/DC converter as shown, but may also be a single input AC or DC input converter as desired.
Dual input AC/DC power converter 10 comprises input converter power circuitry 13 and power converter circuitry 20. Power converter circuitry 20 is seen housed in converter housing 11 and advantageously provides both high power output 16 and low power output 18. Both of these DC output voltages may be generated as a function of either the AC or DC input voltages.
[0017 ] DC power input 12 and AC power input 14 are configured such that different power cords are adapted to receive input power from different sources, which power cords may form part of DC power input 12 and AC power input 14. For instance, DC power from an airplane or car power source can to couple to DC power input 12, and an AC source can couple to AC power input 14. Power converter circuitry 20 is adapted to provide priority to high power output 16 and only power low power output 18 when it is determined that the total high output power is equal to or less than a predetermined power threshold for the power converter.
[ 00181 Referring now to FIG. 2 there is shown a detailed block diagram of the power converter circuitry 20 of the dual input AC/DC power converter 10 as depicted in FIG. 1 in accordance with an exemplary embodiment of the present invention. As described herein in greater detail, power converter circuitry 20, in an exemplary embodiment, comprises controller 22, logic circuit 24, control circuit 26, sensor 28, and output stage 30.
[00191 Dual input AC/DC power converter 10 as depicted in FIG.
1 details DC power input 12 and AC power input 14, either of which provides power denoted as all power 46 that is provided to power converter circuitry 20 in FIG. 2. All power 46 is received by sensor 28, which in one preferred embodiment is a current sense integrated circuit. Sensor 28 senses the delivered high power output 16 current level and generates sensor signal Pmain 32 indicative of high power output 16.
[00201 Sensor signal Pmain 32 is received by logic circuit 24, which in the preferred embodiment is a comparator, and compares it to power threshold Pthreshold 34. For example, if the converter total power output rating is 65W, the power threshold Pthreshold 34 could be set at 50W or a different value. Logic circuit 24 comparator compares sensor signal Pmain 32 to the power threshold Ptnreshold 34, and generates input logic signal In, 36. If sensor signal Pmain 32 is determined to be less than power threshold Pthreshold 34, then input logic signal In, 36 is the Boolean value 1. If sensor signal Pmain 32 is determined to be greater than power threshold Pthresnoid 34, then input logic signal In, 36 is the Boolean value 0. In the above example, if power threshold Pthreshold 34 is established to be 50W and sensor signal Pmain 32 is only 45W, the input logic signal In, 36 would be the value 1, whereas if power threshold Pthreshold 34 is established to be 50W and sensor signal Pmain 32 is 55W, input logic signal In, 36 would be the value 0.
[0021] Input logic signal In, 36 is received by controller 22, which in the preferred embodiment is a microcontroller. Controller 22 receives input logic signal In, 36 and generates output signal Out, 40 coupled to output stage 30.
In one preferred embodiment, output stage 30 is a MOSFET transistor. If controller 22 receives a Boolean value of 1 as input logic signal In, 36 for a pre-determined time period, such as 5 seconds, output signal Out, 40 enables output stage 30 because the logic circuit 24 determined that enough spare power is available to enable the low power output 18 while high power output 16 is enabled. If controller 22 receives a Boolean value of 0 as input logic signal In, 36, for a predetermined time period, such as 5 seconds, output signal Out, 40 disables output stage 30. Advantageously, disabling output stage 30 disables only the low power output 18, thus preventing the situation where the power converter is shut down altogether.
[00221 Control circuit latch 26, which in the preferred embodiment is a latch circuit switch and electronic fuse, monitors the current flowing to low power output 18 by sensing overload signal 44 provided by output stage 30. If no overload condition of the low power output exists, control circuit latch 26 remains off and controller 22 continues normal operation by continuing to enable low power output 18. If an overload condition of the low power output exists, control circuit latch 26 immediately switches on and controller 22 disables low power output 18 before the electronic device coupled to the low power output can be permanently damaged and before output stage 30 can be damaged.
[0023] If output signal Out, 40 disables output stage 30, disabling low power output 18 due to an overload condition as indicated by overload input signal In2 38, output stage 30 provides overload signal 44 to control circuit latch 26 such that control circuit latch 26 is set. Control circuit latch 26 generates overload input signal In2 38, which is indicative of the latch status.
Controller 22 receives overload input signal In2 38. If overload signal 44 continues to indicate the overload condition, controller 22 generates output signal Out2 42 to control circuit latch 26, in addition to overload signal 44. Control circuit latch 26 will then continually be set, and controller 22 will continue to disable low power output 18 while still enabling high power output 16. Once control circuit latch 26 remains off for a predetermined period of time, such as 5 seconds, controller determines that overload signal 44 is removed, and output signal Out, 40 will once again enable output stage 30 to enable low power output 18.
[00241 Referring now to FIG. 3 there is shown a waveform diagram 50 of converter total power output 52 at various stages in accordance with the present invention. The converter total power output 52 is graphed as a function of time 54. The power threshold 34 (Pthreshold 34) as previously discussed in reference to FIG. 2, is marked by the lower dashed horizontal line and the converter rated maximum total power 53 (Pm. 53) is marked by the upper dashed horizontal line.
[0025] Between time To and time T,, converter total power output 52 represents only high power output 16 being enabled and powering an electronic device, such as a laptop computer, and operating below power threshold Pthreshoia 34. Referring to FIG. 2, this corresponds to sensor signal Pmain 32 being less than power threshold Pthreshold 34. Once controller 22 recognizes that high power output 16 is operating below power threshold Pthreshold 34 for a predetermined time period, the low power output port will be enabled by controller 22 at time T1.
[0026] Between time T1 and time T2, converter total power output 52 represents high output power 16 and low output power 18 being enabled with high power output 16 powering an electronic device, such as a laptop computer, and low power output 18 powering a portable electronic device, such as a PDA.
Between time T1 and time T2, converter total power output 52 may increase at a steady rate (as shown) or immediately, depending on the load's drawing power.
Referring to FIG. 2, this corresponds to where sensor signal Pmain 32 remains less than power threshold Pthreshold 34, and converter total power output 52 remains below maximum total power 53 (Pm 53). As long as this condition exists, both high power output 16 and low power output 18 will remain enabled by controller 22.
[ 0 0 2 7 ] Between time T2 and time T3, converter total power output 52 may increase at a steady rate as either or both high power output 16 and low power output 18 are increasing, in this case when low power output 18 is enabled.
Referring to FIG. 2, if sensor signal Pmain 32 exceeds the power threshold Pthresho!d 34, as shown between time T2 and time T3, then controller 22 sends output signal Out, 40 to output stage 30 shutting down low power output 18 while continuing to provide power to high power output 16.
[0028] Between time T3 and time T4, only high power output 16 is enabled. When high power output 16 drops below power threshold Pthreshoid 34 for a predetermined period of time, such as 5 seconds, controller 22 will once again enable low power output 18, as shown at time T4.
Controller 22 receives overload input signal In2 38. If overload signal 44 continues to indicate the overload condition, controller 22 generates output signal Out2 42 to control circuit latch 26, in addition to overload signal 44. Control circuit latch 26 will then continually be set, and controller 22 will continue to disable low power output 18 while still enabling high power output 16. Once control circuit latch 26 remains off for a predetermined period of time, such as 5 seconds, controller determines that overload signal 44 is removed, and output signal Out, 40 will once again enable output stage 30 to enable low power output 18.
[00241 Referring now to FIG. 3 there is shown a waveform diagram 50 of converter total power output 52 at various stages in accordance with the present invention. The converter total power output 52 is graphed as a function of time 54. The power threshold 34 (Pthreshold 34) as previously discussed in reference to FIG. 2, is marked by the lower dashed horizontal line and the converter rated maximum total power 53 (Pm. 53) is marked by the upper dashed horizontal line.
[0025] Between time To and time T,, converter total power output 52 represents only high power output 16 being enabled and powering an electronic device, such as a laptop computer, and operating below power threshold Pthreshoia 34. Referring to FIG. 2, this corresponds to sensor signal Pmain 32 being less than power threshold Pthreshold 34. Once controller 22 recognizes that high power output 16 is operating below power threshold Pthreshold 34 for a predetermined time period, the low power output port will be enabled by controller 22 at time T1.
[0026] Between time T1 and time T2, converter total power output 52 represents high output power 16 and low output power 18 being enabled with high power output 16 powering an electronic device, such as a laptop computer, and low power output 18 powering a portable electronic device, such as a PDA.
Between time T1 and time T2, converter total power output 52 may increase at a steady rate (as shown) or immediately, depending on the load's drawing power.
Referring to FIG. 2, this corresponds to where sensor signal Pmain 32 remains less than power threshold Pthreshold 34, and converter total power output 52 remains below maximum total power 53 (Pm 53). As long as this condition exists, both high power output 16 and low power output 18 will remain enabled by controller 22.
[ 0 0 2 7 ] Between time T2 and time T3, converter total power output 52 may increase at a steady rate as either or both high power output 16 and low power output 18 are increasing, in this case when low power output 18 is enabled.
Referring to FIG. 2, if sensor signal Pmain 32 exceeds the power threshold Pthresho!d 34, as shown between time T2 and time T3, then controller 22 sends output signal Out, 40 to output stage 30 shutting down low power output 18 while continuing to provide power to high power output 16.
[0028] Between time T3 and time T4, only high power output 16 is enabled. When high power output 16 drops below power threshold Pthreshoid 34 for a predetermined period of time, such as 5 seconds, controller 22 will once again enable low power output 18, as shown at time T4.
[00291 After time T4, as long as high power output 16 remains less than power threshold Pthreshold 34, controller 22 will continue to enable low output power 18.
[0030] Referring now to FIG. 4 there is shown a detailed flow diagram 60 of the methodology of one embodiment of the present invention. At step 61, power 46 is turned on. At step 62, power 46 generated by input converter power circuit 13 is sent through sensor 28 of power converter circuitry 20 and low power output 18 is disabled at step 64. Logic circuit 24 receives sensor signal Pmain 32, which is indicative of main output power 16 and determines if sensor signal Pmain 32 is less than the predetermined power threshold Pthreshoid 34.
For example, if the rated total maximum power output (Pm. 53) for the power converter is 65W, power threshold Pthreshold 34 could be set at 50W or other appropriate values. If sensor signal Pmain 32 is not less than power threshold Pthreshold 34 as indicated by input logic signal In, 36, for example 55W, controller 22 will continue checking input logic signal In, 36 in a closed loop until sensor signal Pmain 32 is less than power threshold Pthhreshold 34 for a predetermined time period.
[00311 At decision 66, when sensor signal Pmain 32 is determined by logic circuit 24 to be less than power threshold Ptnreshold 34, for example 45W, logic circuit 24 responsively sends input logic signal In, 36 main to controller 22, which in an exemplary embodiment is a microcontroller, at step 68. Controller receives input logic signal In, 36 main and responsively sends output signal Out, 40, after a predetermined period of time, to output stage 30 at step 70. At step 72, output stage 30, which in an exemplary embodiment is a MOSFET transistor, is enabled by output signal Out, 40 and delivers power to low power output 18. At step 74, controller 22 initiates latch check subroutine, which will be discussed in FIG. 5.
[00321 At decision 66, if sensor signal Pmain 32 is determined by logic circuit 24 to be greater than power threshold Pthreshold 34, for example 55W, logic circuit 24 sends input logic signal In, low to controller 22 at step 78.
Controller 22 output signal Out, 40 then changes state at step 80 and disables output stage 30 at step 82, thus shutting down low power output 18. The program then returns to decision 66 and continues the process.
[00331 Referring now to FIG. 5 there is shown a detailed flow diagram 90 of the methodology of the control circuit latch check subroutine 90 of one embodiment of the present invention. At decision 92, if control circuit latch 26 is off when overload input logic In2 38 equals Boolean value 0 and low power output 18 is not inhibited, at step 102 control latch check subroutine 75 is left and return to decision 66 previously referred to in FIG. 4.
[0034] At decision 92, if control circuit latch 26 is on when overload input signal In2 38 equals Boolean value 1 and low power output 18 is inhibited, output stage 30 turns low power output 18 on and control circuit latch 26 resets in step 94.
[00351 At decision 96 and after a predetermined period of time, such as 2 seconds, if control circuit latch 26 is off when overload input signal In2 38 equals Boolean value 0 and low power output 18 is not inhibited, at step latch check subroutine 75 is left and return to decision 66 previously referred to in FIG. 4.
[00361 At decision 96 and after a predetermined period of time, such as 2 seconds, if control circuit latch 26 is on when overload input signal In2 38 equals Boolean value 1 and low power output 18 is again inhibited, output stage 30 turns low power output 18 off in step 98 and control circuit latch 26 resets in step 100 and returns in a closed loop to decision 92.
[0037] Though the invention has been described with respect to a specific preferred embodiment, many variations and modifications will become apparent to those skilled in the art upon reading the present application. It is therefore the intention that the appended claims be interpreted as broadly as possible in view of the prior art to include all such variations and modifications.
[0030] Referring now to FIG. 4 there is shown a detailed flow diagram 60 of the methodology of one embodiment of the present invention. At step 61, power 46 is turned on. At step 62, power 46 generated by input converter power circuit 13 is sent through sensor 28 of power converter circuitry 20 and low power output 18 is disabled at step 64. Logic circuit 24 receives sensor signal Pmain 32, which is indicative of main output power 16 and determines if sensor signal Pmain 32 is less than the predetermined power threshold Pthreshoid 34.
For example, if the rated total maximum power output (Pm. 53) for the power converter is 65W, power threshold Pthreshold 34 could be set at 50W or other appropriate values. If sensor signal Pmain 32 is not less than power threshold Pthreshold 34 as indicated by input logic signal In, 36, for example 55W, controller 22 will continue checking input logic signal In, 36 in a closed loop until sensor signal Pmain 32 is less than power threshold Pthhreshold 34 for a predetermined time period.
[00311 At decision 66, when sensor signal Pmain 32 is determined by logic circuit 24 to be less than power threshold Ptnreshold 34, for example 45W, logic circuit 24 responsively sends input logic signal In, 36 main to controller 22, which in an exemplary embodiment is a microcontroller, at step 68. Controller receives input logic signal In, 36 main and responsively sends output signal Out, 40, after a predetermined period of time, to output stage 30 at step 70. At step 72, output stage 30, which in an exemplary embodiment is a MOSFET transistor, is enabled by output signal Out, 40 and delivers power to low power output 18. At step 74, controller 22 initiates latch check subroutine, which will be discussed in FIG. 5.
[00321 At decision 66, if sensor signal Pmain 32 is determined by logic circuit 24 to be greater than power threshold Pthreshold 34, for example 55W, logic circuit 24 sends input logic signal In, low to controller 22 at step 78.
Controller 22 output signal Out, 40 then changes state at step 80 and disables output stage 30 at step 82, thus shutting down low power output 18. The program then returns to decision 66 and continues the process.
[00331 Referring now to FIG. 5 there is shown a detailed flow diagram 90 of the methodology of the control circuit latch check subroutine 90 of one embodiment of the present invention. At decision 92, if control circuit latch 26 is off when overload input logic In2 38 equals Boolean value 0 and low power output 18 is not inhibited, at step 102 control latch check subroutine 75 is left and return to decision 66 previously referred to in FIG. 4.
[0034] At decision 92, if control circuit latch 26 is on when overload input signal In2 38 equals Boolean value 1 and low power output 18 is inhibited, output stage 30 turns low power output 18 on and control circuit latch 26 resets in step 94.
[00351 At decision 96 and after a predetermined period of time, such as 2 seconds, if control circuit latch 26 is off when overload input signal In2 38 equals Boolean value 0 and low power output 18 is not inhibited, at step latch check subroutine 75 is left and return to decision 66 previously referred to in FIG. 4.
[00361 At decision 96 and after a predetermined period of time, such as 2 seconds, if control circuit latch 26 is on when overload input signal In2 38 equals Boolean value 1 and low power output 18 is again inhibited, output stage 30 turns low power output 18 off in step 98 and control circuit latch 26 resets in step 100 and returns in a closed loop to decision 92.
[0037] Though the invention has been described with respect to a specific preferred embodiment, many variations and modifications will become apparent to those skilled in the art upon reading the present application. It is therefore the intention that the appended claims be interpreted as broadly as possible in view of the prior art to include all such variations and modifications.
Claims (19)
1. A power port management control circuit adapted for use with a power converter configured to power at least one portable electronic device, comprising:
a circuit adapted to provide a high power output and a low power output;
a sensor adapted to sense the high power output and generate a sensor signal;
a logic circuit adapted to receive the sensor signal and generate a logic signal when the high power output exceeds a threshold; and a controller adapted to inhibit the low power output responsible to the logic signal while the high power output is still provided.
a circuit adapted to provide a high power output and a low power output;
a sensor adapted to sense the high power output and generate a sensor signal;
a logic circuit adapted to receive the sensor signal and generate a logic signal when the high power output exceeds a threshold; and a controller adapted to inhibit the low power output responsible to the logic signal while the high power output is still provided.
2. The circuit as specified in Claim 1, further comprising:
a control circuit adapted to sense the high power output and inhibit the low power output when the high power output exceeds the threshold.
a control circuit adapted to sense the high power output and inhibit the low power output when the high power output exceeds the threshold.
3. The circuit as specified in Claim 1, wherein the sensor comprises a current sensor.
4. The circuit as specified in Claim 1, wherein the logic circuit comprises a comparator.
5. The circuit as specified in Claim 1, wherein the controller comprises a microcontroller.
6. The circuit as specified in Claim 2, wherein the control circuit comprises a current sensor.
7. The circuit as specified in Claim 1, further comprising an output stage responsive to the controller adapted to provide the low power output.
8. The output stage as specified in Claim 7, wherein the output stage comprises a transistor.
9. The transistor as specified in Claim 8, wherein the transistor comprises a MOSFET.
10. A method of adapting a circuit for use with a converter having a converter rating and a high power output and a low power output to a portable electronic device, the method comprising the steps of:
sensing the high power output and generating a logic signal when the high power output exceeds a threshold;
receiving the logic signal by a controller and generating a first controller output; and inhibiting the low power output responsive to the first controller output while maintaining the high power output.
sensing the high power output and generating a logic signal when the high power output exceeds a threshold;
receiving the logic signal by a controller and generating a first controller output; and inhibiting the low power output responsive to the first controller output while maintaining the high power output.
11. The method as specified in Claim 10, further comprising the steps of:
generating a control circuit signal by a control circuit when the low power output exceeds a second threshold; and inhibiting the low output power when the control circuit signal is generated.
generating a control circuit signal by a control circuit when the low power output exceeds a second threshold; and inhibiting the low output power when the control circuit signal is generated.
12. The method as specified in Claim 10, further comprising the steps of:
determining that the high power output does not exceed the first threshold;
and responsively enabling the low power output.
determining that the high power output does not exceed the first threshold;
and responsively enabling the low power output.
13. The method as specified in Claim 10, wherein the first threshold is less than the converter power rating.
14. The method as specified in Claim 10, wherein the low power output is rated at or below the difference between a converter power rating and the first threshold.
15. The circuit as specified in Claim 10, wherein the sensor comprises a current sensor.
16. The circuit as specified in Claim 10, wherein a comparator provides the logic signal.
17. The circuit as specified in Claim 10, wherein the controller comprises a microcontroller.
18. The circuit as specified in Claim 11, wherein the control circuit comprises a current sensor.
19. The current sensor as specified in Claim 18, wherein the current sensor comprises a latch circuit.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/880,008 US7781908B2 (en) | 2007-07-19 | 2007-07-19 | Output power port management control |
| US11/880,008 | 2007-07-19 | ||
| PCT/US2008/008174 WO2009011755A1 (en) | 2007-07-19 | 2008-07-01 | Output power port management control |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2730646A1 true CA2730646A1 (en) | 2009-01-22 |
Family
ID=39789291
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2730646 Abandoned CA2730646A1 (en) | 2007-07-19 | 2008-07-01 | Output power port management control |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US7781908B2 (en) |
| CA (1) | CA2730646A1 (en) |
| WO (1) | WO2009011755A1 (en) |
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| US7781908B2 (en) * | 2007-07-19 | 2010-08-24 | Igo, Inc. | Output power port management control |
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| JP4855444B2 (en) * | 2008-06-25 | 2012-01-18 | レノボ・シンガポール・プライベート・リミテッド | Charging control system and control method |
| US8354760B2 (en) * | 2009-10-28 | 2013-01-15 | Comarco Wireless Technologies, Inc. | Power supply equipment to simultaneously power multiple electronic device |
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| TWI419095B (en) | 2010-10-25 | 2013-12-11 | Au Optronics Corp | Display device |
| US9020648B2 (en) | 2011-04-19 | 2015-04-28 | Cooper Technologies Company | Zero power appliance control, systems and methods |
| US9805890B2 (en) | 2011-11-07 | 2017-10-31 | Cooper Technologies Company | Electronic device state detection for zero power charger control, systems and methods |
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| CN104158208A (en) * | 2014-07-15 | 2014-11-19 | 阳光电源股份有限公司 | Single-stage photovoltaic grid-connected inverter, as well as control method and application thereof |
| US9919814B2 (en) | 2015-02-26 | 2018-03-20 | Spire Global, Inc. | System and method for power distribution in a autonomous modular system |
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- 2008-07-01 CA CA 2730646 patent/CA2730646A1/en not_active Abandoned
-
2010
- 2010-07-15 US US12/837,413 patent/US8207628B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US8207628B2 (en) | 2012-06-26 |
| US20090021189A1 (en) | 2009-01-22 |
| WO2009011755A1 (en) | 2009-01-22 |
| US7781908B2 (en) | 2010-08-24 |
| US20100308652A1 (en) | 2010-12-09 |
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