CA2752746A1 - Mems device with integrated via and spacer - Google Patents

Mems device with integrated via and spacer Download PDF

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Publication number
CA2752746A1
CA2752746A1 CA2752746A CA2752746A CA2752746A1 CA 2752746 A1 CA2752746 A1 CA 2752746A1 CA 2752746 A CA2752746 A CA 2752746A CA 2752746 A CA2752746 A CA 2752746A CA 2752746 A1 CA2752746 A1 CA 2752746A1
Authority
CA
Canada
Prior art keywords
layer
devices
vias
lower layer
portions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2752746A
Other languages
French (fr)
Other versions
CA2752746C (en
Inventor
Robert Ostrom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Capella Photonics Inc
Original Assignee
Capella Photonics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Capella Photonics Inc filed Critical Capella Photonics Inc
Publication of CA2752746A1 publication Critical patent/CA2752746A1/en
Application granted granted Critical
Publication of CA2752746C publication Critical patent/CA2752746C/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B26/00—Optical devices or arrangements for the control of light using movable or deformable optical elements
    • G02B26/08—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light
    • G02B26/0816—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light by means of one or more reflecting elements
    • G02B26/0833—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light by means of one or more reflecting elements the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD
    • G02B26/0841—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light by means of one or more reflecting elements the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD the reflecting element being moved or deformed by electrostatic means
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00095—Interconnects
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B26/00—Optical devices or arrangements for the control of light using movable or deformable optical elements
    • G02B26/08—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light
    • G02B26/0816—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light by means of one or more reflecting elements
    • G02B26/0833—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light by means of one or more reflecting elements the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD
    • G02B26/0866—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light by means of one or more reflecting elements the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD the reflecting means being moved or deformed by thermal means
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/04—Optical MEMS
    • B81B2201/045—Optical switches
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2203/00—Basic microelectromechanical structures
    • B81B2203/05—Type of movement
    • B81B2203/058—Rotation out of a plane parallel to the substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/09—Packages
    • B81B2207/091—Arrangements for connecting external electrical signals to mechanical structures inside the package
    • B81B2207/094—Feed-through, via
    • B81B2207/096—Feed-through, via through the substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making

Abstract

A MEMS device and fabrication method are disclosed. A bottom substrate having an insulating layer sandwiched between an upper layer and a lower layer may be bonded to a device layer. One or more portions of the upper layer may be selectively removed to form one or more device cavities. Conductive vias may be formed through the lower layer at locations that underlie the one or more device cavities and electrically isolated from the lower layer. Devices may be formed from the device layer.
Each device overlies a corresponding device cavity. Each device may be connected to the rest of the device layer by one or more corresponding hinges formed from the device layer. One or more electrical contacts may be formed on a back side of the lower layer. Each contact is electrically connected to a corresponding conductive via.

Claims (19)

1. A method for fabricating a microelectromechanical system (MEMS) device, comprising:
a) forming one or more conductive vias through a lower layer of a bottom substrate having an insulating layer sandwiched between an upper layer and the lower layer, wherein each of the vias is electrically isolated from the lower layer;
b) electrically connecting the vias to one or more corresponding electrical contacts formed on a back side of the lower layer;
c) selectively removing one or more portions of the upper layer that overlie the one or more vias to form one or more device cavities;
d) bonding a device layer to the bottom substrate; and e) forming one or more devices from the device layer, wherein each of the one or more devices overlies a corresponding one of the one or more device cavities, and wherein each of the one or more devices is connected to the rest of the device layer by one or more corresponding hinges, wherein each hinge is formed from the device layer, and wherein each of the one or more devices is electrically isolated from the one or more vias.
2. The method of claim 1, further comprising, after c) and before b), forming one or more device electrodes in the one or more device cavities, wherein each device electrode is electrically connected to a corresponding one of the one or more vias.
3. The method of claim 2 wherein the one or more device electrodes are formed on one more portions of the insulating layer exposed by removal of the one or more portions of the upper layer.
4. The method of claim 1 wherein the bottom substrate is a silicon on insulator substrate.
5. The method of claim 1 wherein e) includes removing selected portions of the device layer to form the one or more devices and one or more hinges.
6. The method of claim 1 wherein the one or more devices include one or more mirrors.
7. The method of claim 1 wherein c) includes protecting the back side of the lower layer during removal of the selected portions of the upper layer.
8. The method of claim 1 wherein the device layer is a layer of a top substrate having an insulator layer sandwiched between the device layer and an additional layer.
9. The method of claim 7, further comprising removing the additional layer prior to e).
10. The method of claim 1 wherein d) includes a high-temperature bonding process.
11. The method of claim 9, further comprising: after d) disposing an electrically conductive bonding material on the electrical contacts formed on a back side of the lower layer.
12. The method of claim 1 wherein d) includes a low-temperature bonding process.
13. The method of claim 11, further comprising: before d) disposing an electrically conductive bonding material on the electrical contacts formed on a back side of the lower layer.
14. A microelectromechanical system (MEMS) device, comprising:
a) a bottom substrate having an insulating layer sandwiched between an upper layer and a lower layer, wherein one or more portions of the upper layer have been selectively removed to form one or more device cavities;
b) one or more conductive vias formed through the lower layer at locations that underlie the one or more device cavities, wherein each of the vias is electrically isolated from the lower layer;
c) one or more electrical contacts formed on a back side of the lower layer, wherein each of the one or more electrical contacts is electrically connected to a corresponding one of the one or more conductive vias;
d) a device layer bonded to the bottom substrate; and e) one or more devices formed from the device layer, wherein each of the one or more devices overlies a corresponding one of the one or more device cavities, and wherein each of the one or more devices is connected to the rest of the device layer by one or more corresponding hinges, wherein each hinge is formed from the device layer.
15. The device of claim 14 wherein the bottom substrate is a silicon on insulator substrate.
16. The device of claim 14 wherein selected portions of the device layer have been removed to form the one or more devices and one or more hinges.
17. The device of claim 14 wherein the one or more devices include one or more mirrors.
18. The device of claim 14, further comprising one or more device electrodes formed in the one or more device cavities, wherein each device electrode is electrically connected to a corresponding one of the one or more vias.
19. The device of claim 18 wherein the one or more device electrodes are formed on one more portions of the insulating layer that are exposed by removal of the one or more portions of the upper layer.
CA2752746A 2009-02-25 2010-02-18 Mems device with integrated via and spacer Active CA2752746C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/392,947 2009-02-25
US12/392,947 US7863752B2 (en) 2009-02-25 2009-02-25 MEMS device with integrated via and spacer
PCT/US2010/024621 WO2010099027A1 (en) 2009-02-25 2010-02-18 Mems device with integrated via and spacer

Publications (2)

Publication Number Publication Date
CA2752746A1 true CA2752746A1 (en) 2010-09-02
CA2752746C CA2752746C (en) 2012-09-25

Family

ID=42630748

Family Applications (1)

Application Number Title Priority Date Filing Date
CA2752746A Active CA2752746C (en) 2009-02-25 2010-02-18 Mems device with integrated via and spacer

Country Status (6)

Country Link
US (1) US7863752B2 (en)
EP (1) EP2401421A4 (en)
JP (1) JP5192088B2 (en)
CN (1) CN102388165B (en)
CA (1) CA2752746C (en)
WO (1) WO2010099027A1 (en)

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SE537406C2 (en) * 2012-06-21 2015-04-21 Silex Microsystems Ab Semiconductor device and method for manufacturing semiconductor device with disk-through connections
US8723280B2 (en) * 2012-08-01 2014-05-13 Taiwan Semiconductor Manufacturing Co., Ltd. Hybrid MEMS bump design to prevent in-process and in-use stiction
CN103879950B (en) * 2012-12-19 2016-01-20 上海矽睿科技有限公司 MEMS vacuum encapsulation structure
US20140299674A1 (en) * 2013-04-08 2014-10-09 Nuventix, Inc. Micro synthetic jet ejector
FI127042B (en) 2015-09-09 2017-10-13 Murata Manufacturing Co An electrode for a microelectromechanical device
DE102017218883A1 (en) * 2017-10-23 2019-04-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Microelectromechanical component and a method for its production

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US20020046985A1 (en) * 2000-03-24 2002-04-25 Daneman Michael J. Process for creating an electrically isolated electrode on a sidewall of a cavity in a base
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Also Published As

Publication number Publication date
US7863752B2 (en) 2011-01-04
WO2010099027A1 (en) 2010-09-02
CN102388165B (en) 2013-12-04
EP2401421A1 (en) 2012-01-04
JP2012517913A (en) 2012-08-09
US20100214643A1 (en) 2010-08-26
EP2401421A4 (en) 2013-07-03
CN102388165A (en) 2012-03-21
CA2752746C (en) 2012-09-25
JP5192088B2 (en) 2013-05-08

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