CN100394711C - Kilomega Ethernet passive optical network up-flow-section integrating bandwidth distributing method - Google Patents
Kilomega Ethernet passive optical network up-flow-section integrating bandwidth distributing method Download PDFInfo
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Abstract
The present invention provides an up flow bandwidth allocation method which is based on a gigabit Ethernet passive optical network system. The present invention realizes the fineness assignment of the occupation quantities of subchannel bandwidth by that a segmented tail coordinate table of the occupation quantities of the subchannel bandwidth is used as an allocation processing schedule. The occupation quantities of the subchannel bandwidth are collected by an integral processing unit, the bandwidth request signals are sent according to the authorization magnitude of the EPON system, the dispense of the information of the bandwidth occupation quantities is completed, and therefore, the ascending flow bandwidth allocation of the EPON system is realized. Control enable signals of read-write, etc. are sent by an interface of a microprocessor, a bandwidth assignment device of an integral bandwidth assignment device realizes the conversion and the assignment of the subchannel bandwidth according to the allocation processing schedule, and the main multiplexing switching and the standby multiplexing switching of a main / standby tail coordinate register are completed. The bandwidth occupation quantities are collected by an integral barrel, an authorization application is sent to an authorization generating circuit, the authorization generating circuit sends command leaking signals to the integral barrel according to the request, the leakage operation of the integral barrel is correspondingly controlled, and the proforma bandwidth allocation is realized.
Description
Technical field
The present invention relates to a kind of based on gigabit ethernet passive optical network (Ethernet Passive OpticalNetwork, abbreviation EPON) the upstream bandwidth allocation methods of system, belong to fiber optic communication field, specifically relate to a kind of subsection integral formula high accuracy bandwidth allocation methods based on the EPON upstream.
Technical background
The most close with the present invention in the prior art is sets of bandwidths control form distribution method based on asynchronous transfer mode passive optical network, and adopting a kind of Sbus bus SAR cell dismounting device of such distribution method is the TNETA1560 of TI company.Sets of bandwidths control form distribution method based on asynchronous transfer mode passive optical network, it is a kind of mode of fixed-bandwidth, promptly by 1200 double word (totally 4800 clauses and subclauses, i.e. 4800 bytes) sets of bandwidths control form is as the prediction scheme of distributing bandwidth, finish the control of the bandwidth granularity (being control precision) of 256 subchannel 1/4800, this method is controlled each list item correspondence in the form with sets of bandwidths and allocated bandwidth particle (promptly corresponding the cell transmission time interval of linear speed), by 1～4800 particle cycle count, realize the subchannel rate controlled, 8 binary digits of each list item are assigned as the subchannel sign, subchannel according to list item in each cell transmission time interval identifies, send bandwidth application pulse signal to this subchannel, be assigned as the sign of subchannel 123 as 8 binary digits of the 1st list item, 8 binary digits of the 2nd list item are assigned as the sign of subchannel 12, ..., 8 binary digits of the 4800th list item are assigned as the sign of subchannel 9, when grain count is 1, system is with 123 1 cells of schedules sub-channels, grain count is 2 o'clock, system is with 12 1 cells of schedules sub-channels, ..., grain count is 4800 o'clock, system is with 9 one cells of schedules sub-channels, grain count afterwards is 1 again, so moves in circles.System is if desire changes the numerical value that bandwidth can be revised each list item, thus the control of realization bandwidth.This distribution method is fairly simple, but has following shortcoming: 1. low precision, and the bandwidth granularity only is 1/4800 of a total bandwidth, for total bandwidth 155M, the minimum value of its bandwidth variations is 155M/4800=32k; 2. hardware is realized complexity, has used 2 * 4800 registers, has used 2 * 4800 bytes on the active and standby register of hardware; 3. the bandwidth renewal speed is low, because 4800 list items are arranged, revises bandwidth and to rewrite list item one by one more time-consuming, and the bandwidth renewal speed is restricted; 4. pairing ATM cell is that fixed packet is long, is not suitable for the mode of Ethernet bag, and the Ethernet bag itself is elongated.Because above-mentioned shortcoming makes the sets of bandwidths of asynchronous transfer mode passive optical network control the form distribution method, is not suitable for using on the allocated bandwidth of gigabit ethernet passive optical network upstream.
Summary of the invention
The objective of the invention is bandwidth allocation methods based on gigabit ethernet passive optical network system uplink stream, by a subchannel bandwidth occupancy volume segmented afterbody coordinate form, realize the efficient meticulous appointment of subchannel bandwidth occupancy volume, utilize one-level integral processing unit that subchannel bandwidth occupancy volume information (being the quantity of the sent word that As time goes on had of bandwidth occupancy amount BW) is gathered together, send the authorized application signal according to gigabit ethernet passive optical network system authorization size (being called agglomerate) again, finish the granting of bandwidth occupancy amount information, realize the allocated bandwidth of gigabit ethernet passive optical network system uplink stream, make full use of bandwidth occupancy amount information aggregation and bandwidth occupancy amount information and provided two-stage separated structures feature, had the precision height, renewal speed is fast, the characteristics that the hardware implementation complexity is low.
Technical scheme of the present invention is achieved in that
Described bandwidth allocation techniques, the asynchronous transfer mode passive optical network sets of bandwidths is controlled the notion of form by reference, total bandwidth is divided into N part, for example 65536 parts, forms one and have 65536 list items to contain the form (abbreviation list of notion) of sets of bandwidths control form notion as follows:
In list of notion, be defined as the subchannel sign in each list item, the bandwidth of same subchannel gained is expressed as continuous list item numbering in list of notion, as being subchannel sign 0 in the list item of list item numbering 0,1,2,3, expression particle (cell or byte) counting 0,1,2,3 constantly, be 4 particle bandwidth of subchannel 0 scheduling, in 65536 countings altogether, obtained the bandwidth of 4 particles, then subchannel 0 has promptly obtained 4/65536 total bandwidth; Equally, subchannel 1 obtains 253/65536 total bandwidth, and subchannel 2 obtains 1/65536 total bandwidth, and subchannel 3 obtains 2/65536 total bandwidth ..., subchannel 63 obtains 254/65536 total bandwidth; Because list of notion there is no difference conceptive with sets of bandwidths control form, though the bandwidth granularity is 1/65536, hardware is realized quite complicated, if define with 6 bit registers with each list item, needs 65536 * 6=393216 register altogether.Thereby the present invention is divided into a list of notion N list item L section again, for example 65536 list items are divided into 64 sections, each subchannel is corresponding 1 bandwidth time slot on this section, 64 corresponding 64 subchannels of section, for gigabit ethernet passive optical network EPON, be exactly corresponding 64 optical network unit at remote side ONU, thereby it is as follows to form a subchannel bandwidth occupancy volume segmented afterbody coordinate form (being called for short the afterbody coordinates table) that is equivalent to list of notion:
The bandwidth occupancy scale lattice that the present invention adopts
In the afterbody coordinates table, no longer be to be defined as the subchannel sign in per 1 list item, divide segment trailer coordinate figure BSi (i=0 but be defined as subchannel bandwidth, 1, ..., 63), as list item numbering 0 expression subchannel 0, numerical value 3 in the list item numbering 0 is illustrated in the afterbody coordinate figure 3 of list of notion sub-channels 0, list item numbering 1 expression subchannel 1, the numerical value 256 in the list item numbering 1 is illustrated in the afterbody coordinate figure 256 of list of notion sub-channels 1 ..., list item numbering 63 expression subchannels 63, the numerical value 65535 in the list item numbering 63 is illustrated in the afterbody coordinate figure 65535 of list of notion sub-channels 63.At this moment, the length of each section by bandwidth occupancy amount BWi (i=0,1 ..., 63) decide, i section bandwidth occupancy amount is BWi, then:
BWi＝mod(BSi-BSi-1)(i＝0，1，...，63)
And definition BS63=65535=mod (1), the wherein modulo operation of mod () expression 65536
And BSi satisfies inequality: BS0≤BS1≤BS2≤BS3≤...≤BS62
For example, the numerical value in the list item numbering 0 is 3, represents that the 0th section has 3-(1)=4 bandwidth value that belongs to subchannel 0.Be designated as
BS0＝3，
BW0＝mod(BS0-BS63)＝3-(-1)＝4
Numerical value in the list item numbering 1 is 256, represents that the 1st section has 256-3=253 bandwidth value that belongs to subchannel 1.Be designated as
BS2＝256，
BW2＝mod(BS1-BS0)＝256-3＝253
............
The rest may be inferred
Numerical value in the list item numbering 63 is 65535, represents that the 63rd section has 65535-65281=254 bandwidth value that belongs to subchannel 63.Be designated as
BS63＝65535，
BW63＝mod(BS63-BS62)＝65535-65281＝254
Because each list item no longer is to be defined as subchannel sign, but be defined as subchannel bandwidth divide segment trailer coordinate figure BSi (i=0,1 ..., 63), therefore, each list item all can be by M=16 position (M=log
2N, N=65536) register defines, and then needs 64 * 16=1024 bit register altogether.The bandwidth granularity of subchannel (being control precision) is 1/65536, is equivalent to list of notion, when the retentive control precision is higher, makes memory cell greatly reduce, and greatly reduces hard-wired complexity.
Described bandwidth allocation techniques, adopted above-mentioned afterbody coordinates table as the prediction scheme of distributing bandwidth, and the afterbody coordinates table is to the conversion of above-mentioned list of notion, then be to have utilized a bandwidth to specify device 1001 with band width configuration interface capability, by its particle collector (i.e. 65536 counters) 1003, the result of counting is compared with the list item value of afterbody coordinates table, thereby produce the bandwidth appointment quota signal that has same effect with list of notion, be that bandwidth specifies 65536 counters 1003 of device 1001 to count according to system clock, each counting all corresponding a list item numbering of list of notion, its count results will be specified the comparator 1400～1463 of the section appointment device 1300～1363 of corresponding 64 subchannels in the device 1001 by bandwidth, compare with each segment value (afterbody coordinate figure) of input in advance, if it is consistent then send the index signal Ai (i=0 of afterbody coordinate by this section appointment device, 1, ..., 63), again by the index signal Ai (i=0 of these afterbody coordinates, 1, ..., 63) generate corresponding quota signal quotai (i=0,1, ..., 63) (being corresponding afterbody coordinates table effective bandwidth time slot), this quota signal quotai (i=0,1 ..., 63) generation method specifically be according to the result of this section comparator and the last period comparator the result, make the corresponding quota signal quotai of this section (subchannel) (i=0,1 ..., 63) effective, effectively send the effect that integration enables thereby play to each subchannel.
Described bandwidth allocation techniques, the active/standby tail coordinate register 1100～1163 and 1200～1263 of corresponding each section (subchannel) in bandwidth appointment device 1001, be used for receiving the tail coordinate data of the corresponding subchannel that comes from Microprocessor Interface 3000 transmission, active/standby each other multiplexing relation, when it is main use when effective, what it outputed to corresponding section appointment device 1300～1363 is afterbody coordinate figure BSi (i=0,1 prevailing for the time being in force, ..., 63); When its when being standby, Microprocessor Interface 3000 can be upgraded it and write, whole afterbody coordinate figure BSi (i=0,1 ..., 63) write after, carry out active/standby multiplexing switching, the change of realization bandwidth; And active/standby multiplexing switching by Microprocessor Interface 3000 specifies the control switch 1004 of switching of device 1001 to control flexibly by bandwidth, and guarantee that quarter, corresponding 64 sections (subchannel) the whole series were switched when appropriate, when the input signal A_B that switches control switch 1004 is high level, active/standby tail coordinate register 1100～1163 is main usefulness, and 1200～1263 is standby; When the input signal A_B that switches control switch 1004 is low level, active/standby tail coordinate register 1100～1163 is standby, 1200～1263 main usefulness, and switch that all to occur in afterbody coordinate index signal A63 that last (promptly the 63rd) section appointment device 1363 sends be the cycle of high level.
Described bandwidth allocation techniques, after set bandwidth is specified device, corresponding each subchannel is provided with one-level integral processing unit, it is integral processing unit 1500～1563, realize the bandwidth occupancy amount BWi (i=0 of the corresponding numerical value of each list item in the afterbody coordinates table, 1, ..., 63) gathering, and the integrated value by integral processing location counter 1600～1663 when reaching a preset value size at every turn, send an authorized application signal, promptly once provide operation, thereby finish subchannel bandwidth occupancy volume BWi (i=0,1, ..., 63) gathering and reach the granting of preset value size bandwidth occupancy amount information.The implementation method of integral processing unit: supposition is worked as the 2nd section and is specified device 1301 by effective, be that quota signal quota1 is when effective, be considered to an integration in a list item (subchannel) effective period of corresponding afterbody coordinates table (this effective period correspondence system cycle), corresponding integral processing location counter 1601 just adds 1; When the value of this integral processing location counter (is bandwidth occupancy amount value of information BW1, when that is the bandwidth value of this subchannel) reaching preset value delta (defaulting to 7500 words) size, send authorized application signal grant_require1, after obtaining allowing, promptly receive leakage index signal (leakage the makes signal) leakorder1 that the actual granting of bandwidth department (authorize and generate) provides, just carry out leakage operation one time, promptly send the mandate of an agglomerate (for example 7500 words), the value of this integral processing location counter deducts a preset value delta (defaulting to 7500 words) size simultaneously, finishes the granting of this subchannel bandwidth occupancy volume information.Because said structure has been arranged, bandwidth is specified the cycle of providing according to word, and bandwidth request then is that the gathering of word is that agglomerate carries out, thereby has realized the long Ethernet packet scheduling that changes of bag.In addition, the counting of integral processing location counter 1600～1663 is the homologous ray clock synchronization also, makes bandwidth provide synchronously, and coincide with system speed, has guaranteed the reliability of bandwidth distribution.
The hardware that described bandwidth allocation techniques realizes comprises integration bandwidth appointment device 1000, authorizes generative circuit 2000 and Microprocessor Interface 3000.The integration bandwidth specifies device 1000 by Microprocessor Interface 3000, finishes bandwidth and specifies, and its detailed process is: comprise 2 circuit modules in the Microprocessor Interface 3000, one is that 3100, one of read-write control circuits are triple gate group circuit 3200.Read-write control circuit 3100 mainly is that the address is deciphered, and produces control signal and read to enable RE[63:0] and write enable WA[63:0] or WB[63:0].The address decoder of read-write control circuit 3100 is according to address signal ADD[6:0] produce the address of read-write, control produces and to read to enable RE[63:0 when read signal RD is effective] be connected in triple gate group circuit 3200, triple gate group circuit 3200 is according to reading to enable RE[63:0] in which REi (i=0,1, ..., 63) effective, just the data of corresponding list item (be bandwidth occupancy amount value of information BWi, that is the number of the word provided of this subchannel) are put into data/address bus DATA[15:0] on.Control produces to write and enables WA[63:0 when WR is effective] or WB[63:0] be connected in the integration bandwidth and specify the bandwidth of device 1000 to specify device 1001.The integration bandwidth specifies device 1000 by authorizing generative circuit 2000, finishes to authorize generating.Authorize generative circuit 2000 to make signal leakorder0～leakorder63, also accept the authorized application signal grant_require0～grant_require63 of integral processing unit 1500～1563 except sending the leakage that enables to act on.In authorizing generation, by authorizing the poll arbitration generation that generates inside to leak the leakage operation that (leakage makes signal) leakorder0～leakorder63 controls corresponding integral processing unit.Its process prescription is: in authorize generating one 64 counter is arranged, when count down to i (i=0,1 ..., 63), just inquire grant_requirei (i=0,1 ..., 63) whether effective, if effectively just enable leakorderi (i=0,1 ..., 63) signal.And according to the size of preset value delta (defaulting to 7500 words), one by one 64 integral processing unit are implemented to leak generally.The integration bandwidth is specified device 1000 to provide the bandwidth of band width configuration interface capability to specify device 1001 and is contained 64 the integral processing unit corresponding with number of subchannels, 1500～1563 compositions; Bandwidth is specified and is provided with in the device 1001 and can specifies device interface circuit 1002 and 64 sections to specify device 1300～1363 with the bandwidth of Microprocessor Interface 3000 interfaces, specify in bandwidth and correspondingly in the device interface circuit 1002 to be provided with a pair of 16 active/standby each other multiplexing active/standby tail coordinate registers 1100～1163 and 1200～1263 with each section appointment device, its input comes from Microprocessor Interface 3000 (be data/address bus DATA[15:0]), to receive the tail coordinate data value BSi (i=0 of corresponding subchannel, 1, ..., 63), and the master of active/standby tail coordinate register 1100～1163 and 1200～1263, be equipped with the multiplexing A_B signal that sends by Microprocessor Interface 3000 of switching, specify the control switch 1004 of switching of device interface circuit 1002 to control flexibly by bandwidth, its output is connected in the input of corresponding section appointment device 1300～1363, with afterbody coordinate figure BSi (i=0,1, ..., 63) send into corresponding section appointment device 1300～1363, another input of Duan Zhiding device 1300～1363 comes from the output that bandwidth is specified 65536 counters 1003 in the device interface circuit 1002, corresponding integral processing unit quota signal quota0～quota63 that the output of Duan Zhiding device 1300～1363 sends is connected in the input of corresponding integral processing unit 1500～1563, and the back level of integral processing unit 1500～1563 connects authorizes generative circuit 2000.
Advantage of the present invention:
1, owing to adopts subchannel bandwidth occupancy volume segmented afterbody coordinate form as the allocated bandwidth prediction scheme, make the bandwidth granularity (being control precision) of subchannel greatly improve, as in the prediction scheme total bandwidth being divided into 65536 parts, the bandwidth granularity of its subchannel (being control precision) is 1/65536 of total bandwidth.
2, because the allocated bandwidth prediction scheme that adopts is to distribute umber to split into the fragmentation value of corresponding number of sub-channels total bandwidth, be segmented into 64 sections as 65536 parts that total bandwidth is divided into, promptly corresponding 64 subchannels, and by defining gathering and the granting that subchannel bandwidth divides the segment trailer coordinate figure to realize subchannel information, its hardware circuit is all realized that by corresponding number of subchannels (as 64 subchannels) its hardware circuit is more succinct.
3, in the hardware circuit of corresponding subchannel, adopted bandwidth to specify device with band width configuration interface capability, and be provided with active/standby tail coordinate register, adopted the integral processing unit thereafter, improved the response speed and the renewal speed of bandwidth appointment, made and specify or change very quick in gigabit ether or EPON bandwidth.
4, because the grain count homologous ray clock synchronization of integration bandwidth dispatch request method needs only the system clock operation, and bandwidth is just provided synchronously, and coincide with system's speed, the bandwidth that can never occur putting out is greater than or less than actual available bandwidth.Adopt integration bandwidth dispatch request method to guarantee bandwidth distribution reliability.
Description of drawings
Fig. 1 is a subsection integral formula allocated bandwidth hardware logic block diagram.
Fig. 2 is that the integration bandwidth is specified the device building-block of logic.
Fig. 3 is that the integration bandwidth specifies the device stage casing to specify the building-block of logic of device.
Fig. 4 is that the integration bandwidth is specified bandwidth appointment device sequential chart in the device.
Fig. 5 is that the integration bandwidth is specified integral processing cellular logic structure chart in the device.
Fig. 6 is the sequential chart that the integration bandwidth is specified integral processing unit in the device.
Fig. 7 is that the integration bandwidth is specified integral processing cell operation flow chart in the device.
Embodiment
Fig. 1 is a subsection integral formula allocated bandwidth hardware logic block diagram.Hardware components of the present invention comprises integration bandwidth appointment device 1000, authorizes generative circuit 2000 and Microprocessor Interface 3000.The integration bandwidth specifies device 1000 by being connected with mandate generative circuit 2000 logics with Microprocessor Interface 3000, can finish bandwidth specifies, time slot position is distributed to corresponding optical network unit at remote side ONU, and specify the time slot position generated to be encoded into authorization messages the bandwidth, this message will send to optical network unit at remote side ONU.The integration bandwidth specifies device 1000 by Microprocessor Interface 3000, finishes bandwidth and specifies, and its detailed process is: comprise two circuit modules in the Microprocessor Interface 3000, one is that 3100, one of read-write control circuits are triple gate group circuit 3200.Read-write control circuit 3100 mainly is that the address is deciphered, and produces control signal and read to enable RE[63:0] and write enable WA[63:0] or WB[63:0].The address decoder of read-write control circuit 3100 is according to address signal ADD[6:0] produce the address of reading and writing, 64 afterbody coordinate registers need 6 bit address, add that the afterbody coordinate register of backup needs 7 bit address.System reads being operating as of current bandwidth: control produces and to read to enable RE[63:0 when read signal RD is effective] be connected in triple gate group circuit 3200, triple gate group circuit 3200 is according to reading to enable RE[63:0] in which REi (i=0,1, ..., 63) effective, just by opening pairing 16 triple gates of list item, the data of corresponding list item (be bandwidth occupancy amount value of information BWi, that is the numerical value of the word that sends of this subchannel) are put into data/address bus DATA[15:0] on.Being operating as of system configuration bandwidth: control produces to write and enables WA[63:0 when write signal WR is effective] or WB[63:0] be connected in the integration bandwidth and specify the bandwidth of device 1000 to specify device 1001.The integration bandwidth specifies device 1000 by authorizing generative circuit 2000, finishes to authorize generating.Authorize generative circuit 2000 and make signal leakorder0～leakorder63 give the integral processing unit 1500～1563 of integration bandwidth appointment device 1000, also accept the authorized application signal grant_require0～grant_require63 of integral processing unit 1500～1563 except sending the leakage that enables to act on.In authorizing generation, make signal leakorder0～leakorder63 control the leakage operation of corresponding integral processing unit by authorizing the poll arbitration generation that generates inside to leak to leak.Its process prescription is: authorizing in the generation has one 64 counter, when counting down to i (i=0,1, ..., 63), just whether exist effectively among the authorized application signal grant_require0～grant_require63 that inquires integral processing unit 1500～1563 successively, if exist a certain authorized application signal effective, make in leakage then that effectively leak corresponding with it makes signal just be enabled among signal leakorder0～leakorder63, the leakage operation of the integral processing unit that control is corresponding.When the some integral processing of correspondence unit leaks, authorize the value that generates the absolute time stamp time_abs of record that authorizes generator 2100, and with its correction (deducting this value) through RTT two-way time, as beginning parameter S TART in the ethernet passive optical network EPON mandate, media access control MAC address and the logical circuit sign llid with correspondence together sends to optical network unit at remote side ONU equipment as authorized content simultaneously.Authorize generation generally according to the size of preset value delta (defaulting to 7500 words), one by one 64 integral processing unit 1500～1563 are implemented to leak.The control signal A_B that switches to active and standby afterbody coordinate register sends control by Microprocessor Interface 3000.
Fig. 2 is that the integration bandwidth is specified the device building-block of logic.The integration bandwidth is specified device 1000 to provide the bandwidth of band width configuration interface capability to specify device 1001 and is contained 64 the integral processing unit corresponding with number of subchannels, 1500～1563 compositions; Bandwidth is specified and is provided with in the device 1001 and can specifies device interface circuit 1002 and 64 sections to specify device 1300～1363 with the bandwidth of Microprocessor Interface 3000 interfaces, specify in bandwidth and correspondingly in the device interface circuit 1002 to be provided with a pair of 16 active/standby each other multiplexing active/standby tail coordinate registers 1100～1163 and 1200～1263 with each section appointment device, its input comes from Microprocessor Interface 3000 (be the data/address bus DATA[15:0 among Fig. 1]), to receive the tail coordinate data value BSi (i=0 of corresponding subchannel, 1, ..., 63), and the master of active/standby tail coordinate register 1100～1163 and 1200～1263, be equipped with the multiplexing A_B signal that sends by Microprocessor Interface 3000 of switching, specify the control switch 1004 of switching of device interface circuit 1002 to control flexibly by bandwidth, its output end signal A_BSW is connected in the input of corresponding section appointment device 1300～1363, select one group of afterbody coordinate figure BSi (i=0 of active and standby register, 1, ..., 63) enter corresponding section appointment device 1300～1363, another input of Duan Zhiding device 1300～1363 comes from the output that bandwidth is specified 65536 counters 1003 in the device interface circuit 1002, corresponding integral processing unit quota signal quota0～quota63 that the output of Duan Zhiding device 1300～1363 sends is connected in the input of corresponding integral processing unit 1500～1563, and the back level of integral processing unit 1500～1563 connects authorizes generative circuit 2000.
Fig. 3 is that the integration bandwidth specifies the device stage casing to specify the building-block of logic of device.Duan Zhiding device 1300～1363 is by a comparator 1400～1463, d type flip flop 2200～2263 and edge combinational circuit 2300～2363 are formed: comparator 1400～1463 is 16 afterbody coordinate figure BSi (i=0 relatively, 1, ..., 63) and 16 grain count granularity, when both are worth the identical tail tag signal Ai (i=0 that just produces, 1, ..., 63). by edge combinational circuit 2300～2363 collaborative d type flip flops 2200～2263 together, according to previous tail tag signal Ai-1 (i=0,1, ..., 63) and this section appointment device the tail tag signal Ai (i=0,1 that produce, ..., 63) generation quota signal.The method that produces is referring to Fig. 4.
Fig. 4 is that the integration bandwidth is specified bandwidth appointment device sequential chart in the device.The capable waveform of b is represented the waveform of grain count granularity along with the system clock counting.BSi (i=0,1 ..., 63) value be static constant after configuration, a line display value of BS0 be 3.C, d, e ..., the capable waveform of f represented tail tag signal A0, A1, A2 ..., the signal of A63.Wherein the generation of A0 signal is such: grain count granularity count down to 3, and at this moment the value with BS0 is identical, and comparator 1400 has just produced one and has been high signal pulse, and 4 comparative results are unequal counting down to, and comparator is reduced to low level.Produce the A1 pulse signal by comparator 1401 in the corresponding moment equally, produce the A2 pulse signal in the corresponding moment by comparator 1402 ..., produce the A63 pulse signal constantly accordingly by comparator 1463.G, h, i ..., the capable waveform of j represented quota signal quaota0, quaota1, quaota2 ..., the signal of quaota63.Wherein the generation of quota0 signal is such: previous stage tail tag signal A63 makes the value of quaota0 uprise, and tail tag signal A0 at the corresponding levels makes quaota0 be reduced to low level, finishes this function by d type flip flop 2200 and edge combinational circuit 2300.Finishing the quaota1 signal by d type flip flop 2201 and edge combinational circuit 2301 equally produces, finishing the quaota2 pulse signal by d type flip flop 2202 and edge combinational circuit 2302 produces, ..., finish the quaota63 pulse signal by d type flip flop 2263 and edge combinational circuit 2363 and produce.
Fig. 5 is that the integration bandwidth is specified integral processing cellular logic structure chart in the device.The integral processing unit by delta register 2500～2563, subtracter 1900～1963, add a counter 1600～1663, CNT result register 1800～1863, comparator 1700～1763 and application register 001～064 is formed: each clock (62.5MHz frequency), by quotai (i=0,1, ..., 63) and Leakorderi (i=0,1 ..., 63) etc. signal controlling do the operation of integral processing unit.The operation of integral processing unit comprises two: add a counting operation and leakage operation.When the comparator 1700～1763 of integral processing unit surpasses the delta value at the CNT of CNT result register 1800～1863, just allow the value of application register 001～064 be height, expression authorizes generator 2100 to send grant_requirei (i=0 to the actual granting of bandwidth department, 1, ..., 63) authorized application.
The content of leakage operation is: if from the actual granting of bandwidth department mandate generator 2100 obtain Lou making signal leakorderi (i=0,1 ..., 63), this leakage makes signal leakorderi (i=0,1, ..., 63) just make subtracter 1900～1963 carry out subtraction, shown in form:
| leakorder[i] | CNT | delta | Update |
| 0 (low level) | CNT | delta | CNT |
| 1 (high level) | CNT | delta | CNT-delta |
This form has specifically provided the circuit behavior of a subtraction.Be 0 o'clock leaking order wherein, current value directly enters into and adds a counter 1600～1663, does not do subtraction.
Add a counting operation, add exactly a counter 1600～1663 according to quotai (i=0,1 ..., 63) control one the counting operation of doing to progressively increase.As quotai (i=0,1 ..., 63) during signal (being high level " 1 "), just carry out add one operation; When quotai (i=0,1 ..., 63) when signal is low level " 0 ", keep original count value.
| | Update | F | |
| 0 | | Update | |
| 1 | Update | Update+1 |
Above-mentioned 2 operate in same system and finish in the clock cycle.At the rising edge of system clock, operation result F is input to the output (be CNT[18:0]) of CNT result register 1800～1863.
If CNT[18:0 as a result] be maximum (65536*8-1), then keep this value constant, up to have leakage make signal leakorderi (i=0,1 ..., 63).
Fig. 6 is the sequential chart that the integration bandwidth is specified integral processing unit in the device.Further specify the structure of integral processing unit in conjunction with the sequential chart of Fig. 6 integral processing unit.At T0 constantly, because the mandate quota signal quotai of integral processing unit (i=0,1 ..., 63) be that low level is invalid, so the value CNT of integral processing unit does not do integration operation, CNT keeps its value n+2+delta.T1 constantly since have leakage signal (leakage makes signal) leakorderi (i=0,1 ..., 63), the integrated value CNT of integral processing unit becomes n+2 constantly at T1, has carried out leakage operation.At T5 constantly, since the leakage of integral processing unit make signal leakorderi (i=0,1 ..., 63) be that high level is effective, so the value CNT of integral processing unit does leakage operation at T6, the CNT value becomes n+6-delta from n+5, owing to there is signal to carry out the quota signal quotai (i=0 of integration operation, 1, ..., 63) signal, this moment has also been made integration operation one time.
Fig. 7 is that the integration bandwidth is specified integral processing cell operation flow chart in the device.In conjunction with Fig. 6 sequential chart, Fig. 7 further illustrates the working method of integral processing unit 1500～1563 in the mode of flow chart.In the middle of each rising edge, the integral processing unit carries out three judgements: whether whether currency CNT have leak order greater than delta, and whether integration allows signal.When eligible, just do corresponding operation.
Claims (2)
1. the subsection integral formula bandwidth allocation methods of a gigabit ethernet passive optical network upstream comprises:
Optical network unit at remote side upstream channel bandwidth assignment of allocation prediction scheme, the sets of bandwidths notion control form of promptly quoting asynchronous transfer mode passive optical network sets of bandwidths control form notion and forming distributes prediction scheme, the up channel of optical network unit at remote side upstream channel bandwidth assignment of allocation prediction scheme to be sets of bandwidths notion control form and distributes the subchannel of prediction scheme;
It is characterized in that described bandwidth allocation methods also comprises:
By to total bandwidth in the optical network unit at remote side upstream channel bandwidth assignment of allocation prediction scheme the list item of branch share correspondence carry out segmentation, subchannel of every section correspondence, each subchannel is corresponding 1 bandwidth time interval on its corresponding section, form subchannel bandwidth occupancy volume segmented afterbody coordinate form, each list item is numbered corresponding subchannel numbering in the subchannel bandwidth occupancy volume segmented afterbody coordinate form, list item value defined in the list item is that subchannel bandwidth divides the segment trailer coordinate figure, decide the subchannel bandwidth occupancy volume, the realization subchannel can send the numerical value of word and determine, finish the appointment of subchannel bandwidth, and then formation subchannel bandwidth occupancy volume segmented afterbody coordinate form distributes prediction scheme, subchannel bandwidth occupancy volume segmented afterbody coordinate form distributes prediction scheme to be different from optical network unit at remote side upstream channel bandwidth assignment of allocation prediction scheme, but subchannel bandwidth occupancy volume segmented afterbody coordinate form distributes prediction scheme and the equivalence of optical network unit at remote side upstream channel bandwidth assignment of allocation prediction scheme;
Sets of bandwidths notion control form in the optical network unit at remote side upstream channel bandwidth assignment of allocation prediction scheme, equivalent transformation with subchannel bandwidth occupancy volume segmented afterbody coordinate form distribution prediction scheme sub-channels bandwidth occupancy amount segmented afterbody coordinate form, be to specify the bandwidth that has the band width configuration interface capability in the device to specify device to realize by the integration bandwidth, its solution is that the integration bandwidth is specified the counter in the bandwidth appointment device that has the band width configuration interface capability in the device, count according to system clock, each counting all corresponding a list item numbering of sets of bandwidths notion control form, its count results will be specified the comparator of the section appointment device of corresponding 64 subchannels in the device by bandwidth, compare with each segment value of input in advance, each segment value is meant the list item value of subchannel bandwidth occupancy volume segmented afterbody coordinate form, it is the afterbody coordinate figure, send the index signal of afterbody coordinate by this section appointment device if comparison is consistent, index signal by these afterbody coordinates generates corresponding quota signal again, the generation method of this quota signal specifically be according to the result of this section comparator and the last period comparator the result, make that the corresponding quota signal of this cross-talk channel is effective, promptly the corresponding quota signal of this subchannel is effective; Each segment value comes from the corresponding a pair of active/standby tail coordinate register of each section appointment device in the section appointment device of 64 subchannels, when one of in a pair of active/standby tail coordinate register being main using when effective, it outputs to the afterbody coordinate figure prevailing for the time being in force that is of corresponding section appointment device, and accept active/standby multiplexing the switching of the active/standby tail coordinate register of control, all occurring in the afterbody coordinate index signal that last section appointment device sends in the section appointment device of 64 subchannels is the cycle of high level;
The gathering of subchannel bandwidth occupancy volume, and the granting of bandwidth occupancy amount information, it is the granting that subchannel can send the numerical value of word, specify the integral processing unit of quota signal to realize by receiving bandwidth, its solution is after the integration bandwidth specifies the bandwidth that has the band width configuration interface capability in the device to specify device, corresponding each subchannel is provided with one-level integral processing unit, effective bandwidth of every reception is specified the quota signal, the integrated value of integral processing location counter just adds 1, realize the gathering of the bandwidth occupancy amount of the corresponding numerical value of each list item in the subchannel bandwidth occupancy volume segmented afterbody coordinate form, and the integrated value by the integral processing location counter when reaching a preset value size at every turn, send a bandwidth request signal, promptly once provide operation, thereby finish the gathering of a subchannel bandwidth occupancy volume and reach the granting of preset value size bandwidth occupancy amount information;
The granting of every next preset value size bandwidth occupancy amount information in integral processing unit, realize by the mandate generative circuit that is used to receive integral processing unit bandwidth request, its solution is the every number of counting of cycle counter of authorizing generative circuit, whether the authorized application signal of just inquiring corresponding integral processing unit is effective, if effectively make signal with regard to sending the leakage that enables to act on, control the leakage operation of corresponding integral processing unit, promptly, send the granting of leaking indication control integral processing unit to the integral processing unit that needs the bandwidth granting by circulation inquiry integral processing unit bandwidth request;
The renewal of bandwidth is to send read-write by Microprocessor Interface to wait the control enable signal, the subchannel bandwidth occupancy volume is delivered to the integration bandwidth specifies the bandwidth that has the band width configuration interface capability in the device to specify the data/address bus of device, controlling active/standby multiplexing the switching of active/standby tail coordinate register realizes, its solution is to specify the bandwidth that has the band width configuration interface capability in the device to specify in the device in the integration bandwidth, the active/standby tail coordinate register of corresponding each subchannel, be used for receiving the tail coordinate data of the corresponding subchannel that comes from the Microprocessor Interface transmission, active/standby each other multiplexing relation, when it is main use when effective, what it outputed to corresponding section appointment device is afterbody coordinate figure prevailing for the time being in force; When its when being standby, Microprocessor Interface can be upgraded it and write, and after all the afterbody coordinate figures have been write, carries out active/standby multiplexing switching, the change of realization bandwidth; And active/standby multiplexing switching by Microprocessor Interface specifies the bandwidth that has the band width configuration interface capability in the device to specify the control switch of switching of device to control flexibly by the integration bandwidth, and guarantees that quarter, corresponding all subchannel the whole series were switched when appropriate.
2. bandwidth allocation methods according to claim 1 is characterized in that:
The implementation method that the big or small bandwidth occupancy amount of every next preset value in integral processing unit information is provided is for working as certain section appointment device by effective, when the quota signal of i.e. this section appointment device is effective, a list item at corresponding subchannel bandwidth occupancy volume segmented afterbody coordinate form has been considered to an integration in effective period, corresponding integral processing location counter just adds 1; Value when this integral processing location counter, be the bandwidth occupancy amount value of information, that is the bandwidth value of this subchannel, when reaching the preset value size, send the authorized application signal, after obtaining allowing, promptly receive the leakage index signal of authorizing generative circuit to provide, i.e. leakage makes signal, just carry out leakage operation one time, promptly send the mandate of an agglomerate, the value of this integral processing location counter deducts a preset value size simultaneously, finishes the granting of this subchannel bandwidth occupancy volume information; The counting of integral processing location counter is the homologous ray clock synchronization also, makes bandwidth provide synchronously, and coincide with system speed.
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