CN100403505C - Methodology for repeatable post etch CD in a production tool - Google Patents
Methodology for repeatable post etch CD in a production tool Download PDFInfo
- Publication number
- CN100403505C CN100403505C CNB038080710A CN03808071A CN100403505C CN 100403505 C CN100403505 C CN 100403505C CN B038080710 A CNB038080710 A CN B038080710A CN 03808071 A CN03808071 A CN 03808071A CN 100403505 C CN100403505 C CN 100403505C
- Authority
- CN
- China
- Prior art keywords
- wafer
- critical dimension
- etching
- photoresist
- profile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 91
- 238000004519 manufacturing process Methods 0.000 title description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 111
- 238000012545 processing Methods 0.000 claims abstract description 70
- 230000008569 process Effects 0.000 claims abstract description 42
- 238000005259 measurement Methods 0.000 claims abstract description 41
- 239000004065 semiconductor Substances 0.000 claims abstract description 23
- 238000004140 cleaning Methods 0.000 claims abstract description 16
- 238000012546 transfer Methods 0.000 claims abstract description 10
- 238000005530 etching Methods 0.000 claims description 154
- 238000003754 machining Methods 0.000 claims description 23
- 230000003287 optical effect Effects 0.000 claims description 17
- 238000005516 engineering process Methods 0.000 claims description 14
- 239000000428 dust Substances 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 6
- 238000002310 reflectometry Methods 0.000 claims description 6
- 239000006228 supernatant Substances 0.000 claims 2
- 238000009826 distribution Methods 0.000 abstract description 2
- 238000011109 contamination Methods 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 107
- 238000012544 monitoring process Methods 0.000 description 15
- 238000009966 trimming Methods 0.000 description 12
- 238000004458 analytical method Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 9
- 238000013461 design Methods 0.000 description 8
- 230000008859 change Effects 0.000 description 5
- 238000001459 lithography Methods 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 238000004626 scanning electron microscopy Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 238000007689 inspection Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 238000013401 experimental design Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000007514 turning Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 241000221096 Simmondsia chinensis Species 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000013400 design of experiment Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000003467 diminishing effect Effects 0.000 description 1
- 238000000572 ellipsometry Methods 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 238000001393 microlithography Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 230000001915 proofreading effect Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- -1 structure Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Images
Abstract
A method and apparatus for processing a semiconductor wafer is provided for reducing dimensional variation by feeding forward information relating to photoresist mask CD and profile to adjust the next process the incepted wafer will undergo (e.g., a Photoresist trim process.) After the processing step, dimensions of a structure formed by the process, such as the CD of a gate formed by the, are measured, and this information is fed back to the process tool to adjust the process for the next wafer to further reduce dimensional variation. By taking into account photoresist CD and variation when choosing a resist trim recipe, post-etch CD is decoupled from pre-etch CD and profile. With automatic compensation for pre-etch CD, a very tight distribution of post-etch CD is achieved. In certain embodiments, the CD and profile measurements, trim, etch processing and post-etch cleaning are performed at a single module in a controlled environment. All of the transfer and processing steps performed by the module are performed in a clean environment, thereby increasing yield by avoiding exposing the wafer to the atmosphere and possible contamination between steps.
Description
Related application
The application is based on the U.S. Provisional Application that proposed on March 1st, 2002 and require its priority, and this provisional application sequence number is 60/361,064.
Technical field
The present invention relates to be used to monitor and control the method and apparatus of the course of processing of Semiconductor substrate, more particularly, the method and apparatus that relates to the critical dimension (CD) that is used to be controlled at formed feature on the Semiconductor substrate, above-mentioned control are to be undertaken by feedback and the feed-forward information of being gathered during the feature monitoring in the processing.The present invention is particularly useful in the production process of the high-density semiconductor device with sub-micron design feature, to the on-line monitoring of semiconductor wafer.
Background technology
Depend on the raising of sub-micron features, transistor and circuit speed and the improvement of reliability with corresponding high density of vlsi level and high performance requirement now.This requires to form device feature with high accuracy and consistency, and then requires to carry out the careful monitoring of the course of processing, comprises when device also is in the semiconductor wafer form it is carried out frequent and careful monitoring.
The important course of processing of a careful monitoring of needs is photoetching, wherein utilizes mask that circuit pattern is delivered on the semiconductor wafer.Use a series of aforementioned mask with a kind of default order typically.Each mask comprises a complex set of geometrical pattern, and it is corresponding to the circuit element that will be integrated on the wafer.Utilize each mask in this series that its corresponding pattern is delivered on the photosensitive layer (photoresist layer just), this photosensitive layer be coated in advance one as polysilicon layer or metal level be formed on the silicon wafer the layer on.Mask pattern is delivered to normally utilizes a kind of optical exposure instrument to finish as scanner or stepping projection exposure machine on the photoresist layer, this tool guide light or other ray pass mask photoresist are exposed.Thereafter, photoresist is developed to form a photoresist mask, and the polysilicon layer of below or metal level are subjected to selectable etching according to this mask, thereby form each feature such as circuit or grid.
A series of design standards that are predetermined are followed in the manufacturing of mask, and these standards are stipulated according to processing and design limit.These design standards limit the tolerance of interval between each device and the interconnective circuit and the tolerance of the width of circuit own, can be not overlapping or influence each other in undesirable mode to guarantee these devices or circuit.Above-mentioned design rule limitation is called critical dimension (" CD "), is defined in the minimum interval that allows between the minimum widith of a circuit in the manufacturing of device or two circuits.The critical dimension of most of ultra-large integrated application is in sub-micrometer scale.
One is considered to " photoresist fine setting " to the vital relevant course of processing of critical dimension.As what those those skilled in the art recognized, in photoetching technique, it is very expensive and complexity utilizing light to come the sub-micron features on the photoresist layer is exposed.And when the characteristic line width of needs becomes more hour, the limits value of lithography process usually can be exceeded.For example, it is more prevalent that the live width of 50～70 nanometers is just becoming, but the live width that lithography process can produce is not less than 100～120 nanometers usually.Therefore, developed multiple technologies, utilized lithographic equipment that the feature greater than required size is exposed, and after above-mentioned exposure, with a course of processing that is called the photoresist fine setting with feature " reduction " size to the end that is exposed.The performance of photoetching technique has been expanded in the photoresist fine setting, can the actual photoresist critical dimension that will be printed reduce 30% at most by utilizing plasma etch step.Specifically, when the feature of oversize be exposed be developed with photoresist after, wafer is sent to an etching chamber, finishes " the photoresist etching step " of a particular design, this normally the grade of a photoresist characteristic size that is used for reducing being printed as to etching step.With after etching actual characteristic (for example a polysilicon gate or a metallic circuit), this normally utilizes different etching schemes to carry out at identical or different etching chamber.
Along with the reduction of drawingdimension and diminishing of process window (that is the error range in the course of processing), to the monitoring of the critical dimension of surface characteristics and the shape of cross section (" profile ") thereof with measure the ever more important that becoming.The critical dimension of a feature and profile off-design size may influence the performance of made semiconductor device unfriendly.And, can point out problem in the course of processing to the measurement of a feature critical dimensions and profile, for example the stepping projection exposure machine defocuses or because the over-exposed photoresist loss that causes.
A kind of method that is used for monitoring and proofread and correct cd variations is by selecting one or more testing wafers from a collection of wafer (they have been exposed and have developed to produce the feature greater than required size) and measure representative photoresist feature critical dimensions according to these testing wafers and realize, wherein above-mentioned measurement for example utilizes critical dimension scanning electron microscopy (CD-SEM) to carry out.These wafers are subject to processing by a photoresist etching step and a gate etch step then, and measure the critical dimension of etched feature.Initial critical dimension and last critical dimension measurements are used to adjust the etching scheme, make their critical dimension reach desired value for use in the residue wafer in this batch wafer.Critical dimension surveillance technology according to routine, the critical dimension measurement of sample wafer (promptly to the initial measurement that is formed on the photoresist feature on the wafer with thereafter to the measurement of grid) is gone up off-line in a scanning electron microscopy (SEM) and is finished, and the critical dimension of a special characteristic is not used to determine to process the etching scheme of this wafer on the wafer.And when adjusting the etching scheme, do not measure and consider the profile of feature according to routine techniques.If the reader wants to know the more information of state of the art, for instance, can directly search people's such as Toprac No. the 5th, 926,690, United States Patent (USP).
Along with advanced technologies is controlled the extensive employing that (APC) obtaining the semiconductor maker, manufacturers of semiconductor devices is subjected to providing the continuous increased pressure of integrated course of processing control technology scheme day by day.Be lower than 130nm along with characteristic size tapers to, promoted demand APC to the demand of very strict machining tolerance and to the demand that the production efficiency that surpasses 1,000,000,000 dollars factory is improved.
Need a kind of simple and cost-effective method, so that discern and proofread and correct the deviation of critical dimension and profile fast and effectively but can not reduce output or output significantly.Need a kind of robust and effective apparatus and method equally, so that accurately carry out photoresist fine setting and etching operation.
Summary of the invention
An advantage of the invention is can be by collected information during the monitoring in the course of processing of utilizing wafer, the critical dimension of the feature that reduces to form on the semiconductor wafer and profile variation, and do not reduce output or output.
According to the present invention, above-mentioned and other advantage part is by being to realize by a kind of device that is used for processing semiconductor wafer, this device comprises: a survey tool, be used to measure the critical dimension and the pattern sidewalls profile of the pattern on patterned layer, this patterned layer is to form on the bottom on the wafer, for example a patterning photoresist mask that is formed on the conductive layer; A machining tool, etching machine for example is used for carrying out processing to wafer by first group of machined parameters value; And a processor, this processor is used for selecting above-mentioned first group of machined parameters value (for example etching scheme) according to the measured value of critical dimension and profile through configuration.
Of the present invention one more the deep layer aspect be a kind of device that is used for processing semiconductor wafer, this device comprises: a survey tool, be used to measure the critical dimension and the pattern sidewalls profile of the pattern on patterned layer, this patterned layer is to form on the bottom on the wafer; A machining tool is used for carrying out processing to wafer by first group of machined parameters value; A processor, this processor is used for selecting above-mentioned first group of machined parameters value according to the measured value of critical dimension and profile through configuration; A conveyer is used for transmitting wafer between above-mentioned survey tool and machining tool; And a chamber, be used to seal conveyer, and allow being transmitted under the clean environment between conveyer, survey tool and the machining tool to carry out.
To one skilled in the art, other advantages of the present invention can be understood at an easy rate from following detailed description, and in the detailed description below,, show and described illustrative embodiment more of the present invention only by explanation to the realization best executive mode of the present invention conceived.Can recognize that the present invention is fit to other different embodiment, and its a plurality of details can make amendment a plurality of aspect tangible, and all modifications does not all depart from the present invention.Therefore, it is illustrative that drawing and description should be considered in essence, but not determinate.
The accompanying drawing summary
With reference to the accompanying drawings, the element that wherein has a same reference numeral designations is the element of TYP all the time, wherein:
Fig. 1 is the block diagram according to the device of one embodiment of the invention.
Fig. 2 is the flow process chart of an embodiment of the invention.
Fig. 3 is the continuous flow chart of steps according to the method for one embodiment of the invention.
Fig. 4 A～4D is the diagrammatic representation according to the characteristic of the trim process process of one embodiment of the invention.
Fig. 5 A～5B is the diagrammatic representation according to the wafer process result of one embodiment of the invention.
Fig. 6 A～6E illustrates processing module according to the embodiment of the invention.
Fig. 7 is a continuous flow chart of steps according to the method for the embodiment of the invention.
Specific embodiment
The present invention utilizes optical CD (OCD) measurement Law to monitor each wafer to determine critical dimension and the profile before the etching, utilizes monitoring result to determine machined parameters then, and for example photoresist is finely tuned time and/or etching parameter.In this way, the present invention can realize accurate final critical dimension and overall size.The next course of processing (for example photoresist trim process) of the present invention by will the information relevant with profile feedovering and adjust monitored wafer with photoresist mask critical dimension, thus critical dimension control problem solved to reduce critical dimension variations.In certain embodiments of the present invention, the critical dimension before the etching and measurement, etching, the cleaning of profile, and the measurement of critical dimension is all carried out under in check environmental condition fully after the etching.By on main frame and/or factor interface (factory interface), providing etching, cleaning and survey tool, make wafer can be etched before turning back to wafer case, cleaning and monitoring, thereby reduce process time and expense.
The OCD measurement technology that the present invention uses is the APC enabler, and at having utilized new technology based on the system of the SEM not enough increasingly critical dimension measurement field that adapts to that just becoming at present.For example, the detailed outline that can not provide under the online harmless SEM situation utilizing is provided the incident spectroscope of standard (incidence spectroscopic) OCD metering system.The compact size of OCD technology and speed can be fully integrated in in the machining tool measuring system of the present invention, for example the DPS II etch system of Applied Materials Inc.When combining with APC software, this will provide a kind of complete feed-forward type solution for the closed-loop control of wafer one by one.
An example benefiting from the procedure of processing of complete feed-forward type solution of the present invention is the etching and processing to the size sensitivity of introducing photoresist (PR).Critical dimension control is especially crucial concerning the etching of grid, and in gate etch, the speed of device will be decided by final gate cd.In the case, the deviation of the photoresist mask critical dimension of introducing causes a proportional deviation of critical dimension after the final etching.Before etching, measure introducing photoresist mask critical dimension and can adjust the deviation that etch process is caused by photoetching with compensation.
The method according to this invention, on wafer, form a bottom such as conductive layer, for example by means of the lithography process on " photoelectric cell " (carrying out photoresist developing again), on this bottom, form a patterned layer such as photoresist mask again as exposure on the stepping projection exposure machine.Utilize integrated metering units to monitor pattern on the mask, thereby determine its critical dimension and profile as an optical inspection tool.Then with the etching chamber of wafer handling to a routine, in this chamber, utilize measured photoresist critical dimension and profile to adjust photoresist trimming scheme (for example finely tuning the time), count the non-linear factor of intrinsic etch uniformity of etching machine and trim curve simultaneously by processor.
The photoresist pattern that utilizes the process fine setting afterwards carries out etching as a mask to bottom.After the etching, clean wafer optionally, this for example peels off by the photoresist dust and then washes step by one and carry out, again wafer handling is gone back to above-mentioned integrating metrology unit, measure critical dimension, profile and the degree of depth of formed each feature of etching and processing in this unit, and itself and desired size are compared.This information can be fed back to processor (for example being used for compensating etching and processing drift or photoelectric cell problem) by adjusting trimming scheme when the next wafer of etching.
By when selecting the photoresist trimming scheme, counting photoresist critical dimension and profile variation, the present invention reduced critical dimension and profile before the etching to etching after the influence of critical dimension.The deviation that critical dimension by measure introducing photoresist and adjust the fine setting time, etching and processing can compensate wafer to the back when carrying out photoetching.Utilize the automatic compensation of introducing photoresist critical dimension in the lithography step, can obtain one by the present invention and distribute and far be critical dimension after the etching more closely, and finally the uniformity of critical dimension becomes the etching standard of a reality and can not have influence on the production efficiency of etch tool.
One exemplary embodiment of the present invention are to utilize the monitoring tool in the processing line 300 to realize, as shown in Figure 1, this monitoring tool comprises survey tool 310, it for example is the such optical measurement instrument of the Nano OCD that can buy from the Nanometrics company of California, USA Milpitas 9000, or United States Patent (USP) the 5th, 963, No. 329 disclosed optical image formers.Optical measurement instrument 310 can utilize scatterometry technology or reflectometry technique.The scatterometry technology is disclosed in the paper " Angle-resolved scatterometry for semiconductor manufacturing " of Raymond in the winter in 2000 " Microlithography World " for the purposes of monitoring tool.Reflectometry technique is proposed by Lee for the purposes of monitoring, sees the article " Analysis fo Reflectometry and Ellipsometry Data fromPatterned Structures " in AIP's international conference in 1998 " Characterization and Metrology for ULSI Technology:1998International Conference (quality in the vlsi technology is identified and metrology) ".
One embodiment of the present of invention can be described in detail with reference to figure 1～3.With reference now to flow process chart shown in Figure 2,, the mach wafer W of insulated body etching is comprised substrate 200, be formed with a conductive layer 210 on this substrate, as the polysilicon layer that obtains by deposition process.Be formed with a photoresist layer 250 (i.e. the photoresist mask that on photoelectric cell 360, forms) that has pattern P on the conductive layer 210.Can between conductive layer 210 and photoresist layer 250, form an anti-reflection film (ARC) layer (not shown) with conventional mode with auxiliary lithography process.In addition, can on conductive layer 210, form a silicon nitride layer (not shown), by utilize photoresist layer 250 to its etched pattern to form one " hard mask ".Pattern P has the CD0 of mark among initial critical dimension such as Fig. 2.Shown in the flow chart of Fig. 3, wafer W is sent to survey tool 310 in step 3000 from photoelectric cell 360, there with critical dimension and the profile of optical instrument measured pattern P.The measurement of critical dimension and profile representatively on wafer a plurality of diverse locations (pattern P just) carry out.The quantity of measuring finally is subjected to the restriction that needs of etching and processing output, and is processed maturity and Effect on Performance in the past.In general, the immature more quantity measured of then needing of processing is just many more.Typically approximately need take 5 samples to measure, comprise top, the left side, bottom, back and the centre of wafer for instance.The critical dimension of tested feature and profile are used by the subsequent step of this method by after average again.
In step 3100, by the etch process parameters (being trimming scheme) that processor 320 uses the critical dimension that measures and profile to determine wafer W, this for example carries out by means of an equation of considering critical dimension and profile angle measurement and etching machine 370 characteristics.Can comprise etching power, etching period, etching gas flow rate and pressure, magnetic field intensity and magnetic field profile by the etch process parameters that processor 320 utilizes above-mentioned equation to be adjusted.
In order to obtain correct final critical dimension and profile, can adjust photoresist fine setting and bottom etching scheme simultaneously to each wafer.For example, final critical dimension is subjected to maximum effect of trimming scheme, and final profile is subjected to maximum effect of etching scheme.Before producing beginning, the relation between the critical dimension of measuring before the etching and profile, fine setting and etching scheme and final critical dimension and the profile is determined by experience.By at first determining preceding critical dimension of etching and profile, carry out fine setting and etching and processing thereafter again, mapping result is carried out a series of experiments then.For instance, the experiment that can carry out a series of change fine setting times and etching scheme obtains best result, and determines how each fine setting and etching scheme influence final result.Experimental result can represent that processor calculates fine setting and etched parameter with them in process of production with algorithm or equation.
In one embodiment of the invention, change the photoresist fine setting time, simultaneously other parameters in the trimming scheme and the etching scheme of bottom remained unchanged.In this embodiment of the present invention, before can carrying out integrated OCD/ etching and processing, must determine " trim curve " that is used for calculating the fine setting time.This relates to the execution method of experimental design, and (Design of Experiment DOE), wherein with the different a series of wafers of fine setting time etching, and keeps the remainder of fine setting etching scheme constant.Fig. 4 A is the example of a trim curve.Shown in amount trimmed (before the etching and the difference of the critical dimension after the etching) be the two function of fine setting time and photoresist (PR) Sidewall angles.The relation curve of amount trimmed and photoresist Sidewall angles (SWA) is shown among Fig. 4 B.For fear of make the heterogeneity of wafer become complicated owing to the heterogeneity before etching machine and the etching, data all are that the identical chips the etched wafer series is gathered under the same terms.As can be seen from Figure 4B, amount trimmed increases along with the increase of Sidewall angles (SWA).This specific character is from also being correct instinctively, and (be SWA＞90 °) causes the loss of critical dimension in etch process because recessed profile.
Give critical dimension after the etching that sets the goal for one, determine that with what the trim curve of Fig. 4 A illustrated the fine setting time this curve is a function of the Sidewall angles shown in Fig. 4 C.According to two formula shown in Fig. 4 C, the relation curve of amount trimmed and fine setting time and Sidewall angles can be combined into a single mathematical formulae.If suppose that all responses are all linear with the time, shown in Fig. 4 C, the then variation of critical dimension (being Δ CD) can be represented by following linear equation:
(1)ΔCD＝R(Δ)t+S(A)
Wherein t is the fine setting time, and R (A) and S (A) are then provided by following equation 4 and equation 5.If two fine setting times on definite trim curve are designated as t
1And t
2, t wherein
2Greater than t
1, Sidewall angles is designated as A, promptly has
(2)ΔCDt
2＝R(A)t
2+S(A)＝p
2A+q
2
With
(3)ΔCDt
1＝R(A)t
1+S(A)＝p
1A+q
1
Wherein p and q are the constants (for example constant that provides in the equation shown in Fig. 4 C) that obtains by well-known linear best fit analysis.
Can solve R (A) and S (A) by equation (2) and (3), as follows:
R(A)＝((p
2-p
1)A+q
2-q
1)/(t
2-t
1)
S(A)＝((p
1t
2-p
2t
1)A+q
1t
2-q
2t
1)/(t
2-t
1)
Equation (4) and (5) can be produced a formula of determining required fine setting time t by substitution equation (1), so that to critical dimension and Sidewall angles before the given etching, and the target critical dimension after the acquisition etching.This formula is used by processor 320 in step 3100.
In another embodiment of the present invention, described method has also been considered this fact: the relation curve of fine setting time and photoresist amount trimmed is non-linear, shown in Fig. 4 D.Therefore, the present invention can realize accurate more photoresist fine setting.
In order to test critical dimension control method of the present invention, 130 ± 1nm has processed a series of wafer with final goal critical dimension.Critical dimension is 162.6nm before the average etching, and wherein omnidistance variation (full range) (maximum-minimum value) is 8.36nm.Finish 9 sampled points and measure on each wafer, the average cd of each wafer and photoresist Sidewall angles are fed forward to etching machine.Unique variation is the fine setting time in the whole course of processing, and it is calculated automatically according to the trim curve information of being stored in scheme.The result that Fig. 5 A demonstrates shows that critical dimension distributes and significantly reduces with respect to the distribution before the etching after the final etching.The whole process of post etch wafer average cd changes from 8.36nm and is reduced to 1.61nm after the etching.Strict control has also realized critical dimension 130.1nm after the final etching, has reached target zone 130 ± 1nm.
In order to obtain these results, useful is to have a kind of highly stable etching machine, because whole system is not to operate under closed-loop control usually.In other words, for the etching that can use best known method and trimming scheme and they remain unchanged, must at first determine the feature of etching chamber.For example, the trim curve of showing among Fig. 4 A, employed wafer is processed in Fig. 5 A a few days ago just determines.Cd results has shown the stability of fabulous etching machine after the final etching.In the certain embodiments of the invention that are discussed below, because the drift that etching work procedure causes, final critical dimension and profile result can be fed back to processor 320, so that adjust trim curve (and fine setting time).In this way, just can lack long-term stability with respect to etching chamber.
For the gate cd control problem that exists in the semi-conductor industry now, the present invention proposes a kind of solution of uniqueness.It solves this problem by measuring photoresist critical dimension and profile simultaneously.In measurement, comprise the photoresist profile, make to photoresist Sidewall angles (" θ conversion ") role for the first time to have a secondary to proofread and correct.Fig. 5 B shows the importance of θ conversion, and wherein critical dimension after the actual measurement etching that will be obtained by the θ conversion does not have Sidewall angles to proofread and correct the analogue data that is obtained and compares with only there being critical dimension to proofread and correct.Shown in Fig. 5 B, utilize the θ conversion, making distributes after the etching is reduced to 0.62nm from 2.72nm.
Refer again to Fig. 3, in step 3200, utilize the equation of determining with experience to determine trimming scheme (that is fine setting time), photoresist layer 250 is carried out etching with this trimming scheme by processor 320.It the results are shown in the right side of Fig. 2, and wherein pattern P is fine-tuning to size CD
1At step 3300 etching bottom 210, this normally carries out in same etching chamber then, causes forming structure S (seeing the right side of Fig. 2 bottom).Optionally wafer W delivered to a photoresist ash strip chamber (referring to step 3400), in step 3500, it is sent back to survey tool 310 more thereafter.Several position on wafer W, the position that photoresist layer 250 is measured before step 3000 pair etching for example, the critical dimension of measurement structure S and profile.
Critical dimension after the etching and profile information are provided for processor 320, adjust fine setting and/or the etching scheme that the next one is treated etched wafer in the deviation of this available information and objective result.For example, according to the critical dimension of actual measurement and the method for experimental design model of profile and prior exploitation, can determine the processing drift of etching machine; Etching that Here it is mach " maturing " etching machine in other words is on its line process time (timeline).Can adjust the etching scheme to next wafer then, make etching result approach desired value more.Information also can be fed back to processor 320 after the etching, so that the problem in the course of processing of discovery and correction front; For example, if the photoresist on a collection of wafer is toasted under the temperature of mistake, then its fine setting speed will be different.Therefore, if this mistake is measured and found to first etched wafer, can adjust the fine setting time of all the other wafers so that compensation by processor 320.In addition, if the dimensional discrepancy that is measured to surpasses predetermined boundary value, if or the result of processing change violently from a wafer to next wafer, just can produce an alarm, indication should etcher; For example place under repair or maintenance.
Though adjusting the photoresist fine setting time, previous embodiment of the present invention keep all the other parameters of trimming scheme and bottom etching scheme constant, be understandable that, in the further embodiment of the present invention, other fine setting parameters of each wafer all are variable, and the bottom etching scheme of each wafer also is variable.For example, etching and/or trimming scheme can be adjusted, and compensate so that closely change at the deviation from a wafer to the equilateral critical dimension of next wafer.This class embodiment needs a kind of suitable contrived experiment method to derive suitable equation, so that be used for selecting the parameter value of trim/etch process by processor 320.
It should be understood that equally the present invention is based on measured critical dimension and profile adjusts the method for etching and processing and be not limited to the photoresist trim process.When not carrying out the photoresist fine setting, described method also can be used.Because the etching rear profile depends on the photoresist profile, utilize method of the present invention, according to the photoresist profile Sidewall angles that measures, the etching rear profile of any etched pattern all can obtain adjusting.
In the further embodiment of the present invention, a kind of semiconductor wafer processing device is provided, in this device, wafer is shifted out from wafer case, utilize the measurement of optical measurement instrument to be formed at the critical dimension and the profile of the pattern of the patterned layer on this wafer again.According to the measured value of above-mentioned pattern critical dimension and profile, select to use one group of machined parameters value then,, wafer is processed, as etching and processing as a fine setting or etching scheme.Processing after the etching is removed and is washed cleaning as dust, can optionally utilize said apparatus to carry out, and before wafer is returned to wafer case, measures critical dimension and profile by etching and processing formed structure on bottom on a plurality of positions then.Measured value is returned to etching machine after the etching, so that adjust the etching scheme of subsequent wafer.Therefore so all in the environment of a cleaning, finish by transmission and procedure of processing that said apparatus is performed, neutralize and improved output in the possible pollutant between each step by avoiding that wafer is exposed to air.
These embodiment of the present invention provide preceding critical dimension of the etching of each wafer and profile measurements, and critical dimension and profile measurements according to each wafer are adjusted photoresist fine setting/etching scheme, with the machining deviation of accessed instrument before proofreading and correct, for example the deposition uniformity deviation on the deposition module and/or the focusing deviation of photoelectric cell.The present invention also provides the etching project setting at etching machine processing drift.
Will a kind of semiconductor wafer processing device according to the embodiment of the invention be described with reference to figure 6A below.This device comprises a chamber or " main frame " 901, for example is the Centura that can obtain from the Applied Materials Inc of California, USA Santa Clara
TMSystem of processing is used for installing a plurality of chambers, and Chang Gui etching and processing machine 902 for example is as the DPS II that can obtain from the Applied Materials Inc of U.S. California, USA Santa Clara
TMPolysilicon etching chamber, and one or more transfer chamber 903 are also referred to as " load switch room (loadlock) ".In one embodiment of the invention, four etching and processing machines 902 are installed on the main frame 901.In one exemplary embodiment, three etching machines 902 are used to etching, and another then optionally is used to the cleaning (just removing photoresist polymer and other post etch wafer residues) after the etching.Main frame 901 portion within it can keep vacuum environment.A mechanical arm 904 is set, so that between process cavity 902 and transfer chamber 903, transmit wafer.
Transfer chamber 903 is connected on the factor interface 905, and this interface is also referred to as " mini environments (mini environment) ", and it keeps a controlled environment.Survey tool 906 as a kind of optical measurement instrument that uses scatterometry or reflectometry technique, is installed within the factor interface 905.The example that can be used as survey tool 906 is above-described (referring to Fig. 1) survey tools 310, comprises the 5th, No. 963329 described survey tool of United States Patent (USP).A processor (i.e. processor that is equivalent to processor 320) provides an etching scheme for etching machine 902 according to the measured value of above-mentioned wafer cd and profile, and this processor can be parts of etching machine 902 or main frame.One or more mechanical arms 907; an or track mechanical arm (track robot); also be installed in the factor interface 905; so that transmit wafer between transfer chamber 903, survey tool 906 and standard wafer box 908, wherein standard wafer box 908 is detachably to be fixed on the factor interface 905.Main frame 901, transfer chamber 903, factor interface 905 and mechanical arm 904,907 all are the Centura of a conventional system of processing such as Applied Materials Inc
TMThe parts of system, and communicating each other remain on a cleaning and under the in check environment simultaneously.The system of processing of this routine also comprises processor as a computer (not shown), so that control the operation of described system in the electronics mode, comprises wafer is sent to another part from a part of system.
Below with reference to flow chart shown in Figure 7, the operation of device according to the above embodiment of the present invention is described.When a plurality of wafers are subject to processing at a machining tool such as above-mentioned photoelectric cell place, thereby after forming the photoresist mask on the bottom, these wafers just are loaded into a wafer case 908, and this wafer case is sent to factor interface 905 in step 1010.From wafer case 908, unload next wafer by mechanical arm 907 then, and send it to survey tool 906 (step 1020), in step 1030, measure the critical dimension and the profile of the pattern on photoresist.In step 1040, as mentioned above, select the photoresist trimming scheme of this wafer according to the measured value of critical dimension and profile.
In step 1050, by utilizing mechanical arm 907 wafer is transplanted on transfer chamber 903, and utilizes mechanical arm 907 that wafer is transplanted on etching machine 902, and this wafer is sent to etching machine 902 from survey tool 906.Fine setting photoresist layer (step 1060), etched wafer (step 1070) then, this normally carries out on same etching machine 902.Then, in certain embodiments of the invention, above-mentioned wafer is sent to a photoresist cleaning chamber 902 (step 1080), and the ash strip chamber of a routine for example is so that remove photoresist (step 1090).After this wafer is transferred back to survey tool 906, so that before the step 1120 that is loaded into wafer case 908, carries out after the etching of wafer critical dimension and profile value and measures ( step 1100 and 1110).Critical dimension and profile measurements are sent to processor 320 after the etching, as mentioned above, are used to proofread and correct trim curve and/or the etching scheme that the next one is treated etched wafer.
In the another embodiment of the present invention shown in Fig. 6 B, factor interface 905A has a cd measurement tool 906A, and it is installed to (rather than being installed in its inside shown in Fig. 6 A embodiment) on this factor interface.Fig. 6 B shown device is operated according to the flow chart among above-described Fig. 7.
In another embodiment of the present invention shown in Fig. 6 C, survey tool 906A is installed on the main frame 901 rather than on the factor interface 905A.Fig. 6 C shown device is operated according to the flow chart of above-described Fig. 7.
In another embodiment of the present invention shown in Fig. 6 D, factor interface 905B has a survey tool 906A and a conventional wet clean chamber 909 mounted thereto.Wet clean chamber 909 can be the single-chip cleaning device of a use ultrasonic transducer.One of them chamber 902 on the main frame 901 is conventional ash strip chamber, as discussed above.After wafer is etched, it just is sent to ash strip chamber 902 so that remove photoresist (step 1080 among Fig. 7 and 1090), and then be sent to wet clean chamber 909, and cleaned before or after in step 1100, being sent to survey tool 906A.
Done in another embodiments of the invention of detailed description in No. the 09/945th, 454, shown in Fig. 6 E and U.S. Patent application that submit on August 31st, 2000, main frame 901 is Centura of Applied Materials Inc
TMSystem, and factor interface 905C is equally can be from the Link of Applied Materials Inc's acquisition
TMFactor interface 905C has a single mechanical arm 907A, an aforesaid survey tool 906A, an aforesaid conventional wet clean chamber 909, and a conventional ash strip chamber 910 mounted thereto.In addition, wherein the etching machine 911 of two ash strip chamber 910 and two routines is installed on the main frame 901 together.Alternatively, four etching machines 911 can be installed to replace ash strip chamber 910 on main frame 901.After a wafer is etched, it just is sent to one of them ash strip chamber 910 to remove photoresist (step 1080 among Fig. 7 and 1090), it is sent to wet clean chamber 909 more then, and is cleaned be sent to survey tool 906A in step 1100 before or after.
In the embodiment of the invention shown in Fig. 6 A～E, the measurement of critical dimension all is under the controllable environmental condition after measurement, etching, cleaning and the etching of preceding critical dimension of the etching that is provided and profile.By etching, cleaning and survey tool are provided on main frame and/or factor interface, wafer can be subjected to etching, cleaning and monitoring before turning back to wafer case, has therefore reduced process time and cost.In addition, the embodiment of Fig. 6 A～D provides feedback and feed forward of measurement data in real time to each wafer, thereby can be to each wafer customization etching and processing to improve output.Therefore, compare with prior art system, the present invention increases and the product cost minimizing output, in prior art system, feedback from critical dimension measurement, even have also is to carry out rather than carry out at each wafer to the basis of another batch a collection of, and wafer must be exposed in the air in operations such as measurement, etching and cleaning.
Present invention can be applied in the manufacturing of various types of semiconductor device, especially have the high-density semiconductor device of 0.18 micron and following design standard.
The present invention can utilize conventional material, method and apparatus to implement.Therefore, the details of these materials, equipment and method sets forth in detail here not.In the above description, provide many special details, for example special material, structure, chemicals, processing or the like are understood the present invention completely in order that be convenient to.Yet, should be realized that the present invention does not need to resort to the details of illustrating especially and just can be implemented.In other examples, well-known processing structure is not described in detail, in order to avoid unnecessarily bluring content of the present invention.
Only provide and described some versatility examples of the present invention in this manual.Be understandable that the present invention can be used in other different combinations and environment, and can expressed here the present invention conceive and change in the scope and revise.
Claims (33)
1. the method for a processing semiconductor wafer comprises:
On a bottom of described wafer, form a photoresist mask with photoresist pattern and form a patterned layer by photoetching;
Measure the critical dimension and the side wall profile of described photoresist pattern;
According to the measured value of described critical dimension and profile, for selecting first group of machined parameters value to the photoresist trim process that described wafer carries out; Wherein first group of machined parameters value comprises the fine setting time, and the function of difference between the critical dimension of the profile of the critical dimension that is described photoresist pattern of described fine setting time, described photoresist pattern and described photoresist pattern and the desired fine setting back photoresist critical dimension; And
Utilize described first group of machined parameters value, described wafer is carried out described trim process at the machining tool place.
2. the method for claim 1 comprises critical dimension and the profile of measuring described pattern with optical mode.
3. the method for claim 1, the profile of wherein said photoresist pattern comprises Sidewall angles.
4. the method for claim 1 further comprises the described photoresist pattern of utilization after fine setting as mask, the described bottom of etching.
5. method as claimed in claim 4 is included in described machining tool place described wafer is carried out trim process and etching and processing.
6. method as claimed in claim 4 is included in and cleans described wafer after carrying out etching and processing.
7. method as claimed in claim 4 comprises that measurement is formed at the critical dimension of the structure on the described bottom by etching and processing, and utilizes the critical dimension measurement value of this structure, is that a following process wafer is selected second group of parameter value.
8. the method for claim 1 comprises that measurement is formed at the critical dimension of a kind of structure on the described bottom by the described processing first time, and utilizes the critical dimension measurement value of this structure, is that a following process wafer is selected second group of machined parameters value.
9. method as claimed in claim 4 comprises critical dimension and profile according to measured described photoresist pattern, for etching and processing is selected the etching scheme.
10. the method for claim 1, wherein said photoresist mask comprises a plurality of photoresist patterns, described method comprises:
Measure the critical dimension and the profile of described a plurality of photoresist patterns;
The measured value of average described critical dimension and profile; With
Utilize the measured value of average described critical dimension and profile to select the fine setting time.
11. method as claimed in claim 3, wherein the amount trimmed of photoresist changes in time and non-linearly, and described method comprises further according to this fine setting non-linear selects the fine setting time.
12. the device of a processing semiconductor wafer comprises:
Survey tool, it is used to measure critical dimension and side wall profile at the photoresist pattern of a photoresist mask, and this patterned layer is formed on the bottom of described wafer;
Machining tool, it utilizes first group of machined parameters value that described wafer is carried out the photoresist trim process;
Processor, it is configured the measured value that is used for according to described critical dimension and profile, select described first group of machined parameters value, wherein said first group of machined parameters value comprises the fine setting time, and described processor is further configured the described fine setting time of selecting, the function of difference between the critical dimension of the critical dimension that this fine setting time is described photoresist pattern, the profile of described photoresist pattern and described photoresist pattern and the desired fine setting back photoresist critical dimension.
13. device as claimed in claim 12, wherein said survey tool comprises the optical measurement instrument.
14. device as claimed in claim 13, wherein said optical measurement instrument has adopted scatterometry technology or reflectometry technique.
15. device as claimed in claim 12, wherein said machining tool is an etching machine.
16. device as claimed in claim 12, the profile of wherein said photoresist pattern comprises Sidewall angles.
17. device as claimed in claim 12, wherein said etching machine are to utilize the described photoresist pattern after fine setting to come the described bottom of etching as mask.
18. device as claimed in claim 17 further comprises cleanout tool, is used for after the described bottom of etching from described wafer supernatant removal of residue.
19. device as claimed in claim 17, wherein said survey tool is used to measure the critical dimension that is formed at the structure on the described bottom by etching and processing, and described processor to be configured and to utilize the critical dimension measurement value of this structure be that a following process wafer is selected second group of machined parameters value.
20. device as claimed in claim 12, wherein said etching machine is used to carry out processing for the first time to form a kind of structure on described bottom, wherein said survey tool is used to measure the critical dimension that is formed at this structure on the described bottom, and described processor to be configured and to utilize the critical dimension measurement value of described structure be that a following process wafer is selected second group of machined parameters value.
21. being configured, device as claimed in claim 17, wherein said processor, be etching and processing selection etching scheme according to the critical dimension and the profile of measured described photoresist pattern.
22. device as claimed in claim 12, wherein said photoresist mask comprises a plurality of photoresist patterns, and wherein said survey tool is used to measure the critical dimension and the profile of described a plurality of photoresist patterns, and described processor is configured to:
The measured value of average described critical dimension and profile; And
Utilize the measured value of average described critical dimension and profile to select the fine setting time.
23. device as claimed in claim 16, wherein the amount trimmed of photoresist changes in time and non-linearly, and described processor is configured and further selects the fine setting time according to this fine setting non-linear.
24. the device of a processing semiconductor wafer comprises:
Survey tool, it is used to measure critical dimension and side wall profile at the photoresist pattern of photoresist mask, and this patterned layer is formed on the bottom of described wafer.
Machining tool, it utilizes first group of machined parameters value that described wafer is carried out the photoresist trim process;
Processor, it is configured the measured value that is used for according to described critical dimension and profile, select described first group of machined parameters value, wherein said first group of machined parameters comprises the fine setting time, and described processor is further configured the described fine setting time of selecting, the function of difference between the critical dimension of the critical dimension that this fine setting time is described photoresist pattern, the profile of described photoresist pattern and described photoresist pattern and the desired fine setting back photoresist critical dimension;
Conveyer, it is used for transmitting described wafer between described survey tool and described machining tool; And
Chamber, it is used to seal described conveyer, and allows to carry out being transmitted under the clean environment between described conveyer, described survey tool and the described machining tool.
25. device as claimed in claim 24, wherein said survey tool are the optical measurement instruments.
26. device as claimed in claim 25, wherein said survey tool has adopted scatterometry technology or reflectometry technique.
27. device as claimed in claim 24, wherein said chamber comprises:
Main frame, it is used to install a plurality of machining tools, comprises described first machining tool;
Factor interface, it is used to install wafer case; And
Transfer chamber, it is communicated with between described main frame and described factor interface and with them;
Wherein said conveyer comprises first mechanical arm, this mechanical arm is used for transmitting described wafer between described survey tool, described transfer chamber and described wafer case, and second mechanical arm, this mechanical arm is used for transmitting described wafer between described transfer chamber and described machining tool;
Wherein said survey tool is mounted on described factor interface or the described main frame.
28. device as claimed in claim 24, wherein said machining tool comprises etching machine.
29. device as claimed in claim 28, wherein said processor is configured to:
Control described conveyer,, this wafer is sent to described survey tool from described etching machine with after the trim process of described wafer is finished; And
Control described survey tool, to measure the critical dimension of the structure that forms at described etching machine place.
30. device as claimed in claim 27, wherein said machining tool comprises etching machine, and described processor is configured and controls described etching machine, again this wafer is carried out etching and processing after the photoresist trim process of described wafer is finished.
31. device as claimed in claim 30, wherein said processor is configured to:
Control described conveyer,, this wafer is sent to described survey tool from described etching machine with after the etching and processing of described wafer is finished; And
Control described survey tool, to measure the critical dimension that in etch process, is formed at the structure on the described bottom.
32. device as claimed in claim 30, further comprise dust removing machining cell, it is installed on described main frame or the described factor interface, be used for from described wafer supernatant removal of residue, wherein said processor is configured and controls described conveyer, with after the etching and processing of described wafer is finished, described wafer handling is removed machining cell to described dust.
33. device as claimed in claim 32, further comprise cleaning chamber, it is installed on the described factor interface, be used to clean described wafer, wherein said processor is configured and controls described conveyer, to peel off the machining cell place at described dust described wafer is finished after dust peels off processing, with described wafer handling to described cleaning chamber.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US36106402P | 2002-03-01 | 2002-03-01 | |
| US60/361,064 | 2002-03-01 | ||
| US10/238,453 | 2002-09-09 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1910742A CN1910742A (en) | 2007-02-07 |
| CN100403505C true CN100403505C (en) | 2008-07-16 |
Family
ID=37700868
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB038080710A Expired - Fee Related CN100403505C (en) | 2002-03-01 | 2003-02-26 | Methodology for repeatable post etch CD in a production tool |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100403505C (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5926690A (en) * | 1997-05-28 | 1999-07-20 | Advanced Micro Devices, Inc. | Run-to-run control process for controlling critical dimensions |
| US5963329A (en) * | 1997-10-31 | 1999-10-05 | International Business Machines Corporation | Method and apparatus for measuring the profile of small repeating lines |
| US6225639B1 (en) * | 1999-08-27 | 2001-05-01 | Agere Systems Guardian Corp. | Method of monitoring a patterned transfer process using line width metrology |
| WO2002009170A2 (en) * | 2000-07-25 | 2002-01-31 | Advanced Micro Devices, Inc. | Method and apparatus for performing final critical dimension control |
-
2003
- 2003-02-26 CN CNB038080710A patent/CN100403505C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5926690A (en) * | 1997-05-28 | 1999-07-20 | Advanced Micro Devices, Inc. | Run-to-run control process for controlling critical dimensions |
| US5963329A (en) * | 1997-10-31 | 1999-10-05 | International Business Machines Corporation | Method and apparatus for measuring the profile of small repeating lines |
| US6225639B1 (en) * | 1999-08-27 | 2001-05-01 | Agere Systems Guardian Corp. | Method of monitoring a patterned transfer process using line width metrology |
| WO2002009170A2 (en) * | 2000-07-25 | 2002-01-31 | Advanced Micro Devices, Inc. | Method and apparatus for performing final critical dimension control |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1910742A (en) | 2007-02-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6858361B2 (en) | Methodology for repeatable post etch CD in a production tool | |
| US6625497B2 (en) | Semiconductor processing module with integrated feedback/feed forward metrology | |
| US7265382B2 (en) | Method and apparatus employing integrated metrology for improved dielectric etch efficiency | |
| US6924088B2 (en) | Method and system for realtime CD microloading control | |
| US6960416B2 (en) | Method and apparatus for controlling etch processes during fabrication of semiconductor devices | |
| US10254644B2 (en) | Metrology methods, metrology apparatus and device manufacturing method | |
| US6388253B1 (en) | Integrated critical dimension control for semiconductor device manufacturing | |
| US7846848B2 (en) | Cluster tool with integrated metrology chamber for transparent substrates | |
| US7440881B2 (en) | Adaptive correlation of pattern resist structures using optical metrology | |
| US11300887B2 (en) | Method to change an etch parameter | |
| KR20100016095A (en) | In-line lithography and etch system | |
| CN100403505C (en) | Methodology for repeatable post etch CD in a production tool | |
| Hartig et al. | Practical aspects of TMU based analysis for scatterometry model referencing AM: Advanced metrology | |
| Park et al. | Etch profile control of high-aspect ratio deep submicrometer/spl alpha/-Si gate etch | |
| Chapados Jr | Monitoring of submicrometer linewidths using diffraction gratings | |
| Henck et al. | Practical use of an in-line vacuum metrology cluster in a minifactory environment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080716 Termination date: 20120226 |