CN100424741C - Display device and demultiplexer - Google Patents

Display device and demultiplexer Download PDF

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Publication number
CN100424741C
CN100424741C CNB2005100738191A CN200510073819A CN100424741C CN 100424741 C CN100424741 C CN 100424741C CN B2005100738191 A CNB2005100738191 A CN B2005100738191A CN 200510073819 A CN200510073819 A CN 200510073819A CN 100424741 C CN100424741 C CN 100424741C
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output data
switch
data
signal
data line
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CN1702724A (en
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申东蓉
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Samsung Display Co Ltd
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Samsung SDI Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G09G3/325Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3283Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0251Precharge or discharge of pixel before applying new pixel voltage
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0297Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

A display device and a demultiplexer. A display device includes plural pixels for displaying an image corresponding to first data currents, each pixel including plural sub-pixels. The display device also includes plural scan lines for applying scan signals to the pixels; plural first data lines for applying the first data currents to the pixels; a scan driver for outputting the scan signals to the scan lines; a demultiplexer including plural demultiplexing circuits; and a data driver for transmitting second data currents to plural second data lines. The demultiplexing circuits demultiplex second data currents into first data currents, and transmit the first data currents to the first data lines. A pre-charge voltage is applied to the first data lines before the first data currents are transmitted. This way, the data driver is simplified, and the first data lines are pre-charged with a suitable voltage before programming data, thereby reducing programming time.

Description

Display device and demultiplexer
The cross reference of related application
The application requires to be committed on May 25th, 2004 right of priority and the rights and interests of korean patent application 10-2004-0037547 number of Korea S Department of Intellectual Property, by reference its whole disclosures is herein incorporated.
Technical field
The present invention relates to display device and demultiplexer (demultiplexer), and relate in particular to such display of organic electroluminescence and demultiplexer, wherein, demultiplexer comprises the multichannel decomposition circuit, and it comprises sample/hold circuit and precharge switch circuit.
Background technology
Display of organic electroluminescence is launched the light of specific wavelength based on exciton in organic film phenomenon, wherein, exciton is by respectively from negative electrode and anode injected electrons and reconfiguring of hole and form.(LCD) is different with LCD, and display of organic electroluminescence comprises the self-emission device, and making does not need independent light source.In display of organic electroluminescence, the brightness of organic electroluminescence device changes according to the magnitude of current that flows through organic luminescent device or Organic Light Emitting Diode (OLED).
Display of organic electroluminescence can be classified as passive matrix or active array type according to its driving method.In the situation of passive matrix, anode and negative electrode are placed by quadrature, and form the line that the driving selected will be arranged.The passive matrix display of organic electroluminescence is because simple relatively structure and realizing easily, but since its time that consumes too many energy and be assigned to drive each luminescent device be shortened, so it is unsuitable for realizing large-sized screen.On the other hand, in the situation of active array type, use active device to control the magnitude of current that flows through luminescent device.Be extensive use of thin film transistor (TFT) (being hereinafter referred to as " TFT ") and be used as active device.The active matrix type organic electroluminescent display has the structure of relative complex, but it consumes few relatively energy, and it is longer relatively to be assigned to drive time of each organic electroluminescence device.
Below, will traditional display of organic electroluminescence be described by reference Fig. 1 and 2.
Fig. 1 is the view that traditional display of organic electroluminescence of the active matrix with n * m pixel is shown.
With reference to Fig. 1, traditional display of organic electroluminescence comprises panel 11, scanner driver 12 and data driver 13.Panel 11 comprises the n bar sweep trace SCAN[1 that n * m pixel 14, level form], SCAN[2] ..., SCAN[n] and the vertical m bar data line DATA[1 that forms], DATA[2] ..., DATA[m], wherein, n and m are natural number.Here, scanner driver 12 with sweep signal by sweep trace SCAN[1] to SCAN[n] be sent to pixel 14, and data driver 13 with data voltage by data line DATA[1] to DATA[m] be applied to pixel 14.
Fig. 2 is the circuit diagram of the pixel used in the display of organic electroluminescence of Fig. 1.In Fig. 2, in the data line of DATA presentation graphs 1 one, and in the sweep trace of SCAN presentation graphs 1 one.
With reference to Fig. 2, the pixel of traditional display of organic electroluminescence comprises organic luminescent device OLED, driving transistors MD, capacitor C and switching transistor MS.Driving transistors MD is connected to organic luminescent device OLED, and it is luminous to provide electric current to be used for to organic luminescent device.In addition, switching transistor MS applies data voltage, so that the magnitude of current that is provided by driving transistors MD to be provided.In addition, capacitor C is connected between the source electrode and grid of driving transistors MD, and will keep predetermined periods with the corresponding voltage of the data voltage that is applied by switching transistor MS.
By this configuration, when the grid that sweep signal is applied to switching transistor MS, and thus during actuating switch transistor MS, data voltage is applied to the grid of driving transistors MD by data line DATA.Thereby, because data voltage is applied to the grid of driving transistors MD,, make organic luminescent device OLED luminous thus so driving transistors MD offers organic luminescent device OLED with electric current.
At this moment, flow through the electric current of organic luminescent device OLED based on following equation 1.
[equation 1]
I OLED=I D=(β/2)(V GS-V TH) 2=(β/2)(V DD-V DATA-|V TH|) 2
Wherein, I OLEDFor flowing through organic light-emitting device electric current, I DFor the source electrode from driving transistors MD flows to the electric current of drain electrode, V GSBe the voltage that between the grid of driving transistors MD and source electrode, applies, V THBe the threshold voltage of driving transistors MD, V DDBe supply voltage, V DATABe data voltage, and β is a gain factor.
Return with reference to Fig. 1, in traditional display of organic electroluminescence, data driver 13 is directly connected to the data line of pixel.Therefore, when the number of data line increased, data driver 13 was proportional and become complicated more with the number of data line.On the other hand, even data driver 13 is realized as the chip that is separated with panel 11, but when the number of data line increases, be used for data driver 13 pin number and connect data driver 13 and the number of the interconnection line of panel 11 can increase pro rata with the number of data line, increased production cost and required circuit installing space thus.
Current driving method can be categorized as voltage-programming type or current programmed type.In the situation of current programmed type image element circuit, has such advantage, that is: the driving transistors that promptly is used in each pixel has the voltage-current characteristic that differs from one another, but as long as power supply to the image element circuit basically identical provide electric current, just basically identical of the display characteristic of brightness for example.
Yet in using the current programmed type image element circuit of electric current as the input data signal of pixel, the voltage that charges in the capacitor parasitics of data line DATA by the data current of previous pixel column is influential to the data programming time.Therefore, particularly in the situation of low gray level, reduced data programing speed.
Summary of the invention
Thereby one aspect of the present invention provides a kind of display device and demultiplexer, and wherein, demultiplexer provides between data driver and panel, and comprises that each comprises a plurality of multichannel decomposition circuits of sample/hold circuit and precharge switch circuit.For example, display device can be display of organic electroluminescence.
For realizing aforementioned and/or others of the present invention, in example embodiment according to the present invention, provide a kind of display device, it comprises and is used to show and a plurality of pixels of the corresponding image of first data current that each described pixel comprises a plurality of sub-pixels.Described display device also comprises multi-strip scanning line, many first data lines, scanner driver, data drivers and the demultiplexer that comprises a plurality of multichannel decomposition circuits.Sweep signal is applied to a plurality of pixels by the multi-strip scanning line.First data current is sent to a plurality of pixels by many first data lines.Scanner driver outputs to the multi-strip scanning line with sweep signal, and data driver is sent to many second data lines with second data current.Corresponding in second data current that each multichannel decomposition circuit will transmit by in second data line multichannel is decomposed at least two first data currents, and described at least two first data currents are sent at least two first data lines.Before described at least two first data currents are sent to described at least two first data lines, pre-charge voltage is applied to described at least two first data lines.
In another example embodiment according to the present invention, a kind of demultiplexer is provided, it comprises a plurality of multichannel decomposition circuits, many sampled signal lines, the first and second holding signal lines and precharging signal lines.Sampled signal is applied to the multichannel decomposition circuit by many sampled signal lines.Holding signal is applied to the multichannel decomposition circuit by the first and second holding signal lines.Precharging signal is applied to the multichannel decomposition circuit by the precharging signal line.At least one multichannel decomposition circuit and will be decomposed into the output data electric current by the input data current multichannel that input data line transmits in response to sampling and holding signal, and the output data electric current is sent to many output data lines.Before the output data electric current is sent to described output data line, pre-charge voltage is applied to described output data line.
In another example embodiment according to the present invention, a kind of demultiplexer is provided, it comprises a plurality of multichannel decomposition circuits, many sampled signal lines, the first and second holding signal lines, precharging signal line and precharge voltage line.Sampled signal is applied to the multichannel decomposition circuit by many sampled signal lines.Holding signal is applied to the multichannel decomposition circuit by the first and second holding signal lines.Precharging signal is applied to the multichannel decomposition circuit by the precharging signal line.Pre-charge voltage is applied to the multichannel decomposition circuit by the precharging signal line.At least one multichannel decomposition circuit and will be decomposed into the output data electric current by the input data current multichannel that input data line transmits in response to sampling and holding signal, and the output data electric current is sent to many output data lines.Before the output data electric current is sent to described output data line, pre-charge voltage is applied to described output data line.
Description of drawings
From the following description to particular exemplary embodiment that combines with accompanying drawing, these and/or others of the present invention will become clear and be easier to and understand, in the accompanying drawing:
Fig. 1 is the view that traditional display of organic electroluminescence of the active matrix with n * m pixel is shown;
Fig. 2 is the circuit diagram of the pixel used in traditional display of organic electroluminescence of Fig. 1;
Fig. 3 is the circuit diagram according to the display of organic electroluminescence of the active matrix with n * m pixel of example embodiment of the present invention;
Fig. 4 is the circuit diagram of the pixel used in the display of organic electroluminescence of Fig. 3;
Fig. 5 is the sequential chart of signal that is used to drive the pixel of Fig. 4;
Fig. 6 for can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of first example embodiment of the present invention;
Fig. 7 for can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of second example embodiment of the present invention;
Fig. 8 is the sequential chart of input and output signal of the demultiplexer of Fig. 6;
Fig. 9 for can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of the 3rd example embodiment of the present invention;
Figure 10 for can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of the 4th example embodiment of the present invention;
Figure 11 is the sequential chart of input and output signal of the demultiplexer of Fig. 9; And
Figure 12 is the view of the sample/hold circuit that uses in the demultiplexer that is illustrated in according to one or more example embodiment of the present invention.
Embodiment
Hereinafter, will describe example embodiment according to display device of the present invention in detail by reference Fig. 3 to 12, wherein, display device according to the present invention is not limited to and can be applied to: the various displays that comprise current programmed type image element circuit.For example, display device can be organic electro-luminescence display device.
Fig. 3 is the circuit diagram according to the display of organic electroluminescence of the active matrix with n * m pixel of example embodiment of the present invention.
With reference to Fig. 3, comprise panel 21, scanner driver 22, data driver 23 and demultiplexer 24 according to the display of organic electroluminescence of example embodiment of the present invention.
Panel 21 comprises: n * m pixel 25; The n bar first sweep trace SCAN1[1 that level forms], SCAN1[2] ..., SCAN1[n] and the n bar second sweep trace SCAN2[1], SCAN2[2] ..., SCAN2[n]; And the vertical 3m bar output data line DoutR[1 that forms], DoutG[1], DoutB[1] ..., DoutR[m], DoutG[m], DoutB[m], wherein, n and m are natural number.As the elementary cell of expression color, each pixel 25 comprises three sub-pixel 26R, 26G, 26B, i.e. red pieces pixel 26R, green sub-pixel 26G and blue sub-pixel 26B.The first and second sweep trace SCAN1, SCAN2 (for example, the first sweep trace SCAN1[1] to SCAN1[n] in one and the second sweep trace SCAN2[1] to SCAN2[n] and in one) respectively first and second sweep signals are sent to pixel 25.Red, green and blue output data line DoutR, DoutG, DoutB (for example, red output data line DoutR[1] to DoutR[m] in one, green output data line DoutG[1] to DoutG[m] and in one and blue output data line DoutB[1] to DoutB[m] and in one) respectively the output data electric current is sent to red, green, blue sub-pixel 26R, 26G, 26B.Operate sub-pixel 26R, 26G, 26B by current programmed method.That is to say, selecting in the period, by to capacitor (for example with the corresponding voltage of electric current that in output data line DoutR, DoutG, DoutB, flows, the capacitor C ' of Fig. 4) charging, and subsequently in the luminous period, accordingly electric current is offered organic luminescent device (for example, the OLED of Fig. 4) with the voltage of this capacitor.
Scanner driver 22 is sent to the first and second sweep trace SCAN1, SCAN2 with first and second sweep signals.
Data driver 23 will be imported data current and be sent to k bar input data line Din[1], Din[2] ..., Din[k].Here, when demultiplexer 24 was 1: 2 demultiplexer, k equaled 1.5m.Data driver 23 can comprise that pre-charge voltage provides the part (not shown), pre-charge voltage is provided to k bar input data line Din[1], Din[2] ..., Din[k].
Demultiplexer 24 receives the input data current, and their multichannels are decomposed into the output data electric current, thus output data electric current and pre-charge voltage are sent to 3m bar output data line DoutR[1], DoutG[1], DoutB[1] ..., DoutR[m], DoutG[m], DoutB[m].Demultiplexer 24 comprises k sampling/maintenance multichannel decomposition circuit, and its example is shown in Fig. 6,7,9 and 10.Each multichannel decomposition circuit is 1: 2 multichannel decomposition circuit, decomposes so that the input data current that is sent to an input data line Din is carried out multichannel, and sends it to two output data lines.At this moment, before transmitting the output data electric current, pre-charge voltage is applied to output data line.
Fig. 4 is the circuit diagram of the sub-pixel that uses in the display of organic electroluminescence of Fig. 3, in Fig. 4, the first sweep trace SCAN1[1 of SCAN1 presentation graphs 3] to SCAN1[n] in one, and SCAN2 represents the second sweep trace SCAN2[1] to SCAN2[n] in one.In addition, Dout represents data line DoutR[1], DoutG[1], DoutB[1] ..., DoutR[m], DoutG[m], DoutB[m] in one.
With reference to Fig. 4, sub-pixel comprises organic luminescent device OLED and sub-pixel circuits.Sub-pixel circuits comprises: driving transistors MD '; First, second, third switching transistor MS1, MS2, MS3; And capacitor C '.Among driving transistors MD ' and first, second, third switching transistor MS1, MS2, the MS3 each comprises grid, source electrode and drain electrode.Capacitor C ' comprises the first terminal and second terminal.
The first switching transistor MS1 comprises: grid is connected to the first sweep trace SCAN1; Source electrode is connected to first node N1; And drain electrode, be connected to output data line Dout.Output data line Dout is in the red, green and blue output data line shown in Fig. 3.The first switching transistor MS1 in response to first sweep signal of the first sweep trace SCAN1 to capacitor C ' charging.
Second switch transistor MS2 comprises: grid is connected to the first sweep trace SCAN1; Source electrode is connected to Section Point N2; And drain electrode, be connected to output data line Dout.Second switch transistor MS2 is in response to first sweep signal of the first sweep trace SCAN1, and the output data electric current I that will in output data line Dout, flow DoutBe sent to driving transistors MD '.
The 3rd switching transistor MS3 comprises: grid is connected to the second sweep trace SCAN2; Source electrode is connected to Section Point N2; And drain electrode, be connected to organic luminescent device OLED.The 3rd switching transistor MS3 is in response to second sweep signal of the second sweep trace SCAN2, and the electric current that will flow through driving transistors MD ' is sent to organic luminescent device OLED.
Capacitor C ' comprising: the first terminal applies supply voltage V to this terminal DDAnd second terminal, be connected to first node N1.When the first and second switching transistor MS1, MS2 conducting, and according to the output data electric current I that in driving transistors MD ', flows Dout, the voltage V between grid and the source electrode GSAccordingly to capacitor C ' charging.On the other hand, when the first and second switching transistor MS1, MS2 turn-offed, capacitor C ' kept voltage V substantially GS
Driving transistors MD ' comprising: grid is connected to first node N1; Source electrode applies supply voltage V to it DDAnd drain electrode, be connected to Section Point N2.When the 3rd switching transistor MS3 conducting, driving transistors MD ' is provided to organic luminescent device OLED with electric current, and wherein, this electric current is corresponding to the voltage that applies between first and second terminals of capacitor C '.
Fig. 5 is the sequential chart of signal that is used to drive the sub-pixel of Fig. 4, and wherein, described signal comprises the first and second sweep signal scan1, scan2.
Hereinafter come the operation of descriptor image element circuit with reference to Figure 4 and 5.In the selection period when the first and second sweep signal scan1, scan2 are respectively low and high, the first and second switching transistor MS1, MS2 conducting, and the 3rd switching transistor MS3 turn-offs.Selecting in the period output data electric current I that will in output data line Dout, flow DoutBe sent to driving transistors MD '.Here, determine the grid of driving transistors MD ' and the voltage V between the source electrode based on following equation 2 GS, and by and the voltage V that between its grid and source electrode, applies GSCorresponding electric charge comes the charging to capacitor C '.
[equation 2]
I D=I Dout=(β/2)(V GS-V TH) 2
In the luminous period when the first and second sweep signal scan1, scan2 are respectively high and low, the 3rd switching transistor MS3 conducting, and the first and second switching transistor MS1, MS2 turn-off.Owing in the luminous period, kept at the electric charge of selecting in capacitor C ', to charge in the period, so, determine the voltage between first and second terminals of capacitor C ' for selecting the period, that is to say the grid of driving transistors MD ' and the voltage V between the source electrode GSIn the luminous period, kept.With reference to equation 2, based on the voltage V between grid and the source electrode GSAnd determine in driving transistors MD ' electric current I that flows D, make the output data electric current I DoutNot only selecting in the period, also in the luminous period, in driving transistors MD ', flowing.Therefore, determine electric current I mobile in organic luminescent device based on following equation 3 OLED
[equation 3]
I OLED=I D=I Dout
With reference to equation 3, the electric current I that flows among the organic luminescent device OLED of sub-pixel shown in Figure 4 OLEDEqual the output data electric current I Dout, make in organic luminescent device OLED the electric current I that flows OLEDBe not subjected to the threshold voltage V of driving transistors MD ' THInfluence.That is to say that aforementioned sub-pixel circuits is not subjected to the threshold voltage V of driving transistors MD ' THInfluence.
Fig. 6 for for example can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of first example embodiment of the present invention.
With reference to Fig. 6, demultiplexer comprises k multichannel decomposition circuit 31.
Each multichannel decomposition circuit 31 comprises 1: 2 multichannel decomposition circuit of sampling/maintenance, decomposes so that the input data current that is sent to an input data line Din is carried out multichannel, and sends it to two output data lines.Article two, output data line is connected to the sub-pixel group that comprises two sub-pixels with different colours, for example, and one group of red and green sub-pixel, one group of indigo plant and red pieces pixel or one group of green and blue sub-pixel.And, the first red output data line DoutR[1] and the first green output data line DoutG[1] be connected to the first multichannel decomposition circuit; The first blue output data line DoutB[1] and the second red output data line DoutR[2] be connected to the second multichannel decomposition circuit; The second green output data line DoutG[2] and the second blue output data line DoutB[2] be connected to the 3rd multichannel decomposition circuit, or the like.Here, before output data is sent to output data line, pre-charge voltage is applied to every output data line.
Each multichannel decomposition circuit 31 comprises first to fourth sample/hold circuit S/H1~S/H4 and the first and second precharge switch SW1, SW2.Here, first to fourth sample line S1~S4, the first and second retention wire H1, H2 and precharging signal line PC are connected to each multichannel decomposition circuit 31.
The first sample/hold circuit S/H1 is in response to first sampled signal of the first sample line S1, and will with (for example be sent to input data line Din, the Din[1 that is used for this and other sample/hold circuit] to Din[k] one) the corresponding voltage of electric current be recorded in capacitor (for example, the capacitor C of the Figure 12 in this and other sample/hold circuit Hold) in, and subsequently in response to first holding signal of the first retention wire H1, and will be recorded in the corresponding electric current of voltage in this capacitor and be sent to output data line Dout (for example, DoutR[1]).
The second sample/hold circuit S/H2 is in response to second sampled signal of the second sample line S2, and will (for example be recorded in capacitor with the corresponding voltage of the electric current that is sent to input data line Din, shown in Figure 12) in, and subsequently in response to first holding signal of the first retention wire H1, and will be recorded in the corresponding electric current of voltage in this capacitor and be sent to output data line Dout (for example, DoutG[1]).
The 3rd sample/hold circuit S/H3 is in response to the 3rd sampled signal of the 3rd sample line S3, and will (for example be recorded in capacitor with the corresponding voltage of the electric current that is sent to input data line Din, shown in Figure 12) in, and subsequently in response to second holding signal of the second retention wire H2, and will be recorded in the corresponding electric current of voltage in this capacitor and be sent to output data line Dout (for example, DoutR[1]).
The 4th sample/hold circuit S/H4 is in response to the 4th sampled signal of the 4th sample line S4, and will (for example be recorded in capacitor with the corresponding voltage of the electric current that is sent to input data line Din, shown in Figure 12) in, and subsequently in response to second holding signal of the second retention wire H2, and will be recorded in the corresponding electric current of voltage in this capacitor and be sent to output data line Dout (for example, DoutG[1]).
The first precharge switch SW1 be connected to first with the relative terminal of the 3rd sample/hold circuit S/H1, S/H3, and in response to the precharging signal that applies by precharging signal line PC, and pre-charge voltage is sent to output data line Dout (for example, DoutR[1]).
The second precharge switch SW2 be connected to second with the relative terminal of the 4th sample/hold circuit S/H2, S/H4, and in response to the precharging signal that is sent to precharging signal line PC, and pre-charge voltage is sent to output data line Dout (for example, DoutG[1]).
By this configuration, demultiplexer shown in Fig. 6 can be applied to output data line Dout with pre-charge voltage before transmitting data current, the capacitor parasitics (that is the stray capacitance that is associated with it) that has reduced thus being connected to output data line Dout carries out the time that charge/discharge spent.Therefore, might reduce the time that pixel spent that is connected to output data line Dout that programs data into.Here, pre-charge voltage can have predetermined voltage level, for example, and with black gray level corresponding voltage levels.
Fig. 7 for for example can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of second example embodiment of the present invention.
With reference to Fig. 7, demultiplexer comprises k multichannel decomposition circuit 31.
Each multichannel decomposition circuit 31 comprises 1: 2 multichannel decomposition circuit of sampling/maintenance, decomposes so that the input data current that is sent to an input data line Din is carried out multichannel, and sends it to two output data lines.Different with the demultiplexer of Fig. 6, two output data lines of the demultiplexer shown in Fig. 7 are connected to the sub-pixel group that comprises two sub-pixels with same color, for example: one group of red pieces pixel DoutR[1], DoutR[2]; One group of green sub-pixel DoutG[1], DoutG[2]; Or one group of blue sub-pixel DoutB[1], DoutB[2].In addition, the first red output data line DoutR[1] and the second red output data line DoutR[2] be connected to the first multichannel decomposition circuit; The first green output data line DoutG[1] and the second green output data line DoutG[2] be connected to the second multichannel decomposition circuit; The first blue output data line DoutB[1] and the second blue output data line DoutB[2] be connected to the 3rd multichannel decomposition circuit; Or the like.
Fig. 8 is the sequential chart of input and output signal of the demultiplexer of Fig. 6.
Fig. 8 has represented: input data din[1]; First to fourth sampled signal s1 to s4; The first and second holding signal h1, h2; Precharging signal pc; And red and green output data doutR[1], doutG[1].The sample/hold circuit that Fig. 8 is illustrated in Fig. 6 is sampled to the electric current that is sent to input data line in response to low sampled signal and will be sent to described signal under the supposition of output data line in response to high sampled signal with the corresponding electric current of electric current through sampling.
With reference to Fig. 6 and 8, multichannel decomposition circuit 31 following operations.Because each multichannel decomposition circuit 31 operates in essentially identical mode, so, below will be only with reference to being connected to output data line DoutR[1] and DoutG[1] multichannel decomposition circuit 31 provide the description of operation.At the first sampled signal s1 in the period when low, to input data din[1] current value R[1] a samples, and it is stored among the first sample/hold circuit S/H1.At the second sampled signal s2 in the period when low, to input data din[1] current value G[1] a samples, and it is stored among the second sample/hold circuit S/H2.During these periods time, precharging signal pc is high, makes the first and second precharge switch SW1, SW2 turn-off.
Subsequently, in the period when low, the first and second precharge switch SW1, SW2 conducting are applied to pre-charge voltage output data line DoutR[1 thus at precharging signal pc], DoutG[1].At this moment, essentially identical pre-charge voltage Vp is applied to red and green output data line DoutR[1], DoutG[1].
Subsequently, at the 3rd sampled signal s3 in the period when low, to input data din[1] current value R[1] b samples, and it is stored among the 3rd sample/hold circuit S/H3.At the 4th sampled signal s4 in the period when low, to input data din[1] current value G[1] b samples, and it is stored among the 4th sample/hold circuit S/H4.During these periods, the first holding signal h1 is high, make be applied in the first holding signal h1 the first and second sample/hold circuit S/H1, S/H2 respectively will with the current value R[1 through sampling] a, G[1] the corresponding electric current of a is sent to output data line DoutR[1], DoutG[1].At these time durations, precharging signal pc is high, makes the first and second precharge switch SW1, SW2 turn-off.
Subsequently, at precharging signal pc in the period when low, the first and second precharge switch SW1, SW2 conducting, and pre-charge voltage is applied to output data line DoutR[1], DoutG[1].At this moment, essentially identical pre-charge voltage Vp is applied to red and green output data line DoutR[1], DoutG[1].
Subsequently, at the first sampled signal s1 in the period when low, to input data din[1] current value R[1] c samples, and it is stored among the first sample/hold circuit S/H1.At the second sampled signal s2 in the period when low, to input data din[1] current value G[1] c samples, and it is stored among the second sample/hold circuit S/H2.During these periods time, the second holding signal h2 is high, make be applied in the second holding signal h2 the third and fourth sample/hold circuit S/H3, S/H4 respectively will with the current value R[1 through sampling] c, G[1] the corresponding electric current of c is sent to output data line DoutR[1], DoutG[1].
As mentioned above, sampling/maintenance multichannel decomposition circuit is to being imported into input data line Din[1] the input data carry out multichannel and decompose, transfer them to output data line DoutR[1], DoutG[1], and will be imported into input data line Din[1] pre-charge voltage be sent to output data line DoutR[1], DoutG[1].In addition, essentially identical pre-charge voltage is provided in the red, green and blue sub-pixel that forms a pixel each.
In addition, demultiplexer shown in Fig. 7 transmits and signal identical shown in Fig. 8, and so essentially identical pre-charge voltage is applied to each pixel, and the color of pixel of not considering to be connected to output data line is how.Replacedly, demultiplexer can: will be connected to output data line DoutR[1], DoutR[2] the pre-charge voltage that adapts of red pieces pixel groups be applied to described red pieces pixel groups; Will be connected to output data line DoutG[1], DoutG[2] the pre-charge voltage that adapts of the group of green sub-pixel be applied to described green sub-pixel group; And will be connected to output data line DoutB[1], DoutB[2] the pre-charge voltage that adapts of blue sub-pixel group be applied to the group of described blue sub-pixel.
Fig. 9 for for example can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of the 3rd example embodiment of the present invention.
With reference to Fig. 9, demultiplexer comprises k multichannel decomposition circuit 131.Each multichannel decomposition circuit 131 comprises 1: 2 multichannel decomposition circuit of sampling/maintenance, decomposes so that the input data current that is sent to an input data line Din is carried out multichannel, and sends it to two output data lines.Described two output data lines are connected to the sub-pixel group that comprises two sub-pixels with different colours, for example, and one group of red and green sub-pixel, one group of indigo plant and red pieces pixel and one group of green and blue sub-pixel.And, the first red output data line DoutR[1] and the first green output data line DoutG[1] be connected to the first multichannel decomposition circuit; The first blue output data line DoutB[1] and the second red output data line DoutR[2] be connected to the second multichannel decomposition circuit; The second green output data line DoutG[2] and the second blue output data line DoutB[2] be connected to the 3rd multichannel decomposition circuit, or the like.Here, before output data is sent to output data line, pre-charge voltage is applied to every output data line.
Each multichannel decomposition circuit 131 comprises first to fourth sample/hold circuit S/H1~S/H4 and the first and second precharge switch SW1 ', SW2 '.Here, with first to fourth sample line S1~S4, the first and second retention wire H1, H2 be used for precharge voltage line VR, VG, the VB of red, green, blue sub-pixel, and precharging signal line PC are connected to each multichannel decomposition circuit 131.
Here, except the applying of pre-charge voltage, first to fourth sample/hold circuit S/H1~S/H4 has and the essentially identical operation of the sample/hold circuit of Fig. 6, and therefore will avoid being repeated in this description.The first precharge switch SW1 ' has a terminal of each lead-out terminal that is connected to the first and the 3rd sample/hold circuit S/H1, S/H3, and in response to the precharging signal that applies by precharging signal line PC, and pre-charge voltage is sent to output data line Dout.For example, when the terminal of the first precharge switch SW1 ' is connected to the output data line that is connected with the red pieces pixel, the precharge voltage line VR that will be used for the red pieces pixel be connected to red output data line DoutR (for example, DoutR[1] to DoutR[m] in one).
The second precharge switch SW2 ' is connected to each lead-out terminal of the second and the 4th sample/hold circuit S/H2, S/H4, and in response to the precharging signal that is sent to precharging signal line PC, and pre-charge voltage is sent to output data line Dout.For example, when the terminal of the second precharge switch SW2 ' is connected to the output data line that is connected with green sub-pixel, the precharge voltage line VG that will be used for green sub-pixel be connected to green output data line DoutG (for example, DoutG[1] to DoutG[m] in one).
Figure 10 for for example can in the display of organic electroluminescence of Fig. 3, use, according to the circuit diagram of the demultiplexer of the 4th example embodiment of the present invention.
With reference to Figure 10, demultiplexer comprises k multichannel decomposition circuit 131.Each multichannel decomposition circuit 131 comprises 1: 2 multichannel decomposition circuit of sampling/maintenance, decomposes so that the input data current that is sent to an input data line Din is carried out multichannel, and sends it to two output data lines.Different with the demultiplexer of Fig. 9, two output data lines of demultiplexer shown in Figure 10 are connected to the sub-pixel group that comprises two sub-pixels with same color, and for example: one group of red pieces pixel is connected to output data line DoutR[1], DoutR[2]; One group of green sub-pixel is connected to output data line DoutG[1], DoutG[2]; And one group of blue sub-pixel is connected to output data line DoutB[1], DoutB[2].In more detail, the first red output data line DoutR[1] and the second red output data line DoutR[2] be connected to the first multichannel decomposition circuit; The first green output data line DoutG[1] and the second green output data line DoutG[2] be connected to the second multichannel decomposition circuit; The first blue output data line DoutB[1] and the second blue output data line DoutB[2] be connected to the 3rd multichannel decomposition circuit, or the like.
By this configuration, might be with according to the sub-pixel group and default pre-charge voltage is provided to the sub-pixel of same color.Replacedly, different with the demultiplexer of the Fig. 9 that comprises a plurality of precharge voltage line VR, VG, VB and 10, this demultiplexer can be provided to output data line from a precharge voltage line with essentially identical pre-charge voltage, and the color of not considering sub-pixel how.
Figure 11 is the sequential chart of input and output signal of the demultiplexer of Fig. 9.
Figure 11 shows: input data din[1]; First to fourth sampled signal s1 to s4; The first and second holding signal h1, h2; Precharging signal pc; And red and green output data doutR[1], doutG[1].
With reference to Fig. 9 and 11, the multichannel decomposition circuit is following to be operated.At the first sampled signal s1 in the period when low, to input data din[1] current value R[1] a samples, and it is stored among the first sample/hold circuit S/H1.At the second sampled signal s2 in the period when low, to input data din[1] current value G[1] a samples, and it is stored among the second sample/hold circuit S/H2.During the section, precharging signal pc be a height, makes the first and second precharge switch SW1 ', SW2 ' shutoff at this moment.
Subsequently, in the period when low, the first and second precharge switch SW1 ', SW2 ' conducting are applied to output data line DoutR[1 with red and green pre-charge voltage VR, VG thus at precharging signal pc], DoutG[1].At this moment, red and green pre-charge voltage VR, VG are applied to red and green output data line DoutR[1 respectively], DoutG[1].
Subsequently, at the 3rd sampled signal s3 in the period when low, to input data din[1] current value R[1] b samples, and it is stored among the 3rd sample/hold circuit S/H3.At the 4th sampled signal s4 in the period when low, to input data din[1] current value G[1] b samples, and it is stored among the 4th sample/hold circuit S/H4.During these periods, the first holding signal h1 is high, make be applied in the first holding signal h1 the first and second sample/hold circuit S/H1, S/H2 respectively will with the current value R[1 through sampling] a, G[1] the corresponding electric current of a is sent to output data line DoutR[1], DoutG[1].During these periods time, precharging signal pc is high, makes the first and second precharge switch SW1, SW2 turn-off.
Subsequently, at precharging signal pc in the period when low, the first and second precharge switch SW1 ', SW2 ' conducting, and pre-charge voltage VR, VG be provided to output data line DoutR[1 respectively], DoutG[1].At this moment, different pre-charge voltage VR, VG are provided to red and green output data line DoutR[1 respectively], DoutG[1].
Subsequently, at the first sampled signal s1 in the period when low, to input data din[1] current value R[1] c samples, and it is stored among the first sample/hold circuit S/H1.At the second sampled signal s2 in the period when low, to input data din[1] current value G[1] c samples, and it is stored among the second sample/hold circuit S/H2.During these periods, the first holding signal h2 is high, make be applied in the second holding signal h2 the third and fourth sample/hold circuit S/H3, S/H4 respectively will with the current value R[1 through sampling] c, G[1] the corresponding electric current of c is sent to output data line DoutR[1], DoutG[1].
Therefore, each demultiplexer is applied to output data line to sampling input data with pre-charge voltage, and keeps the input data through sampling.When the input data that keep through sampling, to other sampling input data.
By this configuration and the operation of demultiplexer, pre-charge voltage is applied to each in the red, green and blue sub-pixel that forms a pixel differently.
Demultiplexer shown in Figure 10 also with the similar mode of the demultiplexer of Fig. 9, and different pre-charge voltages are applied to the output data line that is connected with the sub-pixel of different colours.More specifically, be applied to the level of pre-charge voltage of sub-pixel group according to being connected to output data line DoutR[1], DoutR[2] the red pieces pixel groups, be connected to output data line DoutG[1], DoutG[2] green sub-pixel group and be connected to output data line DoutB[1], DoutB[2] blue sub-pixel group and difference.As mentioned above, in demultiplexer according to example embodiment of the present invention, a precharge voltage line is connected to output data line, so that identical pre-charge voltage can be applied to output data line from precharge voltage line, and the color of not considering each sub-pixel how.
Figure 12 is the view that the sample/hold circuit that can use in the demultiplexer according to one or more example embodiment of the present invention is shown.
With reference to Figure 12, sample/hold circuit comprises: first to the 5th switch SW 11, SW12 ..., SW15; The first transistor M1; And maintenance capacitor C Hold
First switch SW 11 is in response to sampled signal s, and input data line Din is electrically connected with the drain electrode of the first transistor M1.Second switch SW12 is in response to sampled signal s, and with source electrode and the high voltage transmission line V of the first transistor M1 DDBe electrically connected.The 3rd switch SW 13 is in response to sampled signal s, and with input data line Din with keep capacitor C HoldSecond terminal be electrically connected.The 4th switch SW 14 is in response to holding signal h, and output data line Dout is electrically connected with the source electrode of the first transistor M1.The 5th switch SW 15 is in response to holding signal h, and the drain electrode of the first transistor M1 is electrically connected with low voltage lines VX.Keep capacitor C HoldSecond terminal that has the first terminal of the source electrode that is connected to the first transistor M1 and be connected to the grid of the first transistor M1.
In conducting and the 4th and the 5th switch SW 14, sampling period when SW15 turn-offs in response to holding signal h, form via the first transistor M1 in response to sampled signal s at first to the 3rd switch SW 11, SW12, SW13 from high voltage transmission line V DDTo the current path of input data line Din, allow input data current I thus DinBe sent to the first transistor M1 from input data line Din.Therefore, by with the input data current I that flows to the first transistor M1 DinCorresponding voltage comes keeping capacitor C HoldCharging.
Subsequently, first to the 3rd switch SW 11, SW12, SW13 turn-off in response to sampled signal s and the 4th and the 5th switch SW 14, SW15 in response to holding signal h in the maintenance period during conducting, form via the first transistor M1 from output data line Dout to low voltage lines V SSCurrent path, allow thus and keeping capacitor C HoldIn the corresponding electric current of voltage that charges into (that is, equal to import data current I DinElectric current) be sent to output data line Dout.
As mentioned above, sample/hold circuit allows to keep capacitor C HoldRecord and input data current I in response to sampled signal s DinCorresponding voltage, and in response to holding signal h will with keeping capacitor C HoldThe corresponding electric current of voltage of middle record is sent to output data line.The lead-out terminal of data driver should be the current absorption type, and wherein foreign current flows into data driver by lead-out terminal.Data driver with current absorption type output terminal has reduced variation in output current, needs low relatively mains voltage level, owing to the use of voltage devices has reduced chip size, and has reduced the chip cost that is used for data driver.Thereby the sample/hold circuit shown in Figure 12 has the current source type input terminal that current absorption type output terminal with data driver adapts.That is to say that electric current outwards flows by the input terminal of sample/hold circuit.
In previous exemplary embodiment, demultiplexer comprises 1: 2 multichannel decomposition circuit of sampling/maintenance.Yet demultiplexer is not limited to 1: 2 multichannel decomposition circuit, and can comprise various multichannel decomposition circuits, as 1: 3 multichannel decomposition circuit or 1: 4 multichannel decomposition circuit.
In previous exemplary embodiment, the sub-pixel that is connected to output data line comprises red pieces pixel, green sub-pixel and blue sub-pixel.Yet except red pieces pixel, green sub-pixel and blue sub-pixel, sub-pixel also can comprise white sub-pixel.
As mentioned above, example embodiment of the present invention provides display of organic electroluminescence and demultiplexer, wherein, has simplified data driver, and before data are programmed, data line is carried out precharge, reduced the data programing time thus by the voltage that is fit to.
In addition, example embodiment of the present invention provides display of organic electroluminescence and demultiplexer, and it uses current programmed type image element circuit, to reduce data current, reduces power consumption thus.
Although illustrated and described particular exemplary embodiment of the present invention, but person of skill in the art will appreciate that, can make change to these example embodiment, and not deviate from marrow of the present invention and scope, define scope of the present invention in claims and the equivalent thereof.

Claims (24)

1. display device comprises:
Be used to show and a plurality of pixels of the corresponding image of first data current that each described pixel comprises a plurality of sub-pixels;
The multi-strip scanning line is applied to a plurality of pixels by it with sweep signal;
Many first data lines are sent to a plurality of pixels by it with first data current;
Scanner driver is used for sweep signal is outputed to the multi-strip scanning line;
Data driver is used for second data current is sent to many second data lines; And
Demultiplexer, it comprises a plurality of multichannel decomposition circuits, each multichannel decomposition circuit is used for and will be decomposed at least two first data currents by corresponding in second data current that transmits of second data line multichannel, and, be used for described at least two first data currents are sent at least two first data lines
Wherein, before described at least two first data currents are sent to described at least two first data lines, pre-charge voltage is applied to described at least two first data lines, and
Wherein, at least one multichannel decomposition circuit comprises:
A plurality of sample/hold circuits, be used in response to sampled signal corresponding one of second data current is sampled, and, be used for corresponding at least two first data currents corresponding with described second data current being sent at least two first data lines in response to holding signal; And
A plurality of precharge switch, each described precharge switch is used in response to precharging signal, and pre-charge voltage is applied to one corresponding in described at least two first data lines.
2. display device as claimed in claim 1, wherein, a plurality of sample/hold circuits comprise first group of sample/hold circuit and second group of sample/hold circuit, wherein
At first group of sample/hold circuit in to second data current in the corresponding period when sampling, the output of second group of sample/hold circuit and at least one previous at least one in corresponding corresponding at least two first data currents in described second data current through sampling, and, at second group of sample/hold circuit in to second data current in the corresponding period when sampling, first group of sample/hold circuit output with at least another before in described second data current through sampling in corresponding corresponding at least two first data currents at least another.
3. display device as claimed in claim 2, wherein, at least one sample/hold circuit comprises:
The first transistor, it has source electrode, drain and gate;
Keep capacitor, second terminal that it has the first terminal of the source electrode that is connected to the first transistor and is connected to the grid of the first transistor;
First switch is used in response to corresponding one of sampled signal, and with a drain electrode that is connected to the first transistor in second data line;
Second switch is used in response to corresponding one of sampled signal, and the source electrode of the first transistor is connected to high voltage transmission line;
The 3rd switch is used in response to corresponding one of sampled signal, and is connected to second terminal that keeps capacitor with one in second data line;
The 4th switch is used in response to corresponding one of holding signal, and will at least two first a corresponding source electrode that is connected to the first transistor in the data lines; And
The 5th switch is used in response to corresponding one of holding signal, and the drain electrode of the first transistor is connected to low voltage lines.
4. display device as claimed in claim 3, wherein, sampled signal and holding signal are periodic signal, include sampling period and maintenance period,
Wherein, corresponding first, second and the 3rd switch of conducting during the sampling period in the sampled signal, and during keeping the period, turn-off first, second and the 3rd switch, and
Wherein, corresponding one is turn-offed the 4th and the 5th switch in the holding signal during the sampling period, and during keeping the period conducting the 4th and the 5th switch.
5. display device as claimed in claim 1, wherein, each precharge switch is in response to precharging signal, and one the pre-charge voltage that will be applied in second data line is applied to one corresponding at least two first data lines.
6. display device as claimed in claim 5 wherein, will be connected to the sub-pixel of the different colours among the sub-pixel that one at least two first data lines in the multichannel decomposition circuit are connected to pixel.
7. display device as claimed in claim 5 wherein, will be connected to the sub-pixel that has same color at least among the sub-pixel that one two first data lines in the multichannel decomposition circuit are connected to pixel.
8. display device as claimed in claim 1, wherein, each precharge switch is applied to one corresponding at least two first data lines in response to precharging signal and will be applied to one pre-charge voltage corresponding in the precharge voltage line.
9. display device as claimed in claim 8, wherein, the precharge voltage line of demultiplexer comprises:
Red pieces pixel precharge voltage line, by it with at least one in first data line that pre-charge voltage is applied to red pieces pixel among the sub-pixel is connected;
Green sub-pixel precharge voltage line, by it with at least one in first data line that pre-charge voltage is applied to green sub-pixel among the sub-pixel is connected; And
Blue sub-pixel precharge voltage line, by it with at least one in first data line that pre-charge voltage is applied to blue sub-pixel among the sub-pixel is connected.
10. display device as claimed in claim 1, wherein, a plurality of sample/hold circuits in being included at least one multichannel decomposition circuit are in to second data current in the corresponding period when sampling, and will with period when being sent to one corresponding at least two first data lines in corresponding corresponding at least two first data currents in second data current of sampling in, the precharge switch of at least one multichannel decomposition circuit is turned off, and with corresponding corresponding at least two first data currents in second data current of sampling in one be sent to before one corresponding at least two first data lines, the precharge switch of at least one multichannel decomposition circuit is switched on.
11. a demultiplexer comprises:
A plurality of multichannel decomposition circuits;
Many sampled signal lines are applied to the multichannel decomposition circuit by it with sampled signal;
The first and second holding signal lines are applied to the multichannel decomposition circuit by it with holding signal; And
The precharging signal line is applied to the multichannel decomposition circuit by it with precharging signal,
Wherein, at least one multichannel decomposition circuit is in response to sampled signal and holding signal, and will be decomposed into the output data electric current by the input data current multichannel that input data line transmits, and the output data electric current is sent to many output data lines, wherein, before the output data electric current is sent to described output data line, pre-charge voltage is applied to described output data line.
12. demultiplexer as claimed in claim 11, wherein, the pre-charge voltage that will have same voltage level is applied to many output data lines.
13. demultiplexer as claimed in claim 11, wherein, the pre-charge voltage that will have a same voltage level is applied to the output data line that the sub-pixel group with having same color among many output data lines is connected.
14. demultiplexer as claimed in claim 11, wherein, at least one multichannel decomposition circuit comprises:
First and second groups of sample/hold circuits, each comprises at least one sample/hold circuit, be used for to the input data current sample, and be used for with through the sampling the corresponding output data electric current of input data current be sent to output data line; And
A plurality of precharge switch are applied to output data line by it with pre-charge voltage.
15. demultiplexer as claimed in claim 14, wherein, at least one sample/hold circuit comprises:
The first transistor, it has source electrode, drain and gate;
Keep capacitor, second terminal that it has the first terminal of the source electrode that is connected to the first transistor and is connected to the grid of the first transistor;
First switch is used in response to sampled signal, and input data line is connected to the drain electrode of the first transistor;
Second switch is used in response to sampled signal, and the source electrode of the first transistor is connected to high voltage transmission line;
The 3rd switch is used in response to sampled signal, and input data line is connected to second terminal that keeps capacitor;
The 4th switch is used in response to holding signal, and with a source electrode that is connected to the first transistor in the output data line; And
The 5th switch is used in response to holding signal, and the drain electrode of the first transistor is connected to low voltage lines.
16. demultiplexer as claimed in claim 14, wherein, in period when a plurality of sample/hold circuits in being included at least one multichannel decomposition circuit are sampled to the input data current, and in the period when of will be sent in the output data line with in the corresponding output data electric current of input data current of sampling, the precharge switch of at least one multichannel decomposition circuit is turned off, and with through the sampling the corresponding output data electric current of input data current in of being sent in the output data line before, the precharge switch of at least one multichannel decomposition circuit is switched on.
17. demultiplexer as claimed in claim 15, wherein, sampled signal and holding signal are the periodic signal that comprises a plurality of periods, and described a plurality of periods comprise the sampling period and keep the period,
Wherein, at least one in the sampled signal be first, second and the 3rd switch of conducting during the sampling period, and turn-off first, second and the 3rd switch during keeping the period, and
Wherein, at least one in the holding signal turn-offed the 4th and the 5th switch during the sampling period, and during keeping the period conducting the 4th and the 5th switch.
18. a demultiplexer comprises:
A plurality of multichannel decomposition circuits;
Many sampled signal lines are applied to the multichannel decomposition circuit by it with sampled signal;
The first and second holding signal lines are applied to the multichannel decomposition circuit by it with holding signal;
The precharging signal line is applied to the multichannel decomposition circuit by it with precharging signal; And
Precharge voltage line is applied to the multichannel decomposition circuit by it with pre-charge voltage,
Wherein, at least one multichannel decomposition circuit is in response to sampled signal and holding signal, and will be decomposed into the output data electric current by the input data current multichannel that an input data line transmits, and the output data electric current is sent to many output data lines, wherein, before the output data electric current is sent to described output data line, pre-charge voltage is applied to described output data line.
19. demultiplexer as claimed in claim 18, wherein, the pre-charge voltage that will have same voltage level is applied to many output data lines.
20. demultiplexer as claimed in claim 18, wherein, the pre-charge voltage that will have a same voltage level is applied to the output data line that the sub-pixel group with having same color among many output data lines is connected.
21. demultiplexer as claimed in claim 18, wherein, at least one multichannel decomposition circuit comprises:
First and second groups of sample/hold circuits, each comprises at least one sample/hold circuit, be used for to the input data current sample, and be used for with through the sampling the corresponding output data electric current of input data current be sent to output data line; And
A plurality of precharge switch are applied to output data line by it with pre-charge voltage.
22. demultiplexer as claimed in claim 21, wherein, at least one sample/hold circuit comprises:
The first transistor, it has source electrode, drain and gate;
Keep capacitor, second terminal that it has the first terminal of the source electrode that is connected to the first transistor and is connected to the grid of the first transistor;
First switch is used in response to sampled signal, and input data line is connected to the drain electrode of the first transistor;
Second switch is used in response to sampled signal, and the source electrode of the first transistor is connected to high voltage transmission line;
The 3rd switch is used in response to sampled signal, and input data line is connected to second terminal that keeps capacitor;
The 4th switch is used in response to holding signal, and with a source electrode that is connected to the first transistor in the output data line; And
The 5th switch is used in response to holding signal, and the drain electrode of the first transistor is connected to low voltage lines.
23. demultiplexer as claimed in claim 21, wherein, in period when a plurality of sample/hold circuits in being included at least one multichannel decomposition circuit are sampled to the input data current, and in the period when of will be sent in the output data line with in the corresponding output data electric current of input data current of sampling, the precharge switch of at least one multichannel decomposition circuit is turned off, and with through the sampling the corresponding output data electric current of input data current in of being sent in the output data line before, the precharge switch of at least one multichannel decomposition circuit is switched on.
24. demultiplexer as claimed in claim 22, wherein, sampled signal and holding signal are the periodic signal that has a plurality of periods respectively, and described a plurality of periods comprise the sampling period and keep the period,
Wherein, at least one in the sampled signal be first, second and the 3rd switch of conducting during the sampling period, and turn-off first, second and the 3rd switch during keeping the period, and
Wherein, at least one in the holding signal turn-offed the 4th and the 5th switch during the sampling period, and during keeping the period conducting the 4th and the 5th switch.
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Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100578911B1 (en) * 2003-11-26 2006-05-11 삼성에스디아이 주식회사 Current demultiplexing device and current programming display device using the same
KR100578913B1 (en) * 2003-11-27 2006-05-11 삼성에스디아이 주식회사 Display device using demultiplexer and driving method thereof
KR100600350B1 (en) * 2004-05-15 2006-07-14 삼성에스디아이 주식회사 demultiplexer and Organic electroluminescent display using thereof
KR100581799B1 (en) * 2004-06-02 2006-05-23 삼성에스디아이 주식회사 Organic electroluminscent display and demultiplexer
TWI275056B (en) * 2005-04-18 2007-03-01 Wintek Corp Data multiplex circuit and its control method
US7319446B2 (en) * 2005-04-19 2008-01-15 Lg.Philips Lcd Co., Ltd. Organic electroluminescent display device and driving method thereof
KR100707634B1 (en) * 2005-04-28 2007-04-12 한양대학교 산학협력단 Data Driving Circuit and Driving Method of Light Emitting Display Using the same
KR101267286B1 (en) * 2005-07-04 2013-05-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Display device and driving method thereof
KR100662985B1 (en) * 2005-10-25 2006-12-28 삼성에스디아이 주식회사 Data driving circuit and driving method of organic light emitting display using the same
KR100902237B1 (en) * 2008-02-20 2009-06-11 삼성모바일디스플레이주식회사 Organic light emitting display device
KR20090090117A (en) * 2008-02-20 2009-08-25 삼성모바일디스플레이주식회사 Demultiplexer and light emitting display device using the same
JP2009211039A (en) * 2008-03-04 2009-09-17 Samsung Mobile Display Co Ltd Organic light emitting display device
US20120182284A1 (en) * 2011-01-14 2012-07-19 Chan-Long Shieh Active matrix for displays and method of fabrication
US9047838B2 (en) 2012-03-14 2015-06-02 Apple Inc. Systems and methods for liquid crystal display column inversion using 3-column demultiplexers
US9368077B2 (en) 2012-03-14 2016-06-14 Apple Inc. Systems and methods for adjusting liquid crystal display white point using column inversion
US9047826B2 (en) 2012-03-14 2015-06-02 Apple Inc. Systems and methods for liquid crystal display column inversion using reordered image data
US9047832B2 (en) 2012-03-14 2015-06-02 Apple Inc. Systems and methods for liquid crystal display column inversion using 2-column demultiplexers
US9245487B2 (en) 2012-03-14 2016-01-26 Apple Inc. Systems and methods for reducing loss of transmittance due to column inversion
KR102074423B1 (en) * 2013-07-22 2020-02-07 삼성디스플레이 주식회사 Display device and driving method thereof
KR102137079B1 (en) * 2014-03-03 2020-07-24 삼성디스플레이 주식회사 Organic light emitting display device
CN104867452A (en) * 2015-06-08 2015-08-26 深圳市华星光电技术有限公司 Signal separator and AMOLED display device
CN105047165A (en) * 2015-08-28 2015-11-11 深圳市华星光电技术有限公司 RGBW-based drive circuit and flat panel display
CA2908285A1 (en) * 2015-10-14 2017-04-14 Ignis Innovation Inc. Driver with multiple color pixel structure
CN105913823A (en) * 2016-06-23 2016-08-31 武汉华星光电技术有限公司 High-resolution demultiplexer driving circuit
CN105957484B (en) * 2016-07-01 2019-01-04 武汉华星光电技术有限公司 A kind of driving circuit and liquid crystal display panel based on liquid crystal display panel
CN106935217B (en) * 2017-03-23 2019-03-15 武汉华星光电技术有限公司 Multiple-channel output selection circuit and display device
CN110930889B (en) * 2019-12-27 2022-07-22 厦门天马微电子有限公司 Display panel, driving method thereof and display device
CN113450701A (en) * 2020-07-22 2021-09-28 重庆康佳光电技术研究院有限公司 Data line control method and device, data line driving device and display device
KR20220161903A (en) * 2021-05-31 2022-12-07 엘지디스플레이 주식회사 Display panel, display device including the display panel and personal immersion system using the display device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5510807A (en) * 1993-01-05 1996-04-23 Yuen Foong Yu H.K. Co., Ltd. Data driver circuit and associated method for use with scanned LCD video display
CN1447302A (en) * 2002-03-21 2003-10-08 三星Sdi株式会社 Indicator and its drive method
JP2004029755A (en) * 2002-04-26 2004-01-29 Toshiba Matsushita Display Technology Co Ltd Electroluminescence display device
CN1488131A (en) * 2001-10-17 2004-04-07 索尼公司 Display device

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57201295A (en) * 1981-06-04 1982-12-09 Sony Corp Two-dimensional address device
JPH0754420B2 (en) 1989-05-22 1995-06-07 日本電気株式会社 Driving method for liquid crystal display device
JPH06118913A (en) 1992-08-10 1994-04-28 Casio Comput Co Ltd Liquid crystal display device
US5426447A (en) * 1992-11-04 1995-06-20 Yuen Foong Yu H.K. Co., Ltd. Data driving circuit for LCD display
JPH06337400A (en) * 1993-05-31 1994-12-06 Sharp Corp Matrix type display device and method for driving it
US5555001A (en) * 1994-03-08 1996-09-10 Prime View Hk Limited Redundant scheme for LCD display with integrated data driving circuit
US5633653A (en) * 1994-08-31 1997-05-27 David Sarnoff Research Center, Inc. Simultaneous sampling of demultiplexed data and driving of an LCD pixel array with ping-pong effect
JP3110980B2 (en) * 1995-07-18 2000-11-20 インターナショナル・ビジネス・マシーンズ・コーポレ−ション Driving device and method for liquid crystal display device
FR2743658B1 (en) * 1996-01-11 1998-02-13 Thomson Lcd METHOD FOR ADDRESSING A FLAT SCREEN USING A PRECHARGE OF THE PIXELS CONTROL CIRCUIT ALLOWING THE IMPLEMENTATION OF THE METHOD AND ITS APPLICATION TO LARGE DIMENSION SCREENS
KR100430091B1 (en) * 1997-07-10 2004-07-15 엘지.필립스 엘시디 주식회사 Liquid Crystal Display
KR100239413B1 (en) * 1997-10-14 2000-01-15 김영환 Driving device of liquid crystal display element
JP5240884B2 (en) 1998-05-16 2013-07-17 トムソン ライセンシング Driving device for display device arranged in bus
TW530287B (en) * 1998-09-03 2003-05-01 Samsung Electronics Co Ltd Display device, and apparatus and method for driving display device
US6348906B1 (en) * 1998-09-03 2002-02-19 Sarnoff Corporation Line scanning circuit for a dual-mode display
JP3800831B2 (en) 1998-10-13 2006-07-26 セイコーエプソン株式会社 Display device and electronic device
KR100430100B1 (en) * 1999-03-06 2004-05-03 엘지.필립스 엘시디 주식회사 Driving Method of Liquid Crystal Display
KR100701892B1 (en) 1999-05-21 2007-03-30 엘지.필립스 엘시디 주식회사 Method For Driving Data lines and Licquid Crystal Display Apparatus Using The same
JP2001195042A (en) * 2000-01-05 2001-07-19 Internatl Business Mach Corp <Ibm> Source driver for liquid crystal panel and leveling method for source driver output variance
JP4593740B2 (en) 2000-07-28 2010-12-08 ルネサスエレクトロニクス株式会社 Display device
JP2002162934A (en) * 2000-09-29 2002-06-07 Eastman Kodak Co Flat-panel display with luminance feedback
JP2003195815A (en) 2000-11-07 2003-07-09 Sony Corp Active matrix type display device and active matrix type organic electroluminescence display device
US7015882B2 (en) * 2000-11-07 2006-03-21 Sony Corporation Active matrix display and active matrix organic electroluminescence display
JP4155389B2 (en) 2001-03-22 2008-09-24 株式会社半導体エネルギー研究所 LIGHT EMITTING DEVICE, ITS DRIVE METHOD, AND ELECTRONIC DEVICE
US6667580B2 (en) * 2001-07-06 2003-12-23 Lg Electronics Inc. Circuit and method for driving display of current driven type
JP3951687B2 (en) * 2001-08-02 2007-08-01 セイコーエプソン株式会社 Driving data lines used to control unit circuits
JP2003058108A (en) 2001-08-22 2003-02-28 Sony Corp Color display device and color organic electroluminescence display device
JP4193452B2 (en) 2001-08-29 2008-12-10 日本電気株式会社 Semiconductor device for driving current load device and current load device having the same
CN101165759B (en) * 2001-08-29 2012-07-04 日本电气株式会社 Semiconductor device for driving current load device and current load device equipped with the same
JP4650601B2 (en) 2001-09-05 2011-03-16 日本電気株式会社 Current drive element drive circuit, drive method, and image display apparatus
US7259740B2 (en) * 2001-10-03 2007-08-21 Nec Corporation Display device and semiconductor device
JP3601499B2 (en) * 2001-10-17 2004-12-15 ソニー株式会社 Display device
US6963336B2 (en) 2001-10-31 2005-11-08 Semiconductor Energy Laboratory Co., Ltd. Signal line driving circuit and light emitting device
US7193619B2 (en) * 2001-10-31 2007-03-20 Semiconductor Energy Laboratory Co., Ltd. Signal line driving circuit and light emitting device
US7006072B2 (en) 2001-11-10 2006-02-28 Lg.Philips Lcd Co., Ltd. Apparatus and method for data-driving liquid crystal display
JP2003157048A (en) 2001-11-19 2003-05-30 Matsushita Electric Ind Co Ltd Active matrix type display device
JP3982249B2 (en) 2001-12-11 2007-09-26 株式会社日立製作所 Display device
KR100840675B1 (en) * 2002-01-14 2008-06-24 엘지디스플레이 주식회사 Mehtod and apparatus for driving data of liquid crystal display
JP3637911B2 (en) * 2002-04-24 2005-04-13 セイコーエプソン株式会社 Electronic device, electronic apparatus, and driving method of electronic device
JP4165120B2 (en) 2002-05-17 2008-10-15 株式会社日立製作所 Image display device
JP3970110B2 (en) 2002-06-27 2007-09-05 カシオ計算機株式会社 CURRENT DRIVE DEVICE, ITS DRIVE METHOD, AND DISPLAY DEVICE USING CURRENT DRIVE DEVICE
US20040056852A1 (en) * 2002-09-23 2004-03-25 Jun-Ren Shih Source driver for driver-on-panel systems
JP4103544B2 (en) 2002-10-28 2008-06-18 セイコーエプソン株式会社 Organic EL device
US7324079B2 (en) * 2002-11-20 2008-01-29 Mitsubishi Denki Kabushiki Kaisha Image display apparatus
US8035626B2 (en) * 2002-11-29 2011-10-11 Semiconductor Energy Laboratory Co., Ltd. Current driving circuit and display device using the current driving circuit
KR100894643B1 (en) * 2002-12-03 2009-04-24 엘지디스플레이 주식회사 Data driving apparatus and method for liquid crystal display
WO2004077671A1 (en) * 2003-02-28 2004-09-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for driving the same
KR100515299B1 (en) * 2003-04-30 2005-09-15 삼성에스디아이 주식회사 Image display and display panel and driving method of thereof
US6771028B1 (en) * 2003-04-30 2004-08-03 Eastman Kodak Company Drive circuitry for four-color organic light-emitting device
JP3671973B2 (en) * 2003-07-18 2005-07-13 セイコーエプソン株式会社 Display driver, display device, and driving method
JP4595300B2 (en) 2003-08-21 2010-12-08 セイコーエプソン株式会社 Electro-optical device and electronic apparatus
KR100529075B1 (en) * 2003-11-10 2005-11-15 삼성에스디아이 주식회사 Demultiplexer using current sample/hold circuit, and display apparatus using the same
KR100578911B1 (en) * 2003-11-26 2006-05-11 삼성에스디아이 주식회사 Current demultiplexing device and current programming display device using the same
KR100649244B1 (en) * 2003-11-27 2006-11-24 삼성에스디아이 주식회사 Demultiplexer, and display apparatus using the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5510807A (en) * 1993-01-05 1996-04-23 Yuen Foong Yu H.K. Co., Ltd. Data driver circuit and associated method for use with scanned LCD video display
CN1488131A (en) * 2001-10-17 2004-04-07 索尼公司 Display device
CN1447302A (en) * 2002-03-21 2003-10-08 三星Sdi株式会社 Indicator and its drive method
JP2004029755A (en) * 2002-04-26 2004-01-29 Toshiba Matsushita Display Technology Co Ltd Electroluminescence display device

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