CN100440738C - Method for rapid realizing Galois domain-extending operation in BCII coding - Google Patents

Method for rapid realizing Galois domain-extending operation in BCII coding Download PDF

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CN100440738C
CN100440738C CNB2005101343762A CN200510134376A CN100440738C CN 100440738 C CN100440738 C CN 100440738C CN B2005101343762 A CNB2005101343762 A CN B2005101343762A CN 200510134376 A CN200510134376 A CN 200510134376A CN 100440738 C CN100440738 C CN 100440738C
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galois
expands
expression
polynomial repressentation
power
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夏煜
王浩
高飞
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Vimicro Corp
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Abstract

The present invention discloses a quick implementing method for the Galois extension field operation in BCII coding. The coincidence relation of elements between power representation and polynomial representation is previously established; the extension field operation is carried out as the following steps: inputting an operation expression to Galois extension field operation; judging the type of the Galois extension field operation in the operation expression; correspondingly converting the representing mode of operands in the operation expression by inquiring the established coincidence relation of the element according to the type of the Galois extension field operation; carrying out corresponding operation control over the converted operands; finally, outputting the result of the Galois extension field operation. The method realizes hybrid operation by the two representing methods of the Galois extension field elements, enhances the operation speed of BCH coding and decoding and lowers the complexity of the realization of Galois extension field operational software.

Description

Galois expands the Fast implementation of domain operation in the Bose-Chaudhuri-Hocquenghem Code
Technical field
The present invention relates to a kind of coding, coding/decoding method that is used for EDC error detection and correction, relate in particular to the Fast implementation that Galois expands domain operation in a kind of Bose-Chaudhuri-Hocquenghem Code.
Background technology
Along with the development of digitizing technique, brought the convenience of storage and transmission.But, introduced the EDC error detection and correction mechanism of data and automatically found and be corrected in the mistake that may exist in transmission and the storing process along with being on the increase and the reliability factor of transmission, storage medium of data volume.This technology has obtained in fields such as communication, storage using widely.
In order to realize the EDC error detection and correction of data, can adopt the method for data being carried out Code And Decode.Cyclic code is a kind of packeting error-correcting code form commonly used, and it produces other code words by the cyclic shift of code word.The most representative in the cyclic code is BCH Bose-Chadhuri-Hocquengham (BCH) coding and Reed-Solomon (RS) coding.Bose-Chaudhuri-Hocquenghem Code is typical cyclic code, can design various error correcting capabilities, code length, has the efficient height, encodes and deciphers characteristics such as fairly simple; Reed-Solomon is polynary Bose-Chaudhuri-Hocquenghem Code, has obtained extensive use equally.
The realization of existing Bose-Chaudhuri-Hocquenghem Code and decoding is divided into the hardware realization and software is realized two kinds of methods.Wherein the arithmetic operation in Galois expansion territory is the core component of encoding and decoding computing, also is time-consuming relatively calculating process.The hardware implementation method can well be set up by adder and shift register, but its weak point is to have increased system cost, has improved the system complexity of codec.Designed polynomial arithmetic operation and software is realized because Galois expands domain operation, so its algorithm complexity is higher, especially, does not often satisfy actual demand in the occasion of big code length.
Summary of the invention
Therefore technical problem to be solved by this invention provides in a kind of Bose-Chaudhuri-Hocquenghem Code that can realize based on software the method that Galois fast expands domain operation.This method has been set up contact by the mode of tabling look-up between the power time computing of primitive element and polynomial computing, bring into play the advantage of computing separately, improves arithmetic speed.
The present invention specifically is achieved in that
Galois expands the Fast implementation of domain operation in a kind of Bose-Chaudhuri-Hocquenghem Code, set up the corresponding relation of each element between power time expression and the polynomial repressentation in advance, what comprise each element represents the forward mapping table of polynomial repressentation and the reverse mapping table of time expression from the polynomial repressentation to power from power; It expands domain operation and carries out as follows:
Import the operation expression that pending Galois expands domain operation;
Judge Galois expands domain operation in this operation expression type and operation numerical representation mode;
If it is addition, subtraction operation that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is a polynomial repressentation, then directly this operand is carried out corresponding arithmetic operation and export the result that Galois expands domain operation; If it is addition, subtraction operation that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is power time expression, then inquire about described power and represent the forward mapping table of polynomial repressentation, power time expression is converted to polynomial repressentation, then the operand that converts is carried out corresponding arithmetic operation and export the result that Galois expands domain operation; If it is multiplication and division or power time computing that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is power time expression, then directly this operand is carried out corresponding arithmetic operation and exports the result that Galois expands domain operation; If it is multiplication and division or power time computing that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is a polynomial repressentation, then inquire about the reverse mapping table of described polynomial repressentation to power time expression, polynomial repressentation is converted to power time expression, then the operand that converts is carried out corresponding arithmetic operation and export the result that Galois expands domain operation.
Press such scheme, described forward mapping table time is represented the mapping table of polynomial repressentation for what be made of 256 elements from power, and described reverse mapping table is the mapping table of time expression from the polynomial repressentation to power that is made of 256 elements.
Owing to adopted above-mentioned treatment step, the present invention compared with prior art has the following advantages:
The quick software implementation method of Galois expansion domain operation is the optimization method in the Bose-Chaudhuri-Hocquenghem Code computational process in the Bose-Chaudhuri-Hocquenghem Code that the present invention proposes.This method has changed the method that original representation that merely expands the territory from a kind of Galois is realized addition subtraction multiplication and division and power time computing, but by utilizing polynomial repressentation and power time expression dual mode to participate in computing, selects separately compute mode faster to realize.Carry out two kinds of conversions between method for expressing by the mapping table that makes up the mutual conversion of two kinds of method for expressing, accelerated the conversion operations of nonidentity operation operation the operator representation requirement; Expand two kinds of method for expressing of field element by Galois and realize hybrid operation, improved the arithmetic speed of BCH encoding and decoding greatly, mutually combine, have complementary advantages, greatly reduce Galois and expand the complexity that domain operation software is realized by two kinds of method for expressing.
Description of drawings
Fig. 1 is that coding/decoding module and Galois of the present invention expand the block diagram that concerns that domain operation is realized module fast in the BCH encoding-decoding process;
Fig. 2 is the software realization flow figure that Galois expands domain operation in the Bose-Chaudhuri-Hocquenghem Code of the present invention.
Embodiment
Below in conjunction with accompanying drawing specific implementation process of the present invention is further described:
Generally, the element representation that Galois expands the territory can have following three kinds of modes, and power table shows, polynomial repressentation and vector representation.For GF (2 3) the expression of field element as shown in table 1:
Power time expression Vector representation Polynomial repressentation
0 000 0
a 0 001 1
a 1 010 x
a 2 100 x 2
a 3 011 x+1
a 4 110 x 2+x
a 5 111 x 2+x+1
a 6 101 x 2+1
Table 1
Wherein, a is called primitive element, can produce all GF (2 by primitive element a 3) element.It is corresponding to that vector representation here and polynomial table are shown in the computing of field element.That is to say that vector representation is exactly another form of presentation of polynomial repressentation.Therefore in the preferred embodiment of the invention, only the Fast implementation that a kind of Galois expands domain operation has been proposed from power time expression and these two kinds of expression waies of polynomial repressentation.
In the encoding and decoding of BCH and RS, at GF (q m) on computing mainly comprise time computing of addition subtraction multiplication and division and power.Utilize the computing of any representation all to have certain complexity merely.When the computing of adopting power time expression carrying out Galois to expand the territory, multiplication and division is relative simple with power time computing, but adds, the subtraction complexity.When adopting vector representation and polynomial repressentation, addition, subtraction operation is realized simple, but time computing of multiplication and division and power need be carried out polynomial computing, and complexity is higher.This be because: in existing microprocessor, possessed the adder of plus and minus calculation usually, and do not possessed special-purpose hardware circuits such as multiplication, even and the microprocessor that has possessed special-purpose mlultiplying circuit also need the more clock cycle to realize a multiply operation.Therefore, if can be converted to plus and minus calculation to all computings, can significantly reduce computation complexity.When adopting power to represent, expand the multiplication and division in territory and the power time signed magnitude arithmetic(al) that power time computing all shows as field element at Galois; If but adopted vector and polynomial repressentation to realize multiplication and division and power time computing, then need to carry out the multiplication of polynomial operation, complexity is higher.When adopting multinomial and vector representation, the plus and minus calculation of field element can directly be realized by the plus and minus calculation of element; If but adopting the operation of power time expression carrying out addition and subtraction, computation complexity is higher relatively.
The concrete complexity of calculating is as shown in table 2:
Figure C20051013437600061
Table 2
As can be seen from Table 2, some computing in its computing of different method for expressing is simple relatively, some computing relative complex a kind ofly mutually combines two kinds of method for expressing so the present invention proposes, and utilizes computing advantage separately and the quick software implementation method that mutually combines and form.Forward and reverse mapping table by setting up element correspondence between power time expression and the polynomial repressentation can carry out the conversion of power time expression and polynomial repressentation rapidly in the present invention.In BCH and RS coding, utilize power time expression to realize that Galois expands the multiplication and division and the power time computing in territory; Utilize polynomial repressentation or vector representation to realize that Galois expands the addition, subtraction operation in territory.
As shown in Figure 1, expand domain operation at Galois and realize fast in the module, set up the corresponding relation of each element between power time expression and the polynomial repressentation in advance.Here with GF (2 8) be example, be descriptive tool with the C language, its specific implementation is described:
Set up GF (2 8) correspondence table of conversion mutually between the polynomial repressentation (vector representation) of last 256 elements and the power time expression.Here need to make up two tables: power is represented the mapping table g_fe8_f of polynomial repressentation and the mapping table g_fe8_r that polynomial repressentation is represented to power.
static const unsigned char g_fe8_f[256]={
1,2,4,8,16,32,64,128,29,58,116,232,205,135,19,38,
76,152,45,90,180,117,234,201,143,3,6,12,24,48,96,192,
157,39,78,156,37,74,148,53,106,212,181,119,238,193,159,35,
70,140,5,10,20,40,80,160,93,186,105,210,185,111,222,161,
95,190,97,194,153,47,94,188,101,202,137,15,30,60,120,240,
253,231,211,187,107,214,177,127,254,225,223,163,91,182,113,226,
217,175,67,134,17,34,68,136,13,26,52,104,208,189,103,206,
129,31,62,124,248,237,199,147,59,118,236,197,151,51,102,204,
133,23,46,92,184,109,218,169,79,158,33,66,132,21,42,84,
168,77,154,41,82,164,85,170,73,146,57,114,228,213,183,115,
230,209,191,99,198,145,63,126,252,229,215,179,123,246,241,255,
227,219,171,75,150,49,98,196,149,55,110,220,165,87,174,65,
130,25,50,100,200,141,7,14,28,56,112,224,221,167,83,166,
81,162,89,178,121,242,249,239,195,155,43,86,172,69,138,9,
18,36,72,144,61,122,244,245,247,243,251,235,203,139,11,22,
44,88,176,125,250,233,207,131,27,54,108,216,173,71,142,0
};
static const unsigned char g_fe8_r[256]={
0,0,1,25,2,50,26,198,3,223,51,238,27,104,199,75,
4,100,224,14,52,141,239,129,28,193,105,248,200,8,76,113,
5,138,101,47,225,36,15,33,53,147,142,218,240,18,130,69,
29,181,194,125,106,39,249,185,201,154,9,120,77,228,114,166,
6,191,139,98,102,221,48,253,226,152,37,179,16,145,34,136,
54,208,148,206,143,150,219,189,241,210,19,92,131,56,70,64,
30,66,182,163,195,72,126,110,107,58,40,84,250,133,186,61,
202,94,155,159,10,21,121,43,78,212,229,172,115,243,167,87,
7,112,192,247,140,128,99,13,103,74,222,237,49,197,254,24,
227,165,153,119,38,184,180,124,17,68,146,217,35,32,137,46,
55,63,209,91,149,188,207,205,144,135,151,178,220,252,190,97,
242,86,211,171,20,42,93,158,132,60,57,83,71,109,65,162,
31,45,67,216,183,123,164,118,196,23,73,236,127,12,111,246,
108,161,59,82,41,157,85,170,251,96,134,177,187,204,62,90,
203,89,95,176,156,169,160,81,11,245,22,235,122,117,44,215,
79,174,213,233,230,231,173,232,116,214,244,234,168,80,88,175
};
Represent GF (2 with unsigned char type respectively here, 8) polynomial repressentation of element and power time expression.When adopting polynomial repressentation, corresponding unsigned char type data binary form is shown b 7b 6b 5b 4b 3b 2b 1b 0, then represent element b 7x 7+ b 6x 6+ b 5x 5+ b 4x 4+ b 3x 3+ b 2x 2+ b 1x 1+ b 0When adopting power to represent, corresponding unsigned char type data are i, then represent element a i, 0≤i≤255 wherein.
Represent that at power among the mapping table g_fe8_f of polynomial repressentation, array indexing 0~254 is valid data; In the mapping table g_fe8_r of power time expression, array indexing 1~255 is valid data in polynomial repressentation.
As shown in Figure 2, the program circuit of the quick software realization of Galois expansion domain operation can be realized by following step:
1. at first import the operation expression (as Fig. 1) that the pending Galois that is made of arithmetic type and operand expands domain operation.
2. judge the type that Galois expands domain operation in the operation expression of importing.
3. judge operation numerical representation mode in the operation expression of importing.
4. according to the type of Galois expansion domain operation, represent operation numerical representation mode to be carried out corresponding conversion to the mapping table g_fe8_r that the mapping table g_fe8_f and the polynomial repressentation of polynomial repressentation are represented to power by the power that inquiry is set up.
(1) power time expression is converted to polynomial repressentation:
For power time expression a i, by tabling look-up,
a i ⇒ g _ fe 8 _ f [ i ] = b 7 2 7 + b 6 2 6 + b 5 2 5 + b 4 2 4 + b 3 2 3 + b 2 2 2 + b 1 2 1 + b 0
Then polynomial table is shown: b 7x 7+ b 6x 6+ b 5x 5+ b 4x 4+ b 3x 3+ b 2x 2+ b 1x 1+ b 0, 0≤i≤254 here.
(2) polynomial repressentation is converted to power time expression:
For polynomial repressentation b 7x 7+ b 6x 6+ b 5x 5+ b 4x 4+ b 3x 3+ b 2x 2+ b 1x 1+ b 0, can find corresponding i, be shown with binary form: i=b 72 7+ b 62 6+ b 52 5+ b 42 4+ b 32 3+ b 22 2+ b 12 1+ b 0
If i=0, then power time expression also is 0; Otherwise promptly 0<i<256 need by the j=g_fe8_r[i that tables look-up], then power is expressed as a j
5. the operand that converts is carried out corresponding arithmetic operation.
(1) plus and minus calculation
The plus and minus calculation of Galois expansion field element is realized by polynomial repressentation among the present invention.Suppose that two operands are respectively m and n.At first two operands are converted to polynomial repressentation.Suppose that two operands are respectively with polynomial repressentation:
m=m 7x 7+m 6x 6+m 5x 5+m 4x 4+m 3x 3+m 2x 2+m 1x 1+m 0
n=n 7x 7+n 6x 6+n 5x 5+n 4x 4+n 3x 3+n 2x 2+n 1x 1+n 0
Then have:
m + n = ( m 7 ⊗ n 7 ) x 7 + ( m 6 ⊗ n 6 ) x 6 + ( m 5 ⊗ n 5 ) x 5 + ( m 4 ⊗ n 4 ) x 4 + ( m 3 ⊗ n 3 ) x 3 + ( m 2 ⊗ n 2 ) x 2 + ( m 1 ⊗ n 1 ) x + ( m 0 ⊗ n 0 )
m - n = ( m 7 ⊗ n 7 ) x 7 + ( m 6 ⊗ n 6 ) x 6 + ( m 5 ⊗ n 5 ) x 5 + ( m 4 ⊗ n 4 ) x 4 + ( m 3 ⊗ n 3 ) x 3 + ( m 2 ⊗ n 2 ) x 2 + ( m 1 ⊗ n 1 ) x + ( m 0 ⊗ n 0 )
Wherein, m 7, m 6..., m 0∈ [0,1], n 7, n 6..., n 0∈ [0,1],
Figure C20051013437600094
Be xor operation.
(2) multiplication and division computing
The multiplication and division computing of Galois expansion field element realizes by power time expression among the present invention.Suppose that two operands are respectively m and n.At first two operands are converted to power time expression.Suppose that corresponding power is expressed as a iAnd a j, then have:
m · n = a i · a j = a ( i + j ) mod ( 2 m - 1 )
m / n = a i / a j = a ( i - j ) mod ( 2 m - 1 )
(3) power time computing
The power time computing of Galois expansion field element realizes by power time expression among the present invention.Suppose that two operands are respectively m and j.M is GF (2 8) element, j is an integer.At first m is converted to power time expression.Suppose that corresponding power is expressed as a i, then have:
m j = ( a i ) j = a ( i · j ) mod ( 2 m - 1 )
6. export the result that Galois expands domain operation at last.
Below enumerate a concrete computing example, the invention will be further described:
Find the solution a 87+ a 221At first this expression formula input Galois is expanded domain operation and realize module fast; Judge that its arithmetic type is add operation, it is easier that the employing polynomial repressentation is carried out addition, and its operation numerical representation mode is power time expression; Therefore, above-mentioned two operation numerical representation modes are carried out corresponding conversion, represent to find the polynomial repressentation of corresponding field element to the mapping table g_fe8_f of polynomial repressentation by inquiry power:
Operand a 87, search g_fe8_f[256] and table, index value is that the polynomial table of 87 correspondences is shown g_fe8_f[87 here]=127, corresponding vector representation is 0b01111111, then polynomial table is shown x 6+ x 5+ x 4+ x 3+ x 2+ x+1; In like manner, operand a 221, g_fe8_f[221 tables look-up]=69, corresponding vector representation is 0b1000101, polynomial table is shown x 6+ x 2+ 1.
Below just can carry out add operation by polynomial repressentation, the polynomial table of operation result is shown:
x 6+x 5+x 4+x 3+x 2+x+1+x 6+x 2+1=x 5+x 4+x 3+x
Result's vector representation is 0b111010, and corresponding decimal number is 58.Then by look-up table g_fe8_r[256], index value is 58, finds g_fe8_r[58 in the correspondence table]=9, then result's power is expressed as a 9Output operation result a 9

Claims (2)

1, the Fast implementation that Galois expands domain operation in a kind of Bose-Chaudhuri-Hocquenghem Code, set up the corresponding relation of each element between power time expression and the polynomial repressentation in advance, what comprise each element represents the forward mapping table of polynomial repressentation and the reverse mapping table of time expression from the polynomial repressentation to power from power; It expands domain operation and carries out as follows:
Import the operation expression that pending Galois expands domain operation;
Judge Galois expands domain operation in this operation expression type and operation numerical representation mode;
If it is addition, subtraction operation that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is a polynomial repressentation, then directly this operand is carried out corresponding arithmetic operation and export the result that Galois expands domain operation;
If it is addition, subtraction operation that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is power time expression, then inquire about described power and represent the forward mapping table of polynomial repressentation, power time expression is converted to polynomial repressentation, then the operand that converts is carried out corresponding arithmetic operation and export the result that Galois expands domain operation;
If it is multiplication and division or power time computing that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is power time expression, then directly this operand is carried out corresponding arithmetic operation and exports the result that Galois expands domain operation;
If it is multiplication and division or power time computing that Galois expands the type of domain operation, and arithmetic operation numerical representation mode is a polynomial repressentation, then inquire about the reverse mapping table of described polynomial repressentation to power time expression, polynomial repressentation is converted to power time expression, then the operand that converts is carried out corresponding arithmetic operation and export the result that Galois expands domain operation.
2, the Fast implementation that Galois expands domain operation in the Bose-Chaudhuri-Hocquenghem Code as claimed in claim 1 is characterized in that, described forward mapping table and reverse mapping table constitute by 256 elements.
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