CN100459360C - 用于交错负载点调节器的系统和方法 - Google Patents

用于交错负载点调节器的系统和方法 Download PDF

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CN100459360C
CN100459360C CNB2003801000206A CN200380100020A CN100459360C CN 100459360 C CN100459360 C CN 100459360C CN B2003801000206 A CNB2003801000206 A CN B2003801000206A CN 200380100020 A CN200380100020 A CN 200380100020A CN 100459360 C CN100459360 C CN 100459360C
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power
voltage
voltage regulator
supply system
phase shift
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CN1685459A (zh
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阿兰·沙皮伊
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Pai Capital Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00Circuit arrangements for dc mains or dc distribution networks
    • H02J1/08Three-wire systems; Systems having more than three wires
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/285Single converters with a plurality of output stages connected in parallel
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00Circuit arrangements for dc mains or dc distribution networks
    • H02J1/10Parallel operation of dc sources
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00Circuit arrangements for dc mains or dc distribution networks
    • H02J1/10Parallel operation of dc sources
    • H02J1/102Parallel operation of dc sources being switching converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel

Abstract

公开一种用于提供交错负载点(POL)调节器的系统和方法,从而,每个调节器的切换周期相对于阵列中其它POL调节器的切换周期有相移。结果,减小输入、输出或两者的总输入和/或输出反射纹波以及噪音。阵列中的每个调节器与唯一地址相关联。串行数据线向阵列中的每个可寻址POL调节器写经过编程的相间距离。本发明允许POL调节器的相移不受阵列中每个调节器的输入和输出电压的限制。POL调节器阵列还以只有单条控制线的相移模式工作。从而取消独立的控制器和多条控制线。

Description

用于交错负载点调节器的系统和方法
技术领域
本发明一般涉及电源电路,并更具体地涉及用于电源系统中的电压调节器系统。
背景技术
多相调节器一般用于产生单一输出电压。对于常规的多相系统,公用控制电路驱动几个异相电源电路。功率级一般由连接到输出电容器单个段的几个扼流圈组成。常规多相设计的好处是减小输出电容器中由扼流圈电流的相位位移产生的输入反射纹波电流和输出纹波电流。在此种布置中,输出电压一般反馈到主脉宽调制(PWM)控制器中。接着,PWM控制器补偿该回路,并且通过多条线向几个输出功率级中的每一个分配不同相的脉宽调制信号。
如以上所讨论地,与单相系统比较,多相调节器具有较低的输出电容器纹波和较低的输入反射纹波电流。不幸地是,常规多相调节器也有许多缺点。常规多相系统局限于单一公共输入电压和单一公共输出电压。由于常规多相系统包括控制多个辅助功率级的多相PWM控制器,因此,这些系统也需要多条从控制器到辅助功率级的控制线。而且,相位位置是固定的并且不能从主控制器调整它。
考虑到以上方面,相信需要一种改进的多相调节器系统,该系统克服目前多相调节器系统中的前述障碍和不足。更具体地,需要一种用于电源电路中的灵活的多相调节器系统。
发明内容
本发明致力于一种多相调节器系统,该系统配置为通过单条控制线来提供多个独立输出电压或电流以及可编程相移。
本系统和方法提供一种负载点(POL)调节器阵列,在该阵列中,每个调节器的切换周期相对于其它调节器是错位的,以减小输入、输出或两者的总反射纹波和噪音。此阵列中的每个调节器都设置有地址。串行数据线可把相间距离写到阵列中的每个可寻址POL中。在替代的典型实施例中,基于地址而确定相间距离。相应地,本发明的系统和方法提供的调节器相移不受阵列中每个调节器的输入和输出电压的限制。而且,该阵列以相移模式工作,该模式只有单条控制线并且不需要独立的控制器或多条控制线。
本系统和方法进一步提供对独立的单相调节器的控制。从而,由于相移独立于输入电压,因此,本系统和方法可在阵列内提供多个独立的输入电压。在替代的典型实施例中,阵列能配置为单一输出多相系统。该阵列不需要主控制器,因为控制系统分布在所有调节器中。因而,以上功能性独立于调节器拓扑结构。而且,该阵列利用单条控制线来取代多条控制线。
本发明取消对公共输出电压的限制。另外,公共输出电压不限制阵列的操作。在系统控制器或在每一功率级中进行相位确定。进而,控制回路在每一功率级中都是局部闭合的,而不是集中式的。本发明减小POL调节器阵列产生的系统噪音,由此减少要求用来管理此种噪音的滤波器,其中,所述噪音是因调节切换的不同相所造成的。其它的优点是每个POL切换周期开始时的相位位置是可编程的,由此提供灵活性和可调节性。例如,每个调节器的相位位置中的此种灵活性可用于优化阵列的噪音性能。调节器的可寻址性质为阵列提供额外的灵活度。
从以下结合附图的详细描述中,本发明的其它方面和特征将变得清楚。
附图说明
图1为根据本发明的负载点(POL)调节器阵列的一个实施例的典型框图。
图2示出POL调节器阵列的另一典型实施例。
图3为在单线总线上通信的典型实施例。
图4示出POL调节器和控制器所利用的数据传输方案的典型实施例。
图5示出电压调节器的典型实施例。
图6示出时钟恢复电路的典型实施例。
图7示出延迟总线的典型实施例。
图8示出图6中时钟恢复电路的时序图的典型实施例。
图9-11示出POL调节器阵列的时序图和输入纹波的典型实施例。
应该指出,附图不是按比例画出的,并且相似结构或功能的元件一般用相似的参考编号来表示,所有这些附图都是用于示例目的。还应指出,附图仅仅是用于帮助描述本发明的优选实施例。附图不描述本发明的每个方面,并且不限制本发明的范围。
具体实施方式
本发明致力于一种提供交错(interleave)负载点(POL)调节器的系统和方法,从而,每个调节器的切换周期相对于阵列中的其它调节器是相移的。结果,减小输入、输出或两者的总反射纹波和噪音。阵列中的每个调节器都与地址相关联。串行数据线可把编程的相间距离写到阵列中的每个可寻址POL调节器中。可替换地,可从存储器提供相间距离数据。相应地,本发明允许调节器相移,同时不限制阵列中每个调节器的输入和输出电压。调节器阵列也能以只有单条控制线的相移模式工作。从而取消各个独立控制器和多条控制线。
图1示出本发明的负载点(POL)调节器阵列系统的典型实施例,一般用10示出。系统10包括POL调节器或变换器阵列20以及控制器15。例如,POL调节器20和控制器15可配置为形成插件板级分布功率结构。尽管图1中典型实施例示出控制器15,但本发明不需要控制器15,这在后面结合图2示出和描述。控制器15和POL调节器20通过接口25通信。接口25表示为SYNC/DATA线25,可以是单线双向接口。
每个POL调节器20与选择的地址相关联。每个POL调节器20的地址配置规定该POL调节器20的ID。所选择的POL调节器20,如图所示为POL调节器20A,可指定为主POL调节器20。此指定基于所选择的地址,如最低有效地址或地址0。主POL调节器20A产生SYNC/DATA线信号25的SYNC部分。控制器15和所有其它的POL调节器20与此SYNC信号同步。连接到SYNC/DATA线25的任何其它器件,如POL调节器20、控制器15或其它的外部时钟发生器(未示出),可提供时钟。
每个POL调节器20的功率变换切换频率与SYNC/DATA线频率的(整数或分数)倍同步。从而,POL调节器20不必以相同的频率工作。结果,这提供更大的系统灵活性和最优的效率,因为每个POL调节器20可根据其输入电压和输出电压设定而以最优频率工作,以取代系统中所有其它POL调节器都以相同频率工作。
每个POL调节器20可接收输入电压Vin 45。每个POL调节器20的输出电压Vo可提供给以任何适当方式连接到系统10的器件。在图1所示的典型实施例中,例如,两个或更多个POL调节器20的输出可并联连接。在此实施例中,附加电流共享线40可用于保证在POL调节器20之间有相同的负载共享。
如以上所讨论地,控制器15和POL调节器20通过接口25(如单线双向SYNC/DATA线)通信。控制器15可通过SYNC/DATA线25向每个POL调节器20传送数据。控制器15可通过此接口为每个POL调节器20设定具体的相移。控制器15可设定每个POL调节器20的相移,以使中间总线电压上的切换噪音最小。可替换地或另外,控制器15可设定相移,以使并联的POL调节器20的输出上的噪音最小。控制器15可静态地设定相移,如以永久或半永久方式对相移进行编程或设定。可替换地,控制器15可动态地适应相移,以使在特定系统参数改变时系统中的噪音最小。这些系统参数例如包括负载电流、POL调节器的输出或输入电压或数量(如,当物理增加或移走或电气启用或禁用POL调节器时,动态地适应相移)。
由于本发明的灵活性,系统10能以各种模式配置。例如,在一个典型实施例中,系统10可包括具有几个电压输出的公共输入总线。在另一典型实施例中,系统10可包括几条输入总线和几个电压输出。在又一典型实施例中,系统10可包括公共输入总线和单个电压输出。在此具体的实施例中,单个电压输出可以是多相电压输出。
图2示出本发明的另一典型实施例。一般用200表示的POL调节器阵列包括POL调节器220和SYNC线225。POL调节器235A和235B的输出并联,以提供输出电压230(Vo1)。相似地,POL调节器235C和235D的输出提供输出电压230B(Vo2)。分别为这两对调节器提供电流共享线240A和240B,以提供相同的负载共享。为每个POL调节器220提供输入电压245(Vin)。在此具体的典型实施例中,系统200不包括控制器。选择的POL调节器235A,如具有地址=0的POL调节器,用作主POL调节器,并产生SYNC线信号的SYNC部分。所有其它的POL调节器220与此信号同步。连接到SYNC线225的任何内部或外部器件可提供时钟。
不需要SYNC线225上的数据传送来设定POL调节器235的相移。在此典型实施例中,每个POL调节器235的地址可用于确定POL调节器235的相移。例如,如以后结合图5所讨论地,POL调节器235的地址可用于确定每个POL调节器235的脉宽调制(PWM)信号相对于SYNC线225的相移。例如,每个POL调节器20的地址可设定初始相移,并且此相移可由控制器15重写或改变。POL调节器235的地址不必是唯一的。例如,具有相同地址的POL调节器235将是相位同步的。因而,通过相应地经输入235对地址布线或编程,可选择每个POL调节器235的最佳相位位置,以使特定设计参数最小化。例如,POL调节器220A(“POL 0”)可具有0°的相移,POL调节器220B(“POL 1”)可具有180°的相移,POL调节器220C(“POL 2”)可具有90°的相移,并且,POL调节器220D(“POL 3”)可具有270°的相移。在此具体实施例中,如图2所示,并联的POL调节器具有180°的相移,这对于系统200的输出是最优的。相似地,所述对调节器互相有90°的相移,从而为系统200的输入提供最优的电流分配。
图3示出在单线串行总线如SYNC/DATA线上通信的一种典型方法。具体地,通过在串行总线上传播时钟信号300而创建传输线340。时钟信号300可由控制器、具体POL调节器(如具有最低有效地址或地址=0的POL调节器)、或外部器件产生。时钟信号300使各种通信器件(如POL调节器和控制器)同步,并且产生一系列的时钟周期310,每个时钟周期310都包括数据位320。此数据位320允许各个通信器件传送每个时钟周期310的单个数据位。相应地,每个通信器件通过留置/拉升数据位320为高或低(即二进制1或0)而传送数据。应该理解,如本文所讨论地,图3不是用于限制本发明,而是提供在单线串行总线上如何进行通信的实例。
图4示出在控制器和至少一个POL调节器之间传输信息的一种典型方法。在此具体实例中,可使用42位通信周期450来传输初始配置数据、故障监视数据、唯一ID数据或它们的任意组合。如图4所示,42位传输周期450包括4位开始序列410、16位(具有奇偶校验位)地址组420、8位(具有奇偶校验位)命令组430、第一确认位440、8位(具有奇偶校验位)数据组460和第二确认位470。增加附加位450,以保证在提供数据组460之前执行命令组440。应该理解,图4所示通信周期450不是用于限制本发明,而是示出信息如何在串行总线上传输。从而,包含更多或更少信息或位的通信周期都在本发明的精神和范围之内。
第一和第二确认位440和470分别用于确认命令组430和数据组460的接收。应该理解,负责提供第一和第二确认位440和470的器件根据是否向或从POL调节器传输信息(即信息是被写、读或提供)而改变。
命令组430、数据组460和地址组420使控制器和POL调节器写、读和提供数据。例如,命令组430用于确定控制器是否写和写什么(如写状态寄存器),控制器是否读和读什么(如读状态寄存器),或者POL调节器是否提供和提供什么(如提供状态寄存器信息)。地址组420用于确定正被写或读的POL调节器(一个或多个)、或正提供信息的POL调节器。数据组460用于确定正被写、读或提供的实际数据。
部分地使用开始序列410和地址组420来确定信息的发送者。例如,控制器使用与POL调节器不同的开始序列410。因而,控制器通过读取正被传输的通信周期450的开始序列410而确定POL调节器是否也试图同时发送通信周期450。相似地,每个POL调节器具有不同的地址组420。因而,POL调节器通过读取正被传输的通信周期450的开始序列410和地址组420而确定另一POL调节器或控制器是否也试图同时发送通信周期450。如果多个器件试图发送通信周期450,定序数据就用于分配或仲裁总线使用。应该理解,定序数据可储存(或硬布线)为默认值或作为初始配置数据提供或储存在存储器件(如定序配置寄存器)中。
图5示出根据本发明的电压调节模块的典型实施例,该模块一般用500表示。电压调节模块500具有通过输入端510和具备返回端530的输出端520而可访问的输入级和输出级。通常,电压调节模块500设计为把在端子510和530之间的输入电压Vin变换为在端子520和530之间的输出电压Vo。电压调节模块500包括由开关元件Q1和Q2驱动的L/C低通滤波器,一般用560表示。为电源开关Q1和Q2分别设置非反相驱动器540和反相驱动器545,并且,这些驱动器受PWM信号发生器或脉宽调制器570产生的脉宽调制控制信号的控制或激励,这在后面讨论。
电压调节模块还包括输出电压或功率系控制器550。输出电压控制器550包括反馈控制器565和与TRIGGER(触发)信号575同步的脉宽调制器570。模块500进一步包括时钟恢复电路580、串行接口处理器585和存储部件590。时钟恢复电路580产生相移的同步TRIGGER信号575。串行接口处理器585对在SYNC/DATA线595上发送的任何消息进行解码,并把数据(如获得的相移)储存在存储部件590中。时钟恢复电路580和串行接口处理器585通过输入555接收地址数据。如果在SYNC/DATA线595上没有通信,例如,在图2所示POL调节器阵列的典型实施例或在SYNC/DATA线595上发生任何通信之前的情况下,在图1所示典型实施例的情况下,存储器590就可用预定义数据初始化。此数据可通过OTP(单次可程序化)方法或任何其它方法硬布线或编程。如以上所讨论地,TRIGGER信号575发送给电压调节器的脉宽调制器570,以开始新的PWM控制信号,其中,PWM控制信号用于控制与电源开关Q1和Q2相关的驱动器540和545。
图6示出本发明的时钟恢复电路的典型实施例,时钟恢复电路一般用600表示。通常,时钟恢复电路600接收SYNC/DATA信号605并产生相移的同步TRIGGER信号630。时钟恢复电路600包括反相器610、相位检测器(PD)615、滤波器620、环形振荡器625、延迟总线635、多路复用器640和分频器680。时钟恢复电路600可访问存储单元645。例如,此存储单元可以是电压调节器中的存储单元(如图5所示的存储器590)。
反相器610使SYNC/DATA信号605反相。相位检测器615产生与信号S1(反相器610产生)和S2(分频器680产生)的正斜坡的频率和相位差成比例的信号。滤波器620对相位差进行滤波,并控制环形振荡器频率和相位。环形振荡器625是可产生延迟总线635的振荡器。延迟总线635的信号相互之间均匀地分隔开(参见图7,以后描述)。如以上所讨论地,D0信号用作TRIGGER信号630,以使功率系反馈回路的PWM发生器同步(例如参见图5)。多路复用器640基于存储部件645中的设置而选择延迟总线635的至少一个输出。分频器680根据存储部件645中的设置而分割多路复用器640输出的频率,并且把信号(在图6中示作S2)反馈回相位检测器615。
通常,时钟恢复电路600的元件形成锁相回路。信号S1和S2的相位在稳态下校准。根据多路复用器640从延迟总线635选择哪个信号,D0正转变可相对SYNC/DATA线605的负转变偏移。D0正转变确定功率系(如图5所示功率系550)中PWM信号的起点。在另一典型实施例中,选择的电压调节器500可用作主电压调节器。如以上所讨论地,主电压调节器包括产生同步信号的主时钟发生器。在此情况下,主电压调节器的时钟恢复电路600可配置为作为主时钟发生器。例如,此时钟恢复电路600可配置为通过放开时钟恢复电路的锁相回路并使用环形振荡器625作为自激振荡器而用作主时钟发生器。
图7示出图6所示延迟总线635产生的信号的典型实施例。在图7的典型实施例中,环形振荡器625产生由2m个信号组成的延迟总线,其中,每个信号相同地延迟td。应指出,延迟总线不必产生2x数量的信号。在没有控制器的系统中(如图2典型实施例中所描绘的),相位超前或相移可相应地表达为:
Phi={[值(地址)]/(POL调节器的最大数量)}×360°值(地址)对应于所选择POL调节器的地址或延迟总线信号。分母对应于可寻址系统中POL调节器的最大数量,如32。
图8示出本发明的电压调节模块和时钟恢复电路的各种时序信号的典型实施例。在此实例中,m=4。多路复用器640(在图6中示出)从延迟总线635选择信号D3。分频器680设定为K=1。相应地,时钟恢复电路600使选择的延迟总线信号D3与SYNC/DATA线校准。结果,使用以上讨论的方程式,延迟总线信号D0(如SYNC信号)具有可以预测的相对于SYNC/DATA线的相位超前Phi=3/2m×360°=67.5°。D0信号(如TRIGGER信号)的正斜坡触发PWM信号的启动。从而,PWM信号具有与D0信号相同的相位超前。通过改变多路复用器的选择,PWM信号的相位超前从而可由储存在存储器中的值选择。
图9-11示出时序图和简化输入纹波的典型实施例。图9示出波形的同相集合。在此典型实施例中,示出四个下游降压变换器信号i(i1)、i(i2)、i(i3)和i(i4),这些信号分别对应于20A 3.3V、30A 2.5V、20A 1.8V和20A 1.2V调节器的输入电流。信号i(co)是输入电容器中的纹波电流。如图9所示,得到的电容器纹波电压是1.198V。图10示出不同相的效果。在此情况下,调节器相等地不同相。应指出,前面的两个波形重叠。在此情况下得到的电容器纹波电压是406mV。图11示出甚至更有利的定相分布,所述定相分布通过选择依赖于相移的电压和电流而产生。相应地,电容器纹波电压更低。在此情况下,电容器纹波为263mV。这清楚地显示能根据系统的工作点而选择相移以减小系统噪音的优点。应该理解,进一步的优化是有可能的。因而,使这些脉冲相移可导致更低的电容器纹波,或可替换地,需要更少量的总线电容来支持指定的纹波电压。
本发明容易实现各种变更和替代形式,并且,在本文中,借助附图中的实例详细地描述了本发明的特定实例。然而,应该理解,本发明不局限于公布的具体形式或方法,而相反,本发明涵盖所有在权利要求精神和范围内的变更、等效物和替代物。

Claims (25)

1.一种电源系统,包括:
多个电压调节器,其中,每个电压调节器用于提供电压输出并与地址相关联;
主时钟发生器,该器件用于产生同步信号;
接口线,所述接口线用于与电压调节器通信耦合并传递同步信号,以允许电压调节器接收同步信号;以及
多个时钟恢复电路,其中,每个时钟恢复电路与一个电压调节器相关联,并且其中,每个时钟恢复电路用于产生相移触发信号,其中,基于相关电压调节器的地址,相移触发信号相对于同步信号相移选定的相位差,并且与同步信号的选定频率倍数同步,使得每个电压调节器的切换周期相对于所述多个电压调节器中的其它电压调节器的切换周期有相移并且与所述多个电压调节器中的其它电压调节器的切换周期有不同的频率。
2.如权利要求1所述的电源系统,其中,在多个电压调节器中选择的一个进一步包括所述主时钟发生器。
3.如权利要求1所述的电源系统,其中,在多个时钟恢复电路中选择的一个进一步包括所述主时钟发生器。
4.如权利要求1所述的电源系统,进一步包括控制器,该控制器与接口线通信耦合,用于向电压调节器传送数据,并且通过接口线为每个电压调节器设置所述选定的相位差。
5.如权利要求4所述的电源系统,其中,控制器用于设定所述选定的相位差,以使系统噪音最小。
6.如权利要求5所述的电源系统,其中,控制器用于根据选定的系统参数的变化而动态地设定所述选定的相位差,以使系统噪音最小。
7.如权利要求6所述的电源系统,其中,所述选定的系统参数是启用的电压调节器的数量。
8.如权利要求1所述的电源系统,其中,基于各个电压调节器的输入电压而选择每个电压调节器的相移和选定频率倍数。
9.如权利要求1所述的电源系统,其中,基于各个电压调节器的输出电压而选择每个电压调节器的相移和选定频率倍数。
10.如权利要求1所述的电源系统,其中,每个电压调节器进一步包括:
输入端、输出端和返回端,其中,电压调节器用于把在输入端和返回端之间的输入电压变换为在返回端和输出端之间的输出电压;
功率器件;
用于储存所述选定的相位差的存储器;以及
输出电压控制器,该输出电压控制器用于接收相移触发信号,并基于相移触发信号而传送脉宽调制信号,以控制功率器件的操作,其中,多个时钟恢复电路中有关的一个电路用于访问存储器,接收同步信号并基于所述选定的相位差而向脉宽调制器传送相移触发信号。
11.如权利要求10所述的电源系统,其中,电压调节器进一步包括串行接口处理器,所述串行接口处理器用于对通过接口线传送的数据进行解码,并且在存储器中储存选择的相移。
12.如权利要求10所述的电源系统,其中,输出电压控制器进一步包括用于产生脉宽调制信号的脉宽调制器。
13.如权利要求10所述的电源系统,其中,时钟恢复电路包括环形振荡器,所述环形振荡器用于产生与多个延迟总线信号有关的延迟总线,其中,相移触发信号是基于选定的延迟总线信号而确定的。
14.如权利要求13所述的电源系统,其中,时钟恢复电路进一步包括多路复用器,所述多路复用器基于储存在存储器中的选定的相移而用于选择延迟总线信号。
15.如权利要求14所述的电源系统,其中,存储器用电压调节器的地址初始化。
16.如权利要求1所述的电源系统,其中,电压调节器是负载点调节器。
17.如权利要求1所述的电源系统,其中,电源系统用于接收多个独立的电压输入。
18.如权利要求1所述的电源系统,其中,电源系统进一步包括单个多相电压输出。
19.如权利要求1所述的电源系统,其中,至少两个电压调节器的电压输出并联连接。
20.如权利要求19所述的电源系统,其中,电源系统进一步包括在至少两个并联的电压调节器之间通信耦合的电流共享线,由此在并联的电压调节器之间提供相同的负载共享。
21.一种用于提供多个电压调节器的交错的方法,包括以下步骤:
为每个电压调节器选择相移;
为每个电压调节器分配地址;
产生同步信号;
产生触发信号,所述触发信号相对于同步信号相移选定的相移量,并与同步信号的选定频率倍数同步;以及
基于触发信号而提供相移切换频率,使得每个电压调节器的切换周期相对于所述多个电压调节器中的其它电压调节器的切换周期有相移。
22.如权利要求21所述的方法,进一步包括向所述选定的电压调节器传送用于所述选定的电压调节器的相移的步骤。
23.如权利要求21所述的方法,进一步包括以下步骤:
通过公共输入总线接收输入电压;以及
提供单个多相电压输出。
24.如权利要求21所述的方法,进一步包括以下步骤:
接收多个输入电压;以及
提供多个输出电压,其中,每个输出电压相互相移。
25.如权利要求21所述的方法,进一步包括以下步骤:
接收多个输入电压;以及
提供单个多相电压输出。
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EP1576711B1 (en) 2012-08-08
CN1685459A (zh) 2005-10-19
EP1576711A1 (en) 2005-09-21
US20080048625A1 (en) 2008-02-28
AU2003291357A1 (en) 2004-07-29
KR20040083058A (ko) 2004-09-30
US20040123167A1 (en) 2004-06-24
US7493504B2 (en) 2009-02-17
WO2004062062A1 (en) 2004-07-22
KR100785941B1 (ko) 2007-12-14

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