CN100517703C - 具有连接衬底的半导体模块及其制造方法 - Google Patents

具有连接衬底的半导体模块及其制造方法 Download PDF

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CN100517703C
CN100517703C CNB200580015247XA CN200580015247A CN100517703C CN 100517703 C CN100517703 C CN 100517703C CN B200580015247X A CNB200580015247X A CN B200580015247XA CN 200580015247 A CN200580015247 A CN 200580015247A CN 100517703 C CN100517703 C CN 100517703C
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substrate
semiconductor chip
chip
contact mat
connection
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CN1961426A (zh
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G·迈耶-伯格
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本发明涉及具有连接衬底(1)的半导体模块(4)，并涉及相关的制造方法。该连接衬底(1)用于集成电路附近的半导体芯片(2、3)的内部电连接。半导体芯片(2、3)具有集成电路，并设置在支撑结构上。半导体芯片(2、3)向外与外接触垫(22)接触。连接衬底(1)与相邻半导体芯片(2、3)的边缘区域(6、7)发生重叠。

Description

具有连接衬底的半导体模块及其制造方法
技术领域
本发明涉及一种具有连接衬底(用于相邻芯片上的集成电路的电连接)的半导体模块和制造该半导体模块的方法。这些半导体芯片连同它们的集成电路并排设置在布线衬底上，并通过该布线衬底电连接到所述半导体模块上的外部触点。
背景技术
不与外部触点进行组合的集成电路之间的电连接称为内部连接，通常通过丝焊将一个半导体芯片连接到另一芯片来实现这种内部连接。由于焊线相交将导致短路，因而这种方法的弊端在于，对相连的两个芯片而言，将在集成电路上进行连接的接触垫(contact pad)必须沿它们的相邻边缘以相同顺序设置。而且，所需的焊头将相邻半导体芯片上的集成电路间的连接密度局限为少量的内部连接。
另一个已知方案是使用多层布线衬底，所述衬底的结构化金属层和与之相应规划的通孔实现了集成电路在半导体模块中的相邻半导体芯片上的内部连接。该解决方案需要付出的成本很高，因为内插件中的高连接密度大大增加了封装成本，而且内插件还需要额外的“构造”层。
最后，可以在相关半导体芯片和布线衬底间通过额外的倒装触点来形成辅助连接，在这种情况下，内插件中的连接密度很快也将达到其限值，因而成本的增长也十分迅猛。
发明内容
本发明的一个目的是提供一种半导体模块和详细说明其制造方法，这种方法不增加对布线衬底的布线密度要求，然而，该方法可以让半导体模块中的并排设置的半导体芯片上的集成电路在某些情况下实现相互之间的内部连接。本发明的另一个目的是详细说明一种解决上述问题的节省成本的解决方案。
独立权利要求的主要内容可提供实现这一目的的技术方案。而从属权利要求则指出了对本发明进行的有利的限定。
根据本发明，提出了一种具有连接衬底的半导体模块，该衬底用于相邻半导体芯片上的集成电路的电连接。所述半导体模块包含设有集成电路的半导体芯片。这些半导体芯片设置在底座结构上，并通过该底座结构电连接到半导体模块上的外部触点。该底座结构可以是布线衬底，所述衬底通过布线结构将半导体芯片上的少量10微米尺寸的接触垫与外部触点(尺寸为几百个微米)进行电连接。该底座结构也可以具有扁平导体结构，借助于扁平导体框或“引线框”，可以形成这种扁平导体结构。所述用于相邻半导体芯片上的集成电路的电连接的连接衬底与这些相邻半导体芯片的边缘区域重叠。芯片的接触垫设置在半导体芯片的上工作面上，并通过连接衬底进行相互之间的电连接。
这种半导体模块的优点在于：不需通过成本较高的布线衬底来设置相邻半导体芯片上的集成电路之间的内部连接，相反，可以通过成本较低的连接衬底来将这些集成电路连接在一起。另外，这种解决方案的优点是，通过连接衬底来与半导体芯片上的接触垫进行连接，可以避免焊线的相交。因此，用户不需要在相对的接触垫之间提供严格的顺序。在极端情况下，甚至可以将位于集成电路中的一块半导体芯片的左上角的接触垫连接到另一个设置在相邻半导体芯片的集成电路的右下角的接触垫。为此目的，该连接衬底包括设有接触垫的上表面和与该上表面对应的下表面。可以用塑料复合物来填充半导体芯片之间的、由连接衬底进行桥接的间隙。填充后的间隙为连接衬底赋予了额外的强度，并使得扁平的半导体模块在机械上更为牢固。
在本发明的一个优选实施例中，所述连接衬底具有对称轴，各连接用接触垫相对于该轴以镜像对称方式设置，并通过连接衬底上的连接用互连结构进行相互的电连接。然后，按照从连接用接触垫计起的最短路线，可以为相邻半导体部件上的集成电路上的恰当设置的接触垫形成连接。可以使连接衬底的宽度符合连接衬底和相邻半导体芯片上的接触垫之间的连接的需要。
在本发明的另一个实施例中，连接用接触垫在对称轴的两侧进行成对的电连接。这种连接衬底上的连接用接触垫间的成对内部连接的优点在于：不会发生焊线相交，从而，可以用绝缘底座和金属布线结构的单层组合来形成连接衬底，从而降低了连接衬底的成本。
另一种有利的连接用接触垫配置不仅提供了信号连接与测试连接(通过连接衬底连接到该配置)，也提供了电源电势(通过连接衬底连接到该配置)，如VDD和VSS。为此目的，可以使长度为l的连接衬底与待连的半导体芯片的侧边长度L相匹配，且可以在连接衬底的宽阔表面所在的区域中设置用于各电源电势的大面积连接用接触垫。从而，通过平行连接的焊线来连接用于电源电势的接触垫，可以从连接衬底的纵向表面形成延长的和宽阔的接触连接条(contactconnecting strip)，该连接条通过焊线或倒装触点为待连接的集成电路提供了电源电势。
另外，可以以这样的方式设计连接用接触垫：在连接用接触垫上设置两个通往两个相邻半导体芯片的焊接连接，这样，便将上述半导体芯片通过这样的连接用接触垫连接在一起。为此目的，在连接衬底上交错地设置连接用接触垫，且这些接触垫之间的分隔方式使得可以在它们之间设置用于电源电势的焊接连接。
也可以为连接用接触垫提供倒装触点，并可以以这样的方式来配置这些接触垫，使得可以将它们直接设置到半导体芯片上的相邻集成电路上的接触垫。这种连接方案得到了相邻半导体芯片上的集成电路之间的最短连接。而且，这种倒装技术以上述方式简化所述连接衬底，使得这种方案优于之前的解决方案。另外，这种倒装技术可以实现高的连接密度，因为可以不借助于焊头来设置所述倒装触点，从而，使得步长(step width)和连接用接触垫之间的平均间隔变短，而这也使得连接用互连结构之间的平均间隔变短。
另外，可以通过至芯片接触垫的焊线连接来连接所述连接用接触垫。在这种情况下，由于两个连接用接触垫之间的平均间隔的缘故，因而必须考虑焊头的宽度，不可否认，这样做增大了步长，然而，由于执行这项工作的操作员可以准确地观察连接用接触垫而将它们相对于彼此和芯片接触垫进行调整，因而调节焊线连接远比对准倒装触点更容易。而这一点基于这样的假设：可使用立体显微镜来观察相邻半导体芯片的上工作面和连接衬底的上表面，且连接衬底的下表面设置在相邻半导体芯片的边缘区域中。
在本发明的另一个实施例中，连接衬底的背面未设置在半导体芯片的边缘区域上，而是设置在半导体模块的布线衬底的上表面，且其设置方式使得相邻半导体芯片的边缘区域与连接衬底的上表面重叠。在本发明的该实施例中，所述连接衬底的上表面具有倒装触点或表面安装触点，当将这些半导体芯片设置到布线衬底时，可通过半导体芯片的重叠区域中的接触垫将这些触点进行相互连接。本发明的这个实施例的优点在于：相邻半导体芯片为连接衬底提供了几乎是完全意义上的机械保护，因为半导体芯片的重叠边缘区域设置在连接衬底上方。
这与一种配置形成了对比，在这种配置中，连接衬底固定在半导体芯片的边缘区域上，其下表面与所述边缘区域重叠，而其上表面上的连接用接触垫通过焊接连接电连接到相邻半导体芯片的上工作面上的芯片接触垫，这种方案对机械损坏的防护较弱。在这种情况下，在布线衬底的上表面上，必须为整个半导体模块涂覆塑料封装复合物，以使得半导体芯片、焊接连接和连接衬底嵌入所述塑料复合物。
在本发明的另一个实施例中，连接衬底具有无源和/或有源部件，它们通过连接衬底为相邻半导体芯片提供微调、调谐、匹配、电感耦合和/或电容耦合。所述无源部件可以是电阻、线圈和电容器，可以将它们作为走线(line routing)的函数来进行生产。另一方面，也可以在连接衬底上制造有源元件(如薄膜晶体管或薄膜二极管)，以增加相互连接的集成电路的功能。最后，也可以提供所谓的保护线或“熔丝”，这些保护线可根据需要熔断，以提高半导体模块的模块性。没必要为这样的熔丝提供特殊的互连结构，因为在连接衬底上的连接用接触垫之间已存在成对的标准连接用互连结构。之后，可简单地通过激光移除方法来将这些现存的线路相互断开。同样，也可以将具有薄膜配线的IC部件用作连接衬底。
连接衬底可以是长条的，并可以与相邻半导体芯片的边长L匹配。如果相邻半导体芯片的边长L超出临界长度，则可以让两个、三个或更多的连接衬底的各自的长度为l，且它们的长度之和等于总长度L。
另外，最好使相邻半导体芯片上的接触垫配置与连接衬底上的连接用接触垫配置相匹配。所实现的匹配越准确，则越容易维持可靠的调整，即使将倒装触点用于连接衬底也是如此。
本发明提供的制造具有连接衬底的半导体模块的方法具有三种主要变体。这些变体取决于半导体芯片在布线衬底上设有倒装触点还是焊接连接。另外，这些方法取决于连接衬底设有倒装触点还是想为其设置焊接连接。
在第一种方法变体中，首先使用倒装技术在相邻半导体芯片中为半导体模块生成布线衬底，在这种情况下，相邻半导体芯片的上表面不仅存在倒装触点，也存在集成电路。接下来，将上表面上存在倒装触点的连接衬底的下表面安装在上述布线衬底上。在这一过程中，该连接衬底的设置方式是：半导体芯片上的边缘区域与该连接衬底重叠。或者，也可以通过通孔将该连接衬底结构电连接到布线衬底。同样，这些相邻半导体芯片也具有倒装触点，但这些触点的直径比连接衬底上的倒装触点的直径大。接下来，将相邻半导体芯片与连接衬底(与上述芯片重叠)设置在一起，使半导体芯片上的倒装触点连接到上述布线衬底，且连接衬底上的倒装触点连接到相邻半导体芯片的上工作面的边缘区域中的相应芯片接触垫。这种方法的优点在于：连接衬底的大部分已为设置在其上方的、并与其发生重叠的半导体芯片覆盖，从而便保护了连接衬底和减轻了其可能遭受的机械损坏。另外，这种方法还具有以下优点：用相对较少的方法步骤便可将相邻半导体芯片上的集成电路连接起来。
与第一种变体的步骤类似，上述方法的第二种变体也为具有包括集成电路的相邻半导体芯片的半导体模块生成布线衬底。然后，用这些半导体芯片的背面与上述布线衬底上的芯片安装表面之间的整体连接将半导体芯片在布线衬底上以相互邻接的方式进行设置。这样，便允许自由地接入半导体芯片的上表面上的芯片接触垫。最后，将具有倒装触点的连接衬底设置到半导体芯片的上表面的相邻边缘区域上。然后，在连接衬底与半导体芯片之间的重叠区域中，将连接衬底上的倒装触点电连接到相邻半导体芯片上的芯片接触垫。
最好通过焊接来形成这种连接。在完成作为最后步骤的这一步骤后，在相邻半导体芯片上的可自由接入的芯片接触垫与布线衬底之间形成焊接连接。这种方法具有以下优点：设置好连接衬底后，集成电路之间的电连接长度为最短。这种方法与第一种方法的不同之处在于，尽管焊接连接仅在布线衬底的边缘区域中出现，但此时也必须考虑焊接连接。然而，这些焊接连接必须嵌入塑料复合物中，以保护它们不受机械损坏。
制造半导体模块的第三种方法变体首先为包括具有集成电路的相邻半导体芯片的半导体模块生成布线衬底。然后，使用这些半导体芯片的背面与布线衬底上的倒装接触垫之间的整体连接将这些半导体芯片设置到布线衬底，使得可以自由地接入半导体芯片的上表面上的芯片接触垫。这便确保了对半导体芯片的上表面上的接触垫的完全接入。然后，设置不具有上述倒装触点而具有接触垫的连接衬底。将该连接衬底的下表面设置到半导体芯片的边缘区域，并使之与这些边缘区域进行整体的连接。此时，可自由地接入设置在连接衬底的上表面的接触垫，并可通过焊接连接将这些接触垫连接到半导体芯片中的相应接触垫，以在各集成电路之间形成内部电连接。最后，同样在这种情况下，为半导体芯片上的未连接到连接衬底的接触垫设置焊线，所述焊线将这些接触垫连接到布线衬底上的连接用接触垫。
在这种方法中，使用同一技术通过连接用接触垫形成了从半导体芯片上的接触垫到连接衬底的内部连接和从半导体芯片上的接触垫到布线衬底上的外部接触垫的外部连接，从而降低了这类半导体模块的生产成本。
总之，应当指出，通过使用较小的、额外的分层次连接衬底来在各相邻部件之间形成内部连接，可以解决现有技术遇到的所有上述问题。因为该额外的连接衬底非常小，且因为容易看出是如何形成上述内部连接的，从而形成了比对复杂的布线衬底进行扩展更节省成本的解决方案。另外，如果为连接衬底设置倒装触点，则克服了连接密度有限(如丝焊)的缺点。
附图说明
现在，将结合附图对本发明进行更详细说明，在这些附图中：
图1示出了根据本发明的第一个实施例的、具有两个连接衬底的半导体模块的俯视图；
图2示出了截取如图1所示的半导体模块所得的截面图；
图3示出了如图1所示的本发明的第一个实施例的连接衬底的上表面的俯视图；
图4示出了具有一个连接衬底的半导体模块的俯视图；
图5示出了根据本发明的第二个实施例的具有两个连接衬底的半导体模块的俯视图；
图6示出了截取如图5所示的半导体模块所得的截面图；
图7示出了如图5所示的本发明的第二个实施例的连接衬底的上表面的俯视图；
图8示出了根据本发明的第三个实施例的具有两个连接衬底的半导体模块的俯视图；
图9示出了截取如图8所示的半导体模块所得的截面图；
图10示出了如图8所示的本发明的第三个实施例的连接衬底的上表面的俯视图。
具体实施方式
图1示出了根据本发明的第一个实施例的、具有两个连接衬底1的半导体模块4的俯视图。在图1中未示出覆盖半导体模块4的塑料复合物，以示出两个连接衬底1以及它们与半导体模块4的布线衬底5上的相邻半导体芯片2和3之间的内部焊接连接17。另外，图1示出了用作半导体模块4的连接技术的丝焊技术。分别为相邻半导体芯片2和3的边缘区域6和7中的内部布线设置了内部芯片接触垫8。
上述两个连接衬底1与半导体边缘在边缘区域6和7中发生重叠，它们本身具有连接用接触垫12。在连接用接触垫12、连接衬底1和相邻半导体部件2和3中的集成电路上的内部芯片接触垫8之间设置焊接连接17，且在内部芯片接触垫8和连接用接触垫12之间设置了内部焊接连接17。相邻的半导体芯片2和3具有外部芯片接触垫23，用于将半导体模块4向外连接到其外部触点。这些外部芯片接触垫23通过焊接连接16连接到布线衬底5的上表面25上的连接用接触垫24。
半导体芯片2和3分别具有边长L1和L2，而两个连接衬底1分别具有边长l1和l2，且具有宽度b。在本发明的这个实施例中，在半导体芯片2、3上设置了两个分别具有边长l1和l2的连接衬底，且连接衬底的边长l1和l2小于半导体芯片2、3的边长L的一半。选择连接衬底的宽度b，使得成对设置的连接用接触垫12的数目足够满足需要，且这些接触垫12相对于对称轴以对称方式彼此交错设置。
图2示出了沿图1中的剖面AA截取如图1中所示的半导体模块4所得的截面图。将半导体芯片2、3的背面19、20设置成与布线衬底5的上表面25上的芯片安装表面21相邻。连接衬底1的下表面13分别整体连接到半导体芯片2、3的边缘区域6、7。本发明的这个实施例中的连接用接触垫12以成对的方式设置成彼此相对，并通过焊接连接17连接到内部芯片接触垫8，后者也以成对的方式设置成彼此相对。这就导致半导体芯片2上的集成电路的电路与半导体芯片3上的集成电路的电路之间在半导体芯片的上工作面10上形成了内部焊接连接。这样，连接衬底1降低了半导体模块4的布线衬底5的连接密度负担。同时，布线衬底5的下表面上的外部触点22形成了半导体模块4的外部触点12。这些外部触点22表示外部连接能力，并通过布线衬底5上的外部接触垫28(如经由贯穿布线衬底5的通孔29)连接到布线衬底5的上表面25上的连接用接触垫24。从接触垫24起，到半导体芯片2、3的上表面10上的芯片接触垫23为止，各设有一个焊接连接16。半导体模块封装的轮廓由虚线26指出。
图3示出了如图1所示的本发明的第一个实施例的、具有连接用接触垫配置18的连接衬底1的上表面11的俯视图。该连接衬底1总边长l为2.6mm，本发明这个实施例的总宽度b为0.7mm。连接用接触垫12的步长w可以为80μm，使得连接线(未示出)将连接用接触垫12连接在一起，且这些接触垫成对地设置在对称轴14的两侧。当边长l为10mm时，在连接衬底1上的对称轴14的两侧可设置约500个连接用接触垫12。
在本发明的第一个实施例中，设置了焊接连接，连接用接触垫12呈矩形，且由于焊头直径的缘故，因而步长不能小于最低步长w。而且，在对称轴14的两侧设置了三行连接用接触垫12，且考虑焊线的厚度，将各行的连接用接触垫与其相邻行中的连接用接触垫相对于它们的对准位置进行偏移，从而，如果存在这样的三行，则三行焊线可以彼此并排设置，而不会导致它们之间的互相接触，也不会导致短路。
图4示出了具有连接衬底1的半导体模块4的俯视图。该连接衬底1具有连接用接触垫配置18，该配置与如图3所示的连接衬底1不同。
通过连接衬底1，不仅连接了信号连接和测试连接，也连接了电源电势(如VDD和VSS)。为此目的，该连接衬底的边长l约等于待连接的半导体芯片2和3的边长L。而且，在连接衬底1的宽阔区域中可设置大面积的连接用接触垫32、33、34和35，这些接触垫分别用于与各电源电势VDD或VSS连接。从而，可通过多条至电源电势的接触垫37的平行连接焊线36来在连接衬底1的纵向表面上形成长条的和宽阔的接触连接条38、39。如图8所示，这些接触连接条38和39通过平行连接焊线36或通过倒装触点将电源电势VDD或VSS提供给待连接的集成电路。
以这样的方式设计其他连接用接触垫12，使得可以在它们上面设置两个焊接连接40和41，这便导致相邻半导体芯片2和3可通过连接用接触垫12相连。为此目的，连接用接触垫12以交错的方式设置在连接衬底1上，且以这样的方式相互分隔，使得至电源电势VDD和VSS的焊接连接42可处于它们之间。
图5示出了根据本发明的第二个实施例的具有两个连接衬底1的半导体模块4的俯视图。功能与之前附图中的部件的功能相同的部件仍用相同的附图标记表示，并且不再对此进行说明。该第二个实施例与如图1所示的第一个实施例的不同之处在于，两个连接衬底1不具有任何焊接连接，但具有倒装触点，这些倒装触点与相邻半导体芯片2、3的集成电路上的相应内部连接用接触垫24相对应。仅那些用于外部连接的、处于半导体芯片2和3的边缘表面上的接触垫23才通过焊接连接16连接到布线衬底的上表面25上的连接用接触衬垫24。
图6示出了沿图5中的截面BB截取如图5所示的半导体模块4所得的截面图。连接衬底1的上表面11与半导体芯片2、3的上表面9、10相对，且在上表面11上设有连接到内部芯片接触垫8的倒装触点15。可以将这样的连接衬底1设计得更紧凑，并使其比图1所示的本发明的第一个实施例中的连接衬底1具有更多的连接用接触垫12。在图5中，虚线26又一次示出了一种可能的半导体模块封装的轮廓。
图7示出了如图4所示的本发明的第二个实施例的具有连接用接触垫配置18的连接衬底1的上表面的俯视图。连接衬底1的边长l为1.5mm，宽度b为0.45mm。类似地，为倒装触点而设置的连接用接触垫12的步长w为60um，且在连接衬底1的这个区域上，在对称轴14的两侧，分别可以容纳四行连接用接触垫14。从而，在对称轴14的每一侧均设有总数为100的连接用接触垫12。如果边长l为10mm，则在相同的配置中可容纳650个连接用接触垫12。连接衬底1上的倒装触点的一个优点是：可以以行和列的形式设置用于倒装触点的连接用接触垫12，且不必将它们设置成前述的偏移形式(如图3所示的为焊接连接而设置的连接用接触垫)。
图8示出了根据本发明的第三个实施例的具有两个连接衬底1的半导体模块4的俯视图。功能与之前附图中的部件的功能相同的部件仍用相同的附图标记表示，并且不再对此进行说明。本发明的第三个实施例与本发明的第一、第二个实施例的不同之处在于：连接衬底1的下表面13整体设置在布线衬底5上，且所述连接衬底通过倒装触点15连接到半导体芯片2、3上的、各自的边缘区域中的内部芯片接触垫。
图9示出了沿图8中的截面CC截取如图8所示的半导体模块4所得的截面图。连接衬底1设置在布线衬底5与半导体芯片2、3之间，且其下表面13以电传导方式固定在布线衬底上。连接衬底1上的倒装触点15的直径比半导体芯片2、3上的倒装触点30的直径小，且它们中的一部分通过通孔31电连接到布线衬底5。
结果，半导体芯片2、3的背面19、20可同时形成半导体模块4的上表面，而外部触点22设置在下表面27上。在这个半导体模块4中，可以将散热器设置到半导体芯片2、3的背面19、20，而不通过塑料封装复合物来阻止热传导。虚线26再次示出了塑料封装的可能轮廓，在这种情况下，该塑料封装可以由“低铸模(undermold)”材料构成。半导体芯片2、3的倒装触点30的直径比连接衬底上的倒装触点15的直径大。而且，这种直径上的差异通过连接衬底1自身来进行补偿。
图10示出了如图8所示的本发明的第三个实施例的连接衬底1的上表面11的俯视图。多个倒装触点30通过互连结构43进行相互连接，以形成用于电源电势VDD或VSS的大面积电源连接，这些电源连接为两块芯片提供电源电势，且这些电源电势通过贯穿连接衬底1的通孔电连接到半导体模块中的布线衬底上的电源线。

Claims (15)

1.一种具有连接衬底(1)的半导体模块，所述连接衬底用于电连接相邻半导体芯片(2、3)上的集成电路和为这些电路供电，所述半导体模块具有
-包括具有集成电路的半导体芯片(2、3)的半导体模块(4)，所述芯片设置在底座结构上，并通过布线衬底(5)电连接到所述半导体模块(4)上的外部触点(22)；
-与相邻半导体芯片(2、3)的边缘区域(6、7)发生重叠的连接衬底(1)，和
-所述相邻半导体芯片(2、3)的上工作面(9、10)上的芯片接触垫(8)，所述芯片通过所述连接衬底(1)以电传导方式来进行相互连接。
2.如权利要求1中所述的半导体模块，其特征在于
所述连接衬底(1)包括具有连接用接触垫(12)的上表面(11)，并包括与所述上表面(11)相对的下表面(13)。
3.如权利要求2所述的半导体模块，其特征在于
所述连接衬底(1)包括对称轴(14)，所述连接用接触垫(12)相对于该轴以镜像对称方式设置，并通过所述连接衬底(1)上的连接用互连结构来进行相互的电连接。
4.如权利要求3所述的半导体模块，其特征在于
所述连接用接触垫(12)成对地电连接于所述对称轴(14)的两侧。
5.如权利要求2至4中之一所述的半导体模块，其特征在于
所述连接用接触垫(12)包括倒装触点(15)。
6.如权利要求2至4中之一所述的半导体模块，其特征在于
所述连接用接触垫(12)包括至所述芯片接触垫(8)的焊线连接(17)。
7.如前述权利要求1至4中的任一项所述的半导体模块，其特征在于
所述连接衬底(1)的下表面(13)设置在所述布线衬底(5)上，并使用倒装技术将所述连接衬底(1)通过其所述上表面(11)上的倒装触点(15)电连接到半导体芯片(2、3)上的芯片接触垫(8)。
8.如权利要求1至4中之一所述的半导体模块，其特征在于
所述连接衬底(1)以重叠方式设置在所述半导体芯片(2、3)的边缘区域(6、7)上，并包括电连接到所述半导体芯片(2、3)的边缘区域(6、7)中的芯片接触垫(8)的倒装触点(15)。
9.如权利要求1至4中之一所述的半导体模块，其特征在于
所述连接衬底(1)的下表面(13)与所述半导体芯片(2、3)的边缘区域(6、7)重叠，且其上表面(11)上的连接用接触垫(12)通过焊接连接(17)电连接到所述相邻半导体芯片(2、3)的上工作面(9、10)上的芯片接触垫(8)。
10.如前述权利要求1至4中之一所述的半导体模块，其特征在于
所述连接衬底(1)包括无源和/或有源部件，所述部件通过所述连接衬底(1)在相邻半导体芯片(2、3)之间提供微调、调谐、匹配、电感耦合、电容耦合和/或另外的附加功能。
11.如前述权利要求1至4中之一所述的半导体模块，其特征在于
所述连接衬底(1)呈长条形，并与所述相邻半导体芯片(2、3)的边长(L)匹配。
12.如前述权利要求1至4中之一所述的半导体模块，其特征在于
相邻半导体芯片(2、3)上的接触垫配置(18)与所述连接衬底(1)上的所述接触垫的接触垫配置(18)匹配。
13.一种制造具有连接衬底(1)的半导体模块的方法，所述连接衬底用于将相邻半导体芯片(2、3)上的集成电路进行电连接，所述方法包括以下方法步骤：
-利用倒装技术为具有相邻半导体芯片(2、3)的半导体模块(4)生成布线衬底(5)，其中，所述半导体芯片包括集成电路；
-以这样的方式将连接衬底(1)的下表面(13)设置在所述布线衬底(5)上，使得连接衬底(1)以重叠方式设置在为相邻半导体芯片(2、3)提供的位置之间，其中，所述连接衬底的上表面(11)包括倒装触点(15)；
-设置与所述连接衬底(1)重叠的相邻半导体芯片(2、3)，使得所述半导体芯片(2、3)上的倒装触点(15)连接到所述布线衬底(5)，并使得所述连接衬底(1)上的倒装触点(15)连接到所述相邻半导体芯片(2、3)的上工作面(9、10)的边缘区域(6、7)中的相应芯片接触垫(8)。
14.一种制造具有连接衬底(1)的半导体模块(4)的方法，所述连接衬底用于将相邻半导体芯片(2、3)上的集成电路进行电连接，所述方法包括以下方法步骤：
-为具有包括集成电路的相邻半导体芯片(2、3)的半导体模块(4)生成布线衬底(5)；
-用所述半导体芯片(2、3)的背面(19、20)与所述布线衬底(5)的芯片安装设施(21)之间的整体连接将相邻半导体芯片(2、3)设置在所述布线衬底(5)上，使得可以自由接入所述半导体芯片(2、3)的上表面(9、10)上的芯片接触垫(8)；
-设置包括倒装触点(15)的连接衬底(1)，使得所述连接衬底(1)上的倒装触点(15)与相邻半导体芯片(2、3)上的芯片接触垫(8)在所述连接衬底(1)与所述半导体芯片(2、3)之间的重叠区域中进行电连接；以及
-在所述相邻半导体芯片(2、3)上的可自由接入的芯片接触垫(8)与所述布线衬底(5)之间形成焊接连接(17)。
15.一种制造具有连接衬底(1)的半导体模块(4)的方法，所述连接衬底用于将相邻半导体芯片(2、3)上的集成电路进行电连接，所述方法包括以下方法步骤：
-为具有包括集成电路的相邻半导体芯片(2、3)的半导体模块(4)生成布线衬底(5)；
-用所述半导体芯片(2、3)的背面(19、20)与布线衬底(5)的芯片安装设施(21)之间的整体连接将相邻半导体芯片(2、3)设置在布线衬底(5)上，使得可以自由接入半导体芯片(2、3)的上表面(9、10)上的芯片接触垫(8)；
-设置连接衬底(1)，使其下表面(13)在所述相邻半导体芯片(2、3)的边缘区域(6、7)上，且在所述连接衬底(1)的可自由接入的上表面(11)上具有连接用接触垫(12)；以及
-在所述连接衬底(1)的可自由接入的连接用接触垫(12)与所述相邻半导体芯片(2、3)的芯片接触垫(8)之间形成焊接连接(17)，在所述半导体芯片(2、3)上的芯片接触垫(8)与所述布线衬底(5)之间形成焊接连接(16)。
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