CN100520761C - Multi processor initialization method - Google Patents
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- CN100520761C CN100520761C CNB2006100240068A CN200610024006A CN100520761C CN 100520761 C CN100520761 C CN 100520761C CN B2006100240068 A CNB2006100240068 A CN B2006100240068A CN 200610024006 A CN200610024006 A CN 200610024006A CN 100520761 C CN100520761 C CN 100520761C
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Abstract
The invention is a multiprocessor initializing method, mainly integrating 8/2/1-processor initializing method with 4/2/1-processor initializing method, after determining whether each processor supports multiprocessor platform and number of processors, according to different routing lists of supporting 8, 4, or 2 processors, respectively, executing processor initialization to simplify initializing program when number of processors is high, and improve processor initializing program sharing between multiprocessor systems with different numbers of processors.
Description
[Ji Intraoperative field]
The present invention is about the initial method of a kind of initial method of processor, particularly a kind of multiprocessor.
[Bei Jing Ji Intraoperative]
Along with application program gets more and more, becomes increasingly complex, computer system needs stronger arithmetic capability to handle a large amount of complex tasks further relatively.In order to promote the treatment effeciency of computer system, the multi-processor system by single multi-processor development gradually, come executed in parallel to handle a task by a plurality of processors, thus, it is a lot of soon to carry out the speed of Processing tasks separately than single-processor.And when a processor fault wherein, remaining processor also can continue to connect let it be work, to keep the stability of computer system.Therefore, according to above-mentioned advantage, many large-scale workstations or server system adopt multiple processor structure more.Yet when processor quantity increased, its initialize routine promptly need and then be revised relatively.For instance, with reference to Fig. 1, the initial method of eight processors of existing support, the initialization of one of at first carrying out in eight processors (step 110); Detect other processor (step 120) one by one by this processor then, whether support multi processor platform (step 122) to confirm it; If the support multi processor platform carries out initialization (step 130) with routing table, and confirm initialization whether successfully (step 140); If success, renumber (renumber) this processor (step 150) according to count value, and stored count value (step 160), and then confirm whether next processor (step 170) is arranged (i.e. the initialization whether executed finishes eight processors), when next processor, then return step 120, whether support multi processor platform to confirm it.And when this processor does not support that multi processor platform or initialization get nowhere, then remove routing table (step 180), carry out the initialization (step 190) of dual processor then.Usually, support the initial method of eight processors also can therefore will then carry out the initialization of dual processor and the initialization of single-processor in order to carry out the initialization of dual processor and single-processor in the initialization of finishing eight processors or after removing routing table.
Just support that the initial method of four processors is then identical with the initial method of supporting eight processors haply, only after carrying out initialization, carry out the initialized affirmation whether executed finishes four processors, and when route is set up, need determine to support several processors at most.Hence one can see that, and in the prior art, the initialization of eight processors and four processors also can't be supported mutually, and setting respectively.Therefore, if proposition one can be supported both initial methods simultaneously, but with the accelerating system initialization, and save the shared space of initialize routine.
[summary of the invention]
In view of above problem, fundamental purpose of the present invention is to provide a kind of initial method of multiprocessor, with solving the disclosed problem of prior art.
Therefore, for reaching above-mentioned purpose, the initial method of disclosed multiprocessor is used for a plurality of processors of initialization one by one, and wherein the quantity of processor is one first quantity, one of comprises the following steps: in these processors of initialization first quantity; The processor of finishing with initialization detects other processor one by one, whether supports a multi processor platform to confirm its processor platform of being supported; When the processor platform of supporting when this processor is multi processor platform, then according to first this processor of routing table initialization, and confirm the whether success of initialization of this processor, when initially changing into merit, according to a count value processor is renumberd, and the stored count value; Otherwise, the processor platform of supporting when this processor is not multi processor platform or initialization when unsuccessful, then confirm count value, be used for learning the quantity of having finished initialized processor, when if quantity performed is not less than second quantity, sequencing secondary route table then, and carry out the initialization of the processor of second quantity one by one with this secondary route table, and when quantity performed during less than second quantity, then the sequencing Third Road is by table, and carries out the initialization of the processor of the 3rd quantity with this Third Road one by one by table.Wherein, first quantity is greater than second quantity, and second quantity is greater than the 3rd quantity.
Here, routing table is used for the communication path between the regulation two processor, therefore in process according to the routing table initialization processor, mainly be that the default value of corresponding route in this processor and the routing table is filled out in the register of processor, and renumber and finish initialized processor according to a count value, so that can believe all with this processor by this routing table.Here, count value can and be added up one by one by 1 beginning.
Moreover, here can be by detecting the register value in the register in processor, to confirm what the processor platform that this processor is supported is, promptly this processor is to support multiprocessor (more than 2 processors), dual processor (dual processor) or only support single-processor.
Wherein first, second and the 3rd quantity can be respectively 8,4 and 2, thereby first, second and Third Road then can be respectively the routing table of the processor of supporting 8,4 and 2 by table here.
The detailed content of relevant this creation and technology, cooperation illustrates as follows:
[description of drawings]
Fig. 1 is the process flow diagram of the initial method of eight processors of existing support;
Fig. 2 is the Organization Chart of eight processors;
Fig. 3 A, Fig. 3 B are the process flow diagram of the initial method of multiprocessor according to an embodiment of the invention;
Fig. 4 A is the Organization Chart of dual processor;
Fig. 4 B is for supporting the routing table of the dual processor framework among Fig. 4 A;
Fig. 5 A, Fig. 5 B are the process flow diagram of the initial method of multiprocessor according to another embodiment of the present invention.
[embodiment]
Below enumerate specific embodiment describing content of the present invention in detail, and with diagram as aid illustration.
The present invention integrates the initial method of 8/2/1 processor and the initial method of 4/2/1 processor, to strengthen the portability and the robustness (Robust) of initialize routine, and then accelerate the speed of subsequent development, and can save the amount and the required time and the system space of initialization of program code.
In the multicomputer system framework, each processor can be connected to other processor with the high-speed transfer bus, to form communicating by letter between any processor and other processor.The data between two processor or the bang path of instruction can have many kinds of paths, therefore a logical routing unit are set in each processor, to come the path of supervisory communications according to routing table (routing table); Wherein, the logical routing unit can decide definite path of being taked according to the real-time utilization on the various paths or the like factor.For instance, with reference to Fig. 2, with regard to eight processor system frameworks, wherein each processor 210 is directly connected to adjacent processor 210 by the high-speed transfer bus with specific frequency range, and in each is handled, a logical routing unit P is set, with the path of supervisory communications, i.e. the route of data.Therefore, before carrying out, system can carry out initialization earlier, to confirm executable processor.
Wherein in multiple processor structure, when system boot, basic input/output (basicinput/output system; BIOS) oneself that can start shooting earlier detects, and carries out the initialization of each processor one by one; For convenience of description, below describe the present invention in detail here, with the initial method of carrying out eight processors.With reference to Fig. 3 A, Fig. 3 B, initial method according to multiprocessor of the present invention, at first, one of can carry out earlier in eight processors (for convenience of description, below be referred to as first processor) initialization (step 310), and then detect all the other seven processors (for convenience of description, below being referred to as second processor) (step 320) one by one by the first processor that this initialization is finished, whether support multi processor platform (step 322) to confirm second processor.
Wherein, when second processor is supported multi processor platform, carry out initialization second processor (step 330), then confirm initialization whether successfully (step 340) according to routing table; If success, renumber (renumber) according to count value and finish initialized second processor (step 350), then, stored count value (step 360), confirm whether to have next second processor (step 370) (promptly whether having finished the initialization of seven processors) again, when next second processor, then return step 320, to carry out above-mentioned steps repeatedly until the initialization of finishing seven processors.
Moreover, when second processor does not support that multi processor platform or initialization get nowhere, then confirm count value (step 380), be used for learning the quantity of having finished initialized processor, judge whether to finish the initialization (step 382) of four processors according to it.For instance, when count value is accumulated to 2, i.e. the initialization of three processors is only finished in expression, and when count value is accumulated to 3, i.e. the initialization of four processors has been finished in expression, by that analogy.Wherein, when "Yes", support the sequencing (step 390) of the routing table of four processors, then, carry out the initialization (step 392) of four processors with the routing table of sequencing gained; And during "No", then support the sequencing (step 400) of the routing table of dual processor, then, carry out the initialization (step 402) of dual processor with the routing table of sequencing gained.
Here, routing table is to be used for communication path between the regulation two processor, comprises that mainly a broadcasting table (broadcast table), requires table (request table) and a Response Table (response table).And, in each table, can write down the route of each processor to another processor (i.e. each row (row) in the table).Therefore, in step 350, the default value that is about to corresponding route in this processor and the routing table is filled out in the register of processor, and count value can be by 1 beginning, thereby one by one processor is renumberd in regular turn so that by this routing table can with each processor communication.For instance, with ultra micro (AMD) processor that company was produced, having a bit register to write down it in processor is which processor (is assumed to be n processor, and n is a positive integer), therefore, when an other processor will be communicated by letter with it, promptly can go to send out requirement or response according to the n row of routing table to n processor.But when processor just starts in system, default value can all be 7 in its register, the wherein initialization of advanced row for a moment in eight processors, carry out the initialization of all the other processors then one by one by this processor, and carry out in the initialization procedure at all the other processors, when each processor is finished initialization, can renumber according to a count value and finish initialized processor, and this count value of accumulative total after numbering is finished, here, count value can be by 1 beginning, come one by one each processor to be renumberd, thus, when two processor was desired to communicate, a processor can communicate by routing table and another processor.
For instance, for convenience of description, be that example describes only with the communication between two processors, stipulated in the routing table that the communication between two processors is to transmit by that high-speed transfer connectivity port (Link port).That is to say that when the connection between two processor is shown in Fig. 4 A the time, wherein processor CPU0 has a high-speed transfer connectivity port Port0, processor CPU1 has a high-speed transfer connectivity port Port1, can send " requirement " or " response " between the two mutually; At this moment, the routing table that gets final product supported this dual processor comprising broadcasting table, requirement table and Response Table, all writes down each processor CPU0, the CPU1 communication path to another processor or oneself (being that each is listed as ROW0, ROW1) shown in Fig. 4 B.Here, the routing table of eight processor system can be set up with reference to Fig. 4 B.
In addition, in step 390, will fall with the 5th to the 8th erasing of information that processor is relevant in the routing table exactly.That is to say, when being initialised to processor after the 5th just wrong (fail) information produce, can't be with all erasings of information in the routing table, and only remove the relevant information of the 5th to the 8th processor, thus, just can operate by four processors.Therefore, in step 400 relevant information of removing the 3rd to the 8th processor in the routing table, carry out the initialization of dual processor.
Comprehensively above-mentioned, with reference to Fig. 5 A, Fig. 5 B, initial method according to multiprocessor of the present invention, at first, one of carry out in the processor of first quantity initialization (step 410) of (for convenience of description, below being referred to as first processor) earlier, and then detect other processor one by one (for convenience of description by first processor, below be referred to as second processor) (step 420), whether support multi processor platform (step 422) to confirm second processor.Here, mainly be by detecting the register value in the register in processor, to confirm processor platform that this processor supported why, and promptly this processor is supported multiprocessor (more than 2 processors), dual processor (dual processor) or only supported single-processor.
Wherein, when second processor is supported multi processor platform, carry out initialization second processor (step 430), and confirm initialization whether successfully (step 440) according to first routing table; If success, renumber according to count value and to finish initialized second processor (step 450), then, stored count value (step 460), then, confirm whether to have next second processor (step 470) again, promptly confirm whether to have finished the initialization of supported all processors, when next second processor, then return step 420, to carry out above-mentioned steps repeatedly until the initialization of finishing all processors.First routing table here is the routing table of the processor of supporting first quantity.
Otherwise, when detect second processor when not supporting the initialization of the multi processor platform or second processor unsuccessful, then confirm count value (step 480), be used for learning the quantity of having finished initialized processor, thereby judge whether to finish the initialization (step 482) of the processor of second quantity.Wherein, when the initialization of the processor of confirming to have finished second quantity, sequencing secondary route table (step 490) then, and then carry out the initialization (step 492) of the processor of second quantity with the secondary route table, wherein this secondary route table is the routing table of the processor of supporting second quantity; Otherwise, when the initialization of the processor of confirming not finish second quantity, then the sequencing Third Road is by table (step 500), and then carry out the initialization (step 502) of the processor of the 3rd quantity by table with Third Road, wherein this Third Road is the routing table of the processor of supporting the 3rd quantity by table.
Here, first, second and the 3rd quantity can be respectively 8,4 and 2, can change also that certainly it being set according to the practical application situation.Wherein, first quantity can be more than second quantity, and second quantity can be more than the 3rd quantity.
Claims (26)
1. the initial method of a multiprocessor in order to several processors of initialization one by one, is characterized in that the quantity of these processors is one first quantity, the first processor that one of comprises the following steps: in these processors of this first quantity of initialization; This first processor of finishing of initialization detects other these processors one by one, and we are called second processor other these processors, to confirm whether the processor platform that this second processor is supported is a multi processor platform; The processor platform of supporting when this second processor comprises the following steps: according to this second processor of one first routing table initialization during for this multi processor platform; Confirm this second processor success of initialization; When the initialization of this second processor success, comprise the following steps: to renumber this second processor according to a count value; And this count value of accumulative total; When the initialization of this second processor is unsuccessful, comprise the following steps: to confirm this count value, be used for learning the quantity of having finished initialized processor; When the quantity of finishing initialized processor was not less than one second quantity, wherein this first quantity comprised the following steps: sequencing one secondary route table greater than this second quantity; And the initialization of carrying out these processors of this second quantity with this secondary route table one by one; And, comprise the following steps: that sequencing one Third Road is by table when the quantity of finishing initialized processor during less than this second quantity; And with this Third Road by the table carry out the initialization of these processors of one the 3rd quantity one by one, wherein this second quantity is greater than the 3rd quantity; And the processor platform of supporting when this second processor comprises the following steps: to confirm this count value during for this multi processor platform, is used for learning the quantity of having finished initialized processor; When the quantity of finishing initialized processor is not less than this second quantity, comprise the following steps: this secondary route table of sequencing; And the initialization of carrying out these processors of this second quantity with this secondary route table one by one; And, comprise the following steps: that this Third Road of sequencing is by table when the quantity of finishing initialized processor during less than this second quantity; And carry out the initialization of these processors of the 3rd quantity one by one by table with this Third Road.
2. the initial method of multiprocessor as claimed in claim 1, it is characterized in that, this the first processor finished of initialization detect other these processors one by one, we are called second processor other these processors, to confirm whether the processor platform that this second processor is supported is the step of a multi processor platform, comprise the following steps: to detect the register value in the register in this second processor; And learn this processor platform that this second processor is supported according to this register value.
3. the initial method of multiprocessor as claimed in claim 1, it is characterized in that, this is according to the step of one first routing table initialization processor, comprises the following steps: at least one default value that mutually should second processor in first routing table is filled out in the register that is arranged in this second processor.
4. the initial method of multiprocessor as claimed in claim 1 is characterized in that, in the step of this this count value of accumulative total, this count value begins accumulative total by 1.
5. the initial method of multiprocessor as claimed in claim 1, it is characterized in that, the step of the step of this sequencing one secondary route table and this secondary route table of this sequencing, this two step all comprise the following steps: these erasings of information of having finished initialized processor after this second quantity in this first routing table are fallen to obtain this secondary route table.
6. the initial method of multiprocessor as claimed in claim 1, it is characterized in that, this sequencing one Third Road is by the step of table and this Third Road of this sequencing step by table, and this two step all comprises the following steps: to remove these information of having finished initialized processor after the 3rd quantity in this first routing table to obtain this Third Road by table.
7. the initial method of multiprocessor as claimed in claim 1 is characterized in that, this first routing table is a routing table of the processor of this first quantity of support.
8. the initial method of multiprocessor as claimed in claim 1 is characterized in that, this secondary route table is a routing table of the processor of this second quantity of support.
9. the initial method of multiprocessor as claimed in claim 1 is characterized in that, this Third Road is a routing table of supporting the processor of the 3rd quantity by table.
10. the initial method of multiprocessor as claimed in claim 1 is characterized in that, this first, this second and the 3rd quantity is respectively 8,4 and 2.
11. the initial method of multiprocessor as claimed in claim 10 is characterized in that, first, this second and this Third Road be respectively a routing table of supporting 8,4 and 2 processors by table.
12. the initial method of a multiprocessor in order to several processors of initialization one by one, is characterized in that the quantity of these processors is one first quantity, the first processor that one of comprises the following steps: in these processors of this first quantity of initialization; Detect next processor in these processors, this next processor is called second processor, supports a multi processor platform to confirm it; According to this second processor of one first routing table initialization; Confirm this second processor success of initialization; Renumber this second processor according to a count value; This count value of accumulative total; When the quantity of finishing initialized processor was not less than one second quantity, wherein this first quantity comprised the following steps: sequencing one secondary route table greater than this second quantity; And the initialization of carrying out these processors of this second quantity with this secondary route table one by one; And, comprise the following steps: that sequencing one Third Road is by table when the quantity of finishing initialized processor during less than this second quantity; And with this Third Road by the table carry out the initialization of these processors of one the 3rd quantity one by one, wherein this second quantity is greater than the 3rd quantity.
13. the initial method of multiprocessor as claimed in claim 12, it is characterized in that, when the initialization of carrying out this second processor according to this first routing table is unsuccessful, more comprise the following steps: to confirm this count value, use and learn the quantity of finishing initialized processor.
14. the initial method of multiprocessor as claimed in claim 12 is characterized in that, when this second processor is not supported this multi processor platform, comprises the following steps: to confirm this count value, is used for learning the quantity of having finished initialized processor; When the quantity of finishing initialized processor is not less than this second quantity, comprise the following steps: this secondary route table of sequencing; And the initialization of carrying out these processors of this second quantity with this secondary route table one by one; And, comprise the following steps: that this Third Road of sequencing is by table when the quantity of finishing initialized processor during less than this second quantity; And carry out the initialization of these processors of the 3rd quantity one by one by table with this Third Road.
15. the initial method of multiprocessor as claimed in claim 14, it is characterized in that, the step of this secondary route table of this sequencing comprises the following steps: these erasings of information of having finished initialized processor after this second quantity in this first routing table are fallen to obtain this secondary route table.
16. the initial method of multiprocessor as claimed in claim 14, it is characterized in that, this Third Road of this sequencing is by the step of table, comprise the following steps: to remove the 3rd quantity in this first routing table after these information of having finished initialized processor to obtain this Third Road by table.
17. the initial method of multiprocessor as claimed in claim 12 is characterized in that, this detects next this second processor in these processors, and the step to confirm that it supports a multi processor platform comprises the following steps:
Register value in the register of detection in this second processor; And learn this processor platform that this second processor is supported according to this register value.
18. the initial method of multiprocessor as claimed in claim 12, it is characterized in that, this is according to the step of one first this second processor of routing table initialization, comprises the following steps: at least one default value that mutually should second processor in this first routing table is filled out in the register that is arranged in this second processor.
19. the initial method of multiprocessor as claimed in claim 12 is characterized in that, in the step of this this count value of accumulative total, this count value begins accumulative total by 1.
20. the initial method of multiprocessor as claimed in claim 12, it is characterized in that, the step of this sequencing one secondary route table comprises the following steps: these erasings of information of having finished initialized processor after this second quantity in this first routing table are fallen to obtain this secondary route table.
21. the initial method of multiprocessor as claimed in claim 12, it is characterized in that, this sequencing one Third Road is by the step of table, comprise the following steps: to remove the 3rd quantity in this first routing table after these information of having finished initialized processor to obtain this Third Road by table.
22. the initial method of multiprocessor as claimed in claim 12 is characterized in that, this first routing table is a routing table of the processor of this first quantity of support.
23. the initial method of multiprocessor as claimed in claim 12 is characterized in that, this secondary route table is a routing table of the processor of this second quantity of support.
24. the initial method of multiprocessor as claimed in claim 12 is characterized in that, this Third Road is a routing table of supporting the processor of the 3rd quantity by table.
25. the initial method of multiprocessor as claimed in claim 12 is characterized in that, this first, this second and the 3rd quantity is respectively 8,4 and 2.
26. the initial method of multiprocessor as claimed in claim 23 is characterized in that, this first, this second and this Third Road be respectively a routing table of supporting 8,4 and 2 processors by table.
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| CNB2006100240068A CN100520761C (en) | 2006-02-21 | 2006-02-21 | Multi processor initialization method |
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| CNB2006100240068A CN100520761C (en) | 2006-02-21 | 2006-02-21 | Multi processor initialization method |
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