CN100555628C - Semiconductor package with electro-magnetic screen function - Google Patents
Semiconductor package with electro-magnetic screen function Download PDFInfo
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- CN100555628C CN100555628C CN 200710167237 CN200710167237A CN100555628C CN 100555628 C CN100555628 C CN 100555628C CN 200710167237 CN200710167237 CN 200710167237 CN 200710167237 A CN200710167237 A CN 200710167237A CN 100555628 C CN100555628 C CN 100555628C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
Abstract
A kind of semiconductor package with electro-magnetic screen function comprises a substrate, several semiconductor chips, several shielded metal balls, several grounded metal balls and several conducting Metal Ball.The adjacent upper surface that is arranged on this substrate of these several semiconductor chip along continuous straight runs.These several shielded metal balls are arranged on the upper surface of this substrate, and what make each semiconductor chip is equipped with this shielded metal ball on every side, to shield the electromagnetic interference signal that these several semiconductor chips come from horizontal direction.The part of this shielded metal ball is arranged between this semiconductor chip, disturbs with the mutual electromagnetic that shields between this semiconductor chip; Another part of this shielded metal ball is arranged on the outer circumferential side of this semiconductor chip, comes from outside electromagnetic interference signal with shielding.
Description
Technical field
The present invention relates to a kind of semiconductor package, particularly about a kind of semiconductor package with electro-magnetic screen function.
Background technology
Electromagnetic interference is a kind of electromagnet phenomenon that people find for a long time.The electromagnetic wave that is produced when some electrical equipment, electronic device works, easily to around other is electric, electronic equipment forms electromagnetic interference, initiating failure or influence the transmission of signal.In addition, excessive electromagnetic interference can form electromagnetic pollution, and the harm people's is healthy, destroys the ecological balance.Along with the improvement of equipment and structure, realize can operate as normal and this compatible state that electromagnetic interference causes performance change and device damage can not take place mutually more and more be difficult to obtain.In order to make system realize electromagnetic compatibility, must be foundation with the electromagnetic environment of system, require each power consumption equipment not produce electromagnetic emission above certain limit, require itself will possess certain anti-interference capability again simultaneously.Have only constraint and the improvement of each equipment all being made these two aspects, could the assurance system realize compatible fully.
In High Density Packaging Technology, can adopt side by side (Side by side) formula, multiple chips is come encapsulation together; Perhaps adopt another kind to pile up (Stack) formula, multiple chips is piled up, be combined into a complete system (System In Package).Yet, exist the problem that can produce electromagnetic interference each other between the chip of same system, and the chip of this system also may be subjected to coming from the interference of outside electromagnetic signal, thereby cause the damage of chip, and the related equipment initiating failure that makes this chip place.
In view of this, the present invention proposes a kind of more effectively electromagnetic shielding mode, utilizes its special electromagnetic armouring structure, and the effect of electromagnetic shielding not only can be provided, prevent to interfere with each other between its chipset, and this electromagnetic armouring structure can't increase the vertical height of piling up of encapsulation.
Summary of the invention
The object of the present invention is to provide a kind of semiconductor package, it can realize the function of electromagnetic shielding by the shielded metal ball is set between chip.
For achieving the above object, the semiconductor package of the present invention with electro-magnetic screen function comprises a substrate, several semiconductor chips, several shielded metal balls, several grounded metal balls and several conducting Metal Ball.The adjacent upper surface that is arranged on this substrate of these several semiconductor chip along continuous straight runs.The bottom surface of this semiconductor chip and the upper surface of this substrate form a bonding land, and this semiconductor chip utilizes several projections and this substrate to realize engaging.These several shielded metal balls are arranged on the upper surface of this substrate, and what make each semiconductor chip is equipped with this shielded metal ball on every side, to shield the electromagnetic interference signal that these several semiconductor chips come from horizontal direction.The some of this shielded metal ball is arranged between this semiconductor chip, disturbs with the mutual electromagnetic that shields between this semiconductor chip; Another of this shielded metal ball partly then is arranged on the outer circumferential side of this semiconductor chip, comes from outside electromagnetic interference signal with shielding.The height essence of this shielded metal ball is equal to or less than the height summation of this bonding land and this semiconductor chip.
In addition, the present invention further can be provided with a fin above these several semiconductor chips, to improve the radiating efficiency of this semiconductor package.
In addition, the present invention further can insert an adhesive material between this fin and this substrate, to increase the bond strength between this fin and this substrate.
Compared with prior art, the semiconductor package utilization that the present invention has electro-magnetic screen function is arranged on the function that each chip shielded metal ball on every side can be realized electromagnetic shielding, not only can prevent interfering with each other between the chipset, and this electromagnetic armouring structure can't increase the vertical height of Chip Packaging.In addition, this semiconductor package also can be in conjunction with fin and adhesive material, to improve radiating efficiency and to increase structural strength.
The present invention is further illustrated below in conjunction with accompanying drawing and embodiment.
Description of drawings
Fig. 1 is the structural representation of first embodiment of the invention.
Fig. 2 is the structural representation of second embodiment of the invention.
Fig. 3 is the structural representation of third embodiment of the invention.
Embodiment
Relevant detailed description of the present invention and technology contents, existing as follows with regard to accompanying drawings:
Fig. 1 is for having the structural representation of the semiconductor package of electro-magnetic screen function according to first embodiment of the invention.The semiconductor package of this first embodiment comprises a substrate 101, several semiconductor chips 102, several shielded metal balls 103, several grounded metal balls 104 and several conducting Metal Ball 110.
This substrate 101 has a upper surface 105 and a lower surface 106.Be formed with several vias 107 that run through this substrate 101 on this substrate 101.The adjacent upper surface 105 that is arranged on this substrate 101 of these several semiconductor chip 102 along continuous straight runs, also promptly these several semiconductor chip 102 essence are side by side the relativeness of (Side by side).The bottom surface of each semiconductor chip 102 (not label) is provided with several projections 109, in order to the related circuit (not shown) that electrically connects this substrate 101.The upper surface 105 of the bottom surface of this semiconductor chip 102 and this substrate 101 forms a bonding land 118.In bonding land 118, this semiconductor chip 102 utilizes these several projections 109 to realize engaging with this substrate 101, also can select to insert suitable primer (underfill) in case of necessity.These several shielded metal balls 103 are arranged on the upper surface 105 of this substrate 101, and what make each semiconductor chip 102 is equipped with this shielded metal ball 103 on every side, to shield the electromagnetic interference signal that these several semiconductor chips 102 come from horizontal direction.Specifically, the some of this shielded metal ball 103 is arranged between this semiconductor chip 102, disturbs with the mutual electromagnetic that shields between this semiconductor chip 102; Another of this shielded metal ball 103 partly then is arranged on the outer circumferential side of this semiconductor chip 102, comes from outside electromagnetic interference signal with shielding.Each shielded metal ball 103 forms with the upper end of corresponding via 107 respectively and electrically connects.The height essence of this shielded metal ball 103 is equal to or less than the height summation of this bonding land 118 and this semiconductor chip 102.
These several grounded metal balls 104 are arranged on the lower surface 106 of this substrate 101, and form with the lower end of this via 107 and to electrically connect.These several grounded metal balls 104 form with earthed circuit (not shown) and electrically connect, with so that this shielded metal ball 103 be grounded.These several conducting Metal Ball 110 are arranged on the lower surface 106 of this substrate 101, and in order to the related circuit (not shown) that connects this substrate 101, and these several conducting Metal Ball 110 are outside I/O ends of this substrate 101, with the I/O signal of telecommunication.It should be noted that, shielded metal ball 103 of the present invention and grounded metal ball 104 are only in order to shield electromagnetic interference signal and formation ground connection (or forming passage of heat), these both not in order to the I/O signal of telecommunication, also promptly be different from the effect of this conducting Metal Ball 110 fully.
Fig. 2 is for having the structural representation of the semiconductor package of electro-magnetic screen function according to second embodiment of the invention.This second embodiment and the above-mentioned first embodiment difference are: this second embodiment further is provided with a fin 111 above these several semiconductor chips 102, and the upper limb of the shielded metal ball 103 of this fin 111 and these substrate 101 upper surfaces 105 joins.This fin 111 electrically connects with this shielded metal ball 103, to be grounded by this shielded metal ball 103.This fin 111 can improve the radiating efficiency of semiconductor package of the present invention.In addition, the material of this fin 111 can be selected copper, aluminium, silver, golden contour conductive metal, and also can select to fill a heat-conducting cream between this fin 111 and this semiconductor chip 102, for example heat conduction elargol etc.
Fig. 3 is for having the structural representation of the semiconductor package of electro-magnetic screen function according to third embodiment of the invention.The 3rd embodiment and the above-mentioned second embodiment difference are: the 3rd embodiment has further inserted an adhesive material 112 between this fin 111 and this substrate 101.This adhesive material 112 can strengthen the bond strength between this fin 111 and this substrate 101.In addition, can further optionally be respectively provided to a few injection molding lockhole 113 on this substrate 101 and this fin 111.This injection molding lockhole 113 is filled with this adhesive material 112, in order to strengthen the bond strength between this substrate 101, this fin 111 and this adhesive material 112 threes.This injection molding lockhole 113 can be the through hole that has the blind hole of chamfering or have chamfering.
According to the foregoing description, compared with prior art, the semiconductor package utilization that the present invention has electro-magnetic screen function is arranged on the function that each chip shielded metal ball on every side can be realized electromagnetic shielding, not only can prevent interfering with each other between the chipset, and this electromagnetic armouring structure can't increase the vertical height of Chip Packaging.In addition, this semiconductor package also can be selected in conjunction with fin and adhesive material, to improve radiating efficiency and to increase structural strength.
Claims (11)
1. semiconductor package with electro-magnetic screen function comprises:
One substrate has a upper surface and a lower surface, is formed with the via that several run through described substrate on the described substrate;
Several semiconductor chips, the adjacent upper surface that is arranged on described substrate of along continuous straight runs; And
Several grounded metal balls are arranged on the lower surface of described substrate, and form with the lower end of described via and to electrically connect;
It is characterized in that: described semiconductor package further comprises several shielded metal balls, described shielded metal ball is arranged on the upper surface of described substrate, and form with the upper end of described via and to electrically connect, the some of described several shielded metal balls is arranged between the adjacent described semiconductor chip.
2. semiconductor package as claimed in claim 1, it is characterized in that: form a bonding land between the lower surface of described several semiconductor chips and the upper surface of described substrate, and described several semiconductor chips further comprise several projections in described bonding land.
3. semiconductor package as claimed in claim 1 is characterized in that: the some of described several shielded metal balls is arranged on the outer circumferential side of described semiconductor chip.
4. semiconductor package as claimed in claim 1 is characterized in that: the lower surface of described substrate further comprises several conducting Metal Ball.
5. semiconductor package as claimed in claim 1 is characterized in that: further comprise a fin, described fin is arranged on the top of described several semiconductor chips.
6. semiconductor package as claimed in claim 5 is characterized in that: the upper limb of the shielded metal ball of described fin and described upper surface of base plate joins.
7. semiconductor package as claimed in claim 5 is characterized in that: fill a heat-conducting glue between described fin and the described semiconductor chip.
8. semiconductor package as claimed in claim 5 is characterized in that: further comprise an adhesive material, be arranged between described fin and the described substrate.
9. semiconductor package as claimed in claim 8, it is characterized in that: described fin further comprises at least one injection molding lockhole, the injection molding lockhole of described fin is the through hole that has the blind hole of chamfering or have chamfering, and the injection molding lockhole of described fin is filled with described adhesive material.
10. semiconductor package as claimed in claim 8, it is characterized in that: described substrate further comprises at least one injection molding lockhole, the injection molding lockhole of described substrate is the through hole that has the blind hole of chamfering or have chamfering, and the injection molding lockhole of described substrate is filled with described adhesive material.
11. the semiconductor package with electro-magnetic screen function comprises:
One substrate has a upper surface and a lower surface, is formed with the via that several run through described substrate on the described substrate;
Several semiconductor chips, the adjacent upper surface that is arranged on described substrate of along continuous straight runs; And
Several grounded metal balls are arranged on the lower surface of described substrate, and form with the lower end of described via and to electrically connect;
It is characterized in that: described semiconductor package further comprises several shielded metal balls, described shielded metal ball is arranged on the upper surface of described substrate, and form with the upper end of described via and to electrically connect, form a bonding land between the lower surface of described several semiconductor chips and the upper surface of described substrate, and described several semiconductor chips further comprise several projections in described bonding land, and the height of described shielded metal ball is less than or equal to the height summation of described bonding land and described semiconductor chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200710167237 CN100555628C (en) | 2007-10-30 | 2007-10-30 | Semiconductor package with electro-magnetic screen function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200710167237 CN100555628C (en) | 2007-10-30 | 2007-10-30 | Semiconductor package with electro-magnetic screen function |
Publications (2)
| Publication Number | Publication Date |
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| CN101150122A CN101150122A (en) | 2008-03-26 |
| CN100555628C true CN100555628C (en) | 2009-10-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 200710167237 Active CN100555628C (en) | 2007-10-30 | 2007-10-30 | Semiconductor package with electro-magnetic screen function |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102364683A (en) * | 2011-10-21 | 2012-02-29 | 华为终端有限公司 | Packaging structure and method thereof, and electronic equipment |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101651133B (en) * | 2008-08-13 | 2011-03-16 | 奇景光电股份有限公司 | Chip wiring method on film for decreasing electromagnetic interference and structure |
| CN101937905B (en) * | 2010-08-23 | 2012-09-05 | 日月光半导体制造股份有限公司 | Semiconductor encapsulating part and manufacture method thereof |
| CN103094256B (en) * | 2011-11-08 | 2015-12-02 | 华进半导体封装先导技术研发中心有限公司 | A kind of package system |
| TWI546932B (en) * | 2014-07-17 | 2016-08-21 | 矽品精密工業股份有限公司 | Semiconductor package and manufacturing method thereof |
| CN109368588A (en) * | 2018-12-07 | 2019-02-22 | 歌尔股份有限公司 | Built-in chip type circuit board, combination sensor and electronic equipment |
| CN110610925A (en) * | 2019-09-17 | 2019-12-24 | 苏州日月新半导体有限公司 | Integrated circuit package and method of manufacturing the same |
| CN111199926B (en) * | 2019-10-29 | 2021-08-17 | 浙江大学 | Semiconductor packaging structure with micro-separation cavity |
| CN111554675A (en) * | 2020-05-18 | 2020-08-18 | 甬矽电子(宁波)股份有限公司 | Electromagnetic shielding structure, electromagnetic shielding structure manufacturing method and electronic product |
| CN115064522B (en) * | 2022-08-12 | 2022-11-15 | 深圳新声半导体有限公司 | Thin film type EMI filter structure and manufacturing method thereof |
-
2007
- 2007-10-30 CN CN 200710167237 patent/CN100555628C/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102364683A (en) * | 2011-10-21 | 2012-02-29 | 华为终端有限公司 | Packaging structure and method thereof, and electronic equipment |
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|---|---|
| CN101150122A (en) | 2008-03-26 |
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