CN100561753C - Stack grid-source one-side electronic injection flash memory and manufacture method thereof - Google Patents
Stack grid-source one-side electronic injection flash memory and manufacture method thereof Download PDFInfo
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- CN100561753C CN100561753C CN 200610023207 CN200610023207A CN100561753C CN 100561753 C CN100561753 C CN 100561753C CN 200610023207 CN200610023207 CN 200610023207 CN 200610023207 A CN200610023207 A CN 200610023207A CN 100561753 C CN100561753 C CN 100561753C
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Abstract
The invention discloses a kind of new stack grid-source one-side electronic injection flash memory and manufacture method thereof.Stack grid-source one-side electronic injection flash memory of the present invention has the stacking gate structure, floating boom wherein constitutes two different zones of thickness, in the zone, a regional injecting nitrogen ion, in thermal oxidation process, the oxide growth rate in zone of having injected the nitrogen ion is slow, forms relatively thinner oxide skin(coating) zone; And another zone does not have injecting nitrogen ion, therefore form thicker oxide skin(coating), generation at the interface between the different zone of two oxide skin(coating) thickness is tyrannical to electric field, and one side direction floating boom injects from the source easily to make electronics, has improved the read or write speed of memory cell.Stack grid-source one-side electronic injection flash memory of the present invention had both had the integrated high advantage of existing stacking gate flash memory, also had the fast advantage of grid flash memory reservoir read or write speed.
Description
Technical field
The present invention relates to a kind of new flash memory and manufacture method thereof, particularly stack grid-source one-side electronic injection flash memory and manufacture method thereof.
Background technology
The principal character of non-volatile memory technologies is to be extensive use of the floating boom unit.According to grid structure difference, the floating boom unit can be divided into two classes, and a kind of is so-called stacking gate structure, as shown in Figure 1; Another kind is a grid dividing structure, as shown in Figure 2.Current, the shown stacking gate ETOX (ErasableTunnel Oxide) of Fig. 1 is the first-selected structure in the flash memory market.The key reason of this stacking gate ETOX success is:
(a) the stacking gate cellular construction in the Erasable Programmable Read Only Memory EPROM (EEPROM) is simple, integration density is high and high conformity, Erasable Programmable Read Only Memory EPROM (EEPROM) was made a lot of years, abundant manufacturing experience has been arranged, the qualification rate height, production cost is low;
(b) the stacking gate cellular construction makes memory cell have program path separately and wipes the path, thereby, make programing function and erase feature reach optimum degree;
(c) compare with the wide variation of erase threshold voltage Vt, the erase threshold voltage Vt that can provide control good is provided through the tunnel oxide layer.
But the read or write speed of Erasable Programmable Read Only Memory EPROM (EPROM) with stacking gate construction unit is slow.
The branch grid source one side electronics injecting structure of most of flash memories is to design and setover according to the mode that the transverse electric field peak value matches with vertical high electric field, and this helps electronics, and one side direction floating boom injects from the source.Injecting mechanism with the channel hot electron of routine compares, the major advantage of the programming mechanism of this read-only flash memory of erasable programmable with branch grid source one side electronics injecting structure is, electron injection efficiency is high significantly, thereby, can carry out programming operation faster, and can reduce the power consumption of programming operation, read or write speed is fast.Compare with stacking gate ETOX unit, divide the grid source flash memory that one side is injected to have higher programming efficiency.But, compare with the stacking gate structure, divide the grid source flash memory structure that one side is injected that two problems are arranged, one of them problem is the manufacturing process complexity, for example, requires to carry out repeatedly polysilicon process, and another problem is that the size of memory cell is bigger, and integrated level is low.
The main cause that the integrated level of existing stacking gate structure is high is, control gate overlaps above the floating boom fully, and therefore, the occupied space of stacking gate structure is little, and density is big.In the existing stacking gate structure, the thickness of oxide layer unanimity under the floating boom do not have to produce the highfield that helps electronics to inject to floating boom, so read or write speed is slow.
In the existing grid dividing structure, the incomplete overlapping floating boom of control gate, therefore the occupied space of grid structure is big, integrated level is little, and still, grid dividing structure is to design and setover according to the mode that the transverse electric field peak value matches with vertical high electric field, this just helps electronics, and one side direction floating boom injects from the source, because electron injection efficiency is high significantly, therefore can carry out programming operation quickly, read or write speed is fast.
Summary of the invention
In order to overcome existing flash memory and existing shortcoming, the present invention is proposed with flash memory of grid dividing structure with stacking gate structure.
An object of the present invention is, a kind of new stack grid-source one-side electronic injection flash memory structure is provided, this stack grid-source one-side electronic injection flash memory, comprise the stacking gate construction unit, it is characterized in that, comprise two oxide areas that thickness is different under the floating boom in the described stacking gate structure, promptly, the thicker area B of oxide skin(coating) thickness under regional A that the tunnel oxide layer thickness is relatively thinner and the grid, on the stacking gate structure during making alive, form big transverse electric field at the interface between regional A and the area B.
Another object of the present invention provides a kind of manufacture method of new stack grid-source one-side electronic injection flash memory, and the manufacture method of this stack grid-source one-side electronic injection flash memory comprises following processing step:
(a) use p-N-type semiconductor N wafer as substrate, at first define source region (AA), form isolated area [STI (shallow trench isolation) or LOCOS (silicon selective oxidation)];
(b) form dark n-trap and form the p-trap on dark n-trap, added electric field carries out ion and injects, and with the ion concentration that threshold voltage adjustments is injected, prevents and penetrates ion and inject;
(c) add mask and block thick oxide region (being area B), threshold field nitrogen (N) ion that thin-oxide district (being regional A) added injects;
(d) form gate oxide layers, for example, the scope of A district thickness d 1 is
Preferred thickness d 1 is
, B district thickness d 2 scopes are
Preferred thickness d 2 is 150
(e) mix in the polysilicon layer (1), form floating boom; Form the polysilicon interlayer dielectric layer, for example ONO or other high quality dielectric layers; Polysilicon layer (2) heavy doping forms n
+The type polysilicon control grid;
(f) carry out arsenic ion and inject formation source/drain junction point.
(g) shelter the drain junction point, the source node is carried out phosphonium ion inject, form DDD (double diffused leakage) structure, finish the manufacturing process of memory cell.
According to stack grid-source one-side electronic injection flash memory of the present invention, adopt the stacking gate structure, with the difference of existing stacking gate structure be, whole oxidated layer thickness uniformity in the existing stacking gate structure under the floating boom, and have two different oxide skin(coating) thickness under the floating boom in the stacking gate structure of the present invention, the relatively thinner tunnel oxide district (the regional A among Fig. 3) of i.e. growth simultaneously and thicker gate oxide district (area B among Fig. 3).
Description of drawings
The following description of carrying out in conjunction with the drawings the present invention may be better understood purpose and advantage of the present invention, accompanying drawing is a part of specification, accompanying drawing illustrates principle of the present invention and feature with the word segment of specification, demonstrates the embodiment that represents the principle of the invention and feature in the accompanying drawing.All identical part is indicated with identical reference number or symbol in the accompanying drawing.In the accompanying drawing:
Fig. 1 is existing stacking gate ETOX structural representation;
Fig. 2 is the structural representation of the memory cell of grid source one side electronics injection in existing minute;
Fig. 3 is the schematic diagram according to stack grid-source one-side electronic injection flash memory structure of the present invention;
Fig. 4 is the schematic diagram according to stack grid-source one-side electronic injection flash memory structure programming principle of the present invention;
Fig. 5 wipes the schematic diagram of principle according to stack grid-source one-side electronic injection flash memory structure of the present invention; With
Fig. 6 is the schematic diagram that reads in principle according to stack grid-source one-side electronic injection flash memory structure of the present invention;
Fig. 7 forms dark n-trap and form the schematic diagram of p-trap on dark n-trap; With
Fig. 8 adds mask and blocks thick oxide region (being area B), and the threshold voltage ion that thin-oxide district (being regional A) added injects, and the structural representation of nitrogen (N) ion injection.
Embodiment
Describe stack grid-source one-side electronic injection flash memory of the present invention and manufacture method thereof below in conjunction with Fig. 3, Fig. 7 and Fig. 8 in detail with embodiment.
Fig. 3 demonstrates by stack grid-source one-side electronic injection flash memory of the present invention, the stack grid-source one-side electronic injection flash memory that the present invention proposes had both had the integrated high advantage of existing stacking gate flash memory, also had the fast advantage of grid flash memory reservoir read or write speed.That is to say that the stack grid-source one-side electronic injection flash memory that the present invention proposes combines the advantage of stacking gate ETOX structure and the advantage of dividing grid source one side injecting structure in fact.
[embodiment 1]
With n-raceway groove flash memory cell is example, and the structure by stack grid-source one-side electronic injection flash memory of the present invention is described.As shown in Figure 3, comprise: the source and the leakage that form in the p-trap that from Semiconductor substrate, forms, order forms on the p-trap between described source and leakage floating boom and control gate by stack grid-source one-side electronic injection flash memory of the present invention.See that from Fig. 3 floating boom comprises two oxide areas that thickness is different, promptly regional A and area B.
Zone A is a Close Tunnel, and Close Tunnel has injected nitrogen (N) ion, and the nitrogen ion owing to injection in thermal oxidation process makes the speed of growth of oxide skin(coating) slow; Area B is the grid region, does not inject nitrogen (N) ion among the B of grid region, the fast growth of oxide skin(coating) in thermal oxidation process, therefore, when A district and B district carried out the thermal oxide growth oxide skin(coating) simultaneously, the oxide skin(coating) thickness in A district was thinner, and the oxide skin(coating) thickness in B district is thicker.Therefore, on the control gate during making alive, form big transverse electric field at the interface between regional A and area B, one side direction floating boom injects from the source to impel electronics, and therefore, writing speed is fast.Make programming efficiency higher, total read or write speed of memory is faster.The same, simple in structure with existing stacking gate structure, size is little, and density is big, the integrated level height, and manufacturing process is simple, makes the qualification rate height, low cost of manufacture.
The nitrogen ion concentration scope of injecting in the A district is 1 * 10
13Ion/cm
2-5 * 10
14Ion/cm
2, preferred nitrogen ion concentration is 1 * 10
14Ion/cm
2
Oxide skin(coating) thickness with the nitrogen ion concentration of injecting the A district and thermal oxidation condition control A district.Oxide skin(coating) thickness with thermal oxidation condition control B district.The thickness of the oxide skin(coating) in Bao A district relatively
The d1 scope is
, preferred thickness d 1 is 80
Thickness d 2 scopes of the oxide skin(coating) in thicker B district are
Preferred thickness d2 is 150
If
The leakage current of grid structure is big so, and information runs off, and data preservation degree is little, and power consumption is big.If the thickness of the oxide skin(coating) in thicker B district
The reading speed of memory cell is slow, and the total read or write speed of memory cell is slow.
[embodiment 2]
With n-raceway groove flash memory cell is example, and the method for making by stack grid-source one-side electronic injection flash memory of the present invention is described.Certainly, same technology also can be used to make p-raceway groove flash memory cell, just wants suitable adjusting process parameter.
Make method, comprise following processing step by stack grid-source one-side electronic injection flash memory of the present invention:
(a) use p-N-type semiconductor N wafer as substrate, at first define source region (AA), form isolated area [STI (shallow trench isolation) or LOCOS (silicon selective oxidation)];
(b) as Fig. 7, form dark n-trap and on dark n-trap, form the p-trap, added electric field carries out ion and injects, and with the ion concentration that threshold voltage adjustments is injected, prevents and penetrates the ion injection;
(c) as Fig. 8, add mask and block thick oxide region (being area B), the threshold voltage ion that thin-oxide district (being regional A) added injects, and the injection of nitrogen (N) ion, and the nitrogen ion concentration scope of injection is 1 * 10
13Ion/cm
2-5 * 10
14Ion/cm
2, preferred nitrogen ion concentration is 1 * 10
14Ion/cm
2
(d) form gate oxide layers, for example, A district thickness d 1 is
, B district thickness d 2 is 150A.
(e) mix in the polysilicon layer 1, form floating boom, the impurity concentration of being mixed is 6 * 10
14Ion/cm
2Form the polysilicon interlayer dielectric layer, for example ONO or other high quality dielectric layers; Polysilicon layer 2 heavy doping form n
+The type polysilicon control grid.
(f) carry out arsenic ion and inject formation source/drain junction point.
(g) shelter the drain junction point, the source node is carried out phosphonium ion inject, form DDD (double diffused leakage) structure, finish the manufacturing process of memory cell.Formed 1 memory cell structure is presented among Fig. 3.
Therefore, the advantage according to stack grid-source one-side electronic injection flash memory of the present invention is:
(1) between two floating booms part of different oxide thickness, produces a big electric field of walking crosswise at the interface, this transverse electric field quickens the electronics of raceway groove, makes it have high-energy, and vertical high electric field attracts high-energy electron injects to floating boom, programming efficiency is higher, makes the read or write speed of memory faster.
(2) the same, simple in structure with existing stacking gate structure, size is little, and density is big, the integrated level height, and manufacturing process is simple, makes the qualification rate height, low cost of manufacture.
According to another technical scheme of the present invention, provide manufacture method according to stack grid-source one-side electronic injection flash memory of the present invention.
According to the manufacture method of stack grid-source one-side electronic injection flash memory of the present invention, the inventive method comprises following processing step:
(1) with oxide skin(coating) separated into two parts under the floating boom, a part is relatively thinner tunnel oxide region (regional A among Fig. 3), and tunnel surface injects nitrogen (N) ion; Another part is thicker gate oxide zone (area B among Fig. 3), and nitrogen (N) ion is not injected on the grid surface;
(2) use thermal oxidation process, the surface of injecting the surface of tunnel area A of nitrogen (N) ion and the gate region B that nitrogen (N) ion is not injected on its surface on its surface is grow oxide simultaneously; The oxidation rate on Close Tunnel A surface of injecting nitrogen (N) ion is slow, the oxide skin(coating) (a-quadrant among Fig. 3) that growth fraction is thin, and the oxidation rate on gate region B surface of not injecting nitrogen (N) ion is fast, simultaneously the thicker oxide skin(coating) (the B zone among Fig. 3) of growth fraction.
Feature according to stack grid-source one-side electronic injection flash memory of the present invention is:
(a) tunnel area A surface injecting nitrogen ion at first reduces oxidation rate, when carrying out thermal oxidation at the same time, and tunnel oxide that the a-quadrant growth fraction in Fig. 3 is thin and the thicker gate oxide layers of a-quadrant growth fraction in Fig. 3.
(b) discontinuity in tunnel causes the electronics injection effect of one side from the source, and additional channel ion injects among different and (2) the regional A of the oxide skin(coating) thickness that to cause discontinuous two factors in tunnel be (1) regional A and area B, to adjust threshold voltage vt.
(c) floating boom covers whole conducting channel (regional A and area B).The Be Controlled grid are overlapping fully on the floating boom.Therefore, stack grid-source one-side electronic injection flash memory of the present invention has the grid coupling rate identical with existing stacking gate ETOX, the grid coupling rate height of score grid structure.
(d) the memory cell hot electron programming that source one side is injected.
(e) the source node is double diffused leakage (DDD) structure, thereby improves and finish a puncture voltage, the tunnel erase of memory cell through the Fowler-Nordheim of source node.
In a word, can reduce manufacturing cost effectively according to stack grid-source one-side electronic injection flash memory of the present invention, reduce program voltage, have than higher program speed, lower programming power consumption, have high reliability identical and high manufacturing qualification rate with the reliability standard of stacking gate ETOX.
The programming of flash memory cell, the operating principle of wiping and reading in are:
(a) the programming principle at first is described, for example, referring to Fig. 4, control-grid voltage V
CG=10V, source voltage Vs=5V, drain voltage V
D=earthed voltage, underlayer voltage V
B=earthed voltage.Discontinuity between zone A and the area B produces the transverse electric field peak value in discontinuous position.Transverse electric field peak value electric conduction of heating charge carrier.Attract the charge carrier that is heated to floating boom from the high vertical electric field of control gate coupling; Floating boom is programmed into high threshold voltage state (logical zero) gradually; When floating boom accumulation electronics, vertical electric field correspondingly reduces, therefore programming oneself convergence.
The principle of (b) wiping is, for example, referring to Fig. 5, control-grid voltage V
CG=earthed voltage, source voltage Vs=10V, drain electrode floats, underlayer voltage V
B=earthed voltage.Unsteady drain electrode is handled through Fowler-Nordheim, and the electric field that is added between source electrode and the control gate will be attracted to the source node from the electronics that floating boom discharges.Then, cell erase is to low threshold voltage state (logical one).The source node is designed to the DDD structure two purposes, and wherein, a purpose is the overlap length of increase source-grid, to improve efficiency of erasing.Another purpose is to improve the node puncture voltage, because the source node need keep high voltage drop in the erase operation process.
(c) memory cell read in principle, for example, referring to Fig. 6, control-grid voltage V
CG=5V, source voltage Vs=earthed voltage, underlayer voltage V
B=earthed voltage, drain voltage V
D=1V.If read current (I
Rend) greater than critical level, then, memory cell is in the logical one state, otherwise memory cell is in the logical zero state.
More than be example with n-raceway groove flash memory cell, describe structure and manufacture method thereof in detail by stack grid-source one-side electronic injection flash memory of the present invention.But the invention is not restricted to detailed description herein.The technical staff of the industry should be appreciated that under the premise without departing from the spirit and scope of the present invention, the present invention can implement with other form, and the present invention also has various improvement and variation, and these improvement and variation all fall in the scope of protection of present invention.Therefore, by whole technical schemes of the present invention, cited execution mode just is used to illustrate the present invention rather than restriction the present invention, and the present invention is not limited to the details of describing herein.The scope of protection of present invention is defined by appending claims.
Claims (17)
1, stack grid-source one-side electronic injection flash memory, comprise the stacking gate construction unit, it is characterized in that, comprise two oxide areas that thickness is different under the floating boom in the described stacking gate structure, promptly, the thicker area B of oxide skin(coating) thickness under regional A that the tunnel oxide layer thickness is relatively thinner and the grid, interface between the area B that oxide skin(coating) thickness is thicker under regional A that the tunnel oxide layer thickness is relatively thinner and the grid is positioned at the conducting channel length range, on the stacking gate structure during making alive, form big transverse electric field at the interface between regional A and the area B.
2, according to the stack grid-source one-side electronic injection flash memory of claim 1, it is characterized in that, the regional A that the tunnel oxide layer thickness is relatively thinner is to inject nitrogen (N) ion in Close Tunnel, forms the relatively thinner oxide skin(coating) of thickness in thermal oxidation process on the Close Tunnel surface; With the thicker area B of oxide skin(coating) thickness under the grid, be the thicker area B of oxide skin(coating) thickness under the grid, be in the grid region, not inject nitrogen (N) ion, in thermal oxidation process, on the surface, grid region, form the thicker oxide skin(coating) of thickness.
According to the stack grid-source one-side electronic injection flash memory of claim 2, it is characterized in that 3, the concentration range of injecting nitrogen (N) ion in Close Tunnel is 1 * 10
13Ion/cm
2-5 * 10
14Ion/cm
2
According to the stack grid-source one-side electronic injection flash memory of claim 3, it is characterized in that 4, the concentration of described nitrogen ion is 1 * 10
14Ion/cm
2
According to the stack grid-source one-side electronic injection flash memory of claim 2, it is characterized in that 5, the scope of the oxide skin(coating) thickness d 1 that relatively approaches among the regional A is
Thickness d 2 scopes of the oxide skin(coating) in thicker B district are
According to the stack grid-source one-side electronic injection flash memory of claim 5, it is characterized in that 6, the thickness of the oxide skin(coating) thickness d 1 that relatively approaches among the described regional A is
According to the stack grid-source one-side electronic injection flash memory of claim 5, it is characterized in that 7, the thickness d 2 of the oxide skin(coating) in described thicker B district is
8, the manufacture method of stack grid-source one-side electronic injection flash memory comprises following processing step:
(a) use p-N-type semiconductor N wafer as substrate, at first define source region (AA), form isolated area;
(b) form dark n-trap and form the p-trap on dark n-trap, added electric field carries out ion and injects, and with the ion concentration that threshold voltage adjustments is injected, prevents and penetrates ion and inject;
(c) add mask and block the thicker area B of oxide skin(coating) thickness under the grid, threshold field nitrogen (N) ion that the relatively thinner regional A of tunnel oxide layer thickness is added injects;
(d) form gate oxide layers;
(e) mix in the polysilicon layer (1), form floating boom; Form the polysilicon interlayer dielectric layer; Polysilicon layer (2) heavy doping forms n
+The type polysilicon control grid;
(f) carry out arsenic ion and inject formation source/drain junction point.
(8) shelter the drain junction point, the source node is carried out phosphonium ion inject, form double diffused drain structure, finish the manufacturing process of memory cell.
9, the manufacture method of stack grid-source one-side electronic injection flash memory according to claim 8 is characterized in that, the scope of described regional A thickness d 1 is
10, the manufacture method of stack grid-source one-side electronic injection flash memory according to claim 8 is characterized in that, described area B thickness d 2 scopes are
11, the manufacture method of stack grid-source one-side electronic injection flash memory according to claim 9 is characterized in that, described A district thickness d 1 is
12, the manufacture method of stack grid-source one-side electronic injection flash memory according to claim 10 is characterized in that, described B district thickness d 2 is
13, according to the manufacture method of the stack grid-source one-side electronic injection flash memory of claim 8, it is characterized in that described polysilicon interlayer dielectric layer is an oxide-nitride-oxide layer.
According to the manufacture method of the stack grid-source one-side electronic injection flash memory of claim 8, it is characterized in that 14, the nitrogen ion concentration scope of injecting in the step (c) is 1 * 10
13Ion/cm
2-5 * 10
14Ion/cm
2
15, according to the manufacture method of the stack grid-source one-side electronic injection flash memory of claim 14, it is characterized in that described nitrogen ion concentration is 1 * 10
14Ion/cm
2
16, according to the manufacture method of the stack grid-source one-side electronic injection flash memory of claim 8, it is characterized in that in the step (e), the concentration range of the nitrogen that is mixed (N) ion is 1 * 10
13Ion/cm
2-5 * 10
14Ion/cm
2
17, according to the manufacture method of the stack grid-source one-side electronic injection flash memory of claim 16, it is characterized in that the concentration of described nitrogen (N) ion is 1 * 10
14Ion/cm
2
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11532637B2 (en) * | 2015-12-29 | 2022-12-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Embedded flash memory cell including a tunnel dielectric layer having different thicknesses over a memory region |
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| US9324709B2 (en) | 2013-08-19 | 2016-04-26 | Globalfoundries Inc. | Self-aligned gate contact structure |
| CN104425625B (en) * | 2013-08-20 | 2017-12-22 | 中芯国际集成电路制造(上海)有限公司 | Floating-gate device structure and forming method thereof |
| CN107993957A (en) * | 2017-11-30 | 2018-05-04 | 长江存储科技有限责任公司 | The evaluating method of ion implantation concentration detection method and different ions board ion implantation concentration uniformity |
| CN112786598A (en) * | 2019-11-11 | 2021-05-11 | 美商矽成积体电路股份有限公司 | FinFET stacked gate memory and forming method thereof |
| CN113764530A (en) * | 2020-06-03 | 2021-12-07 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor structure and forming method thereof |
| CN113451428B (en) * | 2021-06-28 | 2022-10-21 | 复旦大学 | Double-half floating gate photoelectric memory and preparation process thereof |
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| US11532637B2 (en) * | 2015-12-29 | 2022-12-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Embedded flash memory cell including a tunnel dielectric layer having different thicknesses over a memory region |
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