CN100586158C - Photoelectric signal processing circuit and method of CMOS image sensor - Google Patents
Photoelectric signal processing circuit and method of CMOS image sensor Download PDFInfo
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- CN100586158C CN100586158C CN200710043668A CN200710043668A CN100586158C CN 100586158 C CN100586158 C CN 100586158C CN 200710043668 A CN200710043668 A CN 200710043668A CN 200710043668 A CN200710043668 A CN 200710043668A CN 100586158 C CN100586158 C CN 100586158C
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Abstract
The invention discloses a photoelectric signal processing method of a CMOS image sensor, including: resetting a photodiode when the line reset signal is at high level, before the exposure of the photodiode; when the line enable signal is at high-level for the first time and the reset sampling control signal is at high-level, sampling the resetting voltage of the photosensitive diode as a voltage signal of the photosensitive diode before exposure and temporary storing; after the exposure of the photosensitive diode, when the line enable signal is at high-level again and the exposure sampling control signal is at high-level, sampling the voltage signal of the photosensitive diode after the exposure; comparing the voltage signals of the photosensitive diode before and after exposure, and taking the comparative result as an image signal to output. The present invention also discloses a photoelectric signal processing circuit of a CMOS image sensor. The inventive photoelectric signal processing circuit and method of a CMOS image sensor, resolve the problem of inaccurate correlation second sampling, realizes accurate correlation second sampling and improves image quality.
Description
Technical field
The present invention relates to complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor, particularly the photoelectric signal processing circuit and the Photoelectric Signal Processing method of complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor.
Background technology
Imageing sensor is the semiconductor device that is used for optical imagery is converted to the signal of telecommunication, comprises charge coupled device (CCD, Charge Coupled Device) imageing sensor and complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor.
General ccd image sensor comprises the photodiode arrangement that light signal is converted to the signal of telecommunication, a plurality of vertical charge coupled devices, be formed between each vertical photodiode of aiming at the matrix type configuration, and vertically transmit the electric charge that originates from each photodiode.Horizontal charge coupled device is used for flatly transmitting the electric charge that is transmitted by each vertical electric charge coupled apparatus, and sense amplifier, is used to detect and export the electric charge of horizontal transmission.The defective of charge coupled device is driving method complexity, high power consumption and the complex fabrication process that needs multistage photoetching treatment.In addition, in charge coupled device, be difficult to and be integrated in the single-chip devices such as the such complementary circuit of control circuit, signal processor and analog to digital converter, thereby, hindered the development of the compact product that utilizes this imageing sensor, for example, digital camera and digital camera.
And therewith relatively, cmos image sensor has adopted and has utilized control circuit and the signal processing circuit CMOS technology as peripheral circuit, has also adopted to allow to utilize and has exported with the MOS transistor sequence detection of the corresponding setting of quantity of the pixel of arranging and the switching technique of detected image thus.In addition, cmos image sensor has utilized the CMOS manufacturing technology.Thereby, to compare with ccd image sensor, cmos image sensor has following advantage: 1) compare with ccd image sensor, cmos image sensor technology cost is lower.2) cmos image sensor can pass through single power operation, makes that its power consumption is lower than ccd image sensor.3) cmos image sensor can be integrated into signal processing circuit on the sensor chip at circuit, thereby area is littler.
The existing C mos image sensor generally includes 3 tubular constructions and 4 tubular constructions.The structure of 4 pipe pixel cells, generally include three transistors and one and be used to the photodiode that absorbs incident light and be converted to photoelectric current, as shown in Figure 1,4 pipe cmos image sensors comprise photodiode PD, the first transistor T1, transistor seconds T2, the 3rd transistor T 3 and the 4th transistor T 4.Photodiode plus earth, negative pole link to each other with the source electrode of the 4th transistor T 4; The source electrode of the first transistor T1 links to each other with the drain electrode of the 4th transistor T 4, the grid of the first transistor T1 receives reset signal (RST), drain electrode links to each other with the drain electrode of transistor seconds T2 and link to each other so that pixel voltage VDDPIX to be provided with the peripheral power supply circuit; The grid of transistor seconds T2 links to each other with the source electrode of the first transistor T1, source electrode links to each other with the drain electrode of the 3rd transistor T 3; The grid of the 3rd transistor T 3 receives and exercises energy signal (ENX), source electrode links to each other with voltage sampling circuit; The grid of the 4th transistor T 4 links to each other with transmission gate.Wherein, the effect of the first transistor T1 provides reset function.The effect of transistor seconds T2 is as follower.The effect of the 3rd transistor T 3 is to receive to exercise the energy signal.The effect of the 4th transistor T 4 is as transfer tube.The first transistor T1 and the 4th transistor T 4 are transferred to photodiode PD with pixel voltage VDDPIX during conducting together, and the 3rd transistor T 3 and the 4th transistor T 4 are that the electric charge on the photodiode PD is transferred on the electric capacity of voltage sampling circuit during conducting together.But, 4 tubular construction technology implementation procedure more complicated, and because the light sensitivity of cmos image sensor is influenced by the ratio degree of the whole surf zone of shared surf zone of photodiode and cmos image sensor, if thereby the metal-oxide-semiconductor quantity of pixel cell is more, will make the actual photosensitive area of each pixel cell less, thereby influence picture quality.
Correspondingly, the structure of existing 3 pipe pixel cells as shown in Figure 2, comprises photodiode PD, reset transistor T1, follows pipe T2 and enables to manage T3, photodiode plus earth, and negative pole links to each other with the source electrode of reset transistor T1; The drain electrode that the grid of reset transistor T1 receives reset signal (RST), drains and follow pipe T2 links to each other and links to each other so that pixel voltage VDDPIX to be provided with the peripheral power supply circuit; The grid of following pipe T2 links to each other with the negative pole of photodiode, source electrode links to each other with the drain electrode that enables to manage T3; The grid that enables to manage T3 receive exercise can signal (ENX), source electrode links to each other with voltage sampling circuit.The effect of reset transistor T1 provides reset function, and the voltage of photodiode PD is resetted.The effect of following pipe T2 is as follower.The effect that enables to manage T3 is can signal when being high when receiving enforcement, and photodiode PD both end voltage is flowed to sample circuit.With respect to the cmos image sensor that adopts 4 tubular constructions, the photosensitive area of the cmos image sensor of 3 tubular constructions can be bigger.
In for example patent No. is to find more information about cmos image sensor in the Chinese patent of ZL 02120295.8.
And the cmos image sensor of the existing 3 tubular constructions double sampling of being correlated with realizes that the process of Photoelectric Signal Processing is as follows, and in conjunction with Fig. 2 and shown in Figure 3: when horizontal reset signal RST was high level, reset transistor T1 conducting was charged to capacitor C 3; When horizontal reset signal RST was low level by hypermutation, capacitor C 3 chargings finished, and approach pixel voltage VDDPIX substantially; In the exposure process, photodiode PD is subjected to illumination effect, and resistance value diminishes, and capacitor C 3 begins discharge, makes that the voltage on the capacitor C 3 reduces.Behind the end exposure, exercise and to uprise by low by signal ENX, enable to manage the T3 conducting, when exposure sampling control signal SHS becomes high level, capacitor C 2 is charged, behind the SHS step-down, horizontal reset signal RST uprises level, again capacitor C 3 is charged, when horizontal reset signal RST is low level by hypermutation, capacitor C 3 chargings finish, and approach pixel voltage VDDPIX substantially.Then, when reset samples control signal SHR becomes high level, capacitor C 1 is charged, behind the employing control signal that the resets SHR step-down, exercise energy signal ENX step-down, charging finishes, the voltage of capacitor C 1 approaches the voltage of capacitor C 3 substantially, and this voltage approximates the voltage of the preceding capacitor C 3 of exposure.Then with the voltage of capacitor C 1 as input signal, the voltage of capacitor C 2 is as the reference signal, obtain voltage difference by the voltage that compares capacitor C 1 and capacitor C 2, the change in voltage of photodiode is used as picture output signal before and after just will exposing, and reaches the purpose that light signal converts the signal of telecommunication to.But there is following deficiency in existing Photoelectric Signal Processing method:
1. owing to conduct is also not quite identical with the voltage of the preceding photodiode of exposure with reference to the voltage of the capacitor C 1 of voltage, and be an approximation, thereby the signal of photodiode change in voltage is just not too accurate before and after the reflection of the output exposure, particularly long in the following time for exposure of half-light, the pixel voltage of reset transistor transmission can change, magnitude of voltage after photodiode resets before and after causing exposing differs bigger, thereby relevant double sampling inaccuracy, finally can influence picture quality.
2. need to carry out resetting for twice in the process of carrying out Photoelectric Signal Processing, thereby the time of Photoelectric Signal Processing is longer, the operating efficiency of transducer is not high.
Summary of the invention
The present invention promptly is in order to solve the relevant coarse problem of double sampling of prior art cmos image sensor.
The present invention has also solved the prior art cmos image sensor and need carry out resetting for twice, thereby the not high problem of efficient.
For addressing the above problem, the invention provides a kind of photoelectric signal processing circuit of cmos image sensor, comprise,
When the horizontal reset signal that receives is high level, photodiode is resetted, and when the enforcement energy signal that receives is high level first, photodiode voltage signal and when the enforcement that receives can signal be high level once more before the output exposure, the pixel cell of photodiode voltage signal after the output exposure;
When the reset samples control signal that receives is high level, receive before the exposure before photodiode voltage signal and the output exposure voltage sampling signal and when the exposure sampling control signal that receives is high level, receive the voltage sampling circuit of exposure back photodiode voltage signal and output exposure back voltage sampling signal;
Compare according to voltage sampling signal before the exposure that receives and exposure back voltage sampling signal, and with the voltage comparator circuit of comparative result as picture signal output.
Before described voltage comparator circuit comprises the memory that is used to store voltage sampling signal before the exposure that received and is used to call the exposure of memory stores voltage sampling signal and with the exposure that is received after voltage sampling signal compare, and with the comparator of comparative result as picture signal output.
Correspondingly, the invention provides a kind of Photoelectric Signal Processing method of cmos image sensor, comprise the following steps,
Before the photodiode exposure, when the reset signal of being expert at is high level photodiode is resetted;
Before photodiode exposure, the enable signal of being expert at is high level first, and the reset samples control signal sample during for high level photosensitive diode reset voltage as exposure before the photodiode voltage signal;
After photodiode exposure, the enable signal of being expert at is high level once more, and at exposure sampling control signal sampling exposure back photodiode voltage signal during for high level;
Photodiode voltage signal before photodiode voltage signal and the exposure after Cai Yang the exposure relatively, and comparative result exported as picture signal.
Compared with prior art, such scheme has the following advantages:
1. such scheme is by the voltage of sampling photodiode before exposure, voltage with the photodiode that obtains of exposure post-sampling compares then, thereby the change in voltage that can accurately reflect exposure front and back photodiode, make relevant double sampling more accurate, improve the accuracy of sensor image output signal, thereby the sensor image quality is improved.
2. such scheme carries out only need once resetting in the process of Photoelectric Signal Processing, has saved the time of Photoelectric Signal Processing, has improved the efficient of working sensor.
Description of drawings
Fig. 1 is prior art cmos image sensor 4 pipe pixel cell structure figure;
Fig. 2 is prior art cmos image sensor 3 pipe pixel cell structure figure;
Fig. 3 is prior art 3 tubular construction cmos image sensor signal processing sequential charts;
Fig. 4 is an embodiment of the invention cmos image sensor Photoelectric Signal Processing method flow diagram;
Fig. 5 is an embodiment of the invention cmos image sensor photoelectric signal processing circuit structure chart;
Fig. 6 is an embodiment of the invention cmos image sensor Photoelectric Signal Processing sequential chart.
Embodiment
The essence of the Photoelectric Signal Processing method of cmos image sensor of the present invention is to sample for photodiode voltage respectively before and after the photodiode exposure, thereby the change in voltage that can accurately reflect exposure front and back photodiode, realize accurately relevant double sampling, improve the accuracy of sensor image output signal.
With reference to shown in Figure 4, the Photoelectric Signal Processing method of embodiment of the invention cmos image sensor comprises the following steps,
Step s1 before the photodiode exposure, resets to photodiode when the reset signal of being expert at is high level;
Step s2, before photodiode exposure, the enable signal of being expert at is high level first, and the reset samples control signal sample during for high level photosensitive diode reset voltage as exposure before photodiode voltage signal and temporary;
Step s3, after photodiode exposure, the enable signal of being expert at is high level once more, and at exposure sampling control signal sampling exposure back photodiode voltage signal during for high level;
Step s4, photodiode voltage signal before photodiode voltage signal and the exposure after Cai Yang the exposure relatively, and comparative result exported as picture signal.
With reference to shown in Figure 5, embodiment of the invention cmos image sensor photoelectric signal processing circuit comprises,
When the horizontal reset signal that receives is high level, photodiode is resetted, and when the enforcement energy signal that receives is high level first, export the photodiode resetting voltage as photodiode voltage signal before exposing and when the enforcement energy signal that receives is high level once more, export the pixel cell 10 of the back photodiode voltage signal that exposes;
When the reset samples control signal that receives is high level, receive before the exposure before photodiode voltage signal and the output exposure voltage sampling signal and when the exposure sampling control signal that receives is high level, receive the voltage sampling circuit 20 of exposure back photodiode voltage signal and output exposure back voltage sampling signal;
Compare according to voltage sampling signal before the exposure that receives and exposure back voltage sampling signal, and with the voltage comparator circuit 30 of comparative result as picture signal output.
Photoelectric signal processing circuit with the cmos image sensor of 3 tubular constructions is that example comes to be elaborated for the photoelectric signal processing circuit and the Photoelectric Signal Processing method of cmos image sensor of the present invention below.
Continue with reference to shown in Figure 5, the effect of pixel cell 10 is before photodiode PD exposure, to photodiode PD reset and with resetting voltage as exposure before the analog voltage signal output of photodiode, and after photodiode PD exposure, the light that photodiode PD is received converts aanalogvoltage to and exports as the analog voltage signal of exposure back photodiode PD.As embodiments of the invention, pixel cell 10 comprises reset transistor T1, and photodiode PD follows pipe T2, enables to manage T3, and capacitor C 3.Wherein, photodiode PD plus earth, negative pole links to each other with the source electrode of reset transistor T1; The grid of reset transistor T1 receives reset signal (RST), drains to link to each other and link to each other with pixel voltage VDDPIX with the drain electrode of following pipe T2; The grid of following pipe T2 links to each other with the negative pole of photodiode PD, source electrode links to each other with the drain electrode that enables to manage T3; The grid that enables to manage T3 receive exercise can signal (ENX), source electrode links to each other with voltage sampling circuit 11.The two ends of capacitor C 3 are connected to positive pole and the negative pole of photodiode PD respectively.Wherein, the effect of reset transistor T1 provides reset function, and the voltage of photodiode PD is resetted.The effect of following pipe T2 is as follower.The effect that enables to manage T3 is can signal when being high when receiving enforcement, and photodiode PD both end voltage is flowed to voltage sampling circuit 20.
The effect of voltage sampling circuit 20 is voltage sampling signals before photodiode PD analog voltage signal and the output exposure before the exposure of sampled pixel unit 10 output, and the analog voltage signal and the output exposure back voltage sampling signal of photodiode after the exposure of sampled pixel unit 10 outputs.Voltage sampling circuit 20 comprises resetting voltage sample circuit (not indicating among Fig. 5) and exposure voltage sample circuit (not indicating among Fig. 5), respectively in order to the analog voltage signal of photodiode PD before the described exposure of sampling and the analog voltage signal of exposure back photodiode PD.
As embodiments of the invention, the resetting voltage sample circuit comprises the resetting voltage controlling of sampling switch of controlling for discharging and recharging of capacitor C 1 according to reset samples control signal SHR 201, and in order to store the capacitor C 1 of the preceding photodiode aanalogvoltage of exposure, and described reset samples control switch 201 and capacitor C 1 are series connection.Further, for voltage sampling signal quality before the exposure that makes reset samples circuit output higher, the programmable gain amplifier (PGA, Programmable Gain Amplifier) (not showing among Fig. 5) that can also after capacitor C 1, connect and have enlarging function.Be transferred to voltage comparator circuit 30 after voltage sampling signal amplified before programmable gain amplifier will expose.
As embodiments of the invention, the exposure voltage sample circuit comprises the exposure voltage controlling of sampling switch of controlling for discharging and recharging of capacitor C 2 according to exposure sampling control signal SHS 202, and in order to store the capacitor C 2 of exposure back photodiode aanalogvoltage, and described exposure sampling control switch 202 and capacitor C 2 are series connection.Further, for voltage sampling signal quality after the exposure that makes exposure sampling circuit output higher, the programmable gain amplifier (PGA, Programmable Gain Amplifier) (not showing among Fig. 5) that can also after capacitor C 2, connect and have enlarging function.Be transferred to voltage comparator circuit 30 after voltage sampling signal amplified after programmable gain amplifier will expose.
The effect of voltage comparator circuit 30 is to receive preceding voltage sampling signal of the exposure of voltage sampling circuit 20 outputs and exposure back voltage sampling signal, and these two signals are compared, and with the picture output signal of comparative result as photoelectric signal processing circuit.
As embodiments of the invention, voltage comparator circuit 30 comprises in order to sampled signal before the exposure of voltage sampling circuit 20 outputs is converted to the analog to digital converter 302 of digital voltage signal, become the analog to digital converter 301 of digital voltage signal in order to exposure post-sampling conversion of signals with voltage sampling circuit 20 outputs, in order to the memory 303 of the digital voltage signal of photodiode before the exposure of storage after analog to digital converter 302 conversion, and the comparator 304 that compares in order to the digital voltage signal for photodiode voltage after the digital voltage signal of photodiode voltage before the exposure and the exposure.Wherein comparator 304 receives the digital voltage signal of photodiode before the exposure of the digital voltage signal of photodiode after the exposure of analog to digital converter 301 transmission and memory 303 transmission respectively, and with the picture signal output of comparative result as photoelectric signal processing circuit.Further, memory 303 can be random asccess memory (RAM), and comparator 304 can be a subtraction device.
In conjunction with Fig. 4, Fig. 5 and shown in Figure 6, before the photoelectric signal processing circuit of cmos image sensor carries out Photoelectric Signal Processing, promptly before exposure, need to reset for photodiode PD earlier.When the level of the horizontal reset signal RST that receives as reset transistor T1 is high, reset transistor T1 conducting, pixel voltage VDDPIX charges to capacitor C 3 by reset transistor T1.The horizontal reset signal RST of indication is that high level is the cut-in voltage of horizontal reset signal RST stable maintenance at reset transistor T1 herein.Because the two ends of capacitor C 3 are connected to positive pole and the negative pole of photodiode PD respectively, capacitor C 3 is because charging process, charge stored is more and more higher, therefore and the voltage at photodiode PD two ends is also more and more higher, also is to make the voltage at photodiode PD two ends reach the process of pixel voltage VDDPIX for the charging process of capacitor C 3.When the level of horizontal reset signal RST by hypermutation when low, reset transistor T1 ends, and finishes for the charging of capacitor C 3, the voltage at photodiode PD two ends has also reached pixel voltage VDDPIX, also finishes for the reseting procedure of photodiode PD at this point.And this moment is because photodiode PD is also unexposed, so resistance value is very big, and the cathode voltage of photodiode PD also maintains pixel voltage VDDPIX, links to each other with the negative pole of photodiode PD and follow the grid of managing T2, therefore, follows pipe T2 conducting.
Continuation, just need be sampled for the voltage of photodiode before the exposure after reseting procedure finishes in conjunction with Fig. 4, Fig. 5 and shown in Figure 6.When the complete step-down of level of horizontal reset signal, the level of exercising energy signal ENX is uprised by low, enables to manage also conducting thereupon of T3, has been in conducting state because follow pipe T2, therefore, enable to manage T3 and will pixel voltage VDDPIX be transferred to voltage sampling circuit by following pipe T2.And when the level of exercising energy signal ENX uprises fully, the level of reset samples control signal SHR is uprised by low, the resetting voltage controlling of sampling switch of controlling for discharging and recharging of capacitor C 1 in the voltage sampling circuit 20 201 is also closed thereupon, and beginning is charged for capacitor C 1.The level of the energy of the enforcement of indication herein signal ENX uprises fully and refers to enforcement energy signal ENX stable maintenance at the cut-in voltage that enables to manage T3, and reset samples control signal SHR refers to the cut-in voltage that reset samples control signal SHR reaches resetting voltage controlling of sampling switch 201 by low uprising.When the level of reset samples control signal SHR during by high step-down, resetting voltage controlling of sampling switch 201 also disconnects thereupon, finishes for the charging process of capacitor C 1.At this moment, the voltage at capacitor C 1 two ends is exactly the voltage VDDPIX of photodiode before the exposure.As previously mentioned, the programmable gain amplifier with enlarging function can be set after capacitor C 1 to amplify for the voltage signal of capacitor C 1, programmable gain amplifier can be transferred to the voltage signal of capacitor C 1 voltage comparator circuit 30 afterwards.Because capacitor C 1 is an analog signal through the voltage signal that programmable gain amplifier amplifies, therefore, voltage comparator circuit 30 can be earlier becomes digital signal by analog to digital converter 302 with analog signal conversion, then this digital data transmission is given memory 303 temporary.What store in the memory 303 at this moment, is exactly the digital voltage signal of photodiode PD before the exposure.The digital coding that the form of described digital voltage signal after analog to digital converter 302 conversions is made up of " 1 " or " 0 ", and the digital voltage signal of the preceding photodiode PD of the exposure of storage is exactly described digital coding in the memory 303.And, behind the complete step-down of level of reset samples control signal SHR, exercise also step-down of energy signal ENX, enable to manage T3 and also end thereupon.
Continuation is in conjunction with Fig. 5 and shown in Figure 6, and after the sampling of the voltage of photodiode PD, PD exposes for photodiode before having finished for exposure.Photodiode PD is subjected to illumination effect, and resistance value diminishes, and capacitor C 3 forms discharge loop with photodiode PD, and capacitor C 3 begins discharge, thereby the voltage on the negative pole of photodiode PD descends.Behind end exposure, the voltage at photodiode PD two ends has also dropped to the voltage after the exposure.
Continuation is in conjunction with Fig. 4, Fig. 5 and shown in Figure 6, and behind the end exposure of photodiode PD, the sampling exposure is the voltage of photodiode afterwards.After the interval of having passed through the photodiode time for exposure, exercise can signal ENX level during once more by low uprising, enable to manage T3 also along with conducting, give voltage sampling circuit 20 with the voltage transmission of exposure back photodiode PD.When the level of exercising energy signal ENX uprises fully, the level of exposure sampling control signal SHS is uprised by low, the exposure voltage controlling of sampling switch of controlling for discharging and recharging of capacitor C 2 in the voltage sampling circuit 20 202 is also closed thereupon, begins capacitor C 2 is charged.The level of the energy of the enforcement of indication herein signal ENX uprises fully and refers to enforcement energy signal ENX stable maintenance at the cut-in voltage that enables to manage T3, and exposure sampling control signal SHS refers to the cut-in voltage that exposure sampling control signal SHS reaches exposure voltage controlling of sampling switch 202 by low uprising.When the level of exposure sampling control signal SHR during by high step-down, exposure voltage controlling of sampling switch 202 also disconnects thereupon, finishes for the charging process of capacitor C 2.At this moment, the voltage at capacitor C 2 two ends is exactly the voltage of exposure back photodiode.As previously mentioned, the programmable gain amplifier with enlarging function can be set after capacitor C 2 to amplify for the voltage signal of capacitor C 2, programmable gain amplifier can be transferred to the voltage signal of capacitor C 2 voltage comparator circuit 30 afterwards.Because capacitor C 2 is an analog signal through the voltage signal that programmable gain amplifier amplifies, therefore, voltage comparator circuit 30 can be earlier becomes digital signal by analog to digital converter 301 with analog signal conversion, gives comparator 304 with this digital data transmission then.The described digital coding of forming by " 1 " or " 0 " by the form of the digital voltage signal after analog to digital converter 301 conversions.And, behind the complete step-down of level of exposure sampling control signal SHS, exercise also step-down of energy signal ENX, enable to manage T3 and also end thereupon.
Continuation is in conjunction with Fig. 4 and shown in Figure 5, behind the voltage of having finished sampling exposure back photodiode PD, the photodiode voltage ratio of will exposing before back photodiode voltage and the exposure obtains photodiode voltage change before and after the exposure, and as the output signal of photoelectric signal processing circuit.Comparator 304 is behind the digital voltage signal of photodiode after the exposure that receives analog to digital converter 301 transmission, can call the digital voltage signal of the preceding photodiode of exposure of memory 303 storages, and with both compare obtain exposing before and after the change in voltage of photodiode, and as the picture output signal of photoelectric signal processing circuit.As previously mentioned, because voltage sampling signal and exposure back voltage sampling signal are after the analog to digital converter conversion before the exposure, the different pieces of information of forming by " 1 " or " 0 " coding that obtains respectively, and comparator 304 just can relatively obtain exposing according to described digital coding before the difference of digital coding of the digital coding of voltage sampling signal correspondence and exposure back voltage sampling signal correspondence, and with the picture output signal of this difference as photoelectric signal processing circuit.Because the digital voltage signal of the analog voltage signal correspondence that the process analog to digital converter is converted to all is unique, therefore the change in voltage of photodiode PD before and after described difference through the digital coding that comparator 304 relatively obtains can very accurately be reacted and be exposed, thereby improve the accuracy of the picture output signal of photoelectric signal processing circuit, and the picture quality of transducer is improved.
In sum, such scheme is also temporary by the voltage of sampling photodiode before exposure, voltage with the photodiode that obtains of exposure post-sampling compares then, thereby the change in voltage that can accurately reflect exposure front and back photodiode, realize accurate secondary correlated sampling, improve the accuracy of sensor image output signal, thereby the sensor image quality is improved.And such scheme carries out only need once resetting in the process of Photoelectric Signal Processing, has saved the time of Photoelectric Signal Processing, has improved the efficient of working sensor.
Though oneself discloses the present invention as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (14)
1. the photoelectric signal processing circuit of a cmos image sensor is characterized in that, comprise,
Pixel cell, be used for when the horizontal reset signal that receives is high level, photodiode is resetted, and when the enforcement energy signal that receives is high level first, export the photodiode resetting voltage as photodiode voltage signal before exposing and when the enforcement energy signal that receives is high level once more, export the back photodiode voltage signal that exposes;
Voltage sampling circuit, be used for when the reset samples control signal that receives is high level, receive before the exposure before photodiode voltage signal and the output exposure voltage sampling signal and when the exposure sampling control signal that receives is high level, receive exposure back photodiode voltage signal and output exposure back voltage sampling signal;
Voltage comparator circuit compares voltage sampling signal before the exposure that receives and exposure back voltage sampling signal, and comparative result is exported as picture signal.
2. the photoelectric signal processing circuit of cmos image sensor as claimed in claim 1, it is characterized in that, before described voltage comparator circuit comprises the memory that is used to store voltage sampling signal before the exposure that received and is used to call the exposure of memory stores voltage sampling signal and with the exposure that is received after voltage sampling signal compare, and with the comparator of comparative result as picture signal output.
3. the photoelectric signal processing circuit of cmos image sensor as claimed in claim 1 is characterized in that, described enforcement energy signal uprises level by low level first when described horizontal reset signal reaches low level by high level.
4. the photoelectric signal processing circuit of cmos image sensor as claimed in claim 3 is characterized in that, when described reset samples control signal reaches high level by low level first at described enforcement energy signal, uprises level by low level.
5. the photoelectric signal processing circuit of cmos image sensor as claimed in claim 4 is characterized in that, described enforcement energy signal is when described reset samples control signal reaches low level by high level, first by high level step-down level.
6. the photoelectric signal processing circuit of cmos image sensor as claimed in claim 5 is characterized in that, when described exposure sampling control signal is high level once more at described enforcement energy signal, uprises level by low level.
7. the photoelectric signal processing circuit of cmos image sensor as claimed in claim 6 is characterized in that, described enforcement can be the time of high level and exercise the energy signal equals photodiode first for the time interval of high level time for exposure by signal once more.
8. the Photoelectric Signal Processing method of a cmos image sensor is characterized in that, comprise the following steps,
Before the photodiode exposure, when the reset signal of being expert at is high level photodiode is resetted;
Before photodiode exposure, the enable signal of being expert at is high level first, and the reset samples control signal sample during for high level photosensitive diode reset voltage as exposure before the photodiode voltage signal;
After photodiode exposure, the enable signal of being expert at is high level once more, and at exposure sampling control signal sampling exposure back photodiode voltage signal during for high level;
Photodiode voltage signal before photodiode voltage signal and the exposure after Cai Yang the exposure relatively, and comparative result exported as picture signal.
9. the Photoelectric Signal Processing method of cmos image sensor as claimed in claim 8 is characterized in that, the photosensitive diode reset voltage of described sampling as exposure before behind the photodiode voltage signal, the photodiode voltage signal is kept in before will expose.
10. the Photoelectric Signal Processing method of cmos image sensor as claimed in claim 8 is characterized in that, described enforcement energy signal uprises level by low level first when described horizontal reset signal reaches low level by high level.
11. the Photoelectric Signal Processing method of cmos image sensor as claimed in claim 10 is characterized in that, when described reset samples control signal reaches high level by low level first at described enforcement energy signal, uprises level by low level.
12. the Photoelectric Signal Processing method of cmos image sensor as claimed in claim 11 is characterized in that, described enforcement energy signal is when described reset samples control signal reaches low level by high level, first by high level step-down level.
13. the Photoelectric Signal Processing method of cmos image sensor as claimed in claim 12 is characterized in that, when described exposure sampling control signal reaches high level once more at described enforcement energy signal, uprises level by low level.
14. the Photoelectric Signal Processing method of cmos image sensor as claimed in claim 13 is characterized in that, described enforcement can be the time of high level and exercise the energy signal equals photodiode first for the time interval of high level time for exposure by signal once more.
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